Circuit operation

The combinational logic circuitry of the 74181 integrated circuit, which is a simple four-bit ALU

An ALU is just a logic that is combinational, and therefore its outputs will alter asynchronously in
response to feedback changes. The result of the ALU procedure seems during the ALU outputs in
regular operation, stable indicators are applied to every one of the ALU inputs and, when time this is
certainly enough known because the "propagation delay") features passed for the indicators to
propagate through the ALU circuitry. The circuitry this is certainly exterior to your ALU accounts for
guaranteeing the stability of ALU input indicators through the entire operation, as well as allowing
time that is adequate the indicators to propagate through the ALU before sampling the ALU result.
Generally speaking, exterior circuitry controls an ALU by making use of indicators to its inputs.
Typically, the circuitry this is certainly exterior reasoning that is sequential control the ALU operation,
that is paced from a time clock signal of the sufficiently low-frequency to ensure plenty of time for the
ALU outputs to stay under worst-case conditions.
As an example, a Central Processing Unit begins an ALU addition operation by routing operands
from their particular sources (that are generally registers) towards the ALU's operand inputs, even
though the control device simultaneously is applicable a worth into the ALU's opcode input,
configuring it to execute addition. The CPU additionally routes the ALU outcome output to a
destination register which will receive the sum at the time this is certainly same. The ALU's feedback
signals, which are held steady through to the time clock this is certainly next are allowed to
propagate through the ALU also to the location register even though the CPU waits for the time clock
this is certainly next. If the time clock this is certainly next, the location sign-up stores the ALU
outcome and, since the ALU operation has finished, the ALU inputs might be put up for the ALU this
is certainly next operation.
Functions
A number of basic arithmetic and bitwise logic functions are commonly supported by ALUs. Basic,
general purpose ALUs typically include these operations in their repertoires:[1][2][3][5]

Arithmetic operations
• Add: A and B are summed additionally the sum appears at Y and carry-out.
• Add with carry: A, B and carry-in tend to be summed and also the amount appears at
Y and carry-out.
• Subtract: B is subtracted from A (or vice versa) plus the difference seems at Y and
carry-out. For this function, carry-out is successfully a "borrow" indicator. This
operation enable you to additionally compare the magnitudes of A and B; in these
instances the Y output is dismissed by the processor, which is only thinking about
the condition bits (particularly zero and negative) that happen from the procedure.
• Subtract with borrow: B is subtracted from the (or the other way around) with borrow
(carry-in) therefore the huge difference seems at Y and carry-out (borrow out).
• Two's complement (negate): A (or B) is subtracted from zero plus the huge
difference appears at Y.
• Increment: A (or B) is increased by one additionally the price that is resulting at Y.
• Decrement: A (or B) is diminished by one additionally the worth this is certainly
resulting at Y.
• Pass through: all components of A (or B) appear unmodified at Y. This operation is
normally used to determine the parity of the operand or if it is zero or bad, or to load
the operand as a processor sign-up.
Bitwise logical operations
 AND: the bitwise AND of A and B appears at Y.
 OR: the bitwise OR of A and B appears at Y.
 Exclusive-OR: the bitwise XOR of A and B appears at Y.
 Ones' complement: all bits of A (or B) are inverted and appear at Y.
Bit shift operations
Bit shift examples for an eight-bit ALU

Type Left Right

Arithmetic shift
 Logical shift

Rotate

Rotate through carry

ALU shift operations cause operand A (or B) to shift left or right (depending on the opcode) and the
shifted operand appears at Y. Simple ALUs typically can shift the operand by only one bit position,
whereas more complex ALUs employ barrel shifters that allow them to shift the operand by an
arbitrary number of bits in one operation. In all single-bit shift operations, the bit shifted out of the
operand appears on carry-out; the value of the bit shifted into the operand depends on the type of
shift.

 Arithmetic shift: the operand is treated as a two's complement integer, meaning that the
most significant bit is a "sign" bit and is preserved.
 Logical shift: a logic zero is shifted into the operand. This is used to shift unsigned
integers.
 Rotate: the operand is treated as a circular buffer of bits so its least and most significant
bits are effectively adjacent.
 Rotate through carry: the carry bit and operand are collectively treated as a circular
buffer of bits.

Applications
Multiple-precision arithmetic
In integer computations which can be arithmetic multiple-precision arithmetic is an algorithm that
runs on integers which are bigger than the ALU term dimensions. To achieve this, the algorithm
treats each operand as an purchased collection of ALU-size fragments, arranged from most-
significant MS that is least-significant (LS) or the other way around. The 24-bit integer 0x123456
could be addressed as a collection of three 8-bit fragments: 0x12 (MS), 0x34, and 0x56 (LS) as an
example, in the case of an 8-bit ALU. The ALU can right work on this "piece" of operand since the
measurements of a fragment exactly matches the ALU term dimensions.
The algorithm makes use of the ALU to straight run on particular operand fragments and thus
produce a corresponding fragment (a "partial") for the result that is multi-precision. Each limited,
when created, is written to an connected area of storage space that is designated for the effect this
is certainly multiple-precision. This method is duplicated for many operand fragments so as to
produce a group that is total of, that is caused by the multiple-precision operation.
In arithmetic operations (age’s., inclusion, subtraction), the algorithm begins by invoking an ALU
operation on the operands' LS fragments, thereby creating both a LS partial and a carry out bit. The
limited is written by the algorithm to designated storage space, whereas the processor's condition
device typically shops the perform bit to an ALU status sign-up. The algorithm then advances into
the fragment this is certainly next of operand's collection and invokes an ALU operation on these
fragments combined with the stored carry bit through the previous ALU operation, thus producing
another (more significant) limited as well as a perform bit. As prior to, the carry bit is saved into the
status sign-up additionally the limited is written to designated storage. This process repeats until all
operand fragments happen processed, causing a complete assortment of partials in storage, which
comprise the multi-precision result this is certainly arithmetic.
The order of operand fragment processing is based on the change course in multiple-precision move
functions. In left-shift businesses, fragments tend to be processed LS initially due to the fact LS bit of
each partial—which is communicated via the saved carry bit—must be acquired through the MS little
bit of the formerly left-shifted, less-significant operand. Conversely, operands tend to be processed
MS first in right-shift operations since the MS bit of each partial should be acquired from the LS little
bit of the previously right-shifted, more-significant operand.
In bitwise rational operations (age’s., rational AND, reasonable otherwise), the operand fragments
may be processed in any arbitrary purchase because each partial depends only regarding the
corresponding operand fragments (the stored carry bit from the earlier ALU operation is ignored).
Complex operations
Although an ALU can be designed to perform complex functions, the resulting higher circuit
complexity, cost, power consumption and larger size makes this impractical in many cases.
Consequently, ALUs are often limited to simple functions that can be executed at very high speeds
(i.e., very short propagation delays), and the external processor circuitry is responsible for
performing complex functions by orchestrating a sequence of simpler ALU operations.
For example, computing the square root of a number might be implemented in various ways,
depending on ALU complexity:

 Calculation in a single clock: a very complex ALU that calculates a square root in one
operation.
 Calculation pipeline: a group of simple ALUs that calculates a square root in stages, with
intermediate results passing through ALUs arranged like a factory production line. This
circuit can accept new operands before finishing the previous ones and produces results
as fast as the very complex ALU, though the results are delayed by the sum of the
propagation delays of the ALU stages. For more information, see the article
on instruction pipelining.
 Iterative calculation: a simple ALU that calculates the square root through several steps
under the direction of a control unit.
The implementations above transition from fastest and most expensive to slowest and least costly.
The square root is calculated in all cases, but processors with simple ALUs will take longer to
perform the calculation because multiple ALU operations must be performed.
Implementation
An ALU is usually implemented either as a stand-alone integrated circuit (IC), such as the 74181, or
as part of a more complex IC. In the latter case, an ALU is typically instantiated by synthesizing it
from a description written in VHDL, Verilog or some other hardware description language. For
example, the following VHDL code describes a very simple 8-bit ALU:

entity alu is
port ( -- the alu connections to external circuitry:
A : in signed(7 downto 0); -- operand A
B : in signed(7 downto 0); -- operand B
OP : in unsigned(2 downto 0); -- opcode
Y : out signed(7 downto 0)); -- operation result
end alu;

architecture behavioral of alu is