Study of Asynchronous Counter: Objective
Study of Asynchronous Counter: Objective
LAB#13
STUDY OF ASYNCHRONOUS COUNTER
OBJECTIVE:
To practice about Asynchronous Counter and its application
To practice and design of asynchronous up counter and down counter
To design and test 3-bit binary asynchronous counter using flip-flop IC 7476 for the given
sequence.
THEORY:
A counter in which each flip-flop is triggered by the output goes to previous flip-flop. As all the
flip-flops do not change state simultaneously spike occur at the output. To avoid this, strobe
pulse is required. Because of the propagation delay the operating speed of asynchronous counter
is low. Asynchronous counter are easy and simple to construct.
MOD-8 UP COUNTER
CIRCUIT DIAGRAM:
TRUTH TABLE
CLK QC QB QA
0 0 0 0
1 0 0 1
2 0 1 0
3 0 1 1
4 1 0 0
5 1 0 1
6 1 1 0
7 1 1 1
8 0 0 0
MOD_6 UP COUNTER
CIRCUIT DIAGRAM:
TRUTH TABLE
CLK QC QB QA
0 0 0 0
1 0 0 1
2 0 1 0
3 0 1 1
4 1 0 0
5 1 0 1
6 0 0 0
CIRCUIT DIAGRAM:
TRUTH TABLE
CLK QC QB QA
0 1 1 1
1 1 1 0
2 1 0 1
3 1 0 0
4 0 1 1
5 0 1 0
6 0 0 1
7 0 0 0
8 1 1 1
CIRCUIT DIAGRAM:
TRUTH TABLE
CLK QC QB QA
0 1 1 1
1 1 1 0
2 1 0 1
3 1 0 0
4 0 1 1
5 0 1 0
6 1 1 1