Jawaharlal Nehru Engineering College: Laboratory Manual
Jawaharlal Nehru Engineering College: Laboratory Manual
College
Laboratory Manual
Network Theory
For
Manual made by
Ó JNEC, Aurangabad
FOREWORD
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LABORATORY MANUAL CONTENTS
Ms. V. A.Kulkarni
Author
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SUBJECT INDEX
1.Do’s and Don’ts
2. Lab exercise:
1. Verification of Superposition Theorem.
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Dos and Don‛ts in Laboratory:
1. Submission related to whatever lab work has been completed should be done during
the next lab session.
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EXPERIMENT.NO. 1
CIRCUIT DIAGRAM:-
R R
1 1 2 2
I1 I2
1 l 2 l
PROCEDURE:-
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OBSERVATION TABLE:-
R1 R2
1 2
I1 I2
V2
V1 R3 I3
10V 15V
1
2
R1 R2
2
1
I1 I2
1
2
CONCLUSION: - The branch current is the algebraic sum of currents due to individual
voltage source when all other voltage sources are short circuited; hence superposition
theorem has been verified.
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EXPERIMENT. NO. 2
CIRCUIT DIAGRAM:-
R1 R2
1 2
R3 RL
1 2
THEORY:-
The current flowing through the load impedance R L connected across the terminals
2 & 2 l of a network containing impedance & energy sources is the same as it would
flow if this load impedance were connected across a simple constant voltage source
whose generated emf is an open circuited voltage, measured across the network
terminals 2 & 2 l. Its internal impedance is the same as the impedance of the network
looking back into the terminals 2 & 2l , when all sources have been replaced by
impedances and sources with output terminals 2 & 2 l. across which load impedance RL
is connected.
PROCEDURE:-
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OBSERVATION TABLE:-
CONCLUSION: - The theoretical values and measured values of Vth and Rth and IL are
approximately equal, hence Thevenin‛s theorem has been verified.
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EXPERIMENT NO. 3
CIRCUIT DIAGRAM:-
R1 R2
1 2
R3 RL
1 2
THEORY:-
Any two terminal linear network, consisting of generators and impedances, can be
replaced with an equivalent circuit consisting of a current source Isc in parallel
with an admittance Y AB . The Isc is short circuit current between the network and
Y AB is the admittance measured between the terminals, with all energy sources
eliminated except their internal impedances.
PROCEDURE:-
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OBSERVATION TABLE:-
Sr.No. Vdc Measured values Calculated values
Isc Req IL Isc Req IL
CONCLUSION: - The Calculated values and measured values of Isc, IL, Req are
approximately equal; hence Norton‛s theorem has been verified.
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EXPERIMENT. NO. 4
CIRCUIT DIAGRAM:-
1
R1 R2 2
+ mA _ _
+
Vdc
R3 V RL
_
1 l l
2
THEORY:-
Maximum power will be delivered by a network to an impedance Z R if the
impedance of ZR is the conjugate of the impedance Zl of the network,
measured looking back into the terminals of the network.
Zl
E ZL
PROCEDURE:-
1. Make the connections according to circuit diagram.
1. Connect d.c. power supply of say Vdc=20 volts across terminal
1-1l .
2. Connect variable load RL across terminals 2-2l .
3. Vary RL gradually from minimum value and measure corresponding load current
IL .
4. Find load power for each value of RL and IL.
5. Draw the graph of power v/s load resistances.
6. From the graph note peak power point and correspondingly load resistance.
Verify the same using calculations.
7. Remove the d.c.power supply and short circuit the terminals 1-1l. Remove load
resistance connected across terminals 2-2l and measure the resistance with
the help of Multimeter. This resistance is approximately equal to the load
resistance found in step 6.
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OBSERVATION TABLE:-
Sr.No. Load resistance = Load current IL Power = VL . IL
R L=VL/IL
CONCLUSION: - The maximum power transfer takes place from the network to the
load when equivalent resistance of the network between terminals 2-2l is equal to the
load resistance.
IL
RL RL
MAX POWER
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EXPERIMENT NO 5.
CIRCUIT DIAGRAM:
R L C
Fun
Vs Gen MA
THEORY:-
Current I = V/Z
And,
Phase angle q = tan-1 (XL-Xc)/R
If the frequency of the signal fed to such a series circuit is increased from
minimum , the inductive reactance (XL= 2pfl) increases linearly and the capacitive
reactance (Xc= 1/2pfc) decreases exponentially.
At resonant frequency fr ,
- Net reactance , X=0 (i.e., XL=Xc)
- Impedance of the circuit is minimum , purely resistive and is equal to R
- Current I through the circuit is maximum and equal to V/R
- Circuit current , I is in phase with the applied voltage V (i.e. phase angle q = 0).
At this particular resonant frequency a circuit is in series resonance.
Resonance occurs at that frequency when,
XL=Xc or 2pfL = 1/2pfc
Therefore fr = 1/2pΓLC
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BW of series RLC circuit : For frequency above and below resonant frequency
fr, f1 and f2 are frequencies at which the circuit current is 0.707 times the
maximum current , Imax or the 3dB points.
current
Io
B. W= f2 – f1
Io/.707
Bandwidth = Df = f2-f1 Hz .
PROCEDURE:
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OBSERVATION TABLE:
1KHz
100kHz
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EXPERIMENT NO.6
CIRCUIT DIAGRAM:-
Ic
I
90
IL Ic
L1
0.1m 1uH
Vs
S 90
mA
030mA
IL
THEORY:-
The circuit having an inductor & capacitor connected in parallel is called parallel
resonant circuit
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PROCEDURE :-
1. Make the connections on breadboard according to circuit diagram.
2. Knowing the values of L and C calculate and record the resonance frequency of
parallel resonance circuit.
3. Set the output of function generator to 4 Vrms and frequency to 1khz .Record
the current I through the circuit
4. Increase the frequency gradually and record the resonance frequency Fr at
which the circuit current becomes minimum (that is LED does not glows or
glows very dimly.)
(This is the resonance frequency of the parallel resonance circuit because at
parallel resonance , current I through parallel LC circuit will be minimum)
5. Compare & record the difference in the resonance frequency calculated at step
2 & that measured in step4
6. Vary the input frequency in steps of 500 Hz around the resonance frequency &
in each step record the value of circuit current.
7. From the recorded readings of current in step 6 plot a graph of frequency
versus current & mark the resonance frequency.
8. Mark the -3 dB points on the plotted graph. Find bandwidth (B W) & quality
factor Q
CONCLUSION:-LED will glow at all frequencies other than at resonant frequency that
is circuit impedance is maximum & circuit current is minimum at resonant condition.
Fr f
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EXPERIMENT NO.7
AIM :- To measure input impedance and output impedance of a given two port network
CIRCUIT DIAGRAM:-
R1 R2
I1 2
1
+
R3 R4 V2
V1 _
l
2
1 l
THEORY:-
In two port network port variables are port currents and port voltages. To describe
relationship between ports voltages and currents , two linear equations are
required. In the two port network , there are four variables . These are the
voltages and currents at the input and output ports , namely V1 , I1 and V2 , I2.
From this two are independent and two are dependent variables.
V1=Z11.I1+ Z22.I2
V2=Z21.I2+Z22.I2
PROCEDURE :-
1. Connect dc power supply Va =5V at port 1-1‛ and keep output port open
circuited i.e. I2=0.
2. Measure the current I1 by connecting milliammeter in series with R1.
3. Measure voltage V2 across R4 by Multimeter.
4. From these values of V1, V2, I1 and I2 (I2=0) find input driving point
impedance where V1=Va.
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5. Connect dc power supply Vb= 5v at port 2-2‛ and keep input port open circuited
i.e. I1=0.
6. Measure the current I2 by connecting milliammeter in series with supply .
7. Measure the voltage V1 across R3 by multimeter .
8. From this value of V2 , V1 , I2 and I1( I1=0) find output driving point impedance
that is
Z22 = V2/I2
I1=0
CONCLUSION:-Since Z12=Z21 the circuit is reciprocal and since Z11 = Z22 the circuit
is not symmetrical.
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EXPERIMENT NO. 8
THEORY :- An electric wave filter or simply filter is one electric network which
passes or allowed unattenuated transmission of electric signal within certain frequency
range & stops transmission of electric signal outside this range.
CIRCUIT DIAGRAM :-
C C
1uF 1uF
L
1uH
PROCEDURE:
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OBSERVATION:-
S.No. Frequency f Vi Vo Gain = 20 log Vo/ Vi
FORMULAS
Cut- off frequency Fc = 1 / 4Π (LC)1/2
RO = (L / C )1/ 2
CONCLUSION:-
In this way , we have studied high pass flter.
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EXPERIMENT NO. 9
CIRCUIT DIAGRAM :-
L1 L2
1uH 1uH
C1
1uF
PROCEDURE :-
Ø Connect function generator as shown in circuit diagram.
Ø Set the function generator output voltage to say Vs=10 Volts.
Ø Increase the function generator output signal frequency from minimum say 10
Hz to a maximum signal frequency of 1MHz in decade
steps(10,20,30…..100,200,…..1000,2000…..10k,20k…….).
Ø For applied signal frequency measure voltage.
Ø Calculate gain for the frequency .
Ø Plot the graph of frequency v/s gain.
Ø Find cutoff freq and Ro.
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OBSERVATIONS :-
S.No. Frequency f Vi Vo Gain = 20 log Vo/ Vi
FORMULAS
Cut- off frequency Fc = 1 / 2Π (LC)1/2
RO = (L / C )1/ 2
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EXPERIMENT NO. 10
AIM: - To observe and analyze the waveform across capacitor of a series RC circuit
excited by a unit step function.
CIRCUIT DIAGRAM:-
V( )
t
+ s +
1 1m
CRO
v
s
_
0 t
Input Excitation Circuit diagram
THEORY:-
The basic switching equation that applies any RC circuit is:
Therefore
V = Vcc (1 – et/RC)
Vc
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PROCEDURE:-
1. Connect the setup as shown in diagram .
2. Calculate the RC time constant α (Z=RC) of the circuit and record it .
3. Set the function generator at pulse of Vp-p and pulse tme tp= 1ms
4. For the circuit setup calculate and record the voltage across capacitor on CRO
CONCLUSION :-
If we excite the capacitor by unit step function capacitor will charge
for period G=RC time constant of the ckt.
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Questions for Quiz on NT.
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4. Conduction of VivaVoce Examinations:
Teacher should conduct oral exams of the students with full preparation. Normally, the
objective questions with guess are to be avoided. To make it meaningful, the questions
should be such that depth of the students in the subject is tested. Oral examinations
are to be conducted in cordial environment amongst the teachers taking the
examination. Teachers taking such examinations should not have ill thoughts about
each other and courtesies should be offered to each other in case of difference of
opinion, which should be critically suppressed in front of the students.
5. Evaluation and marking system:
Basic honesty in the evaluation and marking system is absolutely essential and in the
process impartial nature of the evaluator is required in the examination system to
become. It is a wrong approach or concept to award the students by way of easy
marking to get cheap popularity among the students, which they do not deserve. It is a
primary responsibility of the teacher to see that right students who are really putting
up lot of hard work with right kind of intelligence are correctly awarded.
The marking patterns should be justifiable to the students without any ambiguity and
teacher should see that students are faced with just circumstances.
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