Siemens Digital Industries Software

Implementing a
multi-domain system

Executive summary
IoT systems are multi-domain designs that often require AMS, Digital, RF,
photonics and MEMS elements within the system. Tanner EDA provides an
integrated, top-down design flow for IoT design that supports all these
design domains. Learn more about key solutions that the Tanner design
flow offers for successful IoT system design and verification.

Sandra Kupperman
Technical marketing engineer
Siemens Digital Industries Software

siemens.com/mentor
 White paper | Implementing a multi-domain system

Contents

Introduction.............................................................. 3
MEMS implementation............................................. 3
Photonics implementation........................................ 5
Analog/mixed-signal implementation....................... 5
Digital implementation............................................. 6
RF implementation................................................... 7
Ensuring successful tape-out.................................... 8
The take away........................................................... 8

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 White paper | Implementing a multi-domain system

Introduction

Sensor-based designs, such as IoT systems, combine This paper covers key solutions that the Tanner design
many design domains implemented on CMOS (figure 1). flow provides to make multi-domain systems successful.
These systems can be implemented on multiple dies
and could employ multiple packages. To accommodate
multiple sensor types, a traditional CMOS IC flow must
be extended to include MEMS and photonics elements
MEMS Processor
along with analog and digital elements. If the system sensor Analog Analog to
communicates with the Cloud, an RF element is also signal digital
necessary. Photonics processing converter
sensor Radio
Multi-domain design requires that analog, digital, RF,
photonics, and MEMS elements are designed and work
together within the system. The team needs to capture
each element of the design, perform layout and
verification.
Tanner EDA provides an integrated, top-down design
flow for IoT design that supports the five design
domains. Figure 1. A multi-domain system.

MEMS implementation

A big difference between MEMS and IC layout is the use biological fields. The Tanner L-Edit MEMS layout editor
of unique, irregular shapes. Unlike conventional CMOS (figure 2) provides a unique solution to this problem.
IC design, where layout
shapes are usually
Manhattan style (such
as rectangles and recti-
linear polygons), MEMS
design utilizes a much
broader variety of
geometries. This is due
to its wide application
in mechanical, optical,
magnetic, fluidic, and

Figure 2. MEMS design integrated into L-Edit.

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 White paper | Implementing a multi-domain system

The MEMS solution includes: • MEMS 3D Modeling. The 3D Solid Modeler add-in
allows designers to create a 3D model of a MEMS
• Design Tool Editor. A central part of the design flow
device from a selected layout area and fabrication
is Tanner L-Edit MEMS, an advanced layout editor with
process description. The easy-to-use Technology
MEMS-friendly capabilities such as curved polygons
Manager allows them to enter fabrication process
and all-angle Boolean operations. In contrast to other
steps and sequences as well as material properties.
CAD tools designed for mechanical engineering,
Surface and bulk micromachining process steps are
where zero-width lines and open polygons are used
supported, such as material deposit, etch, mechanical
as common constructs, L-Edit MEMS creates closed-
polish, diffusion, growth, electroplating and wafer
polygons so that it can represent clear and dark fields
manipulation steps.
of the masks easily and correctly. As a result designers
can quickly draw and edit masks, and then easily view • System-Level Simulation for MEMS. Compact Model
different combination of masks to examine their over- Builder automatically generates behavioral models
laps and interactions. Using powerful features such as ready for system simulation with electronics and
curve support, interactive DRC, Boolean operations, packaging using 3D data from finite element analysis
object snapping and alignment, designers can work programs. Complex finite element models involving
more efficiently to save time and money. L-Edit a large number of degrees of freedom are reduced
MEMS gives greater precision by performing complex to behavioral models with a few master degrees of
Boolean and derived layer operations with polygons freedom. Designers can also create their own models
of arbitrary shape and curvature. from analytical equations and the tool generates
simulation-ready descriptions in a variety of popular
• Advanced Design Rule Checking. Tanner L-Edit
formats. Compact Model Builder facilitates the bridge
MEMS Plus provides advanced design rule checking to
between 3D and system simulations enabling design
help designers easily find design flaws and improve
teams to work together.
yield. They can easily set up rules with its graphical
interface, making the tool configurable for any tech-
nology. This is important since most MEMS processes
are very specialized or proprietary. L-Edit MEMS Plus
helps shorten verification time with the advanced
Verification Error Navigator that takes designers
instantly to the location of a violation in the layout
editor and provides a clear and thorough summary
report of DRC results. For advanced design rule check-
ing, L-Edit MEMS is integrated with Calibre DRC (with
equation-based DRC) to help filter out false violations
due to DRC rules written for orthogonal layout.

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 White paper | Implementing a multi-domain system

Photonics implementation

The Tanner L-Edit Photonics design flow (figure 3) pro- also supports Mentor’s transistor level and mixed-mode
vides significant productivity improvement with a lay- simulators if the design contains both electrical and
outcentric design flow. This means that designers can optical components.
do all of their work directly in the layout editor. When
Creating a photonic layout is simple with L-Edit
the design is at a point that simulation needs to be run,
Photonics. First, the designer places the photonic com-
a netlist can be created directly from L-Edit Photonics.
ponents. Then, the waveguides are created to connect
This layout-centric design flow removes the need to
those components. Multiple waveguide types are sup-
create a schematic, saving significant time in the design
ported: striped, ribbed, and multi-segmented. In addi-
process, as the layout is the golden design database.
tion, the waveguide can be edited to create an exact
The resulting netlist supports photonic simulation and it
length. When two waveguides cross, the waveguides
are cut back and a crossing cell is automatically
inserted. When it is time to simulate, L-Edit Photonics
Device Design supports integrations with partners, including: Luceda,
generation capture Lumerical, Optiwave, and VPIphotonics™. For physical
verification, L-Edit Photonics launches Calibre
Interactive™ to drive the integrated Calibre tools (cov-
L-Edit
photonics ered later).
L-Edit Photonics supports Mentor-formatted PDKs and
Verification the industry-standard, interoperable iPDK. PDKs are
+ Simulation available from multiple photonic foundries. Designers
litho modeling can also create their own components or create their
own PDK.
Figure 3. The integrated photonics design flow.

Analog/mixed-signal implementation

Tanner EDA provides a complete, end-to-end analog/ back-end tools, from schematic capture, to mixed-signal
mixed-signal (AMS) design flow for IC design. The flow simulation and waveform probing, viewing, and RTL
is optimized for creating custom analog or “Analog on netlist synthesis; to physical layout, place and route,
Top” mixed-signal ICs, working at 28nm and above. and foundry-certified physical verification with Calibre.
The flow is used in a wide variety of markets including: Considered together, these tools comprise a suite that is
automotive, Internet of Things (IoT), imaging/display, interoperable with many popular industry tools and
industrial control, medical, sensors, automotive, RF, industry-standard file formats and the suite minimizes
space, and power management. The Tanner AMS IC risk by providing foundry support.
design flow consists of highly-integrated front and

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 White paper | Implementing a multi-domain system

Digital implementation

Tanner Digital Implementer (TDI), powered by the Oasys The TDI tool flow is closely aligned with the needs of
Synthesis and Nitro Place and Route engines, is inte- “Analog on Top” design, addressing companies working
grated into L-Edit to address the physical implementa- in applications such as automotive, Internet of Things
tion of the digital needs of “Analog on Top” designs. TDI (IoT) imaging/ display, industrial control, medical, sen-
(figure 4) can help designing an analog IC with a small sors, automotive, RF, space, and power management.
amount of digital control or a more complex mixed- Key steps in the flow include:
signal IC. The tool facilitates bringing together complex
• Import design data, technology data, and specify
digital circuits with high performance analog interfaces,
timing. TDI provides a streamlined user interface to
providing a complete flow.
import technology data such as LEF, Liberty®, and PTF
files. Designers can import a Verilog/VHDL netlist and
Tanner digital implementer define timing requirements by specifying clocks or by
Oasys-AMS and Nitro-AMS using a SDC file.
• Define floorplan and power plan requirements. For
Import design and technology floorplan requirements, TDI enables designers to spec-
Data and specify timing
ify chip size, margins, and row site names, or define
the requirements in the layout or via a DEF floorplan
TDI tools Define floorplan and power plan file. For power requirements, TDI enables designers
requirements to specify Power/Ground ring and stripe parameters,
L-Edit TDI user interface or define the requirements in the layout or via a DEF
Synthesis floorplan file.
Oasys-AMS
• Import to layout. After synthesis and place and route
are complete, the results are imported automatically
Place and route into L-Edit.
Nitro-AMS

Figure 4. Tanner Digital Implementer design flow.

TDI supports industry standard file formats for easy

interoperability with libraries, tools, and flows from any
foundry or vendor. Formats include Verilog/VHDL,
OpenAccess and GDSII for layout data, LEF/DEF for
abstracts and routing, Liberty for timing data, SDC for
design constraints, UPF for power, SPEF for parasitics,
and SDF for timing annotation.

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 White paper | Implementing a multi-domain system

RF implementation

Extending mixed-signal simulation to the RF domain, Designers can view results of the simulation and can
Tanner Eldo® RF provides proven RF verification for classify them into two types based on the steady-state
wireless applications in the connected sensor and IoT measurements and the RF toolbox (figure 6). Designers
markets by employing a set of dedicated algorithms to can calculate and display the harmonic distortion and
accurately and efficiently handle the low-power signals 3rd order intercept point with 1dB compression. Steady
in these applications. Tanner Eldo RF expands the capa- state measurements include power efficiency, conver-
bilities of the Eldo simulator to provide a wide range of sion gain, image rejection, noise figure, and phase
analysis capabilities, a set of RF-dedicated functions, noise.
and a powerful set of optimization capabilities suitable
Through the RF Toolbox, designers can view and per-
for various circuit types.
form with the S Parameters and related stability analysis
In order to perform RF simulation, designers can per- for successful tape-out (figure 6).
form multi-tone steady-state analysis (harmonic bal-
ance) for large RF IC containing thousands of elements.
During the simulation, designers can perform and the
shooting method/periodic steady state (PSS) and modu-
lated steady state analysis (figure 5). Designers can also
perform waveform cross-probing following which the
designer can display operating point results on the
obtained schematic.

Figure 6. Viewing RF simulation results.

The Eldo RF integration incorporates powerful optimiza-

tion algorithms to assist designers in fine tuning of
circuit performance. The optimization facility does not
require any external tool as it is all integrated in the
simulation kernel for maximum efficiency. It supports
continuous and discrete, constrained or unconstrained
parameters, and concurrent optimization of several
simulations and analyses.

Figure 5. Integrated Eldo RF simulation.

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 White paper | Implementing a multi-domain system

Ensuring successful tape-out

The multi-domain Tanner IC design flow provides a The tools within the Calibre integration include:
complete, top-down solution from schematic capture
• Calibre nmDRC™: to ensure that the physical layout
and mixed-signal simulation, to full chip assembly and
can be manufactured. Using accurate and proven rule
physical verification. Integrating Calibre into this design
sets from the foundry, quickly debug violations for
flow enables designers to successfully tape-out the
physical verification signoff.
design using the latest technology from the chosen
foundry (figure 7). • Calibre nmLVS™: helps check whether physical layout
is electrically and topographically the same as the
schematic. Calibre nmLVS provides actual device
geometry measurement, programmable electrical rule
checking, and sophisticated interactive debugging
capabilities to ensure accurate circuit verification.
• Calibre xRC™: helps verify that layout-dependent
effects do not affect the electrical performance of the
design. It also delivers accurate parasitic data for use
in comprehensive post-layout analysis and simulation.
• Calibre RVE™: brings the solution together, providing
a graphical results viewing environment that reduces
debug time by visually identifying design issues
instantly and cross-selecting the associated issue in
L-Edit and S-Edit (the Tanner schematic capture tool).

Figure 7. Calibre integration.

The take away

Implementing a system that crosses multiple domains is • Photonics implementation

challenging. The Tanner EDA design flow is architected
• Analog/Mixed-Signal Implementation
to seamlessly work in any of the design domains by
employing design flows for design, simulation, layout, • Digital implementation
and verification of MEMS, Photonics, and AMS designs. • RF implementation
To learn more, visit:
• Ensuring successful tape out
• MEMS implementation

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