Topic 7: Program Control

Instruction
Ismail Ariffin
ECE,SKE,FE,UTM, Skudai, Johor
2020
Structured Programming
 Software Structural Program
o Advanced Software Applies Structural Program
o Loop - repeat statement lines, infinite (non-stop) and finite (stop after
complete counting times)
o while (condition == true) do - repeat AVR statement lines when condition
true else quit
o If (condition == true) else - do statement line when found selection
condition is true
o Switch (case), case == true: do statement
o In Assembly, use jump and call instructions to implement the
structural program
o Jump to an instruction and continue running next sequent instruction.
o Call is a jump to a subprogram from main program and return to main
program from subprogram after finish running the subprogram to continue
 Structured Programming
o Structured programming is aimed on improving the clarity, quality
and development time of a programming by making extensive use
of subroutines, block structure, for & while loop.
o There are five basics structured programming.
o If-then
o If-then-else
o While
o Do-while
o For
o In AVR, we can use BRcc to emulate the structured programming
techniques present in the C language.
Structured Programming
 Structured Programming: If-Then
o Probably the simplest of structured programming.
...
...
CPI R16, 1 ;n denote by R16
if (n == 1) {
BRNE NotEQL
m = 3;
LDI R17, 3 ;m denote by R17
}
NotEQL: NOP
…
…

o The most efficient way to code this is to skip the code block {…} if
the condition is not true.
 Structured Programming: If-Then-Else
o The if-then-else construct has an alternative statement that is
executed when the condition is false.

... …
if (n == 1){ CPI R16, 1 ;n denote by R16
m = 3; BRNE NotEQL
} else { LDI R17,3 ;m denote by R17
m = 2; JMP Done
} NotEQL: LDI R17, 2
… Done: …

o If the test in the if statement is more complex, a few more

instruction might be needed.
 Structured Programming: While
o “while” isn’t a whole lot more difficult than “if”.

…
... Top: CP R16, R17 ;m denote by R16
while (m >= n) { BRLT Exit ;n denote by R17
n++; INC R17
} JMP Top
… Exit: NOP
…

o This is an example of a “pre-test” loop. The condition is tested

before going into loop.
 Structured Programming: Do-While
o “do while” is a looping structure that doesn’t compute the test before
entering the loop. It runs the loop once and then computes the test.

... ...
do { Top: INC R17 ;m denote by R16
n++; CP R16, R17 ;n denote by R17
} while (m >= n); BRGE Top
… …
o Notice that the code produced by the “do while” is shorter (and faster)
than the “while” loop. However, you don’t get something for nothing.
Often times you want to do loop times, really do the test at the
beginning of the loop.
 Structured Programming: For
o Just to finish up all the looping structures present in C, we might as
well show the “for” loop, although it’s really nothing new:

...
CLR R17 ;m denote by R16
... LDI R16, 1 ;n denote by R17
n = 0; Top: CPI R16, 10
for (m = 1; m < 10; m++;){ BRGE Exit
n += m;
ADD R17, R16
} INC R16
… JMP Top
Exit: NOP
…
Jump Instruction
 Jump Instructions
o AVR allows user to change direction of program flow, jump backward or jump forward.
o Two types jump instructions are applicable in AVR. In AVR, all jump instructions are performed by Program
Counter (PC). PC will take the jump address absolutely (real address) or relatively (address will be
computed).
o Unconditional Jump - When CPU executes an unconditional jump, it jumps unconditionally (with no
condition) to the lower or higher location.
- Three types in assembly list:
JMP address ; PC = absolute address
RJMP address ; PC = PC + relative
IJMP ; Use Z address pointer. PC = Z
- Operand applies Program Counter Addressing mode o Program Counter Relative.

o Conditional Branch - For CPU to execute a conditional jump, it checks on a flag condition (e.g. the
Carry, Zero, Overflow and Sign flag condition) , if the condition is true then it jumps to the target
location; otherwise, it continues executing the next immediate instruction
– AVR performs branch operation upon flag condition is true
– Flag condition is set by any of flag affecting/setting instruction before branch operation.
– i.e ADD , SUB, CP, SBRC, SBIC
– Syntax branch instruction:
BRxx address ; PC = PC + relative
– where xx = condition case for branch operation
– Operand applies Program Counter Relative Addressing mode
Jump Instruction (Must)
 Unconditional Branch
Code
o There are three unconditional jump 1 LDI R16, 0

in AVR; 2 LDI R17, 2

3 L1:
L1: ADD R16, R17
o JMP – jump to an address within the 4 JMP L1L1
entire 4M Program memory. 5 SUB R10,R15

o RJMP – jump to an address within PC-

2K+1 and PC+2K (words).
o IJMP – jump to the address pointed
to by the Z Pointer Register.
o The location address where AVR
wants to jump is labelled, using a
unique name, followed by ‘:’
o Then, in front of the jump instruction we mention the name of
the label.
o This causes the CPU to jump to the location we have labelled,
instead of executing the next instruction.
 JMP: Jump
o JMP instruction jump to an address within the entire 4M (words)
Program memory.

o Example:
MOV R1, R0 ;Copy r0 to r1
JMP farplc ;Unconditional jump
…
farplc: NOP ;Jump destination

Flag affected : None

CPU cycle: 3
 JMP: Jump
o In JMP, the PC:
Address Code
0002
0001
0000
0007 0000 .ORG 0
operand, contains
0000 LDI R16, 15
the address of the Machine code: 0001 LDI R17, 5
destination. 940C 0006
0006 0002 JMP LBL_NAME

opCode operand 0004 LDI R18, 4

o When an JMP is
0005 ADD R18, R17
executed: 0006
0006 LBL_NAME:

o PC is loaded Machine code: 0006 ADD R16,R17

with the 940C 0006

0006 0007 JMP LBL_NAME

opCode operand 0009

operand value.
 RJMP: Relative Jump
o RJMP instruction relative jump to an address within PC-2K+1 and
PC+2K (words).
o For AVR with Program memory not exceeding 4K words (8K bytes)
this instruction can address within 4K memory range from any
address location.

Flag affected : None

CPU cycle: 2
 RJMP: Relative Jump
o Example:
SUBI R16, $42 ;Subtract r16 to $42
BRNE error ;Branch if r16 not equal $42
RJMP ok ;Unconditional branch
error: ADD R16, R17 ;Add r17 to r16
INC R16 ;Increment r16
ok: NOP ;Destination for rjmp
 RJMP: Relative Jump
0007
0003
0006
0002
0001
0000 Address Code
+0
+F 0000 .ORG 0
0005 0000 LDI R16, 15
Machine code: 0001 LDI R17, 5

002
C002 0002 RJMP LBL_NAME
opCode operand 0003 LDI R18, 4
0004 ADD R18, R17
0005
0005 LBL_NAME:
Machine code: 0005 ADD R16,R17

CFFE
FFE 0006 RJMP LBL_NAME
opCode operand 0007

o When RJMP is executed:

o The operand will be added to the current value of PC
 IJMP: Indirect Jump
o IJMP instruction indirect jump to the address pointed by the Z (16
bits) Pointer Register.
o The Z-pointer Register is 16 bits wide and allows jump within the
lowest 64k words section of Program memory.

Flag affected : None

CPU cycle: 2
 RJMP: Relative Jump
o Example:
MOV R31, R30 ;Set offset to jump table
IJMP ;Jump to routine pointed to by r31:r30
Jump Instruction on (flag or
expression) condition
 Conditional Branch Instruction
o Identified by the mnemonic BRcc where "cc“ represents the case
condition to be checked.
o General form:
BRcc label

o If the condition is true, then control will branch to “label".

o No effect on condition codes
 Conditional Branch Instruction
Instrcution Abbreviation of Barnch Taken If
BREQ Branch if Equal Z=1
BRNE Branch if Not Equal Z=0
BRCS Branch if Carry Set C=1
BRCC Branch if Carry Clear C=0
BRSH Branch if Same or Higher C=0
BRLO Branch if Lower C=1
BRMI Branch if Minus N=1
BRPL Branch if Plus N=0
BRGE Branch if Greater or Equal (Signed) N = 0 and V = 0, N = 1 and V = 1, N  V
=0=S
BRLT Branch if Less Than Zero (Signed) N = 1 and V = 0, N = 0 and V = 1, N  V
=1=S
BRHS Branch if Half Carry Set H=1
BRHC Branch if Half Carry Cleared H=0
BRTS Branch if T Set T=1
BRTC Branch if T Cleared T=0
BRVS Branch if Overflow flag (V) Set V=1
BRVC Branch if Overflow flag (V) Cleared V=0
BRIE Branch if Interrupt Enabled I=1
BRID Branch if Iterrupt Disabled I=0
 BRGE: Branch if Greater or Equal (Signed)
o BRGE instruction tests the Signed Flag (S) and branches relatively
to PC if S is cleared. Note: S flag is ex-ored between N and V flags.

o Example:
SUB R11, R12 ;Subtract register r11 to r12
BRGE greateq ;Branch if r11 ≥ r12 (signed)
…
greateq: NOP ;Branch destination

Flag affected : None

CPU cycle: 1 if false
2 if true
 BRLT: Branch if Less Than (Signed)
o BRLT instruction tests the Signed Flag (S) and branches relatively to
PC if S is set.

o Example:
SUB R11, R12 ;Subtract register r11 to r12
BRLT less ;Branch if r11 < r12 (signed)
…
less: NOP ;Branch destination

Flag affected : None

CPU cycle: 1 if false
2 if true
 BREQ: Branch if Equal
o BREQ instruction tests the Zero Flag (Z) and branches relatively to
PC if Z is set.

o Example:
SUB R11, R12 ;Subtract register r11 to r12
BREQ equal ;Branch if r11 = r12
…
equal: NOP ;Branch destination

Flag affected : None

CPU cycle: 1 if false
2 if true
 BRNE: Branch if Not Equal
o BRGE instruction tests the Zero Flag (Z) and branches relatively to
PC if Z is cleared.

o Example:
SUB R11, R12 ;Subtract register r11 to r12
BRNE noequal ;Branch if r11 ≠ r12
…
noequal: NOP ;Branch destination

Flag affected : None

CPU cycle: 1 if false
2 if true
 Conditional Branch
o In order to write any real program, you need to be able to branch
conditionally based on the current state of the program.
o The “conditions” are stored in SREG (Status Register).
o Conditional Branch instructions examine bits in SREG and chose
between two courses of action.
Flag condition setting
o SREG bits are either: instruction
o Updated after certain instruction have been executed, or
o Explicitly updated (test, compare)

True direction Branch and flag

condition

Branch Flow chart showing pairing of

False Direction
flag condition setting and branch
instruction.
Compare & Skip Instructions
- Set condition and branch
- Check condition and skip
 CP: Compare
o CP instruction performs a compare between two registers Rd and
Rr. None of the registers are changed.
o All conditional branches can be used after this instruction.

o Example:
CP R4, R19 ;Compare r4 with r19
BRNE noteq ;Branch if r4 not equal r19
…
noteq: NOP ; Branch destination

Flag affected : H, S, V, N, Z, C
CPU cycle: 1
 Example: CP - Compare
o Write a program that if R20 is equal to R21 then R22 is cleared.

No
if (R20 == R21)

Yes

Clear R22

• Solution:
CP R20,R21 ;Z will be set if R20 == R21
BRNE NEXT ;if Not Equal jump to next
CLR R22
NEXT:
 Example: CP - Compare
o Write a program that if R26 is less than R24 then R22 is increases.

No
if (R26 < R24)

Yes

increment R22

• Solution:
CP R26,R24 ;C will be set if R26 < R24
BRCC L1 ;if Carry cleared jump to L1
INC R22
L1:
 Example: CP - Compare
o Write a program that if R26 is greater and equal than R24 then R22 is
increases.
No
Ifif (R26
(R26>= R24)
< R24)

Yes

increment R22

• Solution:
CP R26,R24 ;C will be cleared if R26 >= R24
BRCS L2 ;if Carry set jump to L1
INC R22
L2:
 CPC: Compare with Carry
o CPC instruction performs a compare between two registers Rd and
Rr and also takes into account the previous carry.
o None of the registers are changed.
o All conditional branches can be used after this instruction.

Flag affected : H, S, V, N, Z, C
CPU cycle: 1
 CPC: Compare with Carry
o Example:
;Compare r3:r2 with r1:r0
CP R2, R0 ;Compare low byte
CPC R3, R1 ;Compare high byte
BRNE noteq ;Branch if not equal
…
noteq: NOP ; Branch destination
 CPSE: Compare Skip if Equal
o CPSE instruction performs a compare between two registers Rd
and Rr and skips the next instruction if Rd = Rr.

o Example:
INC R4 ;Increment r4
CPSE R4,r0 ;Compare r4 to r0
NEG R4 ;Only executed if r4 not equal r0
NOP ;Continue

Flag affected : None

CPU cycle: 1 – if false
2/3 – if true
 CPI: Compare with Immediate
o CPI instruction performs a compare between register Rd and a
constant. None of the registers are changed.
o All conditional branches can be used after this instruction.

o Example:
CPI R19, 3 ;Compare r19 with 3
BRNE noteq ;Branch if r19 not equal 3
…
noteq: NOP ; Branch destination

Flag affected : H, S, V, N, Z, C
CPU cycle: 1
 SBRC: Skip if Bit in Register is Cleared
o SBRC instruction tests a single bit in a register and skips the next
instruction if the bit is cleared.

o Example:
SUB R0, R1 ;Subtract r1 from r0
SBRC R0, 7 ;Skip if bit 7 in r0 is cleared
SUB R0, R1 ;Only executed if bit7 in r0 is not cleared
NOP ;Continue (do nothing)

Flag affected : None

CPU cycle: 1 – if false
2/3 – if true
 SBRS: Skip if Bit in Register is Set
o SBRC instruction tests a single bit in a register and skips the next
instruction if the bit is set.

o Example:
SUB R0, R1 ;Subtract r1 from r0
SBRS R0, 7 ;Skip if bit 7 in r0 is set
NEG R0 ;Only executed if bit7 in r0 is not set
NOP ;Continue (do nothing)

Flag affected : None

CPU cycle: 1 – if false
2/3 – if true
 SBIS: Skip if Bit in I/O Register is Set
o SBIS instruction tests a single bit in a I/O register and skips the
next instruction if the bit is set.

o Example:
SBIS PIND, 0 ;Skip if bit 0 in PIND is set
NEG R0 ;Only executed if bit7 in r0 is not set
NOP ;Continue (do nothing)

Flag affected : None

CPU cycle: 1 – if false
2/3 – if true
 EXERCISE PROBLEM
Fill in the flag reference, the flag test value and tick (√) into relevant
boxes to tell whether each of the following branch instruction is taken
(executed) or not taken (not executed). The initial value of R16 and R17
are 0x80 and 0x55, respectively. All branch instructions are
independent to each other.

Flag To be tested Flag Value Branch Branch

to be tested Taken Not Taken
Example CPI R17,0x55 Z 1 √
BREQ LOOP
a) CP R16, R17
BRGE DONE
b) OR R16,R17
BST R16, 6
BRTS KO

c) SUB R17,R16
BRLO NEXT
d) SUBI R16, 0x99
BRMI L1
 Use of Conditional Branch
in Loop Program (Countless and
Countable)
 Loop
(Do … while)
o Countable loop is repeating a sequence of instructions or an
operation in certain number of times.
o Do a loop.
o Example: Use the BRNE to make a loop.
BACK
LDI Rn,Count ;Set loop count

DEC Rn
YES
Z≠1

NO
o In the last two instructions, The Rn is decremented. If it is not zero, it jumps
back to the target address referred by the label
 Example: Loop
• Example: Write an AVR assembly program to add 3 to R16 for
20 times.

R18=3
.ORG 00
LDI R18,3 ; R18 = 3 LOOP R17=20
LDI R17,20 ; set counter = 20
R16=R16+R18
LOOP: ADD R16,R18 ; add 3 to R16
DEC R17 ; decrement counter R17=R17-1
BRNE LOOP ; go to loop if not zero
YES
Z≠1
NO
 Example: Looping
o Write a program that executes the instruction ADD R30, R31 nine
times.

• Solution: R16 = 9

.ORG 00
LDI R16,9 ;R16 = 9 ADD R30,R31

L1: ;REPEAT
ADD R30,R31 ;R30 = R30+R31 R16 = R16 - 1

DEC R16 ;R16 = R16 - 1

BRNE L1 ;UNTIL (R16=0)
L2: RJMP L2 ;Wait here forever Yes
if (R16 > 0)

No

END
 Example: Looping
o Write a program that calculates the result of 9+8+7+..+1.

• Solution: R16 = 9
R17 = 0
.ORG 00
LDI R16, 9 ;R16 = 9
R17 = R17 + R16
LDI R17, 0 ;R17 = 0
L1: ADD R17,R16 ;R17 = R17 + R16
R16 = R16 - 1
DEC R16 ;R16 = R16 - 1
BRNE L1 ;if Z = 0
L2: RJMP L2 ;Wait here forever Yes
if (R16 > 0)

No

END
 Example: Looping
o Write a program that calculates the result of 1+3+5+..+27.

o Solution: R20 = 0
R16 = 1

LDI R20,0 ; SUM = 0

LDI R16,1 ; First Number R20 = R20 + R16

L1:ADD R20,R16 ; Add SUM with number

LDI R17,2 R16 = R16 + 2

ADD R16,R17 ; New odd number

LDI R18,27 ; R17 = 27
SUB R18,R16 ; check last number Yes
R16 <= 27

BRCC L1 ;if last number<= 27,

; branch L1 else quit No

END
 Looping: Example
o Write a program (a) to clear R20, then (b) add 3 to R20 ten times
and (c) send the SUM to PORTB. Use the zero flag and BRNE.
o Solution : Programming flow chart
 Loop: Example
o Write an assembly program to copy the value $55 into
memory locations $140 through $144 using loop.
Looping: Example
 Loop Inside a Loop (Nested Loop)
o The maximum number of repetition in one loop is 255 times which
is $FF.
o To repeat an action more than 255 times, we need to use a loop
inside a loop which is called a nested loop.
o In nested loop, we use two registers to hold the count.
o Example: Write a program to (a) load the PORTB register with
the value of 0x55, and (b) complement PORTB 700 times.
Nested Loop: Example
 Nested Loop: Example
o Example: write a program to (a) load the PORTB register with the
value of 0x55, and (b) complement PORTB 700 times.
 PROBLEM EXERCISE
Analyze the following program. Determine the value of registers and memory
stated in the question. The instructions are executed sequentially. The initial
values of some registers and memory contents are given below:

Initial Values:
R16 $81 $350 $52 $400 $52 X $40B
R17 $68 $351 $67 $401 $67 Y $350
R18 $43 $352 $72 $402 $52 Z $401
R19 $07 $353 $04 $403 $64
R20 $7F $354 $88 $404 $88
R21 $0A $355 $77 $405 $77
$356 $68 $406 $62
$357 $88 $407 $38
$358 $79 $408 $79
$359 $A4 $409 $34
$35A $86 $40A $86
The Program: Answer
AGAIN: LD R16,Y+
$401 $406 X
CP R17,R16
BRGE SKIP $402 $407 Y
ST -X,R16 $403 $408 Z
SKIP: ST Z+,R17 $404 $409
DEC R21
$405 $40A
BRNE AGAIN
NOP
 Loop: Problem Exercise
o Write a program in Atmel assembly language that will
perform the transfer of data as shown in TABLE 1.
Use only instruction involving indirect addressing mode for
processing the data. Use indirect addressing mode WITH
LOOP for this problem.
TABLE 1

Address Content Address Content Address Content Address Content

$200 99 $300 AA $200 99 $300 99
$201 88 $301 BB $201 88 $301 88
$202 77 $302 CC $202 77 $302 77
$203 66 $303 DD $203 66 $303 66
$204 55 $304 EE $204 55 $304 55
$205 44 $305 FF $205 44 $305 44
$206 33 $306 A1 $206 33 $306 33
$207 22 $307 B2 $207 22 $307 22
$208 11 $308 C3 $208 11 $308 11
$209 00 . $309 D4 $209 00 $309 00

Before Execution After Execution

Note: Construct a flowchart and write the program