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Bca III Nov2016 Computer Organization

The document appears to be part of an exam for a computer organization course. It contains multiple choice questions (Sections A and B) and longer answer questions (Sections C and D) on topics relating to computer hardware architecture including: - Memory organization and addressing modes - Instruction execution and pipelining - Processor registers and control units - Interrupts and I/O - Instruction formats and arithmetic operations The questions test knowledge of foundational computer architecture concepts and how different hardware components work together in the processor, memory, and overall system organization.

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38 views2 pages

Bca III Nov2016 Computer Organization

The document appears to be part of an exam for a computer organization course. It contains multiple choice questions (Sections A and B) and longer answer questions (Sections C and D) on topics relating to computer hardware architecture including: - Memory organization and addressing modes - Instruction execution and pipelining - Processor registers and control units - Interrupts and I/O - Instruction formats and arithmetic operations The questions test knowledge of foundational computer architecture concepts and how different hardware components work together in the processor, memory, and overall system organization.

Uploaded by

neice
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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flli[ ]u I I K16U 2070

Reg. No. :

Ill Semester B.C.A. Degree (CBCSS - Reg./Supple./lmprove.)


Examination. Novernber 2016
(2014 Admn. Onwards)
Core Course
3806 BCA : COMPUTER OFGANIZA]ION

SECTION A

a) Each pipeline slaqe is expected lo complete in

b) Tlrepolenla increase in p€rJomance resullinglrorn pipeliningis proporiional

c) Each memoryce can hold

d) l{emoryce sareorganized inlheiom o{

e) One row is ofe memory

l) Twolransistor inverrers are cross connected to implementa basic-

g) l,4emorybandwidlh slhe numbe.ol


be lransiened in one second.

h) can transie r a b ock ol dala lrom an eirernal device to lhe


proLessor .ro-l dni in eaellion Jron lhe pro essor
K16U 2070
lrJfl{tfl lfrlltfl rtlr t]jlfl fl]fl

SECTION.B
Write sholl notes on anyseven ofthe foJJowing qleslions,
Qx2=14)
2. Whatis the significanceofaddressing mode ? Exptain
any one addressjnq mode.
3. Whal is arithrnetic overftow ?
4- Explain sl.aighr-rine sequencing of insirucljon execullon.
5. Exptain Three-stare bus buffers.
6. Exptain diffe rent jnstruction code iormats.
7. What is inlefilpt service fouiine ?
8. What is controlmemory ?
9. Whal is programmed t/O ?
10. What is h[ raiio ?
11. Whatisan eflective address ?

<FCl,O\ _C
Answer any f our oi the toflowinq questions.
(4x3=121
12. Explain instruction cycle.
13. Describe the generat register organizaljon of
CpU.
'
14. Explain prioriry inteffupt.
15. What is tocatity of relerence ?
16. Distinguish beh,veen B tSC and CISC.
17. Explain 2's comptementaddjlion wiih an exampte

SECTION- D
wiie an essay or any two ol rhe toflowing quesltons.
(2x5=10)
18. With the hetp ofa diagran explain Sel Associarive
t4emory mapping.
rg T)plain l\ricrop.oq/dnmed Contro Un .

20. Explain pipetining jn delail.


21. G ive an account ol stack organjzalion.

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