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Lab 12 RAM Full Package

This document provides instructions for Lab #12 on random access memory (RAM). The objectives are to understand RAM operation, memory addressing, reading from and writing to RAM. Students will build and test a memory system using a 6264 RAM IC to verify read and write functionality. Materials include a 6264 RAM IC, 74LS244 octal buffer, and 74LS04 hex inverter. The document explains RAM reading and writing using address, data and control buses. It shows the 6264 RAM pin diagram. The lab assignment has students convert addresses to grey code, then construct 32-location x 4-bit and 16-location x 8-bit memory systems using multiple RAM ICs, showing the block diagrams and bus widths.

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30 views

Lab 12 RAM Full Package

This document provides instructions for Lab #12 on random access memory (RAM). The objectives are to understand RAM operation, memory addressing, reading from and writing to RAM. Students will build and test a memory system using a 6264 RAM IC to verify read and write functionality. Materials include a 6264 RAM IC, 74LS244 octal buffer, and 74LS04 hex inverter. The document explains RAM reading and writing using address, data and control buses. It shows the 6264 RAM pin diagram. The lab assignment has students convert addresses to grey code, then construct 32-location x 4-bit and 16-location x 8-bit memory systems using multiple RAM ICs, showing the block diagrams and bus widths.

Uploaded by

LoveWorldCanada
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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TECH 158 - Digital Electronics (Winter 2020)

Lab #12: Random Access Memory (RAM)

OBJECTIVES: DUE DATE & TIME: Wed. April 15, 2020


 Understand the operation of random access memory system 12:00 NOON
 Learn memory addressing, how to read from RAM, and how to write into RAM Submission by Email
 Build, troubleshoot a memory system using a RAM IC to verify successful read and write or Course Message

MATERIALS:
[1] 6264 RAM IC [1] 74LS244 Octal Buffer
[1]74LS04 Hex Inverter

INFORMATION:
Random access memory (RAM) is the type of memory system that enable us to either read from or write into any memory
location. To read from a memory location, we need to supply the address of the location in addition to a control signal
(output enable: OE) indicating our intention to read. On the other hand, in order to store a data into a memory location,
we need to supply the data itself along with the address and the control signal (write enable: WE) indicating our intention
to write a data. Typically, a memory system is interfaced to a central processing unit (eg a microprocessor) through 3
buses; address bus, data bus, and control bus, which is a bundle of various control signals including OE, WE, and chip select
(CS).
The figure on the right shows the pin diagram of 6264 RAM IC. It receives a 13-bit long
address (A12 ~ A0), which means that it has 213 or 8192 (8KB) memory spaces. It has 8
bidirectional data I/O pins. To write a byte, a LOW pulse should be supplied to pin #27
(WE’), and pin #22 (OE’) should be held HIGH. The bidirectional I/O pins become input
ports. To read a byte, on the other hand, a LOW pulse should be supplied to OE’, while
WE’ is held HIGH. The bidirectional I/O pins become output ports. Note that pin #26 (CE2:
an active-HIGH enable input) should be connected to VCC and pin #20 (CE1’: an active-
LOW enable input) should be grounded to access any memory location.

Lab Assignment:
1. Convert each address to a 4-bit Grey code and record it in the “data to store” column.

Address (A3 A2 A1 A0) Data to store (D3 D2 D1 D0) Address (A3 A2 A1 A0) Data to store (D3 D2 D1 D0)
0000 1000
0001 1001
0010 1010
0011 1011
0100 1100
0101 1101
0110 1110
0111 1111

1
TECH 158 - Digital Electronics (Winter 2020)
Lab #12: Random Access Memory (RAM)

2. Let’s assume that we have 16 X 4 memory IC’s. Shown below is the block diagram of the IC. It accepts a 4-bit address
and a 4-bit data input. It also accepts two active-LOW control inputs: CS (Chip Select) and WR (write). It provides a 4-bit
data output.

4
Addr
4
DIN 4
DOUT

CS
WR

2.1 Use two memory IC’s to construct a 32 address locations X 4 bits memory system. Show the block diagram. In addition,
specify the width (number of binary bits) of each bus: Addr, Din, and Dout.

Addr

DIN DOUT

CS

WR

2.2. Use two memory IC’s to construct a 16 address locations X 8 bits memory system. Show the block diagram. In addition,
specify the width (number of binary bits) of each bus: Addr, Din, and Dout.

Name: Student No.:

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