2010 International Conference on Computer, Mechatronics, Control and Electronic Engineering(CMCE)

An Open-loop Sin Microstepping Driver Based on FPGA

And the Co-simulation of Modelsim and Simulink

Yan Li , ling Huo, Xin Li, lin Wen, Yaohui Wang, Bin Shan
Xi'an Institute o/Optics and Precision Mechanics o/CAS
Xi'an Shanxi Province 710119, China
huo;[email protected]

Abstract- This paper presents a Sin microstepping

A
method which can achieve constant torque, accurate
position control and eliminate low frequency
oscillation. The driver adopts FPGA as core,
achieving 256 subdividing and PID control algorithm.
This paper uses EDA Simulator Link as a co­
simulation tool, which provides an intetface between r------r--� B

Modelsim and Simulink accelerating the function

verification. The co-simulation result verifies the
performance of the control driver algorithm.

Key words- Sin microstepping; FPGA; Figure l.Simplified stepper motor structure

Co-simulation; Modelsim; Simulink;

II .Sin microstepping mode
I . Introduction
Now we take a two phase stepper as an example,
figure 1 show the structure of two phase HM.
The electrical degree between A and B is 90 degrees.
Stepper motor is a kind of electromagnetic
So the current phase passing A and B is also 90
incremental-motion device which can convert digital
degrees. Applying currents to both phases of the motor
impulse into angular displacement and linear
creates a torque phasor, which is proportional to the
displacement. Their inherent stepping abilities make
vector sum of both currents. When the current A and

{� }
them to achieve accurate position control without
current B can change follow equation (1)
feedback. They can track any step position in simple
open loop mode .Stepper motors deliver higher peak A = 10 c s a � (1)
torque than DC motors. Besides that, they are brushless
IB =
10 s ma
machines and therefore need less maintenance. All of
these properties have made them widely used in many The resulting torque generated by the corresponding
position and speed control systems, such us in
computer hard disk drivers and printers, robot
manipulators, etc [1].
{
phases is (2)
MA = KM A � = �
KM .10 .c s a } (2)
Although stepper motors have many good natural MB = K M IB = KM .10 ·s ma
properties, they suffer from an oscillation at low
impulse frequency or lose synchronism at higher Where a = 901n x s, n number of microstep
stepping rate [2]. This paper adopts a SIN s Number of steps
microstepping method to control a hybrid stepper (HS)
motor. This mode improves the resolving of step angle 10 Motor rated current
and achieves constant torque output.

978-1-4244-7956-6110/$26.00 ©2010 IEEE CMCE2010

223
 KM Torque constant of motor III. Hardware implementation of microstepper
Substituting ( 1) into (2) and doing vector summation, driver
the resulting total generated torque measured on the
motor shaft is given by: A. Overview of the hardware design
oonlrol PWM

(3)

The sum current vector i [fu

i- i ie jf - 10 e ja sensing
- A + B -
(4)
� �

curren!
From (3) and (4) we can see that when a IS

ADC
�=======l Anli.a[iansi ng
i
-

changing, the sum vector rotate corresponding Iv Fill"

degrees and keep the absolute value of M() constant,
achieving the constant torque output and stable speed Figure 4. Block diagram of microstep mode
rotation. Figure 4 show the block diagram of the microstepper
Since the drive waveforms are sinusoidal instead of driver (A phase). To rotate the stepper motor, the
square, the step-to-step oscillations are eliminated and currents in the phases of motor are controlled to follow
the associated velocity ripples. This greatly improves sin or cosine waves. In order to do this, FPGA needs to
performance at low rotational speeds and avoids generate Ire! (sin referent current) as a reference. The
resonance problems [3]-[5].
An example of the required current for full step and PI controller will adjust the duty cycle according to the
four micro steps per step operation are showed in current error. The PWM receives the duty cycle and
figure 2 and 3. produces the corresponding switching pulses to send to
H-bridge circuit. PI controller can increase the input
error and decrease the stable error, thus accelerating
the modulating time. The H-bridge circuit is used to
2 L switch the current in phase of motor. The ADC, anti­
I
I : aliasing filter and amplifier are used to get the
...J I
I
__

I
__
feedback current value for the PI controller [6].
0
B. Hardware architecture
Figure 5 show the detail implementation of the
microstep controller.
.1 4

2 3 4

i i i i
Figure 2. Full step drive waveforms

runlrO[
sigrml
----+I EI'2CITl44C8

6 2

14
II �-12-'--':::
3
1
Figure 5. Hardware implementation
The sin microsrep controller includes 4 fundamental
parts:
l. the design of the modules in EP2C5Tl44C6
Figure 3. Four microsteps/ step drive waveforms

224
 PI controller is the short for Proportional, Integral.
In analog systems, the math equation is:
P(t)= kp[e(t)+}i fe(t)dt] (5)

The output of the PI controller is p(t) , e(t) is the

error between the referent signal and the feedback
signal, kp is the coefficient of the proportional, � is
the integral time. For the digital circuits such as FPGA,
they can only compute according to the value at every
FPGA sampling time. So, we must first change equation (5)
into discrete format by substituting differential
lib
equation in continuous system with difference equation.
k
Figure 6. FPGA module connection diagram
The frequency demultiplier can different frequency clk p(k)= kp[e(k)+ � LeU)] (7)
signal according to the in/de signal. The 256counter is
)=0
a reversible 256 counter. The start/stop is connected to k-I
its enable port, controlling the start or stopping of the
p(k-1)= kp[e(k-1)+ � LeU)] (8)
counter. The dir (directionsignal) signal controls the co
)=0
unter's up/down, controlling the motor rotation's dire
Using (7) subtracting (8),
ction. Under the control of direction dir and the clock
clk, the counter can generate address to sin/cos ROM. p(k)= p(k-1)+Ckp + kp � )e(k)- kp e(k-1)
On the rising edge of elk, the counter output a new add
ress to sin/cos ROM. = p(k-1)+ (kp + kJe(k)- kpe(k-1)
2. PWM circuit IXMS150 is a double channels Where p(k) and e(k) are especially the output of
PWM modulator, insuring the sine duty cycle and the
PI and the error at the sampling time kT , p(k-1)
cosine duty cycle can be handled synchronously.
3. L6506 and L298N constitute the full bridge driver and e(k-1) are especially the output of PI and the
error at the sampling time (k-1)T , k; is the
for motion control application. The full bridge circuits
can drive the power MOSFETS to on and off to control
the currents in the windings. coefficient of integral.
4. Feed back circuits, including low pass filter, ADC. The algorithm mainly includes addition, subtraction
Because the voltages supplied to the phase of the and multiplication. The calculating of p(k) can be
motor are a periodic function, the Fourier series completed by three times additions and two times
contains the DC terms and harmonic terms. multiplications or two times additions and three times
C. The design process of the sine/cosine ROM multiplications. Because the multiplication consumes
First, to get the wave data, a C program is needed in more resources, we adopt the former method. Figure 7
the program, two one-dimensional unsigned char show the FPGA design. Figure 7. PI controller design
arrays are needed to store 1024 sampling values for In order to achieve the balance between the speed
sine/cosine in one period respectively. The amplitude and the recourses, the design adopts two level
of the sine/cosine is 255. pipelining. The register group contains two registers,
Secondly, through creating files .asm with data in the respectively storagese ( k ) and e(k-1) . The stators
two arrays and compiling the two programs in WAVE,
contain four states: SO, SI and S2:
two hex files are generated. What to do nest is to
convert the two .hex files into .mif files. At last, by SO: adder/subtracter!outputs -kp , MUX outputs
utilizing Mega Wizard Plug-In Manager in Quartus II, e(k-1) choosing from register group, SUM2
it instances two LP ROM with 8 bit wide data which
can store 1024 bytes. The LP�ROM can be initialized does p(k-1)+ (kp + kJ e(k)- kpe(k-1);
with the .mif files to get sin ROM and cos ROM. S 1: The adder/subtracter! outputs kp + k; , MUX
The output of sin/cos ROM, Ire! and the feedback
outputs e(k) choosing from register group, MUL
current I fb are send to comparator to produce error.
does the first time operation-kpe(k-1) ;
The PI controller can generate duty cycle according to
the error.
D. the FPGA implementation of PI controller

225
 E(k)

delae

Kp

Figure8. Microsteper simulation model

I Rigis",,"3

Figure7. PID design module

S2: MUL computes (kp + kj )e(k) . The SUM 1 sums

(kp + kJe(k)- kpe(k 1) ; -

IV. The design of sys tem model and function

co-simulation

In the design of FPGA, the simulation is a very

important and the most time-consuming part. This
paper adopts the EOA Simulator Link to achieve the Figure 9. Simulink simulation waveforms
co-simulation. EOA Simulator LinkIFor Use with and

Mentor Graphics ModelSim is one of Simulink module

in MatlabR2009b. It provides the hardware simulation
interface between Matlab, Simulink and Mode1sim.
The user can conveniently connect the software
module in Simulink with their hardware design
program, thus achieving co-simulation. EOA Simulator
Link can make user verifY the whole system including
hardware design, the analog design and the controlled
object by building a correct system model before they
develop them practically [7].
Figure 8 show the simplified Simulink model.
The controlled object transfer function IS Figure 1O.Modelsim simulation waveforms

2
1 Yo.00376s2 + 4s+!
which is gained by building the (Including internal transfer signal)
2
models of the PWM, the H-bridge, the low pass filter
and the AOC.
V. Conclusion
Figure 9 and 10 respectively show the waves of the
Modelsim and Simulink. From the result it can be
seen that the SIN microstepper control mode can This paper introduces a new microstepper control
make the stepper motor follow the sine wave very mode. Through adopting FPGA as the core of the
well microstepper driver, the highest resolution can be 256.
The Sin microstepper method is suitable for small and

226
medium stepper motor; it can satisfY the requirement
of the high pace angular precision and operation
smoothness. With the new style devices, the stepper
motors have small volume, accurate position control,
low power consumption, high reliability and
elimination of low frequency oscillation.

VI. Reference

[1] Zhaojin Wen, Weihai Chen, Zhiyue Xu and lianghua

Wang,"Analysis of Two-Phase Stepper Motor Driver
Based on FPGA,"IEEE International Conference on
Industrial Informatics,pp.821-826,2005.

[2] LIYU CAO and HOWARDM.SCHWARDZ, Oscillation,

Instability and Control of Stepper Motors," Nonlinear
Dynamics 18, pp.384-404, 1999.
[3] Xiaodong Zhang, Junjun He and Chunlei Sheng, "An
Approach of Micro-stepping Control for the Step
Motors Based on FPGA," IEEE International
Conference on Industrial Technology,pp.125-230,Dec.
2005.
[4] CHEN lun-Wei, ZHOU Yu-Jie,"FPGA implantation
of digital PID controller and hardware software co-simu
Lation," 1994-2010 China Academic Journal Electronic
Publishing House ,pp. 38-41.
[5] Gheorghe BALUTA ,"Microsteppoing Mode for St
epper Motor Control," IEEE, ISBN 1-4244-0969-
1107.
[6] Ngoc Quy Le and Jae Wook Jeon, "An Open-loop
Motor Driver Based on FPGA," International
Conference on Control, Automation and Systems
2007,pp.1322-1326.

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