Addressing Modes in 8085 Addressing modes in 8086 Instruction Set of Intel 8085 Instruction Set of Intel 8086

These are the instructions used to The different ways in which a source
Microprocessor Microprocessor
transfer the data from one register operand is denoted in an instruction
An Instruction is a command given to An Instruction is a command given to
to another register, from the is known as addressing modes.
the computer to perform a specified the computer to perform a specified
There are 8 different addressing
memory to the register, and from operation on given data. The operation on given data. The
modes in 8086 programming −
the register to the memory without instruction instruction
Immediate addressing mode
any alteration in the content. set of a microprocessor is the set of a microprocessor is the
The addressing mode in which the
Addressing modes in 8085 is collection of the instructions that the collection of the instructions that the
data operand is a part of the
classified into 5 groups − microprocessor is designed to microprocessor is designed to
instruction itself is known as
Immediate addressing mode execute. The execute. The
immediate addressing mode.
instructions described here are of instructions described here are of
In this mode, the 8/16-bit data is Example
Intel 8085. These instructions are of Intel 8085. These instructions are of
specified in the instruction itself as MOV CX, 4929 H, ADD AX, 2387 H,
Intel Corporation. They cannot be Intel Corporation. They cannot be
one of its operand. For example: MOV AL, FFH
used by used by
MVI K, 20F: means 20F is copied Register addressing mode
other microprocessor manufactures. other microprocessor manufactures.
into register K. It means that the register is the
The programmer can write a program Data Transfer Instructions
Register addressing mode source of an operand for an
in assembly language using these These instructions are used to
In this mode, the data is copied instruction.
instructions. These instructions have transfer the data from the source
Example
from one register to another. For been classified into the following operand to the destination operand.
MOV CX, AX ; copies the contents
example: MOV K, B: means data groups: Following are the list of instructions
of the 16-bit AX register into ; the 16-
in register B is copied to register Data Transfer Group under this group –
bit CX register),
K. Instructions, which are used to MOV
ADD BX, AX
Direct addressing mode transfer data from one register to PPUSH POP PUSHA POPA XC
Direct addressing mode
another register, from memory to HG XLAT IN OUT LEA LDS LES
In this mode, the data is directly The addressing mode in which the
register or LAHF SAHFPUSHF POPF
copied from the given address to effective address of the memory
register to memory, come under this Arithmetic Instructions
the register. For example: LDB location is written directly in the
group. Examples are: MOV, MVI, These instructions are used to
5000K: means the data at address instruction.
LXI, LDA, STA etc. When an perform arithmetic operations like
5000K is copied to register B. Example
instruction of data addition, subtraction, multiplication,
Indirect addressing mode MOV AX, [1592H], MOV AL, [0300H]
transfer group is executed, data is division, etc.
In this mode, the data is Register indirect addressing mode
transferred from the source to the Following is the list of instructions
This addressing mode allows data to
transferred from one register to destination without altering the under this group – ADD ADC INC
be addressed at any memory
another by using the address contents of AAA DAA SUBSBB DEC NPG CMP
location through an offset address
pointed by the register. For the source. For example, when MOV AAS DAS MUL IMUL AAM DIV IDIV
held in any of the following registers:
example: MOV K, B: means data A, B is executed the content of the AAD
BP, BX, DI & SI.
is transferred from the memory register B is copied into the register Bit Manipulation Instructions
Example
address pointed by the register to A, and These instructions are used to
MOV AX, [BX] ; Suppose the
the content of register B remains perform operations where data bits
the register K. register BX contains 4895H, then the
unaltered. Similarly, when LDA 2500 are involved, i.e. operations like
Implied addressing mode contents ; 4895H are moved to AX
is executed the content of the logical, shift, etc.
This mode doesn’t require any ADD CX, {BX}
memory
operand; the data is specified by Based addressing mode
location 2500 is loaded into the Following is the list of instructions
the opcode itself. For example: In this addressing mode, the offset
accumulator. But the content of the under this group –NOT AND OR
CMP. address of the operand is given by
memory location 2500 remains XOR TEST SHL/SAL SHR SAR
the sum of contents of the BX/BP
unaltered. ROLROR RCR RCL
registers and 8-bit/16-bit
System bus Arithmetic Group String Instructions
displacement.
A bus is a high-speed internal The instructions of this group perform String is a group of bytes/words and
Example
connection. Buses are used to arithmetic operations such as their memory is always allocated in a
MOV DX, [BX+04], ADD CL, [BX+08]
send control signals and data addition, subtraction; increment or sequential order. REP REPE/REPZ
Indexed addressing mode
between the processor and other decrement REPNE/REPNZ
In this addressing mode, the
of the content of a register or MOVS/MOVSB/MOVSW
components. operands offset address is found by
memory. Examples are: ADD, SUB, COMS/COMPSB/COMPSW
Three types of bus are used. adding the contents of SI or DI
INR, DAD etc. INS/INSB/INSW
Address bus - carries memory register and 8-bit/16-bit
Logical Group OUTS/OUTSB/OUTSW
addresses from the processor to displacements.
The Instructions under this group SCAS/SCASB/SCASW
other components such as primary Example
perform logical operation such as LODS/LODSB/LODSW
storage and input/output devices. MOV BX, [SI+16], ADD AL, [DI+16]
AND, OR, compare, rotate etc. Processor Control Instructions
Based-index addressing mode
The address bus is unidirectional. Examples are: These instructions are used to
In this addressing mode, the offset
Data bus - carries the data ANA, XRA, ORA, CMP, and RAL etc. control the processor action by
address of the operand is computed
between the processor and other Branch Control Group setting/resetting the flag values.
by summing the base register to the
components. The data bus is This group includes the instructions STC CLC CMC STD CLD STI CLI
contents of an Index register.
bidirectional. for conditional and unconditional Iteration Control Instructions
Example
Control bus - carries control jump, subroutine call and return, and These instructions are used to
ADD CX, [AX+SI], MOV AX, [AX+DI]
restart. execute the given instructions for
signals from the processor to other Based indexed with displacement
Examples are: JMP, JC, JZ, CALL, number of times. Following is the list
components. The control bus also mode
CZ, RST etc. of instructions under this group –
carries the clock's pulses. The In this addressing mode, the
1/0 and Machine Control Group LOOP LOOPE/LOOPZ
control bus is unidirectional. operands offset is computed by
This group includes the instructions LOOPNE/LOOPNZ JCXZ
adding the base register contents. An
for input/output ports, stack and Interrupt Instructions
Index registers contents and 8 or 16-
machine control. Examples are: IN, These instructions are used to call
bit displacement.
OUT, the interrupt during program
Example
PUSH, POP, and HLT etc. execution.
MOV AX, [BX+DI+08], ADD CX,
[BX+SI+16] INT INTO IRET
Interrupt Direct memory access (DMA) Keyboard and Display Controller ::
is a method that allows an Introduction to 8279
An interrupt is a condition that halts
input/output (I/O) device to send or The INTEL 8279 is specially
the microprocessor temporarily to
receive data directly to or from the developed for interfacing keyboard
work on a different task and then
main memory, bypassing the CPU to and display devices to
return to its previous task. Interrupt is
speed up memory operations. 8085/8086/8088 microprocessor
an event or signal that request to
The process is managed by a chip based system. The important
attention of CPU. This halt allows
known as a DMA controller (DMAC). features of 8279 are:
peripheral devices to access the
A defined portion of memory is used Simultaneous keyboard and display
microprocessor.
to send data directly from a operations.
A software interrupt, also called an
peripheral to the motherboard Scanned keyboard mode.
exception, is an interrupt that is
without involving the microprocessor, Scanned sensor mode.
caused by software, usually by a
so that the process does not interfere 8-character keyboard FIFO.
program in user mode. Each type of
with overall computer operation. 16-character display.
software interrupt is associated with
Steps of DMA Operation: Right or left entry 16-byte display
an interrupt handler, which is a
a) For DMA operation to occur, the RAM.
software routine that takes control
DMA controller first make a bus Programmable scan timing.
when the interrupt occurs.
request Keyboard section:
A software interrupt often occurs
when an application software (BR) by sending a control signal The keyboard section
terminates or when it requests the HOLD to the control line. consists of eight return lines RL0 -
operating system for some service. b) On receiving the BR through RL7 that can be used to form the
This is quite unlike a hardware HOLD pin high, the microprocessor columns of a keyboard matrix.
interrupt, which occurs at the completes It has two additional inputs: shift and
hardware level. A software interrupt the current instruction execution and control/strobe. The keys are
only communicates with the kernel afterward it generates HLDA control automatically debounced.
and indirectly interrupts the central signal and sends it to the DMA- The two operating modes of
processing unit. All software Controller. This event switches over keyboard section are 2-key lockout
interrupts are associated with an the and N-key rollover.
interrupt handler, which is actually control from microprocessor to DMA In the 2-key lockout mode, if two
just a routine that is activated when Controller. The microprocessor gets keys are pressed simultaneously,
an interrupt happens. Only one bit of idle. only the first key is recognized.
information is communicated during c) As soon as DMA controller In the N-key rollover mode,
a software interrupt. Often, a receives HLDA (Hold Acknowledged) simultaneous keys are recognized
software interrupt is used to perform through and their codes are stored in FIFO.
an input/output request. This request, Bus Grant (BG) line, it takes the The keyboard section also has an
in turn, calls kernel routines that control of system bus and start 8x8 FIFO (First-In-First-Out) RAM.
actually perform the service. transferring The FIFO can store eight key codes
the data blocks between memory in the scan keyboard mode. The
and Input / Output devices, without status of the shift key and control key
Flags
involving the microprocessor. are also stored along with key code.
Flags are a modified kind of register
d) On completion of data transfer, the The 8279 generate an interrupt
that record the condition of a
DMA controller sends a low signal to signal when there is an entry in FIFO
microprocessor's calculation. For
the Display section:
instance, a "zero status" flag is
HOLD pin and hence microprocessor
activated only when the
makes the HLDA pin low and takes The display section has eight output
microprocessor's calculation
the lines divided into two groups A0-A3
concludes with a "zero" status. The
control over system bus. and B0-B3.
status of each flag determines the
DMA Operation Modes: The output lines can be used either
microprocessor's next action, thus
The DMA Controller operates under as a single group of eight lines or as
enabling it to make decisions.
three modes: two groups of four lines, in
Common Flags A. Burst Mode: Here DMA controller conjunction with the scan lines for a
Some common flags in switch over the control to the multiplexed display.
microprocessors include: microprocessor only on completion of The output lines are connected to the
"Carry" to indicate that an addition or entire data transfer, irrespective of anodes through driver transistor in
subtraction requires a sum to be microprocessor requiring the bus. case of common cathode 7-segment
"carried" over or "borrowed." Microprocessor has to be idle during LEDs.
"Sign," which shows whether a the The cathodes are connected to scan
calculation was positive or negative. data transfer. lines through driver transistors.
"Overflow," which is flagged when B. Cycle-Stealing Mode: DMA The display can be blanked by BD
the result of a process exceeds a set controller relinquish the control to (low) line.
word limit. microprocessor on transfer of every The display section consists of 16x8
"Parity," which indicates that a byte, thereby microprocessor gets display RAM. The CPU can read
process has produced an even the from or write into any location of the
number of "1"s. control and become able to process display RAM.
"Zero status." highly prioritized instruction. DMA
need to make the BG request for
each byte.
Transparent Mode: In this mode,
DMA controller can transfer data
blocks only when
microprocessor are executing such
instruction that does not requires
system bus utilization