5 4 3 2 1

SKL_ULT ?
UC1A
CPU_DDIA_TXN0 E55 C47 CPU_EDP_TX0-
29 CPU_DDIA_TXN0 CPU_DDIA_TXP0 DDI1_TXN[0] EDP_TXN[0] CPU_EDP_TX0+ CPU_EDP_TX0- 34
29 CPU_DDIA_TXP0
F55
DDI1_TXP[0] EDP_TXP[0]
C46
CPU_EDP_TX0+ 34 confirmed with ITE, the HPD
D CPU_DDIA_TXN1 E58 D46 CPU_EDP_TX1- D
29 CPU_DDIA_TXN1 CPU_DDIA_TXP1 DDI1_TXN[1] EDP_TXN[1] CPU_EDP_TX1+ CPU_EDP_TX1- 34 pull down resistor should follow
F58 C45 ITE recommended resistor 4.7k~10Kohm
29 CPU_DDIA_TXP1 CPU_DDIA_TXN2 DDI1_TXP[1] EDP_TXP[1] CPU_EDP_TX2- CPU_EDP_TX1+ 34
F53 A45
29 CPU_DDIA_TXN2 CPU_DDIA_TXP2 DDI1_TXN[2] EDP_TXN[2] CPU_EDP_TX2+ CPU_EDP_TX2- 34
G53 B45
29 CPU_DDIA_TXP2 CPU_DDIA_TXN3 DDI1_TXP[2] EDP_TXP[2] CPU_EDP_TX3- CPU_EDP_TX2+ 34
F56 A47
29 CPU_DDIA_TXN3 CPU_DDIA_TXP3 DDI1_TXN[3] EDP_TXN[3] CPU_EDP_TX3+ CPU_EDP_TX3- 34
G56 B47
29 CPU_DDIA_TXP3 DDI1_TXP[3] EDP_TXP[3] CPU_EDP_TX3+ 34 +3VS
CPU_DDIB_TXN0 C50 E45 CPU_EDP_AUX#
29 CPU_DDIB_TXN0 CPU_DDIB_TXP0 DDI2_TXN[0] DDI EDP_AUXN CPU_EDP_AUX CPU_EDP_AUX# 34
D50 EDP F45
29 CPU_DDIB_TXP0 CPU_DDIB_TXN1 DDI2_TXP[0] EDP_AUXP CPU_EDP_AUX 34
C52
29 CPU_DDIB_TXN1 CPU_DDIB_TXP1 DDI2_TXN[1] GPP_E15
D52 B52 RC1601 1 @ 2 10K_0402_5%
29 CPU_DDIB_TXP1 CPU_DDIB_TXN2 DDI2_TXP[1] EDP_DISP_UTIL
A50
29 CPU_DDIB_TXN2 CPU_DDIB_TXP2 DDI2_TXN[2] CPU_DDIA_AUXN
B50 G50
29 CPU_DDIB_TXP2 CPU_DDIB_TXN3 DDI2_TXP[2] DDI1_AUXN CPU_DDIA_AUXP CPU_DDIA_AUXN 29
D51 F50
29 CPU_DDIB_TXN3 CPU_DDIB_TXP3 DDI2_TXN[3] DDI1_AUXP CPU_DDIB_AUXN CPU_DDIA_AUXP 29
C51 E48
29 CPU_DDIB_TXP3 DDI2_TXP[3] DDI2_AUXN CPU_DDIB_AUXP CPU_DDIB_AUXN 29
F48
DDI2_AUXP G46 CPU_DDIB_AUXP 29
DISPLAY SIDEBANDS DDI3_AUXN F46
DDPB_CLK L13 DDI3_AUXP
DDPB_DATA L12 GPP_E18/DDPB_CTRLCLK L9 CPU_DDIA_HPD
GPP_E19/DDPB_CTRLDATA GPP_E13/DDPB_HPD0 CPU_DDIB_HPD CPU_DDIA_HPD 29
L7
DDPC_CLK GPP_E14/DDPC_HPD1 GPP_E15 CPU_DDIB_HPD 29
N7 L6 RC181 1 2 0_0402_5%
DDPC_DATA GPP_E20/DDPC_CTRLCLK GPP_E15/DDPD_HPD2 EC_SCI# 44
N8 N9
GPP_E21/DDPC_CTRLDATA GPP_E16/DDPE_HPD3 L10 CPU_EDP_HPD
GPP_E17/EDP_HPD CPU_EDP_HPD 34
N11
GPP_E22/DDPD_CTRLCLK PCH_ENBKL

1
+VCCIO N12 R12
GPP_E23/DDPD_CTRLDATA EDP_BKLTEN PCH_EDP_PWM PCH_ENBKL 34
R11 RC13
RC4 2 1 24.9_0402_1% EDP_COMP E52 EDP_BKLTCTL U13 PCH_ENVDD PCH_EDP_PWM 34 100K_0402_5%
EDP_RCOMP EDP_VDDEN PCH_ENVDD 34
1 OF 20
+VCCIO&EDP_COMP : SKYLAKE-U_BGA1356

2
Trace Width: 20mil REV = 1 ?
+VCCST_CPU
Isolation Spacing: 25mil @
C C
Max length: 100mil

1
+VCCSTG

2
RC1625

100K_0402_5%
@ 49.9_0402_1%
RC3048
1

RC19 UC1D SKL_ULT ?

2
1K_0402_5% XDP_TCK RC1546 1 2 0_0402_5% JTAGX RC1551 1 2 51_0402_5%
1

check PROCHOT# circuit with PWR @ CATERR# D63

H_PECI A54 CATERR# XDP_TDO RC1547 1 2 0_0402_5% PCH_JTAG_TDO RC1543 1 2 51_0402_5%
44 H_PECI H_PROCHOT#_R PECI +VCCSTG
2

RC20 1 2 499 +-1% 0402 C65 JTAG

44 H_PROCHOT# H_THRMTRIP# PROCHOT#
C63
A65 THERMTRIP# B61 XDP_TCK XDP_TDI RC1548 1 2 0_0402_5% PCH_JTAG_TDI
SKTOCC# PROC_TCK D60 XDP_TDI
CPU MISC PROC_TDI
XDP_BPM0# XDP_TDO XDP_TMS PCH_JTAG_TMS
1

PAD @ TC11 1 C55 A61 RC1549 1 2 0_0402_5%

RC143 PAD @ TC12 1 XDP_BPM1# D55 BPM#[0] PROC_TDO C60 XDP_TMS
PAD @ TC13 1 XDP_BPM2# B54 BPM#[1] PROC_TMS B59 XDP_TRST# XDP_TRST# RC1550 1 2 0_0402_5% PCH_JTAG_TRST#
1K_0402_5% BPM#[2] PROC_TRST#
PAD @ TC14 1 XDP_BPM3# C56
BPM#[3] B56 PCH_JTAG_TCK 1 PAD @
GPP_E3 PCH_JTAG_TCK PCH_JTAG_TDI TC29
2

PAD @ TC162 1 A6 D59

+VCCST_CPU PAD @ TC163 1 GPP_E7 A7 GPP_E3/CPU_GP0 PCH_JTAG_TDI A56 PCH_JTAG_TDO
PCH_TP_INT# BA5 GPP_E7/CPU_GP1 PCH_JTAG_TDO C59 PCH_JTAG_TMS
45 PCH_TP_INT# GPP_B3/CPU_GP2 PCH_JTAG_TMS PCH_JTAG_TRST#
check H_THRMTRIP# if need to connector to EC AY5 C61
GPP_B4/CPU_GP3 PCH_TRST# A59 JTAGX
RC155 1 2 49.9_0402_1% PROC_OPI_RCOMP AT16 JTAGX
RC156 1 2 49.9_0402_1% PCH_OPI_RCOMP AU16 PROC_POPIRCOMP
U23E@ RC157 1 2 49.9_0402_1% EDRAM_OPIO_RCOMP H66 PCH_OPIRCOMP
U23E@ RC170 1 2 49.9_0402_1% EOPIO_RCOMP H65 OPCE_RCOMP
OPC_RCOMP

SKYLAKE-U_BGA1356 1 OF 20
REV = 1 ?
B @ B

+3VS

RPC19
3 2 DDPC_DATA
4 1 DDPB_DATA

2.2K_0404_4P2R_5%
RPC38
3 2 DDPC_CLK
4 1 DDPB_CLK
@
2.2K_0404_4P2R_5%

DDP*_CTRLDATA strapping sampled on the rising edge of PWROK

Port Strap Enable Disable

Pull up to 3.3 V
Port 1 DDPB_CTRLDATA with 2.2Kohm NC
Pull up to 3.3 V
Port 2 DDPC_CTRLDATA with 2.2Kohm NC

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 MCP (DDI,EDP)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. DS321
Date: Monday, January 16, 2017 Sheet 4 of 61
5 4 3 2 1
 5 4 3 2 1

SKL_ULT
UC1B

AU53
17 DDRA_DQ[0..63] DDRA_DQ0 DDR0_CKN[0] DDRA_CLK0# 17
AL71 AT53
DDRA_DQ1 DDR0_DQ[0] DDR0_CKP[0] DDRA_CLK0 17
AL68 AU55 1 @
DDRA_DQ2 DDR0_DQ[1] DDR0_CKN[1] TP33
AN68 AT55 1 @
DDRA_DQ3 DDR0_DQ[2] DDR0_CKP[1] TP34
AN69
D DDRA_DQ4 AL70 DDR0_DQ[3] BA56 D
DDRA_DQ5 DDR0_DQ[4] DDR0_CKE[0] DDRA_CKE0 17
AL69 BB56 1 @
DDRA_DQ6 DDR0_DQ[5] DDR0_CKE[1] TP32
AN70 AW56
DDRA_DQ7 AN71 DDR0_DQ[6] DDR0_CKE[2] AY56
DDRA_DQ8 AR70 DDR0_DQ[7] DDR0_CKE[3]
DDRA_DQ9 AR68 DDR0_DQ[8] AU45
DDRA_DQ10 DDR0_DQ[9] DDR0_CS#[0] DDRA_CS0# 17
AU71 AU43 1 @
DDRA_DQ11 DDR0_DQ[10] DDR0_CS#[1] TP274
AU68 AT45
DDRA_DQ12 DDR0_DQ[11] DDR0_ODT[0] DDRA_ODT0 17
AR71 AT43 1 @
DDRA_DQ13 DDR0_DQ[12] DDR0_ODT[1] TP35
AR69
DDRA_DQ14 AU70 DDR0_DQ[13] BA51
DDRA_DQ15 DDR0_DQ[14] DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] DDRA_MA5 17
AU69 BB54
DDRA_DQ16 DDR0_DQ[15] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] DDRA_MA9 17
BB65 BA52
DDRA_DQ17 DDR0_DQ[16]/DDR0_DQ[32] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] DDRA_MA6 17
AW65 AY52
DDRA_DQ18 DDR0_DQ[17]/DDR0_DQ[33] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] DDRA_MA8 17
AW63 AW52
DDRA_DQ19 DDR0_DQ[18]/DDR0_DQ[34] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] DDRA_MA7 17
AY63 AY55
DDRA_DQ20 DDR0_DQ[19]/DDR0_DQ[35] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] DDRA_BG0 17
BA65 AW54
DDRA_DQ21 DDR0_DQ[20]/DDR0_DQ[36] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] DDRA_MA12 17
AY65 BA54
DDRA_DQ22 DDR0_DQ[21]/DDR0_DQ[37] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] DDRA_MA11 17
BA63 BA55
DDRA_DQ23 DDR0_DQ[22]/DDR0_DQ[38] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# DDRA_ACT# 17
BB63 AY54
DDRA_DQ24 DDR0_DQ[23]/DDR0_DQ[39] DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] DDRA_BG1 17
BA61
DDRA_DQ25 AW61 DDR0_DQ[24]/DDR0_DQ[40] AU46
DDRA_DQ26 DDR0_DQ[25]/DDR0_DQ[41] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] DDRA_MA13 17
BB59 AU48
DDRA_DQ27 DDR0_DQ[26]/DDR0_DQ[42] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] DDRA_MA15_CAS# 17
AW59 AT46
DDRA_DQ28 DDR0_DQ[27]/DDR0_DQ[43] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] DDRA_MA14_WE# 17
BB61 AU50
DDRA_DQ29 DDR0_DQ[28]/DDR0_DQ[44] DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] DDRA_MA16_RAS# 17
AY61 AU52
DDRA_DQ30 DDR0_DQ[29]/DDR0_DQ[45] DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] DDRA_BA0 17
BA59 AY51
DDRA_DQ31 DDR0_DQ[30]/DDR0_DQ[46] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] DDRA_MA2 17
AY59 AT48
DDRA_DQ32 DDR0_DQ[31]/DDR0_DQ[47] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] DDRA_BA1 17
AY39 AT50
DDRA_DQ33 DDR0_DQ[32]/DDR1_DQ[0] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] DDRA_MA10_AP 17
AW39 BB50
DDRA_DQ34 DDR0_DQ[33]/DDR1_DQ[1] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] DDRA_MA1 17
AY37 AY50
DDRA_DQ35 DDR0_DQ[34]/DDR1_DQ[2] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] DDRA_MA0 17
AW37 BA50
DDRA_DQ36 DDR0_DQ[35]/DDR1_DQ[3] DDR0_MA[3] DDRA_MA3 17
C BB39 BB52 C
DDRA_DQ37 DDR0_DQ[36]/DDR1_DQ[4] DDR0_MA[4] DDRA_MA4 17
BA39
DDRA_DQ38 BA37 DDR0_DQ[37]/DDR1_DQ[5] AM70 DDRA_DQS#0
DDRA_DQ39 BB37 DDR0_DQ[38]/DDR1_DQ[6] DDR0_DQSN[0] AM69 DDRA_DQS0
DDRA_DQ40 AY35 DDR0_DQ[39]/DDR1_DQ[7] DDR0_DQSP[0] AT69 DDRA_DQS#1
DDRA_DQ41 AW35 DDR0_DQ[40]/DDR1_DQ[8] DDR0_DQSN[1] AT70 DDRA_DQS1
DDRA_DQ42 AY33 DDR0_DQ[41]/DDR1_DQ[9] DDR0_DQSP[1] BA64 DDRA_DQS#2
DDRA_DQ43 AW33 DDR0_DQ[42]/DDR1_DQ[10] DDR0_DQSN[2]/DDR0_DQSN[4] AY64 DDRA_DQS2
DDRA_DQ44 BB35 DDR0_DQ[43]/DDR1_DQ[11] DDR0_DQSP[2]/DDR0_DQSP[4] AY60 DDRA_DQS#3
DDRA_DQ45 BA35 DDR0_DQ[44]/DDR1_DQ[12] DDR0_DQSN[3]/DDR0_DQSN[5] BA60 DDRA_DQS3
DDRA_DQ46 BA33 DDR0_DQ[45]/DDR1_DQ[13] DDR0_DQSP[3]/DDR0_DQSP[5] BA38 DDRA_DQS#4
DDRA_DQ47 BB33 DDR0_DQ[46]/DDR1_DQ[14] DDR0_DQSN[4]/DDR1_DQSN[0] AY38 DDRA_DQS4
DDRA_DQ48 AY31 DDR0_DQ[47]/DDR1_DQ[15] DDR0_DQSP[4]/DDR1_DQSP[0] AY34 DDRA_DQS#5 DDRA_DQS#[0..7]
DDRA_DQ49 AW31 DDR0_DQ[48]/DDR1_DQ[32] DDR0_DQSN[5]/DDR1_DQSN[1] BA34 DDRA_DQS5 DDRA_DQS#[0..7] 17
DDRA_DQ50 AY29 DDR0_DQ[49]/DDR1_DQ[33] DDR0_DQSP[5]/DDR1_DQSP[1] BA30 DDRA_DQS#6 DDRA_DQS[0..7]
DDRA_DQ51 AW29 DDR0_DQ[50]/DDR1_DQ[34] DDR0_DQSN[6]/DDR1_DQSN[4] AY30 DDRA_DQS6 DDRA_DQS[0..7] 17
DDRA_DQ52 BB31 DDR0_DQ[51]/DDR1_DQ[35] DDR0_DQSP[6]/DDR1_DQSP[4] AY26 DDRA_DQS#7
DDRA_DQ53 BA31 DDR0_DQ[52]/DDR1_DQ[36] DDR0_DQSN[7]/DDR1_DQSN[5] BA26 DDRA_DQS7
DDRA_DQ54 BA29 DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQSP[7]/DDR1_DQSP[5]
DDRA_DQ55 BB29 DDR0_DQ[54]/DDR1_DQ[38] AW50
DDRA_DQ56 DDR0_DQ[55]/DDR1_DQ[39] DDR0_ALERT# DDRA_ALERT# 17
AY27 AT52
DDRA_DQ57 DDR0_DQ[56]/DDR1_DQ[40] DDR0_PAR DDRA_PAR 17
AW27
DDRA_DQ58 AY25 DDR0_DQ[57]/DDR1_DQ[41] AY67
DDRA_DQ59 DDR0_DQ[58]/DDR1_DQ[42] DDR_VREF_CA DDR_VREFCA 17
AW25 AY68 1 @
DDRA_DQ60 DDR0_DQ[59]/DDR1_DQ[43] DDR0_VREF_DQ TP31
BB27 DDR CH - A BA67 1 @
DDRA_DQ61 DDR0_DQ[60]/DDR1_DQ[44] DDR1_VREF_DQ TP313
BA27
DDRA_DQ62 BA25 DDR0_DQ[61]/DDR1_DQ[45] AW67 DDR_VTT_CNTL
DDRA_DQ63 BB25 DDR0_DQ[62]/DDR1_DQ[46] DDR_VTT_CNTL
DDR0_DQ[63]/DDR1_DQ[47]
2 OF 20 VREFCA
@ VREFDQ
SKYLAKE-U_BGA1356
Width-->20mil
B
Space-->20mil B

+3VALW
1

RC422
100K_0402_5%
2

CPU_DRAMPG_CNTL 57
+1.2V
1

QC142
RC452
C

1 2 2 B
1K_0402_5% LMBT3904WT1G_SOT323-3
E
3

DDR_VTT_CNTL
2

RC432
10K_0402_5%
A @ A
1

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 MCP (DDR4)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. DS321
Date: Monday, January 16, 2017 Sheet 5 of 61
5 4 3 2 1
 5 4 3 2 1

D D

SKL_ULT
UC1C

AF65 AN45
AF64 DDR1_DQ[0]/DDR0_DQ[16] DDR1_CKN[0] AN46
AK65 DDR1_DQ[1]/DDR0_DQ[17] DDR1_CKN[1] AP45
AK64 DDR1_DQ[2]/DDR0_DQ[18] DDR1_CKP[0] AP46
AF66 DDR1_DQ[3]/DDR0_DQ[19] DDR1_CKP[1]
AF67 DDR1_DQ[4]/DDR0_DQ[20] AN56
AK67 DDR1_DQ[5]/DDR0_DQ[21] DDR1_CKE[0] AP55
AK66 DDR1_DQ[6]/DDR0_DQ[22] DDR1_CKE[1] AN55
AF70 DDR1_DQ[7]/DDR0_DQ[23] DDR1_CKE[2] AP53
AF68 DDR1_DQ[8]/DDR0_DQ[24] DDR1_CKE[3]
AH71 DDR1_DQ[9]/DDR0_DQ[25] BB42
AH68 DDR1_DQ[10]/DDR0_DQ[26] DDR1_CS#[0] AY42
AF71 DDR1_DQ[11]/DDR0_DQ[27] DDR1_CS#[1] BA42
AF69 DDR1_DQ[12]/DDR0_DQ[28] DDR1_ODT[0] AW42
AH70 DDR1_DQ[13]/DDR0_DQ[29] DDR1_ODT[1]
AH69 DDR1_DQ[14]/DDR0_DQ[30] AY48
AT66 DDR1_DQ[15]/DDR0_DQ[31] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] AP50
AU66 DDR1_DQ[16]/DDR0_DQ[48] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] BA48
AP65 DDR1_DQ[17]/DDR0_DQ[49] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] BB48
AN65 DDR1_DQ[18]/DDR0_DQ[50] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] AP48
AN66 DDR1_DQ[19]/DDR0_DQ[51] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] AP52
AP66 DDR1_DQ[20]/DDR0_DQ[52] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] AN50
AT65 DDR1_DQ[21]/DDR0_DQ[53] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] AN48
AU65 DDR1_DQ[22]/DDR0_DQ[54] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] AN53
AT61 DDR1_DQ[23]/DDR0_DQ[55] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# AN52
C AU61 DDR1_DQ[24]/DDR0_DQ[56] DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] C
AP60 DDR1_DQ[25]/DDR0_DQ[57] BA43
AN60 DDR1_DQ[26]/DDR0_DQ[58] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13] AY43
AN61 DDR1_DQ[27]/DDR0_DQ[59] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15] AY44
AP61 DDR1_DQ[28]/DDR0_DQ[60] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] AW44
AT60 DDR1_DQ[29]/DDR0_DQ[61] DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] BB44
AU60 DDR1_DQ[30]/DDR0_DQ[62] DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] AY47
AU40 DDR1_DQ[31]/DDR0_DQ[63] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] BA44
AT40 DDR1_DQ[32]/DDR1_DQ[16] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] AW46
AT37 DDR1_DQ[33]/DDR1_DQ[17] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] AY46
AU37 DDR1_DQ[34]/DDR1_DQ[18] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] BA46
AR40 DDR1_DQ[35]/DDR1_DQ[19] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] BB46
AP40 DDR1_DQ[36]/DDR1_DQ[20] DDR1_MA[3] BA47
AP37 DDR1_DQ[37]/DDR1_DQ[21] DDR1_MA[4]
AR37 DDR1_DQ[38]/DDR1_DQ[22] AH66
AT33 DDR1_DQ[39]/DDR1_DQ[23] DDR1_DQSN[0]/DDR0_DQSN[2] AH65
AU33 DDR1_DQ[40]/DDR1_DQ[24] DDR1_DQSP[0]/DDR0_DQSP[2] AG69
AU30 DDR1_DQ[41]/DDR1_DQ[25] DDR1_DQSN[1]/DDR0_DQSN[3] AG70
AT30 DDR1_DQ[42]/DDR1_DQ[26] DDR1_DQSP[1]/DDR0_DQSP[3] AR66
AR33 DDR1_DQ[43]/DDR1_DQ[27] DDR1_DQSN[2]/DDR0_DQSN[6] AR65
AP33 DDR1_DQ[44]/DDR1_DQ[28] DDR1_DQSP[2]/DDR0_DQSP[6] AR61
AR30 DDR1_DQ[45]/DDR1_DQ[29] DDR1_DQSN[3]/DDR0_DQSN[7] AR60
AP30 DDR1_DQ[46]/DDR1_DQ[30] DDR1_DQSP[3]/DDR0_DQSP[7] AT38
AU27 DDR1_DQ[47]/DDR1_DQ[31] DDR1_DQSN[4]/DDR1_DQSN[2] AR38
AT27 DDR1_DQ[48] DDR1_DQSP[4]/DDR1_DQSP[2] AT32
AT25 DDR1_DQ[49] DDR1_DQSN[5]/DDR1_DQSN[3] AR32
AU25 DDR1_DQ[50] DDR1_DQSP[5]/DDR1_DQSP[3] AR25
AP27 DDR1_DQ[51] DDR1_DQSN[6] AR27
AN27 DDR1_DQ[52] DDR1_DQSP[6] AR22
AN25 DDR1_DQ[53] DDR1_DQSN[7] AR21
AP25 DDR1_DQ[54] DDR1_DQSP[7]
AT22 DDR1_DQ[55] AN43
B AU22 DDR1_DQ[56] DDR1_ALERT# AP43 B
AU21 DDR1_DQ[57] DDR1_PAR AT13 CPU_DRAMRST#
AT21 DDR1_DQ[58] DRAM_RESET# AR18 SM_RCOMP_0 RC2545 1 SDP@ 2 200_0402_1%
AN22 DDR1_DQ[59] DDR_RCOMP[0] AT18
AP22 DDR1_DQ[60] DDR_RCOMP[1] AU18 RC2543 1 DDP@ 2 121_0402_1%
AP21 DDR1_DQ[61] DDR_RCOMP[2]
AN21 DDR1_DQ[62] DDR CH - B SM_RCOMP_1 RC2546 1 2 80.6_0402_1%
DDR1_DQ[63] SM_RCOMP_2 RC2544 1 2 100_0402_1%

@ 3 OF 20
SKYLAKE-U_BGA1356

+1.2V
2

RD91
470_0402_5%
1

CPU_DRAMRST# 1 2
CPU_DRAMRST#_R 17
RC2542 0_0402_5%
1
CC1
0.01U_0201_10V6K
2 EMC_NS@
A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 MCP (DDR4)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. DS321
Date: Monday, January 16, 2017 Sheet 6 of 61
5 4 3 2 1
 5 4 3 2 1

?
SKL_ULT
UC1E
SPI - FLASH
SMBUS, SMLINK
SPI_CLK RC1539 1 2 15_0402_5% SPI_CLK_R SPI_CLK_R AV2 R7 PCH_SMB_CLK
44 SPI_CLK SPI_SO_R SPI0_CLK GPP_C0/SMBCLK PCH_SMB_DATA
AW 3 R8
SPI_SI_R AV3 SPI0_MISO GPP_C1/SMBDATA R10 SMB_ALERT#
SPI_WP#_R AW 2 SPI0_MOSI GPP_C2/SMBALERT#
SPI_SO RC53 1 2 15_0402_5% SPI_SO_R SPI_HOLD#_R AU4 SPI0_IO2 R9 SML0_CLK
44 SPI_SO SPI_CS0#_R SPI0_IO3 GPP_C3/SML0CLK SML0_DATA
AU3 W2
D AU2 SPI0_CS0# GPP_C4/SML0DATA W1 SML0_ALERT# D
AU1 SPI0_CS1# GPP_C5/SML0ALERT#
SPI0_CS2# W3 PCH_SML1_CLK
SPI_SI RC52 1 2 15_0402_5% SPI_SI_R GPP_C6/SML1CLK V3 PCH_SML1_DAT +3VALW_PCH
44 SPI_SI SPI - TOUCH GPP_C7/SML1DATA SML1_ALERT#
AM7
M2 GPP_B23/SML1ALERT#/PCHHOT#
M3 GPP_D1/SPI1_CLK
GPP_D2/SPI1_MISO RPC20
J4
SPI_CS0# RC51 1 2 0_0402_5% SPI_CS0#_R V1 GPP_D3/SPI1_MOSI PCH_SMB_CLK 4 1
44 SPI_CS0# GPP_D21/SPI1_IO2 PCH_SMB_DATA
V2 3 2
29 TBT_FORCE_PWR BOARD_ID4 GPP_D22/SPI1_IO3
M1 LPC AY13
8 BOARD_ID4 GPP_D0/SPI1_CS# GPP_A1/LAD0/ESPI_IO0 LPC_AD0 44
BA13
GPP_A2/LAD1/ESPI_IO1 LPC_AD1 44 2.2K_0404_4P2R_5%
BB13
C LINK GPP_A3/LAD2/ESPI_IO2 LPC_AD2 44
AY12
GPP_A4/LAD3/ESPI_IO3 LPC_AD3 44
G3 BA12
CL_CLK GPP_A5/LFRAME#/ESPI_CS# SUS_STAT# LPC_FRAME# 44
G2 BA11 1
CL_DATA GPP_A14/SUS_STAT#/ESPI_RESET# RPC25
G1 TC81@
CL_RST# PCH_SML1_CLK 3 2
AW 9 CLK_PCI_EC_R RC173 2 1 22_0402_5% PCH_SML1_DAT 4 1
+3V_SPI GPP_A9/CLKOUT_LPC0/ESPI_CLK CLK_PCI_EC 44
KBRST# AW 13 AY9
44 KBRST# GPP_A0/RCIN# GPP_A10/CLKOUT_LPC1 PM_CLKRUN#_R
AW 11 RC3033 1 2 0_0402_5%
GPP_A8/CLKRUN# PM_CLKRUN# 44 2.2K_0404_4P2R_5%
SERIRQ AY11
44 SERIRQ GPP_A6/SERIRQ
+3VALW_PCH
1 OF 20
1

SKYLAKE-U_BGA1356
RC60 RC61 REV = 1 SMB_ALERT#
? 2 1 RC1562
1K_0402_5% 1K_0402_5%
Check with BIOS, SPI is Dual mode or quad mode @ 2.2K_0402_5%
2

SPI_WP#_R RC54 1 @ 2 15_0402_5% SPI_WP#

+3VALW_PCH
C check CLKRUN# / SUS_STAT# signal if need to connect +3VS C
SPI_HOLD#_R RC55 1 @ 2 15_0402_5% SPI_HOLD# RPC23
SML0_CLK 4 1
SML0_DATA 3 2
PM_CLKRUN#_R RC11 1 2 8.2K_0402_5%
2.2K_0404_4P2R_5%

SERIRQ RC12 1 2 10K_0402_5%

+3VALW_PCH +3V_SPI KBRST# RC10 1 2 10K_0402_5% +3VALW_PCH

SML0_ALERT# RC1564 2 @ 1 2.2K_0402_5%

RC171 1 2 0_0402_5%
KBRST# CC1255 1 2 1000P_0201_50V7-K
This signal has a weak internal pull-down.
EMC_NS@ 0 = LPC Is selected for EC. (Default)
1 = eSPI Is selected for EC.
Notes:
1. The internal pull-down is disabled after RSMRST#
de-asserts.
2. This signal is in the primary wel
+3V_SPI Rising edge of RSMRST#
+3VALW_PCH
UC3
SPI_CS0# 1 8
/CS VCC SML1_ALERT# RC1569 1 @ 2 150K_0402_5% +3VS
SPI_SO 2 7 SPI_HOLD#
DO (IO1) IO3 1
CC8 RC1655 1 2 150K_0402_5%
SPI_WP# 3 6 SPI_CLK 0.1u_0201_10V6K
B IO2 CLK B
4 5 SPI_SI 2
GND DI (IO0)
To enable Direct Connect Interface (DCI), a 150K pull up resistor will need to be
added to PCHHOT# pin. This pin must be low during the rising edge of RSMRST#.
W25Q64JVSSIQ_SO8
(Refer to WW52_MOW)

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 MCP (MISC,JTAG,SPI,LPC,SMB)

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. DS321
Dat e: Monday, January 16, 2017 Sheet 7 of 61
5 4 3 2 1
 5 4 3 2 1

+3VS

U42@ NOMS@ NOTOUCH@UHD@ NOWWAN@

1 RC1615 2

1 RC1613 2
@ @ @

10K_0402_5%

10K_0402_5%

1 RC1611 2

1 RC1609 2

1 RC1608 2

1 RC1606 2

2 RC1631 1

2 RC1632 1
?

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%
SKL_ULT
UC1F
LPSS ISH

AN8 P2 BOARD_ID0
AP7 GPP_B15/GSPI0_CS# GPP_D9 P3 BOARD_ID1 BOARD_ID0
AP8 GPP_B16/GSPI0_CLK GPP_D10 P4 BOARD_ID8 BOARD_ID1
RC1561 1 @ 2 2.2K_0402_5% GPP_B18 AR7 GPP_B17/GSPI0_MISO GPP_D11 P1 BOARD_ID3 BOARD_ID2
+3VS +3VS GPP_B18/GSPI0_MOSI GPP_D12 9 BOARD_ID2 BOARD_ID3
PCH_WLAN_OFF# AM5 M4 BOARD_ID6 BOARD_ID4
9,40 PCH_WLAN_OFF# PCH_BT_OFF# AN7 GPP_B19/GSPI1_CS# GPP_D5/ISH_I2C0_SDA N3 BOARD_ID5 7 BOARD_ID4 BOARD_ID5
9,40 PCH_BT_OFF# AP5 GPP_B20/GSPI1_CLK GPP_D6/ISH_I2C0_SCL BOARD_ID6
D GPP_B21/GSPI1_MISO D
GPP_B22 BOARD_ID7 BOARD_ID7
1
2

RC1563 1 @ 2 2.2K_0402_5% AN5 N1

RPC26 GPP_B22/GSPI1_MOSI GPP_D7/ISH_I2C1_SDA N2 U22@ MS@ TOUCH@ FHD@ WWAN@
GPP_D8/ISH_I2C1_SCL

1 RC1614 2

1 RC1612 2

1 RC1610 2

1 RC1607 2

1 RC123 2

2 RC1634 1

2 RC1635 1
AB1 @ @ @

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%
2.2K_0404_4P2R_5% 40 UART_RX_DEBUG GPP_C8/UART0_RXD

10K_0402_5%
AB2 AD11 PCH_GNSS_DISABLE#

RC1616
40 UART_TX_DEBUG W4 GPP_C9/UART0_TXD GPP_F10/I2C5_SDA/ISH_I2C2_SDA AD12 PCH_GNSS_DISABLE# 38
GPP_C10/UART0_RTS# GPP_F11/I2C5_SCL/ISH_I2C2_SCL
4
3

AB3
PCH_I2C_SCL0 RC147 1 2 0_0402_5% PM_I2C_SCL0 GPP_C11/UART0_CTS#
PM_I2C_SCL0 34

1
AD1 U1
PCH_I2C_SDA0 RC148 1 2 0_0402_5% PM_I2C_SDA0 AD2 GPP_C20/UART2_RXD GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA U2
PM_I2C_SDA0 34 AD3 GPP_C21/UART2_TXD GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL U3
AD4 GPP_C22/UART2_RTS# GPP_D15/ISH_UART0_RTS# U4
+3VS GPP_C23/UART2_CTS# GPP_D16/ISH_UART0_CTS#/SML0BALERT#
AC1
PCH_I2C_SDA0 U7 GPP_C12/UART1_RXD/ISH_UART1_RXD AC2
touch panel PCH_I2C_SCL0 U6 GPP_C16/I2C0_SDA
GPP_C17/I2C0_SCL
GPP_C13/UART1_TXD/ISH_UART1_TXD
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
AC3 PCH_THS_RST#
PCH_THS_RST# 34
THS_IRQ
1
2

AB4
PCH_I2C_SDA1 U8 GPP_C15/UART1_CTS#/ISH_UART1_CTS# THS_IRQ 34
RPC27
2.2K_0404_4P2R_5% touch pad PCH_I2C_SCL1 U9 GPP_C18/I2C1_SDA
GPP_C19/I2C1_SCL GPP_A18/ISH_GP0
AY8 FP_PWR_EN
FP_PWR_EN 45
BA8 TOUCHPAD_PWR_EN
PCH_I2C_SDA2 GPP_A19/ISH_GP1 TBT_CIO_PLUG_EVENT# TOUCHPAD_PWR_EN 45
AH9 BB7 TBT_CIO_PLUG_EVENT# 29
CCG4 GPP_F4/I2C2_SDA GPP_A20/ISH_GP2
4
3

PCH_I2C_SCL2 AH10 BA7 CAMERA_PWR_EN

PCH_I2C_SCL1 GPP_F5/I2C2_SCL GPP_A21/ISH_GP3 CAMERA_PWR_EN 34
RC2552 1 2 0_0402_5% PM_I2C_SCL1 AY7 TOUCHPANEL_PWR_EN
TOUCHPANEL_PWR_EN 34
PM_I2C_SCL1 45 AH11 GPP_A22/ISH_GP4 AW7
PCH_I2C_SDA1 RC2553 1 2 0_0402_5% PM_I2C_SDA1 AH12 GPP_F6/I2C3_SDA GPP_A23/ISH_GP5 AP13 BM_BUSY#
PM_I2C_SDA1 45 GPP_F7/I2C3_SCL GPP_A12/BM_BUSY#/ISH_GP6
AF11
AF12 GPP_F8/I2C4_SDA
GPP_F9/I2C4_SCL
Board ID Description Stuff R

1 OF 20
Samsung 8Gb
SKYLAKE-U_BGA1356 000 2400 MT/s RC1612 RC1614 RC1616
REV = 1 ?
@
?
Hynix 8Gb
SKL_ULT
UC1G 010 2400 MT/s RC1612 RC1613 RC1616
AUDIO Micron 8Gb
HDA_SYNC
100 2400 MT/s RC1611 RC1614 RC1616
C RC43 1 2 33_0402_5% BA22 C
43 HDA_SYNC_AUDIO HDA_BCLK HDA_SYNC/I2S0_SFRM
RC42 1 2 33_0402_5% AY22
+3VALW_PCH +3VS 43 HDA_BITCLK_AUDIO HDA_SDOUT BB22 HDA_BLK/I2S0_SCLK
HDA_SDIN0 HDA_SDO/I2S0_TXD
SDIO/SDXC 110 Reserved RC1611 RC1613 RC1616
BA21 Board_ID
43 HDA_SDIN0 HDA_SDI0/I2S0_RXD
RC1600 1 @ 2 1K_0402_5% AY21 AB11 [2,1,0] Samsung 16Gb
RC44 1 2 33_0402_5% HDA_RST# AW22 HDA_SDI1/I2S1_RXD GPP_G0/SD_CMD AB13 TBT_USB_PWR_EN
HDA_SDOUT 43 HDA_RST_AUDIO# HDA_RST#/I2S1_SCLK GPP_G1/SD_DATA0 TBT_USB_PWR_EN 29 001 2400 MT/s RC1612 RC1614 RC1615
RC47 1 @ 2 1K_0402_5% J5 AB12
AY20 GPP_D23/I2S_MCLK GPP_G2/SD_DATA1 W12 TBT_CIO_PWR_EN
Hynix 16Gb
* AW20 I2S1_SFRM
I2S1_TXD
GPP_G3/SD_DATA2
GPP_G4/SD_DATA3
W11
TBT_CIO_PWR_EN 29
011 2400 MT/s RC1612 RC1613 RC1615
HDA_SDO This signal has a weak internal pull-down. W10
AK7 GPP_G5/SD_CD# W8
0 = Enable security measures defined in the Flash Descriptor. GPP_F1/I2S2_SFRM GPP_G6/SD_CLK
Micron 16Gb
AK6 W7 101 2400 MT/s RC1611 RC1614 RC1615
1 = Disable Flash Descriptor Security(override). This strap AK9 GPP_F0/I2S2_SCLK GPP_G7/SD_WP
should only be asserted high during external pull-up in AK10 GPP_F2/I2S2_TXD BA9
manufacturing/debug environments ONLY. GPP_F3/I2S2_RXD GPP_A17/SD_PWR_EN#/ISH_GP7 BB9 PCH_WWAN_OFF#
111 Reserved RC1611 RC1613 RC1615
GPP_A16/SD_1P8_SEL PCH_WWAN_OFF# 38
H5 AB7 SD_RCOMP
D7 GPP_D19/DMIC_CLK0 SD_RCOMP
GPP_D20/DMIC_DATA0
0 U22 RC1610
Board_ID3

1
For EMI D8 AF13
HDA_SDIN0 C8 GPP_D17/DMIC_CLK1 GPP_F23
GPP_D18/DMIC_DATA1
RC49 1 U42 RC1609
200_0402_1%
PCH_BEEP AW5
43 PCH_BEEP GPP_B14/SPKR
1 0 MS RC1607

2
CC7 Board_ID4
10P_0201_50V8F
1 OF 20
EMC_NS@ SKYLAKE-U_BGA1356 1 NON-MS RC1608
2 REV = 1 ?
@
0 Touch RC123
Board_ID5
1 NON-Touch RC1606
+3VS +1.8VS
RC45 1 2 33_0402_5% HDA_SDOUT WWAN@
43 HDA_SDOUT_AUDIO
RC46 1 2 0_0402_5% 0 FHD Panel RC1634
44 ME_FLASH 1 2 2.2K_0402_5% PCH_BEEP 2 1 PCH_GNSS_DISABLE#
RC14 @ RC3030 Board_ID6
B B
1 2 10K_0402_5% THS_IRQ
RC514 10K_0402_5% 1 UHD Panel RC1631
+3VALW_PCH
PCH_THS_RST# 1 @ 2
BM_BUSY#
0 WWAN RC1635
RC513 10K_0402_5% 1 2 RC3038
Board_ID7
Default When 10K_0402_5% 1 NON-WWAN RC1632
Pin Name Strap Description Configuration Value Sampled
0 FP RC3046
Internal PD Board_ID8
0 = Disable “ Top Swap” 1 Non-FP RC3045
SPKR / Top Swap 0 Rising edge
GPP_B14 Override
mode. (Default)
1 = Enable “ Top Swap”
* of PCH_PWROK
mode. +3VS

+1.8VALW +1.8VALW
Internal PD

2
10K_0402_5%
0 = Disable “ No Reboot”
GSPI0_MOSINo Reboot
*

RC3045
mode. (Default)
/GPP_B18 1 = Enable “ No Reboot” 0 Rising edge Non-FP@
of PCH_PWROK
4
3

mode
RPC36

1
2

2.2K_0404_4P2R_5% BOARD_ID8
G

Internal PD
1
2

2
@

10K_0402_5%
0 = SPI (Default) PCH_I2C_SCL2 @ 1 6 QC10A
S

GSPI1_MOSIBoot BIOS Rising edge CCG4_I2C_PCH_SCL 31 FP@

*

RC3046
1 = LPC
D

/GPP_B22 Strap Bit 0 of PCH_PWROK 2N7002KDWH_SOT363-6

BBS
5
G

1
PCH_I2C_SDA2 @ 4 3 QC10B
S

CCG4_I2C_PCH_SDA 31
D

2N7002KDWH_SOT363-6
A A

Need change to SB000019A00

S TR DMN5L06DWK-7 2N SOT363-6
Vgs(th) max1.0V
Security Classification LC Future Center Secret Data Title
Issued Date 2015/08/20 Deciphered Date 2016/08/20 MCP (LPSS,ISH,AUDIO,SDIO)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
DS321 0.1

Date: Monday, January 16, 2017 Sheet 8 of 61

5 4 3 2 1
 5 4 3 2 1

D D

SKL_ULT
?
UC1H

SSIC / USB3
PCIE/USB3/SATA
H8 USB30_RX_N1
USB3_1_RXN G8 USB30_RX_P1 USB30_RX_N1 41
H13
PCIE1_RXN/USB3_5_RXN
USB3_1_RXP
USB3_1_TXN
C13 USB30_TX_N1
USB30_TX_P1
USB30_RX_P1
USB30_TX_N1
41
41
Right USB (3.0)
G13 D13
B17 PCIE1_RXP/USB3_5_RXP USB3_1_TXP USB30_TX_P1 41
A17 PCIE1_TXN/USB3_5_TXN J6 USB30_RX_N2
PCIE1_TXP/USB3_5_TXP USB3_2_RXN/SSIC_1_RXN H6 USB30_RX_P2 USB30_RX_N2 41
G11 USB3_2_RXP/SSIC_1_RXP B13 USB30_TX_N2 USB30_RX_P2 41 LEFT USB (3.0)
F11 PCIE2_RXN/USB3_6_RXN USB3_2_TXN/SSIC_1_TXN A13 USB30_TX_P2 USB30_TX_N2 41
D16 PCIE2_RXP/USB3_6_RXP USB3_2_TXP/SSIC_1_TXP USB30_TX_P2 41
C16 PCIE2_TXN/USB3_6_TXN J10 USB30_RX_N3
PCIE2_TXP/USB3_6_TXP USB3_3_RXN/SSIC_2_RXN H10 USB30_RX_P3 USB30_RX_N3 33
H16
PCIE3_RXN
USB3_3_RXP/SSIC_2_RXP
USB3_3_TXN/SSIC_2_TXN
B15 USB30_TX_N3
USB30_TX_P3
USB30_RX_P3
USB30_TX_N3
33
33
Type-C
G16 A15
D17 PCIE3_RXP USB3_3_TXP/SSIC_2_TXP USB30_TX_P3 33
C17 PCIE3_TXN E10 USB30_RX_N4
PCIE3_TXP USB3_4_RXN F10 USB30_RX_P4 USB30_RX_N4 33

40 PCIE_PRX_DTX_N4
PCIE_PRX_DTX_N4
PCIE_PRX_DTX_P4
G15
PCIE4_RXN
USB3_4_RXP
USB3_4_TXN
C15 USB30_TX_N4
USB30_TX_P4
USB30_RX_P4
USB30_TX_N4
33
33
Type-C
F15 D15
40 PCIE_PRX_DTX_P4 PCIE4_RXP USB3_4_TXP USB30_TX_P4 33
WLAN 1
CC1279 2 0.1u_0201_10V6K PCIE_PTX_DRX_N4 B19
40 PCIE_PTX_C_DRX_N4 1 2 0.1u_0201_10V6K PCIE_PTX_DRX_P4 A19 PCIE4_TXN AB9 USB20_N1
CC1280
40 PCIE_PTX_C_DRX_P4 PCIE4_TXP USB2N_1 AB10 USB20_P1 USB20_N1 41
PCIE_PRX_DTX_N5 F16 USB2P_1 USB20_P1 41 RIGHT USB (2.0)
42 PCIE_PRX_DTX_N5 PCIE_PRX_DTX_P5 PCIE5_RXN USB20_N2
E16 AD6
42 PCIE_PRX_DTX_P5 PCIE_PTX_DRX_N5 PCIE5_RXP USB2N_2 USB20_P2 USB20_N2 41
C19 AD7
42 PCIE_PTX_DRX_N5 PCIE_PTX_DRX_P5 D19 PCIE5_TXN USB2P_2 USB20_P2 41 LEFT USB (2.0)
C 42 PCIE_PTX_DRX_P5 PCIE5_TXP AH3 USB20_N3 C
PCIE_PRX_DTX_N6 G18 USB2N_3 AJ3 USB20_P3 USB20_N3 45
42 PCIE_PRX_DTX_N6 PCIE_PRX_DTX_P6 F18 PCIE6_RXN USB2P_3 USB20_P3 45 Finger Print
42 PCIE_PRX_DTX_P6 PCIE_PTX_DRX_N6 PCIE6_RXP USB20_N4
D20 AD9
42 PCIE_PTX_DRX_N6 PCIE_PTX_DRX_P6 C20 PCIE6_TXN USB2N_4 AD10 USB20_P4 USB20_N4 34
42 PCIE_PTX_DRX_P6 PCIE6_TXP USB2P_4 USB20_P4 34 Camera
PCIE_PRX_DTX_N7 F20 AJ1 USB20_N5
SSD 42 PCIE_PRX_DTX_N7 PCIE_PRX_DTX_P7 E20 PCIE7_RXN/SATA0_RXN USB2N_5 AJ2 USB20_P5 USB20_N5 38
42 PCIE_PRX_DTX_P7 PCIE_PTX_DRX_N7 B21 PCIE7_RXP/SATA0_RXP
USB2
USB2P_5 USB20_P5 38 WWAN
42 PCIE_PTX_DRX_N7 PCIE_PTX_DRX_P7 A21 PCIE7_TXN/SATA0_TXN AF6 USB20_N6
42 PCIE_PTX_DRX_P7 PCIE7_TXP/SATA0_TXP USB2N_6 AF7 USB20_P6 USB20_N6 33
PCIE_PRX_DTX_N8 G21 USB2P_6 USB20_P6 33 Type-C
42 PCIE_PRX_DTX_N8 PCIE_PRX_DTX_P8 PCIE8_RXN/SATA1A_RXN USB20_N7
F21 AH1
42 PCIE_PRX_DTX_P8 PCIE_PTX_DRX_N8 PCIE8_RXP/SATA1A_RXP USB2N_7 USB20_P7 USB20_N7 40
D21 AH2
42 PCIE_PTX_DRX_N8 PCIE_PTX_DRX_P8 C21 PCIE8_TXN/SATA1A_TXN USB2P_7 USB20_P7 40 BT
42 PCIE_PTX_DRX_P8 PCIE8_TXP/SATA1A_TXP AF8 USB20_N8
29 PCIE_PRX_DTX_N9
PCIE_PRX_DTX_N9
PCIE_PRX_DTX_P9
E22
PCIE9_RXN
USB2N_8
USB2P_8
AF9 USB20_P8 USB20_N8 32
USB20_P8 32
TBT
E23
29 PCIE_PRX_DTX_P9 PCIE_PTX_DRX_N9 PCIE9_RXP
B23 AG1
29 PCIE_PTX_DRX_N9 PCIE_PTX_DRX_P9 A23 PCIE9_TXN USB2N_9 AG2
29 PCIE_PTX_DRX_P9 PCIE9_TXP USB2P_9
PCIE_PRX_DTX_N10 F25 AH7
29 PCIE_PRX_DTX_N10 PCIE_PRX_DTX_P10 PCIE10_RXN USB2N_10
E25 AH8
29 PCIE_PRX_DTX_P10 PCIE_PTX_DRX_N10 PCIE10_RXP USB2P_10
D23
29 PCIE_PTX_DRX_N10 PCIE_PTX_DRX_P10 C23 PCIE10_TXN AB6 USB2_COMP RC118 2 1 113_0402_1% USBRBIAS
29 PCIE_PTX_DRX_P10 PCIE10_TXP USB2_COMP AG3 USB2_ID RC1626 1 2 0_0402_5% Width 20Mil
RC119 1 2 100_0402_1% PCIE_RCOMPN F5 USB2_ID AG4 USB2_VBUSSENSE RC1627 1 2 1K_0402_5%
PCIE_RCOMPP PCIE_RCOMPN USB2_VBUSSENSE Space 15Mil
E5
TBT PCIE_RCOMPP A9 USB_OC0# Length 500Mil
PCIE_RCOMPN and PCIE_RCOMPP GPP_E9/USB2_OC0# USB_OC0# 41
Trace Width: 12-15mil PAD @ TC20 1 XDP_PRDY# D56 C9 USB_OC1#
1 XDP_PREQ# D61 PROC_PRDY# GPP_E10/USB2_OC1# D9 TYPE_C_OCP# USB_OC1# 41
Differential between RCOMPP/RCOMPN PAD @ TC19
0_0402_5%1 @ 2 RC3031 PM_SLP_S0IX#_R BB11 PROC_PREQ# GPP_E11/USB2_OC2# B9 PRIM_CORE_OPT_DIS# TYPE_C_OCP# 33
B 9,11,13,44,54 PM_SLP_S0# GPP_A7/PIRQA# GPP_E12/USB2_OC3# PRIM_CORE_OPT_DIS# 9 B
PCIE_PRX_DTX_N11 E28 J1 GPP_E4 RC1628 1 2 0_0402_5%
29 PCIE_PRX_DTX_N11 PCIE_PRX_DTX_P11 PCIE11_RXN/SATA1B_RXN GPP_E4/DEVSLP0 EC_SMI# 44
E27 J2
29 PCIE_PRX_DTX_P11 PCIE_PTX_DRX_N11 PCIE11_RXP/SATA1B_RXP GPP_E5/DEVSLP1 PCH_SATA_DEVSLP 42
D24 J3
29 PCIE_PTX_DRX_N11 PCIE_PTX_DRX_P11 C24 PCIE11_TXN/SATA1B_TXN GPP_E6/DEVSLP2 FULL_CARD_POWER_OFF# 38
29 PCIE_PTX_DRX_P11 PCIE_PRX_DTX_N12 PCIE11_TXP/SATA1B_TXP 2016/05/03: Implement as Power Button
E30 H2 SATA0GP
29 PCIE_PRX_DTX_N12 PCIE_PRX_DTX_P12 F30 PCIE12_RXN/SATA2_RXN GPP_E0/SATAXPCIE0/SATAGP0 H3 SSD_SATA_PCIE_DET# function for Windows RedStone support
29 PCIE_PRX_DTX_P12 PCIE_PTX_DRX_N12 PCIE12_RXP/SATA2_RXP GPP_E1/SATAXPCIE1/SATAGP1 SSD_SATA_PCIE_DET# 42
A25 G4 SATA2GP
29 PCIE_PTX_DRX_N12 PCIE_PTX_DRX_P12 B25 PCIE12_TXN/SATA2_TXN GPP_E2/SATAXPCIE2/SATAGP2
29 PCIE_PTX_DRX_P12 PCIE12_TXP/SATA2_TXP H1 BOARD_ID2
GPP_E8/SATALED# BOARD_ID2 8
TBT_C_OCP 1 @ 2 TYPE_C_OCP#
SKYLAKE-U_BGA1356 1 OF 20 32 TBT_C_OCP
RC3044 0_0402_5%
REV = 1 ?
@

RC3047
0_0402_5%1 2
+3VALW_PCH
NOMS@

+3VS
U3313
RPC2 RPC17
1 8 PCH_WLAN_OFF# USB_OC0# 8 1 4 3
PCH_WLAN_OFF# 8,40 USB_OC1# 54 VCCIO_LPM# OUT Y GND
2 7 SATA0GP 7 2
3 6 SATA2GP PRIM_CORE_OPT_DIS# 6 3 2 PM_SLP_S0#
PCH_BT_OFF# TYPE_C_OCP# INA PM_SLP_S0# 9,11,13,44,54
4 5 5 4
PCH_BT_OFF# 8,40 5 1 PRIM_CORE_OPT_DIS#
+3VALW VCC INB PRIM_CORE_OPT_DIS# 9
10K_0804_8P4R_5% 10K_0804_8P4R_5%
MC74VHC1G32DFT1G_SOT353-5

1
+3VS C8654 MS@
A 0.1U_0402_10V6-K A

2
MS@

GPP_E4 RC1617 2 @ 1 10K_0402_5%

PM_SLP_S0IX#_R RC3032 2 1 10K_0402_5%

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 MCP (PCIE,SATA,USB3,USB2)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. DS321
Date: Monday, January 16, 2017 Sheet 9 of 61
5 4 3 2 1
 5 4 3 2 1

UC1I
SKL_ULT ?

CSI-2

A36 C37
B36 CSI2_DN0 CSI2_CLKN0 D37
C38 CSI2_DP0 CSI2_CLKP0 C32
D38 CSI2_DN1 CSI2_CLKN1 D32
C36 CSI2_DP1 CSI2_CLKP1 C29
D D36 CSI2_DN2 CSI2_CLKN2 D29 D
A38 CSI2_DP2 CSI2_CLKP2 B26
B38 CSI2_DN3 CSI2_CLKN3 A26
CSI2_DP3 CSI2_CLKP3
C31 E13 CSI2_COMP RC73 1 2 100_0402_1%
D31 CSI2_DN4 CSI2_COMP B7
C33 CSI2_DP4 GPP_D4/FLASHTRIG
D33 CSI2_DN5
A31 CSI2_DP5 EMMC

B31 CSI2_DN6 AP2

A33 CSI2_DP6 GPP_F13/EMMC_DATA0 AP1
B33 CSI2_DN7 GPP_F14/EMMC_DATA1 AP3
CSI2_DP7 GPP_F15/EMMC_DATA2 AN3
A29 GPP_F16/EMMC_DATA3 AN1
B29 CSI2_DN8 GPP_F17/EMMC_DATA4 AN2
check the Pull up resistor CSI2_DP8 GPP_F18/EMMC_DATA5
C28 AM4
D28 CSI2_DN9 GPP_F19/EMMC_DATA6 AM1
+3VS A27 CSI2_DP9 GPP_F20/EMMC_DATA7
B27 CSI2_DN10 AM2
C27 CSI2_DP10 GPP_F21/EMMC_RCLK AM3
RPC4 D27 CSI2_DN11 GPP_F22/EMMC_CLK AP4
1 4 SSD_CLKREQ# CSI2_DP11 GPP_F12/EMMC_CMD
2 3 WLAN_CLKREQ# AT1 EMMC_RCOMP RC50 1 2 200_0402_1%
EMMC_RCOMP
10K_0404_4P2R_5% SKYLAKE-U_BGA1356 1 OF 20
REV = 1 ?
@

UC1J SKL_ULT ?

C CLOCK SIGNALS C

CLK_PCIE_TBT# D42
29 CLK_PCIE_TBT# CLK_PCIE_TBT C42 CLKOUT_PCIE_N0
PCIE CLK0 TBT 29 CLK_PCIE_TBT TBT_CLKREQ0# CLKOUT_PCIE_P0
AR10
29 TBT_CLKREQ0# GPP_B5/SRCCLKREQ0#
CLK_PCIE_SSD# B42
42 CLK_PCIE_SSD# CLK_PCIE_SSD A42 CLKOUT_PCIE_N1 F43 CLK_PCIE_XDP# 1 TC85 @
PCIE CLK1 SSD 42 CLK_PCIE_SSD SSD_CLKREQ# AT7 CLKOUT_PCIE_P1 CLKOUT_ITPXDP_N E43 CLK_PCIE_XDP 1 TC87 @ SUSCLK RC95 1 @ 2 1K_0402_5%
42 SSD_CLKREQ# GPP_B6/SRCCLKREQ1# CLKOUT_ITPXDP_P
CLK_PCIE_WLAN# D41 BA17 SUSCLK
40 CLK_PCIE_WLAN# CLK_PCIE_WLAN C41 CLKOUT_PCIE_N2 GPD8/SUSCLK SUSCLK 35,40 DIFFCLK_BIASREF RC1555 1 2
PCIE CLK2 WLAN 40 CLK_PCIE_WLAN WLAN_CLKREQ# CLKOUT_PCIE_P2 XTAL24_IN
60.4_0402_1%
AT8 E37 Cannonlake@
40 WLAN_CLKREQ# GPP_B7/SRCCLKREQ2# XTAL24_IN E35 XTAL24_OUT +VCCCLK5
D40 XTAL24_OUT
C40 CLKOUT_PCIE_N3 E42 DIFFCLK_BIASREF RC72 1 2 2.7K_0402_1%
AT10 CLKOUT_PCIE_P3 XCLK_BIASREF
GPP_B8/SRCCLKREQ3# AM18 RTC_X1
B40 RTCX1 AM20 RTC_X2
A40 CLKOUT_PCIE_N4 RTCX2
AU8 CLKOUT_PCIE_P4 AN18 SRTC_RST#
GPP_B9/SRCCLKREQ4# SRTCRST# AM16 RTC_RST#
E40 RTCRST#
E38 CLKOUT_PCIE_N5
AU7 CLKOUT_PCIE_P5
GPP_B10/SRCCLKREQ5#
1
CC3
VCCRTC 1U_0402_6.3V6K
SKYLAKE-U_BGA1356 1 OF 20
REV = 1 ? 2
@ RC33 1 2 20K_0402_1% SRTC_RST#
B RC34 1 2 20K_0402_1% RTC_RST# RC1624 1 @ 2 0_0402_5% B
EC_RTC_RST# 44
1
CC6

1
1U_0402_6.3V6K
2 JCMOS1
@

RC71 2 1 1M_0402_5% RTC_X1

YC2 U22@
RC32 2 1 10M_0402_5% RTC_X2 change to main source SCS00007D00 01/16 JT
2 3 XTAL24_OUT_R1 RC3034 2 XTAL24_OUT
GND1 OSC2 YC1
XTAL24_IN 1 RC3035 2 XTAL24_IN_R 0_0402_5%

2
1 4 1 2
OSC1 GND2 U22@
0_0402_5% 45.3K_0402_1% VCCRTC
1 2 32.768KHZ_9PF_X1A0001410002 2
U22@ CC12 24MHZ_6PF_7V24000032 RC36
1
U22@ CC11 CC4 CC5 RC35 DC5

1
2.2P_0402_50V8-C 2.2P_0402_50V8-C 7P_0402_50V8J 7P_0402_50V8J 1 2 2
2 1 1 +3VL
U22@ 1
U22@ 2 11.5K_0402_5%
2 BAT_D 3
RTC_VCC 1 2

CC17
1U_0402_10V6K

CC26
.1U_0402_10V6-K
RC1491
1K_0402_5%
need to use 38.4MHz (30ohm) for Cannonlake-u LBAT54CWT1G_SOT323-3
2 1

@
A check RTC_VCC voltage spec come from battery A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 MCP (CSI2,EMMC,CLOCK)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. DS321
Date: Monday, January 16, 2017 Sheet 10 of 61
5 4 3 2 1
 5 4 3 2 1

2
EMC@
CC1322
0.1U_0402_25V6 ?

1
SKL_ULT
UC1K
SYSTEM POWER MANAGEMENT
AT11 PM_SLP_S0#_R 1 MS@ 2
RC138 0_0402_5%
GPP_B12/SLP_S0# AP15 PM_SLP_S3#_R 1 2 0_0402_5% PM_SLP_S0# 9,13,44,54
RC96
PLT_RST#_R GPD4/SLP_S3# PM_SLP_S4#_R PM_SLP_S3# 29,44
RC84 1 2 0_0402_5% AN10 BA16 RC97 1 2 0_0402_5%
29,40,42,44 PLT_RST# SYS_RESET# B5 GPP_B13/PLTRST# GPD5/SLP_S4# AY16 PM_SLP_S4# 44
D RC85 1 2 0_0402_5% PCH_RSMRST#_R AY17 SYS_RESET# GPD10/SLP_S5# D
44 EC_RSMRST# RSMRST# AN15 PM_SLP_SUS#
PAD @ TC21 @1 TC206
1 CPU_PROCPWRGD A68 SLP_SUS# AW15
VCCST_PWRGD_R RC93 1 2 60.4_0402_1% VCCST_PWRGD B65 PROCPWRGD SLP_LAN# BB17
VCCST_PWRGD GPD9/SLP_WLAN# AN16
RC139 1 2 0_0402_5% SYS_PWROK_R B6 GPD6/SLP_A#
44 SYS_PWROK 1 2 0_0402_5% PCH_PWROK_R BA20 SYS_PWROK BA15 PBTN_OUT#_R 1 2 0_0402_5%
RC126 RC87 PBTN_OUT# 44
44 PCH_PWROK PCH_DPWROK_R BB20 PCH_PWROK GPD3/PWRBTN# AY15 AC_PRESENT_R
DSW_PWROK GPD1/ACPRESENT AU13 BATLOW#
RC86 1 2 0_0402_5% SUSWARN#_R AR13 GPD0/BATLOW#
44 SUSWARN# 1 @ PAD SUSACK#_R AP11 GPP_A13/SUSWARN#/SUSPWRDNACK
TC207 VCCRTC
GPP_A15/SUSACK# AU11 PME# @1 TC89
RC91 1 2 0_0402_5% WAKE# BB15 GPP_A11/PME# AP16 INTVRMEN RC41 2 1 330K_0402_5%
29,38,40 PCIE_WAKE# PCH_LAN_WAKE# AM15 WAKE# INTRUDER#
AW17 GPD2/LAN_WAKE# AM10
AT15 GPD11/LANPHYPC GPP_B11/EXT_PWR_GATE# AM11
GPD7/RSVD GPP_B2/VRALERT#

SKYLAKE-U_BGA1356 1 OF 20
REV = 1 ?
@
+3VALW +VCCST_CPU

RC74 1 2 10K_0402_5% AC_PRESENT_R

2
RC88 1 2 0_0402_5% AC_PRESENT_R
1 2 8.2K_0402_5% BATLOW# RC137 44 AC_PRESENT
RC75
1K_0402_5%
RC76 2 1 1K_0402_5% WAKE# Follow CRB change to 1kohm

1
RC90 1 2 10K_0402_5% PCH_LAN_WAKE#
RC1599 1 2 0_0402_5% VCCST_PWRGD_R
C 44 EC_VCCST_PWRGD C

+3VALW_PCH 2
CC140
1000P_0402_50V7K
1
RC78 1 @ 2 10K_0402_5% SUSWARN#_R EMC_NS@

+3VS

RC80 1 2 10K_0402_5% SYS_RESET#

1000P_0201_50V7-K 1 2 CC1254 PCH_RSMRST#_R

EMC_NS@ PCH_DPWROK_R RC182 1 2 0_0402_5% EC_RSMRST#
Stuff to fix Reset&PWRGD test fail issue
0.01U_0201_10V6K 1 2 CC104 PCH_PWROK

1000P_0201_50V7-K 1 2 CC103 PCH_DPWROK_R

EMC_NS@

47P_0201_25V8-J 1 2 CC101 SYS_PWROK

B 0.01U_0201_10V6K 1 2 CC1278 EC_RSMRST# B

Add to fix Reset&PWRGD test fail issue

RPC21
1 8 PCH_RSMRST#_R
2 7 PCH_PWROK
3 6 SYS_PWROK
4 5

10K_0804_8P4R_5%

1 2
CC200 330P_0402_50V7K
100K_0402_5% 2 1 RC92 PLT_RST#_R

100K_0402_1% 2 @ 1 RC94 PCH_DPWROK_R

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 MCP (SYSTEM PWR MANAGEMENT)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. DS321
Date: Monday, January 16, 2017 Sheet 11 of 61
5 4 3 2 1
 5 4 3 2 1

+CPU_CORE ? +CPU_CORE +CPU_CORE +VCC_GT +VCC_GT

SKL_ULT SKL_ULT ?
UC1L +VCCCORE_GT2 +VCC_GT UC1M
CPU POWER 1 OF 4 VCORE_VCC_SEN VCCGT_VCC_SEN
RC77 1 2 100_0402_1% RC83 1 2 100_0402_1% CPU POWER 2 OF 4
A30 G32 N70
A34 VCC_A30 VCC_G32 G33 A48 VCCGT_N70 N71
A39 VCC_A34 VCC_G33 G35 VCORE_VSS_SEN RC82 1 2 100_0402_1% VCCGT_VSS_SEN RC98 1 2 100_0402_1% A53 VCCGT_A48 VCCGT_N71 R63
A44 VCC_A39 VCC_G35 G37 A58 VCCGT_A53 VCCGT_R63 R64
AK33 VCC_A44 VCC_G37 G38 A62 VCCGT_A58 VCCGT_R64 R65
AK35 VCC_AK33 VCC_G38 G40 A66 VCCGT_A62 VCCGT_R65 R66
AK37 VCC_AK35 VCC_G40 G42 AA63 VCCGT_A66 VCCGT_R66 R67
AK38 VCC_AK37 VCC_G42 J30 AA64 VCCGT_AA63 VCCGT_R67 R68
AK40 VCC_AK38 VCC_J30 J33 AA66 VCCGT_AA64 VCCGT_R68 R69
AL33 VCC_AK40 VCC_J33 J37 AA67 VCCGT_AA66 VCCGT_R69 R70
AL37 VCC_AL33 VCC_J37 J40 AA69 VCCGT_AA67 VCCGT_R70 R71
AL40 VCC_AL37 VCC_J40 K33 AA70 VCCGT_AA69 VCCGT_R71 T62
D VCC_AL40 VCC_K33 VCCGT_AA70 VCCGT_T62 D
AM32 K35 SVID +VCCST_CPU AA71 U65
AM33 VCC_AM32 VCC_K35 K37 AC64 VCCGT_AA71 VCCGT_U65 U68
AM35 VCC_AM33 VCC_K37 K38 AC65 VCCGT_AC64 VCCGT_U68 U71
AM37 VCC_AM35 VCC_K38 K40 AC66 VCCGT_AC65 VCCGT_U71 W63
AM38 VCC_AM37 VCC_K40 K42 AC67 VCCGT_AC66 VCCGT_W63 W64
G30 VCC_AM38 VCC_K42 K43 AC68 VCCGT_AC67 VCCGT_W64 W65
VCC_G30 VCC_K43 AC69 VCCGT_AC68 VCCGT_W65 W66
VCORE_VCC_SEN 1 VCCGT_AC69 VCCGT_W66
@ TC90 1 K32 E32 CC42 AC70 W67
RSVD_K32 VCC_SENSE E33 VCORE_VSS_SEN VCORE_VCC_SEN 61 0.1u_0201_10V6K AC71 VCCGT_AC70 VCCGT_W67 W68
VSS_SENSE VCORE_VSS_SEN 61 VCCGT_AC71 VCCGT_W68

1
AK32 @ J43 W69

56_0402_5%

100_0402_1%

100_0402_1%
RSVD_AK32 B63 CPU_SVID_ALERT#_R 2 J45 VCCGT_J43 VCCGT_W69 W70

RC131

RC132
RC1544
AB62 VIDALERT# A63 CPU_SVID_CLK_R J46 VCCGT_J45 VCCGT_W70 W71
P62 VCCOPC_AB62 VIDSCK D64 CPU_SVID_DAT_R J48 VCCGT_J46 VCCGT_W71 Y62
V62 VCCOPC_P62 VIDSOUT J50 VCCGT_J48 VCCGT_Y62 +VCCCORE_GT1
VCCOPC_V62 VCCGT_J50

2
G20 +VCCSTG J52
H63 VCCSTG_G20 @ J53 VCCGT_J52 AK42
VCC_OPC_1P8_H63 J55 VCCGT_J53 VCCGTX_AK42 AK43
G61 J56 VCCGT_J55 VCCGTX_AK43 AK45
VCC_OPC_1P8_G61 RC133 1 2 220_0402_1% CPU_SVID_ALERT#_R J58 VCCGT_J56 VCCGTX_AK45 AK46
61 VR_SVID_ALRT# VCCGT_J58 VCCGTX_AK46
AC63 J60 AK48
AE63 VCCOPC_SENSE +VCCCOREG2_GT K48 VCCGT_J60 VCCGTX_AK48 AK50
VSSOPC_SENSE RC134 1 2 0_0402_5% CPU_SVID_CLK_R K50 VCCGT_K48 VCCGTX_AK50 AK52
61 VR_SVID_CLK VCCGT_K50 VCCGTX_AK52
AE62 K52 AK53
AG62 VCCEOPIO_AE62 K53 VCCGT_K52 VCCGTX_AK53 AK55
VCCEOPIO_AG62 RC1545 1 2 0_0402_5% CPU_SVID_DAT_R K55 VCCGT_K53 VCCGTX_AK55 AK56
61 VR_SVID_DAT VCCGT_K55 VCCGTX_AK56
AL63 K56 AK58
VCCEOPIO_SENSE VCCGT_K56 VCCGTX_AK58
AJ62
VSSEOPIO_SENSE
1, Alert# Route Between CLK and Data K58
VCCGT_K58 VCCGTX_AK60
AK60
K60 AK70
L62 VCCGT_K60 VCCGTX_AK70 AL43
SKYLAKE-U_BGA1356 1 OF 20 L63 VCCGT_L62 VCCGTX_AL43 AL46
REV = 1 ? L64 VCCGT_L63 VCCGTX_AL46 AL50
@ change CC1128 mount,CC1122 unmount L65 VCCGT_L64 VCCGTX_AL50 AL53
L66 VCCGT_L65 VCCGTX_AL53 AL56
L67 VCCGT_L66 VCCGTX_AL56 AL60
L68 VCCGT_L67 VCCGTX_AL60 AM48
+CPU_CORE Change to 0402 Size 07/13 L69 VCCGT_L68 VCCGTX_AM48 AM50
L70 VCCGT_L69 VCCGTX_AM50 AM52
C
13x10uF 0402, SIT update to 0603 package
+VCC_GT Backside Cap 8x10uF 0402, SIT update L71 VCCGT_L70 VCCGTX_AM52 AM53
C

M62 VCCGT_L71 VCCGTX_AM53 AM56

N63 VCCGT_M62 VCCGTX_AM56 AM58
N64 VCCGT_N63 VCCGTX_AM58 AU58
10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M
VCCGT_N64 VCCGTX_AU58

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M
1 1 1 1 1 1 1 1 1 1 N66 AU63
1 1 1 1 1 1 1 N67 VCCGT_N66 VCCGTX_AU63 BB57
CC1086

CC1085

CC1080

CC1236

CC1237

CC1093

CC1092

CC1091

CC1089

CC1238
VCCGT_N67 VCCGTX_BB57

CC1122

CC1123

CC1124

CC1125

CC1127

CC1128

CC1129
N69 BB66
VCCGT_N69 VCCGTX_BB66
2 2 2 2 2 2 2 2 2 2 VCCGT_VCC_SEN J70 AK62
2 2 2 2 2 2 2 61 VCCGT_VCC_SEN VCCGT_SENSE VCCGTX_SENSE
VCCGT_VSS_SEN J69 AL61
61 VCCGT_VSS_SEN VSSGT_SENSE VSSGTX_SENSE
U42@ @ @ @ @ CD@
@
SKYLAKE-U_BGA1356 1 OF 20
REV = 1 ?
@

+CPU_CORE
+VCC_GT
Backside Cap 12x1uF 0201, SIT update
1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1
CC1095

CC1096

CC1097

CC1098

CC1099

CC1100

CC1101

CC1102

CC1296

CC1104

CC1304

CC1305

CC1306

CC1108

CC1109

CC1318

CC1317

CC1320

CC1319

CC1321

CC1111

CC1114

CC1115

CC1116

CC1118

CC1119

CC1240
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
2 2 2 2 2 2 2
U42@ U42@ U42@ U42@ U42@ U42@ U42@

B B

+VCCCORE_GT2
+VCCCORE_GT2
+CPU_CORE

RC1068 1 U42@ 2 0.0002_0805

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M
10U_0402_6.3V6M

1 1 1 1 1 1 1 1
CC1126

CC1241

CC1303

CC1311

CC1312

CC1314

CC1313

CC1315

+VCC_GT
2 2 2 2 2 2 2 2
RC1069 1 U22@ 2 0.0002_0805
U42@ U42@ U42@

+VCCCORE_GT1
+CPU_CORE

+VCCCORE_GT1
RC1070 1 U42@ 2 0.0002_0805

+VCC_GT +VCCCOREG2_GT
1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1 1 1 1 1 1
RC3029 1 U22@ 2 0_0402_5%
CC1105

CC1294

CC1295

CC1110

CC1211

CC1316

A A
2 2 2 2 2 2

U42@
U42@ U42@ U42@ U42@ U42@

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 MCP (CPU PWR1)

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
DS321 0.1

Date: Monday, January 16, 2017 Sheet 12 of 61

5 4 3 2 1
 5 4 3 2 1

+VCCIO
3.1A 2x10uF, 4x1uF

10U_0402_6.3V6M

10U_0402_6.3V6M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
+VCCIO 1 1 1 1 1 1 1 1 1 1
+1.2V

CC1152

CC1153

CC1158

CC1159

CC1160

CC1161

CC1218

CC1230

CC1231

CC1232
?
UC1N SKL_ULT

CPU POWER 3 OF 4 2 2 2 2 2 2 2 2 2 2
AU23 AK28
AU28 VDDQ_AU23 VCCIO_AK28 AK30
Change to 0402 Size 07/13 AU35 VDDQ_AU28 VCCIO_AK30 AL30 @ @ @ @ @
AU42 VDDQ_AU35 VCCIO_AL30 AL42
+1.2V BB23 VDDQ_AU42 VCCIO_AL42 AM28
2A , 3x22uF, 6x10uF, 4x1uF, SIT update VDDQ_BB23 VCCIO_AM28
BB32 AM30 +VCCSA
BB41 VDDQ_BB32 VCCIO_AM30 AM42
BB47 VDDQ_BB41 VCCIO_AM42
D
BB51 VDDQ_BB47 AK23 D
22U_0402_4V6-M

22U_0402_4V6-M

22U_0402_4V6-M

+VCCSA
10U_0603_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M
VDDQ_BB51 VCCSA_AK23 AK25
1 1 1 1 1 1 1 1 1 1 1 1 1 1 VCCSA_AK25 G23 4.5A 10x10uF, 7x1uF, SIT update
CC1256

CC1257

CC1258

CC1168

CC1169

CC1171

CC1222

CC1223

CC1243

CC1244

CC1224

CC1225

CC1226

CC1227
AM40 VCCSA_G23 G25
+VDDQ_CPU_CLK VDDQC VCCSA_G25 G27
2 2 2 2 2 2 2 2 2 2 2 2 2 2 A18 VCCSA_G27 G28

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
+VCCST_CPU VCCST VCCSA_G28 J22 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
CD@ CD@ @ @ CD@ @ CD@ @ A22 VCCSA_J22 J23

CC1132

CC1134

CC1135

CC1137

CC1133

CC1136

CC1251

CC1252

CC1253

CC1139

CC1140

CC1142

CC1145

CC1141

CC1143

CC1144
+VCCSTG VCCSTG_A22 VCCSA_J23 J27
AL23 VCCSA_J27 K23
+VCCSFR_OC VCCPLL_OC VCCSA_K23 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
K25
K20 VCCSA_K25 K27
K21 VCCPLL_K20 VCCSA_K27 K28
+VCCPLL_CPU VCCPLL_K21 VCCSA_K28 K30 @ @ @ @ CD@ CD@ CD@
+VCCSTG +VCCST_CPU VCCSA_K30
+VDDQ_CPU_CLK AM23 CPU_VCCIO_SENSE
VCCIO_SENSE CPU_VSSIO_SENSE CPU_VCCIO_SENSE 54
120mA AM22
VSSIO_SENSE CPU_VSSIO_SENSE 54
@ CPU_VSSSA_SENSE
RC1497 1 2 0_0402_5% RC103 1 2 0_0402_5% H21

1U_0402_6.3V6K
+1.2V +VCCIO VSSSA_SENSE CPU_VCCSA_SENSE CPU_VSSSA_SENSE 61
H20
10U_0402_6.3V6M
1U_0201_6.3V6-M

1 VCCSA_SENSE CPU_VCCSA_SENSE 61

1U_0402_6.3V6K

CC86
1 1
CC1229

CC1228

1
SKYLAKE-U_BGA1356 1 OF 20

CC87
2 REV = 1 ?
2 2 @
@ 2
+VCCSA +VCCIO

+VCCSFR_OC

+VCCPLL_CPU CPU_VCCSA_SENSE RC101 1 2 100_0402_1% CPU_VCCIO_SENSE RC3020 1 2 100_0402_1%

RC104 1 NOMS@ 2 0_0402_5%
1U_0201_6.3V6-M

CPU_VSSSA_SENSE RC102 1 2 100_0402_1% CPU_VSSIO_SENSE RC3021 1 2 100_0402_1%

1 120mA
RC105 1 2 0_0402_5% +1.0VALW +VCCST_CPU
CC85

+VCCST_CPU QC19

0.1u_0201_10V6K

1U_0402_6.3V6K
C C
AO3402_SOT-23-3
2 1 1

CC84
CC1249
1 3
D S
2 2

10U_0603_6.3V6M

10U_0603_6.3V6M
G

1
1 1
RC135

CC1298

CC1299
2
470_0603_5%
@
2 2

2
@

+3VALW

1
D
+1.0VALW +VCCSTG V9B+ VCCST_EN# 2 QC14
+3VALW +5VALW G 2N7002KW_SOT323-3
1 @
CC233 CC1308 1 2 RC2555 1 2 S

3
0.1u_0201_10V6K +3VALW 100K_0402_5%

0.01U_0201_25V6-K
UC5 1U_0201_6.3V6-M UC8
2 2 4
MS@ VIN VOUT 1

6
1 5

CC1297
D
9,11,44,54 PM_SLP_S0# A VCC RC3040 VBIAS_R VCCST_EN#
1 2 5 3 RC141 1 2 2 QC16A
EC_VCCIO_EN 2 VBIAS NC 47K_0402_5% G 2N7002KDWH_SOT363-6
44,54 EC_VCCIO_EN B 0_0402_5% 2
6 1
RC2550 VCCSTG_EN @ ON GND
3 4 1 2 1
S
GND Y

1
Slp_S3 enable CC1307 EM5201BJ-45_SOT23-6
0_0402_5%
1U_0402_10V6K
MS@ RC3041

3
74LVC1G08SE-7_SOT353-5 1 1 2 D
CC229 2 EC_VCCST_EN 5 QC16B
MS@ 0_0402_5% 44 EC_VCCST_EN
0.1u_0201_10V6K MS@ G 2N7002KDWH_SOT363-6

VCCSTG_EN
2 S

4
+VCCST_CPU switch

B B

RC3039
1 2
0_0402_5%
NOMS@

+3VALW
+1.2V
+VCCSFR_OC
+3VALW +5VALW

1 CC1309 1 2
CC1300
0.1u_0201_10V6K 1U_0201_6.3V6-M
UC10
UC9 MS@
2 2 4
MS@ VIN VOUT
PM_SLP_S0# 1 5 RC3042
A VCC 1 2 5 3
VBIAS NC
SYSON 2 0_0402_5%
44,57 SYSON B 6 1
@ ON GND
RC3028 VCCPLLOC_EN 1
3 4 1 2
GND Y CC1302 EM5201BJ-45_SOT23-6
Slp_S4 enable 0_0402_5% 1U_0402_10V6K MS@
RC3043
1 2 MS@

VCCPLLOC_EN
74LVC1G08SE-7_SOT353-5 MS@
1 2
MS@ CC1301 0_0402_5%
0.1u_0201_10V6K MS@
2

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 MCP (CPU PWR2)

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. DS321
Dat e: Monday, January 16, 2017 Sheet 13 of 61
5 4 3 2 1
 5 4 3 2 1

+3VALW_PCH +VCCPGPPG

RC1503 1 2 0_0603_5%
+1.0VALW +VCCAMPHY
RC1622 1 2 0_0402_5%
+1.0VALW RC1504 1 2 0_0402_5% +VCCAPLL_1P0
SM01000SK00, S SUPPRE_ MURATA BLM15GA750SN1D 0402
D +VCCHDA D

+3VALW_PCH RC1586 1 2 0_0402_5%

SM01000SK00, S SUPPRE_ MURATA BLM15GA750SN1D 0402

RC1620 1 @ 2 0_0402_5% VCCMPHYON_1P0_L1

+1.0VALW

1U_0402_6.3V6K
1

CC144
2

+3VALW_PCH

0.696A
+1.0VALW
Near AB19

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
1

CC141
1 1 1 1 1
22mA 2.574A +VCCPGPPG

CC156

CC164

CC172

CC173

CC174
+1.0VALW +CPU_VCCPRIM ?

22U_0603_6.3V6-M

1U_0402_6.3V6K
1 1 2 SKL_ULT
UC1O

CC158
1U_0201_6.3V6-M

@ 2 2 2 2 2

CC153
1 CPU POWER 4 OF 4
@ @ @ @
CC1310

1U_0402_6.3V6K
+VCCDSW_1P0 2 2 AB19

1U_0402_6.3V6K
VCCPRIM_1P0_AB19 1
@ @ AB20 AK15 20mA Near Y15

CC175
2 1 VCCPRIM_1P0_AB20 VCCPGPPA +3VALW_PCH
P18 AG15 4mA

CC145

1U_0402_6.3V6K
VCCPRIM_1P0_P18 VCCPGPPB Y16
+1.0VALW
1.5A Near AF18 VCCPGPPC
6mA 1
AF18 Y15 8mA 2

CC176
2 AF19 VCCPRIM_CORE_AF18 VCCPGPPD T16 6mA @
VCCPRIM_CORE_AF19 VCCPGPPE +1.8VALW
V20 AF16 161mA
47U_0805_6.3V6-M

1U_0201_6.3V6-M

1U_0402_6.3V6K
C C
VCCPRIM_CORE_V20 VCCPGPPF +1.8VALW 2
1 1 PCH Internal VRM V21 AD15 61mA 1
VCCPRIM_CORE_V21 VCCPGPPG @
CC148

CC147

CC142
+3VALW_PCH
Near N15 AL1 V19

0.1u_0201_10V6K

1U_0402_6.3V6K
DCPDSW_1P0 VCCPRIM_3P3_V19
2 2 2 1 1
K17 T1

CC149

CC143
@ VCCMPHYON_1P0_L1 VCCMPHYAON_1P0_K17 VCCPRIM_1P0_T1 +1.0VALW
+VCCAMPHY
88mA L1
VCCMPHYAON_1P0_L1 AA1 6mA
22U_0603_6.3V6-M

1U_0402_6.3V6K

N15 VCCATS_1P8 2 2
1 1 VCCMPHYGT_1P0_N15
N16 AK17 1mA
C1096

CC151

N17 VCCMPHYGT_1P0_N16 VCCRTCPRIM_3P3

P15 VCCMPHYGT_1P0_N17 AK19 1mA
2 2 VCCMPHYGT_1P0_P15 VCCRTC_AK19 VCCRTC
Near K15 P16 BB14

0.1u_0201_10V6K

1U_0402_6.3V6K
@ VCCMPHYGT_1P0_P16 VCCRTC_BB14
1 1
K15 BB10 VCCRTCEXT

CC146

CC1242
L15 VCCAMPHYPLL_1P0_K15 DCPRTC
VCCAMPHYPLL_1P0_L15 A14 35mA

0.1u_0201_10V6K
VCCCLK1 +1.0VALW 2 2
22mA V15 1
+VCCAPLL_1P0 VCCAPLL_1P0 K19 29mA 0_0603_5% 1 2 RC1587

CC55
0.1u_0201_10V6K

1U_0402_6.3V6K

VCCCLK2 +1.0VALW
AB17

1U_0402_6.3V6K
1 1 +1.0VALW VCCPRIM_1P0_AB17
Y18 L21 24mA
C1097

CC154

22U_0603_6.3V6-M
VCCPRIM_1P0_Y18 VCCCLK3 +1.0VALW 1 1 2

C1098
CC56
+VCCHDA
0.118A AD17 N20 33mA
0.1u_0201_10V6K

2 2 +3VALW VCCDSW_3P3_AD17 VCCCLK4 +VCCCLK4

1 AD18
AJ17 VCCDSW_3P3_AD18 L19 4mA 2 2
CC165

VCCDSW_3P3_AJ17 VCCCLK5 +VCCCLK5

@
68mA AJ19 A10 10mA
+1.0VALW
2 VCCHDA VCCCLK6

1U_0402_6.3V6K
11mA AJ16 AN11 1
+3VALW_PCH VCCSPI GPP_B0/CORE_VID0 VID0 54
AN13

CC57
0.642A AF20 GPP_B1/CORE_VID1 VID1 54
+1.0VALW VCCSRAM_1P0_AF20
AF21
1U_0402_6.3V6K

T19 VCCSRAM_1P0_AF21 2
1 Near AF20 VCCSRAM_1P0_T19
T20
CC159

VCCSRAM_1P0_T20
75mA AJ21
2 +3VALW_PCH VCCPRIM_3P3_AJ21
1U_0402_6.3V6K

CD@ 1 AK20
+1.0VALW VCCPRIM_1P0_AK20
CC171

33mA N18 0_0603_5% 1 2 RC1588

B +1.0VALW VCCAPLLEBB +VCCCLK4 +1.0VALW B

22U_0603_6.3V6-M
2
1U_0402_6.3V6K

1
1 OF 20

C1099
1 SKYLAKE-U_BGA1356
CD@ REV = 1
CC169

?
@
2
2 @

+VCCCLK5 0_0603_5% 1 2 RC1589

+1.0VALW
Near A18

22U_0603_6.3V6-M
1

C1100
2
@
+CPU_VCCPRIM

RC3025
1 2 0_0402_5%
CPU_VCCPRIM_SENSE 54
RC3024
1 2 0_0402_5%
CPU_VSSPRIM_SENSE 54

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 MCP (PCH PWR)

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
DS321 0.1

Date: Monday, January 16, 2017 Sheet 14 of 61

5 4 3 2 1
 5 4 3 2 1

SKL_ULT
UC1Q ?
SKL_ULT
UC1P ?
SKL_ULT ?
GND 2 OF 3 UC1R
GND 1 OF 3
AT63 BA49 GND 3 OF 3
A5 AL65 AT68 VSS_AT63 VSS_BA49 BA53 F8 L18
A67 VSS_A5 VSS_AL65 AL66 AT71 VSS_AT68 VSS_BA53 BA57 G10 VSS_F8 VSS_L18 L2
A70 VSS_A67 VSS_AL66 AM13 AU10 VSS_AT71 VSS_BA57 BA6 G22 VSS_G10 VSS_L2 L20
D AA2 VSS_A70 VSS_AM13 AM21 AU15 VSS_AU10 VSS_BA6 BA62 G43 VSS_G22 VSS_L20 L4 D
AA4 VSS_AA2 VSS_AM21 AM25 AU20 VSS_AU15 VSS_BA62 BA66 G45 VSS_G43 VSS_L4 L8
AA65 VSS_AA4 VSS_AM25 AM27 AU32 VSS_AU20 VSS_BA66 BA71 G48 VSS_G45 VSS_L8 N10
AA68 VSS_AA65 VSS_AM27 AM43 AU38 VSS_AU32 VSS_BA71 BB18 G5 VSS_G48 VSS_N10 N13
AB15 VSS_AA68 VSS_AM43 AM45 AV1 VSS_AU38 VSS_BB18 BB26 G52 VSS_G5 VSS_N13 N19
AB16 VSS_AB15 VSS_AM45 AM46 AV68 VSS_AV1 VSS_BB26 BB30 G55 VSS_G52 VSS_N19 N21
AB18 VSS_AB16 VSS_AM46 AM55 AV69 VSS_AV68 VSS_BB30 BB34 G58 VSS_G55 VSS_N21 N6
AB21 VSS_AB18 VSS_AM55 AM60 AV70 VSS_AV69 VSS_BB34 BB38 G6 VSS_G58 VSS_N6 N65
AB8 VSS_AB21 VSS_AM60 AM61 AV71 VSS_AV70 VSS_BB38 BB43 G60 VSS_G6 VSS_N65 N68
AD13 VSS_AB8 VSS_AM61 AM68 AW10 VSS_AV71 VSS_BB43 BB55 G63 VSS_G60 VSS_N68 P17
AD16 VSS_AD13 VSS_AM68 AM71 AW12 VSS_AW10 VSS_BB55 BB6 G66 VSS_G63 VSS_P17 P19
AD19 VSS_AD16 VSS_AM71 AM8 AW14 VSS_AW12 VSS_BB6 BB60 H15 VSS_G66 VSS_P19 P20
AD20 VSS_AD19 VSS_AM8 AN20 AW16 VSS_AW14 VSS_BB60 BB64 H18 VSS_H15 VSS_P20 P21
AD21 VSS_AD20 VSS_AN20 AN23 AW18 VSS_AW16 VSS_BB64 BB67 H71 VSS_H18 VSS_P21 R13
AD62 VSS_AD21 VSS_AN23 AN28 AW21 VSS_AW18 VSS_BB67 BB70 J11 VSS_H71 VSS_R13 R6
AD8 VSS_AD62 VSS_AN28 AN30 AW23 VSS_AW21 VSS_BB70 C1 J13 VSS_J11 VSS_R6 T15
AE64 VSS_AD8 VSS_AN30 AN32 AW26 VSS_AW23 VSS_C1 C25 J25 VSS_J13 VSS_T15 T17
AE65 VSS_AE64 VSS_AN32 AN33 AW28 VSS_AW26 VSS_C25 C5 J28 VSS_J25 VSS_T17 T18
AE66 VSS_AE65 VSS_AN33 AN35 AW30 VSS_AW28 VSS_C5 D10 J32 VSS_J28 VSS_T18 T2
AE67 VSS_AE66 VSS_AN35 AN37 AW32 VSS_AW30 VSS_D10 D11 J35 VSS_J32 VSS_T2 T21
AE68 VSS_AE67 VSS_AN37 AN38 AW34 VSS_AW32 VSS_D11 D14 J38 VSS_J35 VSS_T21 T4
AE69 VSS_AE68 VSS_AN38 AN40 AW36 VSS_AW34 VSS_D14 D18 J42 VSS_J38 VSS_T4 U10
AF1 VSS_AE69 VSS_AN40 AN42 AW38 VSS_AW36 VSS_D18 D22 J8 VSS_J42 VSS_U10 U63
AF10 VSS_AF1 VSS_AN42 AN58 AW41 VSS_AW38 VSS_D22 D25 K16 VSS_J8 VSS_U63 U64
AF15 VSS_AF10 VSS_AN58 AN63 AW43 VSS_AW41 VSS_D25 D26 K18 VSS_K16 VSS_U64 U66
AF17 VSS_AF15 VSS_AN63 AP10 AW45 VSS_AW43 VSS_D26 D30 K22 VSS_K18 VSS_U66 U67
AF2 VSS_AF17 VSS_AP10 AP18 AW47 VSS_AW45 VSS_D30 D34 K61 VSS_K22 VSS_U67 U69
AF4 VSS_AF2 VSS_AP18 AP20 AW49 VSS_AW47 VSS_D34 D39 K63 VSS_K61 VSS_U69 U70
AF63 VSS_AF4 VSS_AP20 AP23 AW51 VSS_AW49 VSS_D39 D44 K64 VSS_K63 VSS_U70 V16
AG16 VSS_AF63 VSS_AP23 AP28 AW53 VSS_AW51 VSS_D44 D45 K65 VSS_K64 VSS_V16 V17
AG17 VSS_AG16 VSS_AP28 AP32 AW55 VSS_AW53 VSS_D45 D47 K66 VSS_K65 VSS_V17 V18
AG18 VSS_AG17 VSS_AP32 AP35 AW57 VSS_AW55 VSS_D47 D48 K67 VSS_K66 VSS_V18 W13
C AG19 VSS_AG18 VSS_AP35 AP38 AW6 VSS_AW57 VSS_D48 D53 K68 VSS_K67 VSS_W13 W6 C
AG20 VSS_AG19 VSS_AP38 AP42 AW60 VSS_AW6 VSS_D53 D58 K70 VSS_K68 VSS_W6 W9
AG21 VSS_AG20 VSS_AP42 AP58 AW62 VSS_AW60 VSS_D58 D6 K71 VSS_K70 VSS_W9 Y17
AG71 VSS_AG21 VSS_AP58 AP63 AW64 VSS_AW62 VSS_D6 D62 L11 VSS_K71 VSS_Y17 Y19
AH13 VSS_AG71 VSS_AP63 AP68 AW66 VSS_AW64 VSS_D62 D66 L16 VSS_L11 VSS_Y19 Y20
AH6 VSS_AH13 VSS_AP68 AP70 AW8 VSS_AW66 VSS_D66 D69 L17 VSS_L16 VSS_Y20 Y21
AH63 VSS_AH6 VSS_AP70 AR11 AY66 VSS_AW8 VSS_D69 E11 VSS_L17 VSS_Y21
AH64 VSS_AH63 VSS_AR11 AR15 B10 VSS_AY66 VSS_E11 E15
AH67 VSS_AH64 VSS_AR15 AR16 B14 VSS_B10 VSS_E15 E18
AJ15 VSS_AH67 VSS_AR16 AR20 B18 VSS_B14 VSS_E18 E21
AJ18 VSS_AJ15 VSS_AR20 AR23 B22 VSS_B18 VSS_E21 E46 1 OF 20
SKYLAKE-U_BGA1356
AJ20 VSS_AJ18 VSS_AR23 AR28 B30 VSS_B22 VSS_E46 E50 REV = 1
VSS_AJ20 VSS_AR28 VSS_B30 VSS_E50 ?
AJ4 AR35 B34 E53 @
AK11 VSS_AJ4 VSS_AR35 AR42 B39 VSS_B34 VSS_E53 E56
AK16 VSS_AK11 VSS_AR42 AR43 B44 VSS_B39 VSS_E56 E6
AK18 VSS_AK16 VSS_AR43 AR45 B48 VSS_B44 VSS_E6 E65
AK21 VSS_AK18 VSS_AR45 AR46 B53 VSS_B48 VSS_E65 E71
AK22 VSS_AK21 VSS_AR46 AR48 B58 VSS_B53 VSS_E71 F1
AK27 VSS_AK22 VSS_AR48 AR5 B62 VSS_B58 VSS_F1 F13
AK63 VSS_AK27 VSS_AR5 AR50 B66 VSS_B62 VSS_F13 F2
AK68 VSS_AK63 VSS_AR50 AR52 B71 VSS_B66 VSS_F2 F22
AK69 VSS_AK68 VSS_AR52 AR53 BA1 VSS_B71 VSS_F22 F23
AK8 VSS_AK69 VSS_AR53 AR55 BA10 VSS_BA1 VSS_F23 F27
AL2 VSS_AK8 VSS_AR55 AR58 BA14 VSS_BA10 VSS_F27 F28
AL28 VSS_AL2 VSS_AR58 AR63 BA18 VSS_BA14 VSS_F28 F32
AL32 VSS_AL28 VSS_AR63 AR8 BA2 VSS_BA18 VSS_F32 F33
AL35 VSS_AL32 VSS_AR8 AT2 BA23 VSS_BA2 VSS_F33 F35
AL38 VSS_AL35 VSS_AT2 AT20 BA28 VSS_BA23 VSS_F35 F37
AL4 VSS_AL38 VSS_AT20 AT23 BA32 VSS_BA28 VSS_F37 F38
AL45 VSS_AL4 VSS_AT23 AT28 BA36 VSS_BA32 VSS_F38 F4
AL48 VSS_AL45 VSS_AT28 AT35 F68 VSS_BA36 VSS_F4 F40
AL52 VSS_AL48 VSS_AT35 AT4 BA45 VSS_F68 VSS_F40 F42
B AL55 VSS_AL52 VSS_AT4 AT42 VSS_BA45 VSS_F42 BA41 B
AL58 VSS_AL55 VSS_AT42 AT56 VSS_BA41
AL64 VSS_AL58 VSS_AT56 AT58
VSS_AL64 VSS_AT58
1 OF 20
SKYLAKE-U_BGA1356
1 OF 20
SKYLAKE-U_BGA1356 REV = 1 ?
REV = 1 ? @
@

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 MCP (VSS)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. DS321
Date: Monday, January 16, 2017 Sheet 15 of 61
5 4 3 2 1
 5 4 3 2 1

+VCCST_CPU
UC1T SKL_ULT ?
?
SKL_ULT SPARE
UC1S +1.8VALW

1
AW 69 F6
RESERVED SIGNALS-1 AW 68 RSVD_AW 69 RSVD_F6 E3 XTAL24_IN2 RC1619
AU56 RSVD_AW 68 RSVD_E3 C11 150_0402_5%
CPU_CFG0 E68 BB68 RSVD_AU56 RSVD_C11
CPU_CFG1 CFG[0] RSVD_TP_BB68 AW 48 B11 @
D PAD @ TC142 1 B67 BB69 XTAL24_OUT2 C7 RSVD_AW 48 RSVD_B11 A11
D
CPU_CFG2 CFG[1] RSVD_TP_BB69 Cannonlake@
1 D65 RSVD_C7 RSVD_A11

2
PAD @ TC143 RC1582 2 1 0_0402_5% RSVD_U12 U12 D12
PAD @ TC144 1 XDP_CPU_CFG3 D67 CFG[2] AK13 RSVD_U12 RSVD_D12
CPU_CFG4 CFG[3] RSVD_TP_AK13 RC1583 2 1 0_0402_5% RSVD_U11 U11 C12
2

E70 AK12 H11 RSVD_U11 RSVD_C12 F52 RSVD_F52

CPU_CFG5 CFG[4] RSVD_TP_AK12 Cannonlake@
RC1618 PAD @ TC146 1 C68 RSVD_H11 RSVD_F52
1K_0402_5% PAD @ TC147 1 CPU_CFG6 D68 CFG[5] BB2
@ PAD @ TC148 1 CPU_CFG7 C67 CFG[6] RSVD_BB2 BA3
CFG[7] RSVD_BA3 1 OF 20

2
F71
CFG[8] SKYLAKE-U_BGA1356
1

RC106 G69
CFG[9] REV = 1 ?
1K_0402_5% F70 AU5
CFG[10] TP5 @
G68 AT5
H70 CFG[11] TP6
CFG[12]
1

G71
H69 CFG[13] D5
G70 CFG[14] RSVD_D5 D4
CFG[15] RSVD_D4 B2
E63 RSVD_B2 C2
F63 CFG[16] RSVD_C2 RC2551 2 1 1M_0402_5%
CFG[17] B3
E66 RSVD_B3 A3 YC3 U42@
F66 CFG[18] RSVD_A3
CFG[19] 2 3 XTAL24_OUT2_R 1 RC3036 2 XTAL24_OUT2
AW 1 GND1 OSC2
C CFG_RCOMP E60 RSVD_AW 1 C
CFG_RCOMP XTAL24_IN2 1 RC3037 2 XTAL24_IN2_R 1 4 0_0402_5%
E1 OSC1 GND2 U42@
PAD @ TC166 1 XDP_ITP_PMODE E8 RSVD_E1 E2 0_0402_5%
ITP_PMODE RSVD_E2
2

U42@ 1 24MHZ_6PF_7V24000032 1
RC162 AY2 BA4
AY1 RSVD_AY2 RSVD_BA4 BB4 CC1282 U42@ CC1281
49.9_0402_1% RSVD_AY1 RSVD_BB4 3.3P_0402_50V8-C 2.7P_0402_50V9-B
D1
RSVD_D1 RSVD_A4
A4 2 KBL R U42 Use 2
1

D3 C4 U42@ U42@
RSVD_D3 RSVD_C4
K46 BB5
K45 RSVD_K46 TP4 need to use 38.4MHz (30ohm) for Cannonlake-u
RSVD_K45 A69
AL25 RSVD_A69 B69
AL27 RSVD_AL25 RSVD_B69
RSVD_AL27 AY3 RSVD_AY3 need to check with Intel
C71 RSVD_AY3
RSVD_C71

2
B70 D71
RSVD_B70 RSVD_D71 C70 RC107
F60 RSVD_C70
RSVD_F60 0_0402_5%
C54
A52 RSVD_C54 D54
RSVD_A52 RSVD_D54

1
B B
BA70 AY4
BA68 RSVD_TP_BA70 TP1 BB3
RSVD_TP_BA68 TP2
J71 AY71 VSS_AY71 need to check with Intel
J68 RSVD_J71 VSS_AY71 AR56
RSVD_J68 ZVM#

2
PAD @ TC169 1 F65 AW 71
PAD @ TC170 1 G65 VSS_F65 RSVD_TP_AW 71 AW 70 RC108
VSS_G65 RSVD_TP_AW 70
0_0402_5%
F61 AP56
E61 RSVD_F61 MSM# C64 PROC_SELECT# 1 2
RSVD_E61 PROC_SELECT# +VCCST_CPU

1
100K_0402_5% Cannonlake@ R22

1 OF 20
SKYLAKE-U_BGA1356
REV = 1 ?
@
Default
Pin Name Strap Description Configuration Value

A A
CFG[4] Display Port — 1 = eDP Disabled 1
Presence strap — 0 = eDP Enabled
* Security Classification LC Future Center Secret Data Title
Issued Date 2015/08/20 Deciphered Date 2016/08/20 MCP (CFG,RESERVED)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
DS321 0.1

Date: Monday, January 16, 2017 Sheet 16 of 61

5 4 3 2 1
 A B C D

8Gb SDP DDRA_DQ[0..63]

16Gb DDP
UD1 5 DDRA_DQ[0..63] UD2
DDRA_DQS#[0..7]
DDRA_MA0 P3 G2 DDRA_DQ47 5 DDRA_DQS#[0..7] DDRA_MA0 P3 G2 DDRA_DQ16
5 DDRA_MA0 DDRA_MA1 A0 LDQ0 DDRA_DQ45 DDRA_DQS[0..7] DDRA_MA1 A0 LDQ0 DDRA_DQ20
P7 F7 P7 F7
5 DDRA_MA1 DDRA_MA2 A1 LDQ1 DDRA_DQ43 5 DDRA_DQS[0..7] DDRA_MA2 A1 LDQ1 DDRA_DQ19 +1.2V
R3 H3 R3 H3
5 DDRA_MA2 DDRA_MA3 A2 LDQ2 DDRA_DQ44 DDRA_MA3 A2 LDQ2 DDRA_DQ21
N7 H7 N7 H7
5 DDRA_MA3 DDRA_MA4 A3 LDQ3 DDRA_DQ42 DDRA_MA4 A3 LDQ3 DDRA_DQ23
N3 H2 N3 H2
5 DDRA_MA4 DDRA_MA5 A4 LDQ4 DDRA_DQ41 DDRA_MA5 A4 LDQ4 DDRA_DQ17 DDRA_ALERT# UD1_DDRA_BG1
P8 H8 P8 H8 RD86 1 2 49.9_0402_1% R10136 1 2 0_0402_5%
5 DDRA_MA5 DDRA_MA6 A5 LDQ5 DDRA_DQ46 DDRA_MA6 A5 LDQ5 DDRA_DQ22
P2 J3 P2 J3 SDP@
5 DDRA_MA6 DDRA_MA7 A6 LDQ6 DDRA_DQ40 DDRA_MA7 A6 LDQ6 DDRA_DQ18 DDRA_BG1
R8 J7 R8 J7 R10137 1 2 0_0402_5%
5 DDRA_MA7 DDRA_MA8 A7 LDQ7 DDRA_DQ35 DDRA_MA8 A7 LDQ7 DDRA_DQ31 DDRA_BG1 5
R2 A3 R2 A3 DDP@
5 DDRA_MA8 DDRA_MA9 A8 UDQ0 DDRA_DQ33 DDRA_MA9 A8 UDQ0 DDRA_DQ28 +0.6VS
R7 B8 R7 B8
5 DDRA_MA9 DDRA_MA10_AP A9 UDQ1 DDRA_DQ38 DDRA_MA10_AP A9 UDQ1 DDRA_DQ30 UD2_DDRA_BG1
M3 C3 M3 C3 R10139 1 2 0_0402_5%
5 DDRA_MA10_AP DDRA_MA11 A10/AP UDQ2 DDRA_DQ36 DDRA_MA11 A10/AP UDQ2 DDRA_DQ29
T2 C7 T2 C7 RD238 SDP@
5 DDRA_MA11 DDRA_MA12 A11 UDQ3 DDRA_DQ39 DDRA_MA12 A11 UDQ3 DDRA_DQ27 DDRA_CLK0#

1
M7 C2 M7 C2 RD49 1 2 36_0402_1% 1 2 0_0402_5% R10138 1 2 0_0402_5%
5 DDRA_MA12 DDRA_MA13 A12/BC_N UDQ4 DDRA_DQ32 DDRA_MA13 A12/BC_N UDQ4 DDRA_DQ24 DDRA_CLK0 DDRA_CLK0_R
T8 C8 T8 C8 C23 RD50 1 2 36_0402_1% DDP@
5 DDRA_MA13 A13 UDQ5 DDRA_DQ34 A13 UDQ5 DDRA_DQ26
D3 D3 3300P_0402_50V7K
DDRA_MA14_WE# UDQ6 DDRA_DQ37 DDRA_MA14_WE# UDQ6 DDRA_DQ25 UD3_DDRA_BG1

2
L2 D7 L2 D7 R10141 1 2 0_0402_5%
5 DDRA_MA14_WE# DDRA_MA15_CAS# WE_N/A14 UDQ7 DDRA_MA15_CAS# WE_N/A14 UDQ7 @
M8 M8 SDP@
5 DDRA_MA15_CAS# DDRA_MA16_RAS# L8 CAS_N/A15 +1.2V DDRA_MA16_RAS# L8 CAS_N/A15 +1.2V DDRA_CS0# 1 2 1 2 0_0402_5%
RD51 36_0402_1% R10140
5 DDRA_MA16_RAS# RAS_N/A16 D1 RAS_N/A16 D1 DDRA_ODT0 1 2
RD52 36_0402_1% DDP@
1 DDRA_CLK0# K8 VDD1 J1 DDRA_CLK0# K8 VDD1 J1 1
5 DDRA_CLK0# DDRA_CLK0 CK_C VDD2 DDRA_CLK0 CK_C VDD2 DDRA_CKE0 UD4_DDRA_BG1
K7 L1 K7 L1 RD53 1 2 36_0402_1% R10143 1 2 0_0402_5%
5 DDRA_CLK0 CK_T VDD3 CK_T VDD3
R1 R1 SDP@
DDRA_CKE0 K2 VDD4 B3 DDRA_CKE0 K2 VDD4 B3 DDRA_MA0 1 2 1 2 0_0402_5%
5 DDRA_CKE0 RD54 36_0402_1% R10142
CKE VDD5 G7 CKE VDD5 G7 DDRA_MA1 1 2
RD179 36_0402_1% DDP@
DDRA_DQS#5 F3 VDD6 B9 DDRA_DQS#2 F3 VDD6 B9 DDRA_MA2 1 2
RD56 36_0402_1%
DDRA_DQS5 G3 LDQS_C VDD7 J9 DDRA_DQS2 G3 LDQS_C VDD7 J9 DDRA_MA3 1 2
RD57 36_0402_1%
DDRA_DQS#4 A7 LDQS_T VDD8 L9 DDRA_DQS#3 A7 LDQS_T VDD8 L9
+1.2V DDRA_DQS4 B7 UDQS_C VDD9 T9 +1.2V DDRA_DQS3 B7 UDQS_C VDD9 T9 DDRA_MA4 1 2
RD58 36_0402_1%
UDQS_T VDD10 UDQS_T VDD10 DDRA_MA5 1 2
RD59 36_0402_1%
DDRA_DM1 DDRA_DM3 DDRA_MA6
RD65 1 2 0_0402_5% E2 A1 RD66 1 2 0_0402_5% E2 A1 RD60 1 2 36_0402_1%
DDRA_DM0 NF/UDM_N/UDBI_N VDDQ1 DDRA_DM2 NF/UDM_N/UDBI_N VDDQ1 DDRA_MA7 UD1_DDRA_UZQ
RD68 1 2 0_0402_5% E7 C1 RD69 1 2 0_0402_5% E7 C1 RD61 1 2 36_0402_1% R10145 1 2 0_0402_5%
NF/LDM_N/LDBI_N VDDQ2 G1 NF/LDM_N/LDBI_N VDDQ2 G1 SDP@
DDRA_BA0 N2 VDDQ3 F2 DDRA_BA0 N2 VDDQ3 F2 DDRA_MA8 1 2 1 2 0_0402_5%
5 DDRA_BA0 RD62 36_0402_1% R10144
DDRA_BA1 N8 BA0 VDDQ4 J2 DDRA_BA1 N8 BA0 VDDQ4 J2 DDRA_MA9 1 2
5 DDRA_BA1 RD63 36_0402_1% DDP@
BA1 VDDQ5 F8 BA1 VDDQ5 F8 DDRA_MA10_AP 1 2
RD64 36_0402_1%
DDRA_ACT# L3 VDDQ6 J8 DDRA_ACT# L3 VDDQ6 J8 DDRA_MA11 1 2 UD2_DDRA_UZQ 1 2 0_0402_5%
5 DDRA_ACT# RD67 36_0402_1% R10147
DDRA_CS0# L7 ACT_N VDDQ7 A9 DDRA_CS0# L7 ACT_N VDDQ7 A9 SDP@
5 DDRA_CS0# DDRA_ALERT# P9 CS_N VDDQ8 D9 DDRA_ALERT# P9 CS_N VDDQ8 D9 DDRA_MA12 1 2 1 2 0_0402_5%
RD70 36_0402_1% R10146
5 DDRA_ALERT# ALERT_N VDDQ9 G9 +DDR_2.5V ALERT_N VDDQ9 G9 +DDR_2.5V DDRA_MA13 1 2
RD71 36_0402_1% DDP@
DDRA_BG0 M2 VDDQ10 DDRA_BG0 M2 VDDQ10 DDRA_MA14_WE# 1 2
5 DDRA_BG0 RD72 36_0402_1%
BG0 B1 BG0 B1 DDRA_MA15_CAS# 1 2 UD3_DDRA_UZQ 1 2 0_0402_5%
RD73 36_0402_1% R10148
DDRA_ODT0 K3 VPP1 R9 DDRA_ODT0 K3 VPP1 R9 SDP@
5 DDRA_ODT0 ODT VPP2 ODT VPP2 1 2 0_0402_5%
R10149
DDRA_PAR T3 M1 +VREF_CA_MD DDRA_PAR T3 M1 +VREF_CA_MD DDRA_MA16_RAS# 1 2
RD74 36_0402_1% DDP@
5 DDRA_PAR PAR VREFCA PAR VREFCA DDRA_BG0

0.1u_0201_10V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
.047U_0201_6.3V6K
1 1 1 1 1 1 RD75 1 2 36_0402_1%
TEN_UD1 TEN_UD2 DDRA_BG1 UD4_DDRA_UZQ
RD94 1 2 10K_0402_5% N9 E1 RD95 1 2 10K_0402_5% N9 E1 RD229 1 2 36_0402_1% R10151 1 2 0_0402_5%

CD113

CD120
TEN VSS1 TEN VSS1

0.1u_0201_10V6K
.047U_0201_6.3V6K
K1 K1 1 1 DDP@ SDP@
CPU_DRAMRST#_R P1 VSS2 N1 CPU_DRAMRST#_R P1 VSS2 N1 DDRA_BA0 1 2 1 2 0_0402_5%
RD76 36_0402_1% R10150
6 CPU_DRAMRST#_R RESET_N VSS3 T1 2 2 2 2 RESET_N VSS3 T1 2 2 DDRA_BA1 1 2
RD77 36_0402_1% DDP@
VSS4 VSS4

1
@ F1 B2 @ F1 B2

CD121

CD123

CD124

CD125

240_0402_1%

240_0402_1%

240_0402_1%

240_0402_1%
VSSQ1 VSS5 VSSQ1 VSS5 DDRA_ACT#
0.1u_0201_10V6K

0.1u_0201_10V6K
H1 G8 H1 G8 2 2 RD78 1 2 36_0402_1%

RD233

RD232

RD231

RD228
1 VSSQ2 VSS6 1 VSSQ2 VSS6 DDRA_PAR
A2 K9 A2 K9 RD79 1 2 36_0402_1%

CD114

CD122
D2 VSSQ3 VSS8 R10170 D2 VSSQ3 VSS8 R10171
E3 VSSQ4 T7 1 2 E3 VSSQ4 T7 1 2
VSSQ5 VSS7 VSSQ5 VSS7

2
2 A8 2 A8
CD47

CD48
D8 VSSQ6 DDP@ 0_0402_5% D8 VSSQ6 DDP@ 0_0402_5%
E8 VSSQ7 M9 UD1_DDRA_BG1 E8 VSSQ7 M9 UD2_DDRA_BG1
DDP@ DDP@ DDP@ DDP@
C9 VSSQ8 BG1 C9 VSSQ8 BG1
H9 VSSQ9 E9 UD1_DDRA_UZQ H9 VSSQ9 E9 UD2_DDRA_UZQ
VSSQ10 UZQ F9 VSSQ10 UZQ F9
LZQ LZQ
1

1
RD39 RD40
+1.2V (1uF_0402_6.3V) *16
MT40A1G16HBA-083E-A_FBGA96 240_0402_1% MT40A1G16HBA-083E-A_FBGA96 240_0402_1%
@ @ Place 4 near each DRAM
2

2
2 2

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

Vinafix
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2

CD126

CD127

CD128

CD129

CD130

CD131

CD132

CD133

CD134

CD135

CD136

CD137

CD138

CD139

CD140

CD141
CD@ CD@ CD@ CD@

UD3
UD4
DDRA_MA0 P3 G2 DDRA_DQ3
DDRA_MA1 P7 A0 LDQ0 F7 DDRA_DQ0 DDRA_MA0 P3 G2 DDRA_DQ58 +1.2V +1.2V
DDRA_MA2 A1 LDQ1 DDRA_DQ1 DDRA_MA1 A0 LDQ0 DDRA_DQ57 (1OuF_0603_6.3V) *5
R3 H3 P7 F7 Place around the DRAMs
DDRA_MA3 N7 A2 LDQ2 H7 DDRA_DQ6 DDRA_MA2 R3 A1 LDQ1 H3 DDRA_DQ59
DDRA_MA4 N3 A3 LDQ3 H2 DDRA_DQ2 DDRA_MA3 N7 A2 LDQ2 H7 DDRA_DQ56
DDRA_MA5 P8 A4 LDQ4 H8 DDRA_DQ4 DDRA_MA4 N3 A3 LDQ3 H2 DDRA_DQ62
DDRA_MA6 P2 A5 LDQ5 J3 DDRA_DQ7 DDRA_MA5 P8 A4 LDQ4 H8 DDRA_DQ60
DDRA_MA7 R8 A6 LDQ6 J7 DDRA_DQ5 DDRA_MA6 P2 A5 LDQ5 J3 DDRA_DQ63
DDRA_MA8 R2 A7 LDQ7 A3 DDRA_DQ11 DDRA_MA7 R8 A6 LDQ6 J7 DDRA_DQ61
DDRA_MA9 A8 UDQ0 DDRA_DQ8 DDRA_MA8 A7 LDQ7 DDRA_DQ54

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M
R7 B8 R2 A3 1 1 1 1 1 1 1
DDRA_MA10_AP M3 A9 UDQ1 C3 DDRA_DQ15 DDRA_MA9 R7 A8 UDQ0 B8 DDRA_DQ48
CD109 CD110
DDRA_MA11 T2 A10/AP UDQ2 C7 DDRA_DQ9 DDRA_MA10_AP M3 A9 UDQ1 C3 DDRA_DQ51
22P_0402_50V8-J 22P_0402_50V8-J
DDRA_MA12 M7 A11 UDQ3 C2 DDRA_DQ10 DDRA_MA11 T2 A10/AP UDQ2 C7 DDRA_DQ52
RF@ RF@
DDRA_MA13 T8 A12/BC_N UDQ4 C8 DDRA_DQ13 DDRA_MA12 M7 A11 UDQ3 C2 DDRA_DQ50 2 2 2 2 2 2 2
A13 UDQ5 D3 DDRA_DQ14 DDRA_MA13 T8 A12/BC_N UDQ4 C8 DDRA_DQ49

CD142

CD143

CD144

CD145

CD146
DDRA_MA14_WE# L2 UDQ6 D7 DDRA_DQ12 A13 UDQ5 D3 DDRA_DQ55
DDRA_MA15_CAS# M8 WE_N/A14 UDQ7 DDRA_MA14_WE# L2 UDQ6 D7 DDRA_DQ53
CD@
DDRA_MA16_RAS# L8 CAS_N/A15 +1.2V DDRA_MA15_CAS# M8 WE_N/A14 UDQ7
RAS_N/A16 D1 DDRA_MA16_RAS# L8 CAS_N/A15 +1.2V
DDRA_CLK0# K8 VDD1 J1 RAS_N/A16 D1
DDRA_CLK0 K7 CK_C VDD2 L1 DDRA_CLK0# K8 VDD1 J1
CK_T VDD3 R1 DDRA_CLK0 K7 CK_C VDD2 L1
DDRA_CKE0 K2 VDD4 B3 CK_T VDD3 R1
CKE VDD5 G7 DDRA_CKE0 K2 VDD4 B3
DDRA_DQS#0 F3 VDD6 B9 CKE VDD5 G7
DDRA_DQS0 G3 LDQS_C VDD7 J9 DDRA_DQS#7 F3 VDD6 B9
DDRA_DQS#1 LDQS_T VDD8 DDRA_DQS7 LDQS_C VDD7
(1OuF_0603_6.3V) *3
A7 L9 G3 J9 +DDR_2.5V +DDR_2.5V
+1.2V DDRA_DQS1 UDQS_C VDD9 DDRA_DQS#6 LDQS_T VDD8 Place around the DRAMs
B7 T9 A7 L9
UDQS_T VDD10 +1.2V DDRA_DQS6 B7 UDQS_C VDD9 T9
DDRA_DM5 UDQS_T VDD10
RD87 1 2 0_0402_5% E2 A1
DDRA_DM4 NF/UDM_N/UDBI_N VDDQ1 DDRA_DM7
RD88 1 2 0_0402_5% E7 C1 RD89 1 2 0_0402_5% E2 A1
NF/LDM_N/LDBI_N VDDQ2 G1 DDRA_DM6 NF/UDM_N/UDBI_N VDDQ1
RD90 1 2 0_0402_5% E7 C1
DDRA_BA0 VDDQ3 NF/LDM_N/LDBI_N VDDQ2

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M
N2 F2 G1 1 1 1 1 1
DDRA_BA1 N8 BA0 VDDQ4 J2 DDRA_BA0 N2 VDDQ3 F2 CD157 CD148
BA1 VDDQ5 F8 DDRA_BA1 N8 BA0 VDDQ4 J2 22P_0402_50V8-J 22P_0402_50V8-J
DDRA_ACT# L3 VDDQ6 J8 BA1 VDDQ5 F8 RF@ RF@
3 DDRA_CS0# L7 ACT_N VDDQ7 A9 DDRA_ACT# L3 VDDQ6 J8 2 2 2 2 2 3
DDRA_ALERT# P9 CS_N VDDQ8 D9 DDRA_CS0# L7 ACT_N VDDQ7 A9

CD152

CD156

CD147
ALERT_N VDDQ9 G9 +DDR_2.5V DDRA_ALERT# P9 CS_N VDDQ8 D9
DDRA_BG0 M2 VDDQ10 ALERT_N VDDQ9 G9 +DDR_2.5V
BG0 B1 DDRA_BG0 M2 VDDQ10
DDRA_ODT0 K3 VPP1 R9 BG0 B1
ODT VPP2 DDRA_ODT0 K3 VPP1 R9
DDRA_PAR T3 M1 +VREF_CA_MD ODT VPP2
PAR VREFCA DDRA_PAR +VREF_CA_MD
1U_0402_6.3V6K

1U_0402_6.3V6K

1 1 T3 M1
2 10K_0402_5% TEN_UD3 PAR VREFCA

1U_0402_6.3V6K

1U_0402_6.3V6K
RD96 1 N9 E1 1 1
TEN VSS1 2 10K_0402_5% TEN_UD4
0.1u_0201_10V6K
.047U_0201_6.3V6K

K1 1 1 RD97 1 N9 E1
CPU_DRAMRST#_R VSS2 TEN VSS1

0.1u_0201_10V6K
+0.6VS +0.6VS

.047U_0201_6.3V6K
P1 N1 K1 1 1 (1uF_0402_6.3V) *8 (1OuF_0603_6.3V) *2
RESET_N VSS3 T1 2 2 CPU_DRAMRST#_R P1 VSS2 N1
VSS4 RESET_N VSS3 2 2 Place 2 near each DRAM Place around the DRAMs
@ F1 B2 T1
CD309

CD310

VSSQ1 VSS5 VSS4

0.1u_0201_10V6K

H1 G8 2 2 @ F1 B2

CD311

CD312
1 VSSQ2 VSS6 VSSQ1 VSS5
0.1u_0201_10V6K

A2 K9 H1 G8 2 2
1
CD115

CD308

D2 VSSQ3 VSS8 R10173 A2 VSSQ2 VSS6 K9

CD116

CD307
VSSQ4 VSSQ3 VSS8

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0603_6.3V6M

10U_0603_6.3V6M
E3 T7 1 2 D2 R10172 1 1 1 1 1 1 1 1 1 1 1 1
2 A8 VSSQ5 VSS7 E3 VSSQ4 T7 1 2 CD168 CD169
CD107

D8 VSSQ6 DDP@ 0_0402_5% 2 A8 VSSQ5 VSS7 22P_0402_50V8-J 22P_0402_50V8-J

CD108

E8 VSSQ7 M9 UD3_DDRA_BG1 D8 VSSQ6 DDP@ 0_0402_5% RF@ RF@

C9 VSSQ8 BG1 E8 VSSQ7 M9 UD4_DDRA_BG1 2 2 2 2 2 2 2 2 2 2 2 2
H9 VSSQ9 E9 UD3_DDRA_UZQ C9 VSSQ8 BG1

CD158

CD159

CD160

CD161

CD162

CD163

CD164

CD165

CD166

CD167
VSSQ10 UZQ F9 H9 VSSQ9 E9 UD4_DDRA_UZQ
LZQ VSSQ10 UZQ F9 CD@ CD@ CD@
LZQ
1

1
RD43
MT40A1G16HBA-083E-A_FBGA96 240_0402_1% RD44
MT40A1G16HBA-083E-A_FBGA96 240_0402_1%
@
2

@
2

+1.2V

1
1

CD119 RD45
0.1u_0201_10V6K 1.8K_0402_1%
2
2

+VREF_CA_MD
RD46 1 2
5 DDR_VREFCA
2.7_0402_1%
1
1

1
CD111 RD47
0.022U_0201_6.3V6-K 1.8K_0402_1% CD112
2 0.1u_0201_10V6K
4 2 4
2
1

CD@
RD48
24.9_0402_1%
2

Security Classification LC Future Center Secret Data Title

Issued Date 2015/12/08 Deciphered Date 2016/12/08 DDR4 MD CHA

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
D 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. DS321
Date: Monday, January 16, 2017 Sheet 17 of 61
A B C D
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/12/08 Deciphered Date 2016/12/08 Blank

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
D 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. DS321
Date: Monday, January 16, 2017 Sheet 18 of 61
5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 Blank

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
DS321 0.1

Date: Monday, January 16, 2017 Sheet 19 of 61

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 Blank
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
DS321 0.1

Date: Monday, January 16, 2017 Sheet 20 of 61

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 Blank

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
DS321 0.1

Date: Monday, January 16, 2017 Sheet 21 of 61

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 Blank

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
DS321 0.1

Date: Monday, January 16, 2017 Sheet 22 of 61

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 Blank

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
DS321 0.1

Date: Monday, January 16, 2017 Sheet 23 of 61

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 Blank

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
DS321 0.1

Date: Monday, January 16, 2017 Sheet 24 of 61

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 Blank

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
DS321 0.1

Date: Monday, January 16, 2017 Sheet 25 of 61

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 Blank

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
DS321 0.1

Date: Monday, January 16, 2017 Sheet 26 of 61

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 Blank

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
DS321 0.1

Date: Monday, January 16, 2017 Sheet 27 of 61

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 Blank

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
DS321 0.1

Date: Monday, January 16, 2017 Sheet 28 of 61

5 4 3 2 1
 5 4 3 2 1

+TBT_VCC3V3_LC

CT1 1 2 0.22U_0201_6.3V6-K PCIE_PTX_C_DRX_P9 Y23 V23 PCIE_PRX_C_DTX_P9 0.22U_0201_6.3V6-K 2 1 CT2

9 PCIE_PTX_DRX_P9 PCIE_PTX_C_DRX_N9 PCIE_RX0_P PCIE_TX0_P PCIE_PRX_C_DTX_N9 0.22U_0201_6.3V6-K 2 PCIE_PRX_DTX_P9 9

2
1 2 0.22U_0201_6.3V6-K Y22 V22 1 CT4

RT5
10K_0402_5%

RT4
10K_0402_5%

RT3
10K_0402_5%

RT2
10K_0402_5%
9 PCIE_PTX_DRX_N9 CT3
PCIE_RX0_N PCIE_TX0_N PCIE_PRX_DTX_N9 9
CT5 1 2 0.22U_0201_6.3V6-K PCIE_PTX_C_DRX_P10 T23 P23 PCIE_PRX_C_DTX_P10 0.22U_0201_6.3V6-K 2 1 CT6
9 PCIE_PTX_DRX_P10 PCIE_PTX_C_DRX_N10 PCIE_RX1_P PCIE_TX1_P PCIE_PRX_C_DTX_N10 0.22U_0201_6.3V6-K 2 PCIE_PRX_DTX_P10 9
CT7 1 2 0.22U_0201_6.3V6-K T22 P22 1 CT8

PCIe GEN3
9 PCIE_PTX_DRX_N10 PCIE_RX1_N PCIE_TX1_N PCIE_PRX_DTX_N10 9
PCIE_PTX_C_DRX_P11 PCIE_PRX_C_DTX_P11 0.22U_0201_6.3V6-K 2

1
9 PCIE_PTX_DRX_P11 CT117 1 2 0.22U_0201_6.3V6-K M23 K23 1 CT121
TBT_TDI PCIE_PTX_C_DRX_N11 PCIE_RX2_P PCIE_TX2_P PCIE_PRX_C_DTX_N11 0.22U_0201_6.3V6-K 2 PCIE_PRX_DTX_P11 9
TP260 @ 1 9 PCIE_PTX_DRX_N11 CT118 1 2 0.22U_0201_6.3V6-K M22 K22 1 CT120
1 TBT_TMS PCIE_RX2_N PCIE_TX2_N PCIE_PRX_DTX_N11 9
TP310 @
TP311 @ 1 TBT_TCK CT116 1 2 0.22U_0201_6.3V6-K PCIE_PTX_C_DRX_P12 H23 F23 PCIE_PRX_C_DTX_P12 0.22U_0201_6.3V6-K 2 1 CT119
TBT_TDO 9 PCIE_PTX_DRX_P12 PCIE_PTX_C_DRX_N12 PCIE_RX3_P PCIE_TX3_P PCIE_PRX_C_DTX_N12 0.22U_0201_6.3V6-K 2 PCIE_PRX_DTX_P12 9
TP312 @ 1 CT115 1 2 0.22U_0201_6.3V6-K H22 F22 1 CT122
9 PCIE_PTX_DRX_N12 PCIE_RX3_N PCIE_TX3_N PCIE_PRX_DTX_N12 9
V19 L4 TBT_PLT_RST#
10 CLK_PCIE_TBT PCIE_REFCLK_100_IN_P PERST_N
T19
10 CLK_PCIE_TBT# TBT_CLKREQ0#_R PCIE_REFCLK_100_IN_N PCIe_RBIAS
D Place TP260 ,TP310,TP311,TP312 AC5
PCIE_CLKREQ_N PCIE_RBIAS
N16 1 2
RT6
D
Together for easier debug 4 CPU_DDIA_TXP0 CT14 1 2 0.1u_0201_10V6K CPU_DDIA_C_TXP0 AB7 R2 3.01K_0402_1%
CPU_DDIA_C_TXN0 DPSNK0_ML0_P DPSRC_ML0_P
4 CPU_DDIA_TXN0 CT15 1 2 0.1u_0201_10V6K AC7
DPSNK0_ML0_N DPSRC_ML0_N
R1
PCIe_RBIAS
4 CPU_DDIA_TXP1 CT24 1 2 0.1u_0201_10V6K CPU_DDIA_C_TXP1 AB9 N2 Width: not
VCC3V3_SX_TBT
4 CPU_DDIA_TXN1 CT16 1 2 0.1u_0201_10V6K CPU_DDIA_C_TXN1 AC9 DPSNK0_ML1_P
DPSNK0_ML1_N
DPSRC_ML1_P
DPSRC_ML1_N
N1 less than
20mil

SOURCE PORT 0
VCC3V3_SX_TBT
CPU_DDIA_C_TXP2

SINK PORT 0
CT17 1 2 0.1u_0201_10V6K AB11 L2
4 CPU_DDIA_TXP2
CT25 1 2 0.1u_0201_10V6K CPU_DDIA_C_TXN2 AC11 DPSNK0_ML2_P DPSRC_ML2_P L1 Space: not
4 CPU_DDIA_TXN2 DPSNK0_ML2_N DPSRC_ML2_N less than
4 CPU_DDIA_TXP3 CT18 1 2 0.1u_0201_10V6K CPU_DDIA_C_TXP3
CPU_DDIA_C_TXN3
AB13
DPSNK0_ML3_P DPSRC_ML3_P
J2 20mil TBT_CIO_PLUG_EVENT_N:
1

CT19 1 2 0.1u_0201_10V6K AC13 J1

RT7
3.3K_0402_5%

RT8
3.3K_0402_5%

RT9
3.3K_0402_5%

2 4 CPU_DDIA_TXN3 DPSNK0_ML3_N DPSRC_ML3_N Connect to PCH (Make sure PCH supports SCI)

CT138
0.1u_0201_10V6K
RT10
3.3K_0402_5%
CT26 1 2 0.1u_0201_10V6K CPU_DDIA_C_AUXP Y11 W19
4 CPU_DDIA_AUXP CPU_DDIA_C_AUXN DPSNK0_AUX_P DPSRC_AUX_P
4 CPU_DDIA_AUXN CT27 1 2 0.1u_0201_10V6K W11 Y19
1 DPSNK0_AUX_N DPSRC_AUX_N
TBT_SRC_HPD
2

UT4 AA2 G1
4 CPU_DDIA_HPD DPSNK0_HPD DPSRC_HPD

2
TBT_SPI_CS# 1 8
/CS VCC TBT_SNK0_DDC_CLK Y5 N6 DPSRC_RBIAS 2 RT247 1
TBT_SPI_SO 2 7 TBT_SPI_HOLD# TBT_SNK0_DDC_DATA R4 DPSNK0_DDC_CLK DPSRC_RBIAS 14K_0402_1%
DO (IO1) IO3 DPSNK0_DDC_DATA U1 TBT_I2C_SDA
TBT_SPI_WP# TBT_SPI_CLK CPU_DDIB_C_TXP0 GPIO_0 TBT_I2C_SCL TBT_I2C_SDA 31
3 6 CT131 1 2 0.1u_0201_10V6K AB15 U2
IO2 CLK 4 CPU_DDIB_TXP0 CPU_DDIB_C_TXN0 DPSNK1_ML0_P GPIO_1 TBT_SPI_WP# TBT_I2C_SCL 31
CT132 1 2 0.1u_0201_10V6K AC15 V1
TBT_SPI_SI 4 CPU_DDIB_TXN0 DPSNK1_ML0_N GPIO_2 TBT_TMU_CLK_OUT

LC GPIO
4 5 V2
GND DI (IO0) CT125 1 2 0.1u_0201_10V6K CPU_DDIB_C_TXP1 AB17 GPIO_3 W1 TBT_PCIe_WAKE#_R RT1038 1 2 0_0402_5%
4 CPU_DDIB_TXP1 CPU_DDIB_C_TXN1 DPSNK1_ML1_P GPIO_4 TBT_CIO_PLUG_EVENT#_R RT1044 1 PCIe_WAKE# 11,38,40
CT123 1 2 0.1u_0201_10V6K AC17 W2 2 0_0402_5%
TBT_CIO_PLUG_EVENT# 8
4 CPU_DDIB_TXN1 DPSNK1_ML1_N GPIO_5 Y1 TBT_HDMI_DDC_DATA
W25Q80JVSSIQ_SO8
CT128 1 2 0.1u_0201_10V6K CPU_DDIB_C_TXP2 AB19 GPIO_6 Y2 TBT_HDMI_DDC_CLK
4 CPU_DDIB_TXP2 CPU_DDIB_C_TXN2 DPSNK1_ML2_P GPIO_7 TBT_SRC_CFG1

SINK PORT 1
CT124 1 2 0.1u_0201_10V6K AC19 AA1
4 CPU_DDIB_TXN2 DPSNK1_ML2_N GPIO_8 TBTA_I2C_INT
J4 TBTA_I2C_INT 31
CT127 1 2 0.1u_0201_10V6K CPU_DDIB_C_TXP3 AB21 POC_GPIO_0 E2 TBTB_I2C_INT
4 CPU_DDIB_TXP3 CPU_DDIB_C_TXN3 DPSNK1_ML3_P POC_GPIO_1 RTD3_USB_PWR_EN

POC GPIO
CT126 1 2 0.1u_0201_10V6K AC21 D4
4 CPU_DDIB_TXN3 DPSNK1_ML3_N POC_GPIO_2 H4 TBT_FORCE_PWR_R RT13 1 2 0_0402_5% TBT_FORCE_PWR 7
CT129 1 2 0.1u_0201_10V6K CPU_DDIB_C_AUXP Y12 POC_GPIO_3 F2 TBT_BATLOW#
4 CPU_DDIB_AUXP CPU_DDIB_C_AUXN DPSNK1_AUX_P POC_GPIO_4 TBT_SLP_S3#
4 CPU_DDIB_AUXN CT130 1 2 0.1u_0201_10V6K W12 D2
DPSNK1_AUX_N POC_GPIO_5 F1 RTD3_CIO_PWR_EN
Y6 POC_GPIO_6 100_0402_1%
4 CPU_DDIB_HPD DPSNK1_HPD TBT_TEST_EN RT17
C E1 1 2 C
TBT_SNK1_DDC_CLK Y8 TEST_EN
TBT_SNK1_DDC_DATA DPSNK1_DDC_CLK TBT_TEST_PWG RT20

Misc
N4 AB5 1 2
DPSNK1_DDC_DATA TEST_PWR_GOOD
TBT_RESET_N
DPSNK_RBIAS 2 RT76 1 DPSNK_RBIAS Y18 F4
100_0402_1%
RT1043 2 1 10K_0402_5% VCC3V3_SX_TBT Width: not DPSNK_RBIAS RESET_N TBT_RESET_N 31
TBT_CLKREQ0#_R RT12 2 1 10K_0402_5% less than 14K_0402_1% TBT_TDI
TBT_TMS
Y4
TDI XTAL_25_IN
D22 TBT_XTAL_25_IN
TBT_XTAL_25_OUT
TBT_PCIe_WAKE#_R RT15 2 1 10K_0402_5% 2
0_0402_5%
1 RT212
20mil TBT_TCK
V4
T4 TMS XTAL_25_OUT
D23

@ Space: not TBT_TDO W4 TCK

MISC AB3 TBT_SPI_SI
TBT_CIO_PLUG_EVENT#_R RT16 2 1 10K_0402_5% less than RT77
TDO EE_DI AC4 TBT_SPI_SO

TBT_SLP_S3#
20mil
TBT_RBIAS 1 2 TBT_RBIAS
TBT_RSENSE
H6
RBIAS
EE_DO
EE_CS_N
AC3 TBT_SPI_CS#
TBT_SPI_CLK
RT214 2 @ 1 10K_0402_5% 4.75K_0402_0.5% J6 AB4
TBT_BATLOW# RT19 2 1 10K_0402_5% TBT_RSENSE RSENSE EE_CLK

TBTA_I2C_INT
Width: not 32 TBTA_RXP1
A15
PA_RX1_P NC_B7
B7
TBTB_I2C_INT
RPT7 2
1
3 10K_0404_4P2R_5%
4
less than 32 TBTA_RXN1 B15
PA_RX1_N NC_A7
A7
20mil CT38 1 2 0.22U_0201_6.3V6-K TBTA_TXP1_C A17 A9
TBT_I2C_SDA RT1056 1 2 4.7K_0402_5% Space: not 32 TBTA_TXP1
32 TBTA_TXN1
CT39 1 2 0.22U_0201_6.3V6-K TBTA_TXN1_C B17 PA_TX1_P NC_A9 B9
TBT_I2C_SCL RT1057 1 2 4.7K_0402_5% less than TBTA_TXP0_C
PA_TX1_N NC_B9

RTD3_CIO_PWR_EN RT36 1 2 10K_0402_5%

20mil 32 TBTA_TXP0
CT40 1
CT41 1
2 0.22U_0201_6.3V6-K
2 0.22U_0201_6.3V6-K TBTA_TXN0_C
A19
B19 PA_TX0_P NC_A11
A11
B11
32 TBTA_TXN0 PA_TX0_N NC_B11
B21 A13

TBT PORTS
32 TBTA_RXP0 PA_RX0_P NC_A13
A21 B13
TBT_SNK0_DDC_CLK 32 TBTA_RXN0 PA_RX0_N NC_B13

Port A
RPT8 1 4 100K_0404_4P2R_5%
TBT_SNK0_DDC_DATA 2 3 CT42 1 2 0.1U_0201_6.3V6-K TBTA_AUX_C_P Y15 Y16
32 TBTA_DPSRC_AUX_P TBTA_AUX_C_N PA_DPSRC_AUX_P NC_Y16
CT43 1 2 0.1U_0201_6.3V6-K W15 W16
TBT_SNK1_DDC_CLK 32 TBTA_DPSRC_AUX_N PA_DPSRC_AUX_N NC_W16
RPT9 1 4 100K_0404_4P2R_5%
TBT_SNK1_DDC_DATA 2 3 E20 E19
D20 PA_USB2_D_P NC_E19 D19
TBT_TMU_CLK_OUT RT23 1 2 100K_0402_5% PA_USB2_D_N NC_D19
TBT_FORCE_PWR_R RT24 1 2 100K_0402_5% A5 B4 NC_B4
32 TBTA_LSTX PA_LSTX NC_B4 NC_B5
A4 B5

POC
CPU_DDIA_HPD 32 TBTA_LSRX PA_LSRX NC_B5 NC_G2
RT25 1 2 100K_0402_5% M4 G2
CPU_DDIB_HPD 31 TBTA_HPD PA_DPSRC_HPD NC_G2
RT210 1 2 100K_0402_5%
TBTA_LSRX RT28 1 2 1M_0402_5% 1 2 PA_USB2_RBIAS H19 F19 NC_F19 1 2
TBTA_LSTX RT27 1 2 1M_0402_5% RT37 499_0402_1% PA_USB2_RBIAS NC_F19 RT213
B TBTA_HPD RT29 1 2 100K_0402_5% AC23 D6 499_0402_1%
B
NC_B4 RT281 1 2 1M_0402_5% AB23 THERMDA_1 MONDC_SVR
NC_B5 RT282 1 2 1M_0402_5% THERMDA_2 A23
NC_G2 RT283 1 2 100K_0402_5% V18 ATEST_P B23
RTD3_USB_PWR_EN RT35 1 2 10K_0402_5% PCIE_ATEST ATEST_N
AC1
TEST_EDM DEBUG USB2_ATEST
E18
TBT_HDMI_DDC_DATA RT1054 1 2 100K_0402_5% L15 W13
TBT_HDMI_DDC_CLK RT1055 1 2 100K_0402_5% N15 FUSE_VQPS_64 MONDC_DPSNK_0
FUSE_VQPS_128 W18
C23 MONDC_DPSNK_1
C22 MONDC_CIO_0 AB2
NC_C22 MONDC_DPSRC
NOTE:
ASSEMBLE if DPSRC UT1A
NOT IN USE DSL6340_BGA337
TBT_SRC_CFG1 1 2 1M_0402_5%
RT39
TBT_SRC_HPD 1 2 1M_0402_5%
S IC JHL6340 SLLSQ C1 CONTROLLER 12 !,
RT284

RT1045 1 2 0_0402_5% TBT_XTAL_25_IN

0_0402_5% 2 1 RT205 TBT_SLP_S3# TBT_CLKREQ0#_R 0_0402_5% 2 1 RT208

11,44 PM_SLP_S3# 11,40,42,44 PLT_RST# TBT_CLKREQ0# 10
1 RT1046 2 TBT_XTAL_25_OUT
TBT_PLT_RST#
YT1 25MHZ_18PF_8Y25000004
0_0402_5%
1 3
1 3
GND1 GND2
0_0402_5% 2 1 RT207
A 2 4 A
1
1
CT12
CT13
22P_0402_50V8-J RT209 1 @ 2 0_0402_5% RTD3_CIO_PWR_EN RT211 1 @ 2 0_0402_5% RTD3_USB_PWR_EN
22P_0402_50V8-J 2 8 TBT_CIO_PWR_EN 8 TBT_USB_PWR_EN
2

Security Classification LC Future Center Secret Data Title

Issued Date 2015/12/08 Deciphered Date 2016/12/08 TBT3-AR IO

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
DS321 0.1

Date: Monday, January 16, 2017 Sheet 29 of 61

5 4 3 2 1
 5 4 3 2 1

0.03A 0.185A
+TBT_VCC3V3_LC VCC3V3_SX_TBT VCC3V3_S0_TBT
0.2A

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M
1U_0201_6.3V6-K
VCC0V9_CIO VCC0V9_USB VCC0V9_PCIE VCC0V9_DP VCC3V3_S0 0.225A

1U_0201_6.3V6-K

1U_0201_6.3V6-K
1 1 1 1 1

CT48

CT49

CT50

CT51

CT52
1 1

CT46

F8 CT47
2 2 2 2 2

R13
VCC0V9_DP 2 2

R6

H9
L8 A2

VCC3P3_LC

VCC3P3_S0
VCC3P3_SX

VCC3P3A
L11 VCC0P9_DP_1 VCC3P3_SVR_1 A3
VCC0P9_DP_2 VCC3P3_SVR_2
0.7A L12 B3

1U_0201_6.3V6-K

1U_0201_6.3V6-K

1U_0201_6.3V6-K

1U_0201_6.3V6-K

1U_0201_6.3V6-K

1U_0201_6.3V6-K

1U_0201_6.3V6-K
D
M8 VCC0P9_DP_3 VCC3P3_SVR_3 D
VCC0P9_DP_4
1.83A
1 1 1 1 1 1 1 T11

1U_0201_6.3V6-K

1U_0201_6.3V6-K

1U_0201_6.3V6-K

1U_0201_6.3V6-K

1U_0201_6.3V6-K

1U_0201_6.3V6-K

1U_0201_6.3V6-K
T12 VCC0P9_DP_5 L9 VCC0V9_SVR
CT55

CT53

CT56

CT54

CT57

CT58

CT59
L6 VCC0P9_DP_6 VCC0P9_SVR_1 M9
VCC0P9_ANA_DPSRC_1 VCC0P9_SVR_2 1 1 1 1 1 1 1
M6 E12

CT60

CT61

CT62

CT63

CT64

CT65

CT66
2 2 2 2 2 2 2 V11 VCC0P9_ANA_DPSRC_2 VCC0P9_SVR_ANA_1 E13
V12 VCC0P9_ANA_DPSNK_1 VCC0P9_SVR_ANA_2 F11
V13 VCC0P9_ANA_DPSNK_2 VCC0P9_SVR_ANA_3 F12 2 2 2 2 2 2 2
VCC0P9_ANA_DPSNK_3 VCC0P9_SVR_ANA_4 F13
M13 VCC0P9_SVR_ANA_5 F15
M15 VCC0P9_PCIE_1 VCC0P9_SVR_ANA_6 J9
M16 VCC0P9_PCIE_2 VCC0P9_SVR_SENSE
VCC0P9_PCIE_3 LT1
L19
N19 VCC0P9_ANA_PCIE_1_1 C1 TBT_SVR_IND 1 2
0.58A VCC0P9_ANA_PCIE_1_2 SVR_IND_1
VCC0V9_USB VCC0V9_PCIE L18 C2

47U_0603_4V6-M

47U_0603_4V6-M

47U_0603_4V6-M
M18 VCC0P9_ANA_PCIE_2_1 SVR_IND_2 D1 0.6UH_HBLE041B-R60MSA_7.65A_20%
VCC0P9_ANA_PCIE_2_2 SVR_IND_3 1 1 1
N18

CT69

CT70

CT71
VCC0P9_ANA_PCIE_2_3

VCC
0.22A R15 A1
1U_0201_6.3V6-K

1U_0201_6.3V6-K

1U_0201_6.3V6-K

1U_0201_6.3V6-K

1U_0201_6.3V6-K

1U_0201_6.3V6-K
R16 VCC0P9_USB_1 SVR_VSS_1 B1 2 2 2
VCC0P9_USB_2 SVR_VSS_2 B2
1 1 1 1 1 1 SVR_VSS_3
0.28A R8
CT67

CT68

CT76

CT77

CT78

CT79
VCC0P9_CIO_1
R9
VCC0P9_CIO_2
0.06A
R11

10U_0402_6.3V6M

10U_0402_6.3V6M
1U_0201_6.3V6-K

1U_0201_6.3V6-K
2 2 2 2 2 2 VCC0P9_CIO_3 F18 VCC0V9_LVR_OUT
0.1A R12
VCC0P9_CIO_4 VCC0P9_LVR_1 H18 1 1 1 1
VCC3V3_ANA_PCIE L16 VCC0P9_LVR_2 J11

CT72

CT73

CT74

CT75
VCC3V3_ANA_USB2 J16 VCC3P3_ANA_PCIE VCC0P9_LVR_3 H11
VCC3P3_ANA_USB2 VCC0P9_LVR_SENSE
1 1

1U_0201_6.3V6-K

1U_0201_6.3V6-K
0.1A A6 V5 2 2 2 2

CT80

CT81
A8 VSS_ANA1 VSS_ANA81 V6
A10 VSS_ANA2 VSS_ANA82 V8
VCC0V9_CIO 2 2 VSS_ANA3 VSS_ANA83
A12 V9
A14 VSS_ANA4 VSS_ANA84 V15
A16 VSS_ANA5 VSS_ANA85 V16
A18 VSS_ANA6 VSS_ANA86 V20
A20 VSS_ANA7 VSS_ANA87 W5
1U_0201_6.3V6-K

1U_0201_6.3V6-K

1U_0201_6.3V6-K

A22 VSS_ANA8 VSS_ANA88 W6

C C
1 1 1 B6 VSS_ANA9 VSS_ANA89 W8
CT90

CT82

CT83

B8 VSS_ANA10 VSS_ANA90 W9
B10 VSS_ANA11 VSS_ANA91 W20
B12 VSS_ANA12 VSS_ANA92 W22
2 2 2 VSS_ANA13 VSS_ANA93
B14 W23
B16 VSS_ANA14 VSS_ANA94 Y9
B18 VSS_ANA15 VSS_ANA95 Y13
B20 VSS_ANA16 VSS_ANA96 Y20
B22 VSS_ANA17 VSS_ANA97 AA22
D8 VSS_ANA18 VSS_ANA98 AA23
D9 VSS_ANA19 VSS_ANA99 AB6
VCC3V3_S0_TBT VCC3V3_S0 D11 VSS_ANA20 VSS_ANA100 AB8
D12 VSS_ANA21 VSS_ANA101 AB10
40KHz LC Filter to VSS_ANA22 VSS_ANA102
LT2 1 2 1.0UH_LQM21PN1R0MC0D_20% D13 AB12
reduce VCC3v3_S0_TBT D15 VSS_ANA23 VSS_ANA103 AB14
ripple D16 VSS_ANA24 VSS_ANA104 AB16
1
47U_0805_6.3V6-M

47U_0805_6.3V6-M

1U_0201_6.3V6-K

VSS_ANA25 VSS_ANA105
1

D18 AB18

GND
CT86

E8 VSS_ANA26 VSS_ANA106 AB20

CT84

CT85

L ( LQM18PN1R0MFHD): VSS_ANA27 VSS_ANA107

E9 AB22
RDC < 0.2Ohm VSS_ANA28 VSS_ANA108
2

2 E11 AC6
IDC > 0.2A E15 VSS_ANA29 VSS_ANA109 AC8
E16 VSS_ANA30 VSS_ANA110 AC10
E22 VSS_ANA31 VSS_ANA111 AC12
E23 VSS_ANA32 VSS_ANA112 AC14
C (GRM188R60J476ME15): VSS_ANA33 VSS_ANA113
F9 AC16
Need to notice the capacitance at 3.3 Vdc F16 VSS_ANA34 VSS_ANA114 AC18
F20 VSS_ANA35 VSS_ANA115 AC20
G22 VSS_ANA36 VSS_ANA116 AC22
Wake Support: VSS_ANA37 VSS_ANA117
G23 D5
H1 VSS_ANA38 VSS1 E4
+3VALW VSS_ANA39 VSS2
<R1>VCC3V3_SX_TBT H2
VSS_ANA40 VSS3
E5
H12 E6
2 1 H13 VSS_ANA41 VSS4 F5
0.19A VSS_ANA42 VSS5
RT41 0_0603_5% H15 F6
H16 VSS_ANA43 VSS6 H5
<R2> VSS_ANA44 VSS7
H20 H8
+3VALW VCC3V3_S0_TBT +3VS VCC3V3_S0_TBT J5 VSS_ANA45 VSS8 J8
B
RT199 RT42 J18 VSS_ANA46 VSS9 J12 B
1 2 1 2 J19 VSS_ANA47 VSS10 J13
1.05A 1.05A VSS_ANA48 VSS11
J20 J15
0_0603_5% 0_0603_5% J22 VSS_ANA49 VSS12 L13
J23 VSS_ANA50 VSS13 M11
<R3> @ VSS_ANA51 VSS14
K1 M12
VSS_ANA52 VSS15
change R1\R2\R3 to jump K2
L5
L20
VSS_ANA53
VSS_ANA54
VSS16
VSS17
N8
N9
N11
L22 VSS_ANA55 VSS18 N12
L23 VSS_ANA56 VSS19 N13
M1 VSS_ANA57 VSS20 T6
Option 1 for wake support over TBT: VSS_ANA58 VSS21
M2 T8
1. Connect 0Ohm to <R1> and <R3>. Keep <R2> empty. M5 VSS_ANA59 VSS22 T9
2. Make sure VCC3v3_SX_SYS can support AR maximum power consumption. M19 VSS_ANA60 VSS23 T13
3. Simple Bios implementation M20 VSS_ANA61 VSS24 T15
VSS_ANA67
VSS_ANA68
VSS_ANA69
VSS_ANA70
VSS_ANA71
VSS_ANA72
VSS_ANA73
VSS_ANA74
VSS_ANA75
VSS_ANA76
VSS_ANA77
VSS_ANA78
VSS_ANA79
VSS_ANA80

N5 VSS_ANA62 VSS25 T16

N20 VSS_ANA63 VSS26 T18
Option 2 for wake support over TBT: VSS_ANA64 VSS27
N22 AB1
1. Connect 0Ohm to <R1> and <R2>. Keep <R3> empty. N23 VSS_ANA65 VSS28 AC2
2. Bios need to implement Sx entry pre-notice flow by PCIe2TBT. VSS_ANA66 VSS29
UT1B
R18
R19
R20
R22
R23

U22
U23
P1
P2
R5

T1
T2
T5
T20

No wake support at all from AR DSL6340_BGA337 N

1. Connect 0Ohm to <R2> and <R3>. Keep
<R1> empty.

S IC JHL6340 SLLSQ C1 CONTROLLER 12 !,

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/12/08 Deciphered Date 2016/12/08 TBT3-AR Power

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
DS321 0.1

Date: Monday, January 16, 2017 Sheet 30 of 61

5 4 3 2 1
 5 4 3 2 1

V3P0_CCG4_VDDD
V3P0_CCG4_VDDD VCONN_V5_P1 VCONN_V5_P2

V3P0_CCG4_VDDD

1 1 1 1 1

CT197
4.7U_0402_6.3V6M

CT198
4.7U_0402_6.3V6M
UT14

1
0.1U_0201_25V6-K

0.1U_0201_25V6-K

0.1U_0201_25V6-K
CT193

CT194

CT195

CT179

CT180
1U_0402_25V6-K

1U_0402_25V6-K
Cypress CCG4 40-QFN
@ T203 1 31 11 CCG4_VBUS_P_CTRL_P1

2
2 2 2 2 2 VDDD VBUS_P_CTRL_P1 CCG4_VBUS_P_CTRL_P1 32
32 12
VDDIO VBUS_C_CTRL_P1
20 CCG4_VBUS_DISCHARGE_P1
VBUS_DISCHARGE_P1 CCG4_VBUS_DISCHARGE_P1 32
1U_0402_25V6-K 1 2 CT162 33
D VCCD D
V3P0_CCG4_VDDD

2
RT290
10K_0402_5%
V3P0_CCG4_VDDD @
VCONN_V5_P1 8
V5V_P1 1 RT1047 2

1
18 CCG4_HPD_P1_R
VCONN_V5_P2 HPD_P1/GPIO TBTA_HPD 29
23
V5V_P2 0_0402_5%
TBTA_CC2

1
7
CC2_P1 1 TBTA_CC2 32
RT296 RT297 RT298 RT1041 RT1042 @ T210 1
TBT_I2C_SDA 3
29 TBT_I2C_SDA

2.2K_0402_5%

2.2K_0402_5%

2.2K_0402_5%

2.2K_0402_5%

2.2K_0402_5%
I2C_SDA_SCB2_AR/VSEL_1_P1 CT184
@ T209 1 390P_0201_25V7-K
TBT_I2C_SCL 4
29 TBT_I2C_SCL I2C_SCL_SCB2_AR/VSEL_1_P2 2
2

2
@ T208 1
TBTA_I2C_INT 5 9 TBTA_CC1
29 TBTA_I2C_INT I2C_INT_AR_P1/OCP_DET_P1 CC1_P1 1 TBTA_CC1 32
CCG4_I2C_INT_EC CCG4_MUX_CTRL3_P1 27
@ @ 32 CCG4_MUX_CTRL3_P1 VSEL_2_P2/GPIO CT185
CCG4_I2C_SDA_EC 390P_0201_25V7-K
VBUS_OUT_P1 RT286 1 2 100K_0402_5% 2
CCG4_I2C_SCL_EC CT176 1 2 0.1U_0201_25V6-K VBUS_MON_P1 13
VBUS_MON_P1/GPIO 26 CCG4_I2C_PCH_SDA
CCG4_I2C_PCH_SDA SDA_3/MUX_CTRL_3_P1/VSEL_2_P1 CCG4_MUX_CTRL2_P1 CCG4_I2C_PCH_SDA 8
RT287 1 2 10K_0402_5% 28
SDA_4/MUX_CTRL_2_P1 29 CCG4_MUX_CTRL1_P1 CCG4_MUX_CTRL2_P1 32
CCG4_I2C_PCH_SCL SCL_4/MUX_CTRL_1_P1 CCG4_MUX_CTRL1_P1 32

VBUS_OUT_P2 RT288 1 2 100K_0402_5%

CT177 1 2 0.1U_0201_25V6-K VBUS_MON_P2 37

VBUS_MON_P2/GPIO
RT289 1 2 10K_0402_5%
@ T207 1
V3P0_CCG4_VDDD 30 CCG4_HPD_P2 1 T204 @
TBT_RESET_N 1 HPD_P2/GPIO
29 TBT_RESET_N SWD_IO/AR_RST#
C @ T201 1 2 22 USBC_CC1 C
SWD_CLK/I2C_CFG_EC CC1_P2 1 USBC_CC1 33

CCG4_I2C_INT_EC CT186
15
44 CCG4_I2C_INT_EC I2C_INT_EC 390P_0201_25V7-K
2

2
G

CCG4_I2C_SDA_EC 16
I2C_SDA_SCB1_EC 24 USBC_CC2
CCG4_I2C_SCL_EC CC2_P2 1 USBC_CC2 33
17
44 EC_SMB_CK3 EC_SMB_CK3 QT143A 6 1 CCG4_I2C_SCL_EC I2C_SCL_SCB1_EC
CT187
S
D

390P_0201_25V7-K
2N7002KDWH_SOT363-6 2
5

19
G

VCONN_MON_P1/GPIO
14
OVP_TRIP_P1 34
44 EC_SMB_DA3 EC_SMB_DA3 QT143B 3 4 CCG4_I2C_SDA_EC MUX_CTRL_3_P2/OCP_DET_P2 35
S

GPIO/MUX_CTRL_2_P2 36
D

2N7002KDWH_SOT363-6 CCG4_I2C_PCH_SCL 25 GPIO/MUX_CTRL_1_P2

8 CCG4_I2C_PCH_SCL SCL_3/VCONN_MON_P2
CCG4_XRES 1 2 21
44 CCG4_XRES OVP_TRIP_P2
@ 0_0402_5% 38 CCG4_VBUS_C_CTRL_P2
VBUS_C_CTRL_P2 CCG4_VBUS_C_CTRL_P2 33
RT1065 @ T200 1 6
I2C_INT_AR_P2 39 CCG4_VBUS_P_CTRL_P2
VBUS_P_CTRL_P2 CCG4_VBUS_P_CTRL_P2 33
RT291 1 2 4.7K_0402_5% 40 CCG4_VBUS_DISCHARGE_P2
V3P0_CCG4_VDDD VBUS_DISCHARGE_P2 CCG4_VBUS_DISCHARGE_P2 33

10

1
@ XRES 41
EPAD
1

0.1U_0201_25V6-K
CT178
T202
CYPD4226-40LQXIT_QFN40_6X6
2

B B

VBUS_OUT_P2 VBUS_OUT
U3310
RT1052 1 2 0_0402_5% 1 5 RT1032 1 2 0_0402_5%
VCC VOUT
1U_0201_6.3V6-K

3
NC 1 +5VALW
+5VALW
CT192

4 2 VCONN_V5_P1
2

EN GND VCONN_V5_P2
RT1030 UT2
RT9079-33GJ5_TSOT23-5 2 5 1 UT17
100K_0402_5% 5 1
IN OUT
IN OUT
3
FLAG 3
1

FLAG
1 RT1039 2 4 2
EN GND 1 RT1040 2 4 2
2

@ 0_0402_5% EN GND
1U_0201_6.3V6-K

RT1053 RT1031 G517B3T11U_SOT23-5 0_0402_5%

1U_0201_6.3V6-K
+3VALW_PG 1 2 G517B3T11U_SOT23-5
53 +3VALW_PG 100K_0402_5% 1
0_0402_5% 1
CT8634

CT8635
1

QT4 D
1

EC_CCG4_ON 1 RT1033 2 2
44 EC_CCG4_ON 2
G 2
0_0402_5%
1 @
S 2N7002KW_SOT323-3 @
3
0.1U_0201_25V6-K
CT196

V3P0_CCG4_VDDD
2 +3VALW
DT74
2 1
VBUS_OUT
SDM1L30CSP-7_CSP2
A DT75 A
2 1

SDM1L30CSP-7_CSP2

SCS00006O00,
S SCH DIO SDM20U30LP-7 DFN1006-2
Security Classification LC Future Center Secret Data Title

Issued Date 2015/12/08 Deciphered Date 2016/12/08 TBT3 CCG4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
DS321 0.1

Date: Monday, January 16, 2017 Sheet 31 of 61

5 4 3 2 1
 5 4 3 2 1

TBT3 not support type-c adpter

VBUS_OUT_P1
+5VALW 3A need check VBUS_OUT_P1

1
1
+ C1333
C213 150U_B2_6.3VM_R35M
D 47U_0805_6.3V6-M D
2 2
B11 RX1+

25

26

27
U6 B10 RX1-
JP1 A2 TX1+

GND25

GND26

GND27
A1 A3 A3 TX1-
B1 VIN1 VOUT1 B3 B2 TX2+
C1 VIN2 VOUT2 C3 B3 TX2-
VIN3 VOUT3 A11 RX2+
CCG4_VBUS_P_CTRL_P1 D3 D1 TBT_C_OCP A10 RX2-

GND1
GND2
GND3
31 CCG4_VBUS_P_CTRL_P1 ON OC_FLAGB TBT_C_OCP
D2 9
ISET 1 24
GND_A1 GND_B12

1
FPF2595UCX_WLCSP12 TBTA_TXP1 TBTA_RXP1
RT1061 2 23

A2
B2
C2
29 TBTA_TXP1 SSTXP1_A2 SSRXP1_B11 TBTA_RXP1 29
100K_0402_5%
TBTA_TXN1 3 22 TBTA_RXN1

1
29 TBTA_TXN1 SSTXN1_A3 SSRXN1_B10 TBTA_RXN1 29
R604
2
4 21
287_0402_1%

1
VBUS_A4 VBUS_B9
RT1064 TBTA_CC2 5 20 TBTA_SBU1
@ 31 TBTA_CC2 CC1_A5 SBU2_B8
100K_0402_5%

2
TBTA_USB2_D_P 6 19 TBTA_USB2_D_N
DP1_A6 DN2_B7

2
TBTA_USB2_D_N 7 18 TBTA_USB2_D_P

2N7002KW_SOT323-3
DN1_A7 DP2_B6
TBTA_SBU2 TBTA_CC1

1
D 8 17 TBTA_CC1 31
Type_C_I_CTRL Type_C_I_CTRL
44 SBU1_A8 CC2_B5
2
G 9 16
VBUS_A9 VBUS_B4

1
S Q178 R260 TBTA_RXN0 10 15 TBTA_TXN0
29 TBTA_RXN0 SSRXN2_A10 SSTXN2_B3 TBTA_TXN0 29

3
100K_0402_5% TBTA_RXP0 TBTA_TXP0
11 14
29 TBTA_RXP0 SSRXP2_A11 SSTXP2_B2 TBTA_TXP0 29

2
12 13
GND_A12 GND_B1

C VBUS_OUT_P1 VBUS_OUT_P1 C

GND28

GND29

GND30
HIGHS_UB11246-1600B-1H
4.7U_0603_25V6-M

0.47U_0402_25V6K

0.47U_0402_25V6K

0.47U_0402_25V6K

0.47U_0402_25V6K
AZ5725-01F.R7GR_DFN1006P2X2

28

29

30
1
ME@
1

D4016 1 1 1 1 1 RT1029
100_0805_5%
C923

C924

C925

C926

C927
1

2
2 2 2 2 2

1
QT10 D
2

2
EMC@ 31 CCG4_VBUS_DISCHARGE_P1
G
2

1116 update symbol

1
S 2N7002KW_SOT323-3
RT1028

3
10K_0402_5%

2
9 USB20_P8
RT32 1

1
L33
1
EMC_NS@
2 0_0402_5%

2
2 TBTA_USB2_D_P
Vinafix.com
4 3 TBTA_USB2_D_N
9 USB20_N8 4 3
DT39 EMC@ DT40 EMC@
EXC24CH900U_4P
TBTA_TXP0 2 1 1 2 TBTA_TXN0
RT34 1 2 0_0402_5% 2 1 1 2

B SESD0201X1BN-0010-098_DFN2 SESD0201X1BN-0010-098_DFN2 B
DT41 EMC@ DT42 EMC@
TBTA_TXP1 2 1 1 2 TBTA_TXN1
2 1 1 2

SESD0201X1BN-0010-098_DFN2 SESD0201X1BN-0010-098_DFN2
DT43 EMC@ DT44 EMC@
V3P0_CCG4_VDDD
TBTA_RXP0 2 1 1 2 TBTA_RXN0
1 2 1 1 2
CT188
UT15
0.1U_0201_25V6-K SESD0201X1BN-0010-098_DFN2 SESD0201X1BN-0010-098_DFN2
TS3DS10224RUKR_WQFN20_3X3
2 DT45 EMC@ DT46 EMC@
13 18 TBTA_DPSRC_AUX_P
VCC OUTA0+ TBTA_DPSRC_AUX_N TBTA_DPSRC_AUX_P 29 TBTA_RXP1 2 1 1 2 TBTA_RXN1
17 2 1 1 2
CCG4_MUX_CTRL1_P1 16 OUTA0- TBTA_DPSRC_AUX_N 29
31 CCG4_MUX_CTRL1_P1 ENA 20
TBTA_SBU1 1 OUTA1+ 19 SESD0201X1BN-0010-098_DFN2 SESD0201X1BN-0010-098_DFN2
V3P0_CCG4_VDDD TBTA_SBU2 INA+ OUTA1-
2
INA- CCG4_MUX_CTRL2_P1 DT48 EMC@ DT49 EMC@
15
0_0402_5% 1 RT1059 2 14 SAO
SAI MUX 8 TBTA_LSTX TBTA_USB2_D_P 2
2 1
1 1
1 2
2 TBTA_USB2_D_N
CCG4_MUX_CTRL3_P1 10 OUTB0+ 9 TBTA_LSRX TBTA_LSTX 29
31 CCG4_MUX_CTRL3_P1 ENB OUTB0- TBTA_LSRX 29
SESD0201X1BN-0010-098_DFN2 SESD0201X1BN-0010-098_DFN2
3 6
4 INB+ OUTB1+ 7
INB- OUTB1-
1 RT1058 2
E-PAD

12 11 CCG4_MUX_CTRL2_P1
CCG4_MUX_CTRL2_P1 31
GND

SBI SBO
0_0402_5%

DT52 EMC@ DT53 EMC@

5

21

TBTA_SBU1 2 1 1 2 TBTA_SBU2
2 1 1 2

SESD0201X1BN-0010-098_DFN2 SESD0201X1BN-0010-098_DFN2
A A
DT54 EMC@ DT55 EMC@
TBTA_CC1 2 1 1 2 TBTA_CC2
2 1 1 2

SESD0201X1BN-0010-098_DFN2 SESD0201X1BN-0010-098_DFN2

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 TYPEC-A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
DS321 0.1

Date: Monday, January 16, 2017 Sheet 32 of 61

5 4 3 2 1
 5 4 3 2 1

V3P0_CCG4_VDDD

TYPE-C adapter VBUS_OUT_P2

1
ADIN_1
C3301
VBUS_OUT_P2 0.1U_0201_6.3V6-K
U3307 U3302 2
@
FPF2895UCX_WLCSP24
10
B11 RX1+ VPWR
C3 C2 B10 RX1- 15 1
VIN1 VOUT1 SBU1 C_SBU1
D3 D1
JP2 A2 TX1+ 14 2
D4 VIN2 VOUT2 D2 SBU2 C_SBU2
A3 TX1- V3P0_CCG4_VDDD
1U_0402_25V6-K

VIN3 VOUT3

25

26

27
E3 E1 USBC_CC1 12 4 USBC_CC1_C
VIN4 VOUT4
B2 TX2+ USBC_CC2 CC1 C_CC1 USBC_CC2_C
E4 E2 B3 TX2- 11 5
CT8632

VIN5 VOUT5 CC2 C_CC2

1
GND25

GND26

GND27
F3 F1 A11 RX2+
VIN6 VOUT6
1

F4 F2 CT8633 1 2 1U_0402_25V6-K A10 RX2- 20 7 R3302

VIN7 VOUT7 19 D1 RPD_G1
D2 10K_0402_5%
CCG4_VBUS_C_CTRL_P2_R A2 A1 17 6
ON NC D3 RPD_G2
2

16
C3304 D4

2
D A4 A3 9 D
POL FLAGB FLT @
1 24 1 2 3
B2 B3 GND_A1 GND_B12 VBIAS 8
OC_MODE OV1 C_TX3_P_C C_RX3_P_C 0.1U_0402_50V6-K GND1 13
2 23 GND2
C1 C4 RT1050 1 2 0_0402_5% SSTXP1_A2 SSRXP1_B11 @ 18
ISET OV2 GND3

GND1

GND2
C_TX3_N_C 3 22 C_RX3_N_C 21
THERMAL_PAD
1

SSTXN1_A3 SSRXN1_B10
1
0_0402_5%

RT1024 4 21 TPD8S300_QFN20_3X3
RT1063

1.65K_0402_1% VBUS_A4 VBUS_B9 @

B1

B4
USBC_CC1_C 5 20
CC1_A5 SBU2_B8
2

C_DP C_DM
2

V3P0_CCG4_VDDD 6 19
DP1_A6 DN2_B7
C_DM 7 18 C_DP
DN1_A7 DP2_B6 USBC_CC1 USBC_CC1_C
31 USBC_CC1 R3307 1 2 0_0402_5%
8 17 USBC_CC2_C USBC_CC2 USBC_CC2_C
SBU1_A8 CC2_B5 31 USBC_CC2 R3308 1 2 0_0402_5%

1
9 16
RT1062 VBUS_A9 VBUS_B4
@ 10K_0402_5% C_RX4_N_C 10 15 C_TX4_N_C
SSRXN2_A10 SSTXN2_B3
C_RX4_P_C 11 14 C_TX4_P_C
USBC_CC1_C C_DP

2
SSRXP2_A11 SSTXP2_B2
USBC_CC2_C C_DM
CCG4_VBUS_C_CTRL_P2_R R10247 1 2 CCG4_VBUS_C_CTRL_P2 12 13
CCG4_VBUS_C_CTRL_P2 31 GND_A12 GND_B1
0_0402_5%

AZ5425-01F.R7GR DFN1006P2E

AZ5425-01F.R7GR DFN1006P2E

AZ5425-01F.R7GR DFN1006P2E

AZ5425-01F.R7GR DFN1006P2E
1

1
RT1048 D40 D39 D35 D17
100K_0402_5%

1
EMC_V@

EMC_V@

EMC_V@
GND28

GND29

GND30

EMC_V@
2
+5VALW 1.5A need check

2
HIGHS_UB11246-1600W-1H

28

29

30
ME@

2
1
C8631 VBUS_OUT_P2
47U_0805_6.3V6-M
2
VBUS_OUT_P2
U3304 D4025
VBUS_OUT_P2
1116 update symbol
1 2
C A1 A3 @ C
VIN1 VOUT1 LRB751V-40T1G_SOD323-2
B1 B3
VIN2 VOUT2

1
2.2_0805_5%
C1 C3 D36 EMC_V@ D20 EMC_V@

1
VIN3 VOUT3 C_TX4_P_C 9 C_TX4_P_C C_TX3_P_C 9 C_TX3_P_C
RT1027 10 1 1 10 1 1
CCG4_VBUS_P_CTRL_P2 TYPE_C_OCP# 9 TYPE_C_OCP#

R10249
GND1
GND2
GND3

D3 D1 100_0805_5%

0.47U_0402_25V6K

0.47U_0402_25V6K

0.47U_0402_25V6K

0.47U_0402_25V6K
31 CCG4_VBUS_P_CTRL_P2 ON OC_FLAGB @ C_TX4_N_C 8 2 C_TX4_N_C C_TX3_N_C 8 2 C_TX3_N_C
D2 R9426 1 2 9 2 9 2

10U_0603_25V6-M
10U_0603_25V6-M

10U_0603_25V6-M
ISET 1 1 1@ 1 1 1 1
1

D38 C_RX3_N_C 7 C_RX3_N_C C_RX4_P_C 7 C_RX4_P_C

2
680_0402_1% @

1
4 4

SPHV24-01ETG-C_SOD882-2
FPF2595UCX_WLCSP12 7 4 7 4

C1334
C922

C921

C920
2
RT1060

10U_0603_25V6-M
A2
B2
C2

1
D

1
100K_0402_5% 1 QT9 C_RX3_P_C 6 C_RX3_P_C C_RX4_N_C 6 C_RX4_N_C

C8657
6 5 5 6 5 5

C918

C919
EMC_V@
@ 2 2 2 2 2 2 2 31 CCG4_VBUS_DISCHARGE_P2 2
G
3 3 3 3
2

C8656

1
2 S 2N7002KW_SOT323-3
RT1026 8 8

3
2
10K_0402_5%
AZ1045-04F_DFN2510P10E-10-9
For ESD AZ1045-04F_DFN2510P10E-10-9

2
R943 1 @ 2 0_0402_5%
+1.2V_VDD1
L23 EMC@
1 2 C_DP
+1.2V +1.2V_VDD1 9 USB20_P6 1 2

RW31 1 2 0_0402_5% 4 3 C_DM

1 1 9 USB20_N6 4 3
CW32 CW33 EXC24CH900U_4P
0.1u_0201_10V6K 0.1u_0201_10V6K
R91 1 @ 2 0_0402_5%
B 2 2 B

+1.2V_VDD1 R944 2 @ 1 0_0402_5%

EXC24CH900U_4P
U3 C_TX3_N C_TX3_N_C
2 1
2 1
2 10 USB30_TX_P3_U C8635 1 2 0.1U_0201_6.3V6-K C_TX3_P
VDD A_OUTp
C_TX3_P 3 4 C_TX3_P_C
CW45 1 2 0.1U_0201_6.3V6-K USB30_TX_P3_C 12 9 USB30_TX_N3_U C8636 1 2 0.1U_0201_6.3V6-K C_TX3_N
3 4
9 USB30_TX_P3 A_INp A_OUTn
L24 EMC@
CW44 1 2 0.1U_0201_6.3V6-K USB30_TX_N3_C 1 3 USB30_RX_P3_C CW46 1 2 0.1U_0201_6.3V6-K
9 USB30_TX_N3 A_INn B_OUTp USB30_RX_P3 9
R3107 2 @ 1 0_0402_5%
C_RX3_P 7 4 USB30_RX_N3_C CW47 1 2 0.1U_0201_6.3V6-K
B_INp B_OUTn USB30_RX_N3 9
C_RX3_N 6 11 REXT1
R100 2 @ 1 0_0402_5%
B_INn REXT
5 8
1

EN GND L25 EMC@

RW30 C_RX3_P 3 4 C_RX3_P_C
13 4.99K_0402_1% 3 4
GND_PAD
PS8733TQFN12GTR2-A0_TQFN12_2X2 C_RX3_N C_RX3_N_C
2 1
2 1
2

EXC24CH900U_4P

R101 2 @ 1 0_0402_5%

+1.2V_VDD2

+1.2V +1.2V_VDD2

RW34 1 2 0_0402_5% @
1 1 R3135 1 2 0_0402_5%
CW37 CW36
L31 EMC@
0.1u_0201_10V6K 0.1u_0201_10V6K C_RX4_N C_RX4_N_C
4 3
2 2 4 3

C_RX4_P 1 2 C_RX4_P_C
+1.2V_VDD2 1 2
EXC24CH900U_4P
U33 R3137 1 @ 2 0_0402_5%

2 10 USB30_TX_P4_U C8633 1 2 0.1U_0201_6.3V6-K C_TX4_P

A VDD A_OUTp @ A
R3136 1 2 0_0402_5%
CW38 1 2 0.1U_0201_6.3V6-K USB30_TX_P4_C 12 9 USB30_TX_N4_U C8634 1 2 0.1U_0201_6.3V6-K C_TX4_N
9 USB30_TX_P4 A_INp A_OUTn EXC24CH900U_4P
CW39 1 2 0.1U_0201_6.3V6-K USB30_TX_N4_C 1 3 USB30_RX_P4_C CW40 1 2 0.1U_0201_6.3V6-K C_TX4_P 1 2 C_TX4_P_C
9 USB30_TX_N4 A_INn B_OUTp USB30_RX_P4 9 1 2
C_RX4_P 7 4 USB30_RX_N4_C CW41 1 2 0.1U_0201_6.3V6-K
B_INp B_OUTn USB30_RX_N4 9
4 3
C_RX4_N 6 11 REXT2 4 3
B_INn REXT L32 EMC@
5 8 C_TX4_N R3138 1 @ 2 0_0402_5% C_TX4_N_C
1

EN GND
RW35
13 4.99K_0402_1%
GND_PAD
PS8733TQFN12GTR2-A0_TQFN12_2X2 Title
Security Classification LC Future Center Secret Data
2

Issued Date 2015/08/20 Deciphered Date 2016/08/20 TYPEC-B

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
DS321 0.1

Date: Monday, January 16, 2017 Sheet 33 of 61

5 4 3 2 1
 5 4 3 2 1

LCD POWER CIRCUIT

+3VS
+3VS
+LCDVDD +LCDVDD_CON
EMI request

2
U5
W=60mils R8 R9
5 1 R263 1 2 DMIC_CLK_OUT1 INVT_PWM
IN OUT 100K_0402_1% 100K_0402_1% DISPOFF#

RF_NS@
1 2 0_0805_5%
GND @ @
@

470P_0201_50V7-K

470P_0201_50V7-K
100P_0201_25V8J
1

1
0.1u_0201_10V6K

33P_0201_50V8-J
4.7U_0402_6.3V6M
PCH_ENVDD 1 1 1

EMC_NS@

EMC_NS@
C1 4 3 1 1 1
EN OCB

EMC@
0.1u_0201_10V6K EDP_AUX
2 SY6288C20AAC_SOT23-5 EDP_AUX#
2 2 2
D 2 2 2 D
U5 EN PIN VIH MIN 1.5V

C11

C12

C13
C121

C122

C123

2
R13 R15
100K_0402_1% 100K_0402_1%

For RF @ @

1
V9B+ +LEDVDD

2A 80 mil 2A 80 mil
R17 1 2 0_0805_5%
Touch JLVDS

EMC@
CD@

4.7U_0805_25V6-K

0.1U_0201_25V6-K
1 1 1
+LEDVDD 1
+3VS 500mA(Max: 300mA) +3VS_TOUCH 2
3 2
2 1 4 3
2 2 CPU_EDP_TX0+ C19 1 2 0.1u_0201_10V6K EDP_TX0+ 5 4
R1026 NOMS@ 0_0603_5% 4 CPU_EDP_TX0+ CPU_EDP_TX0- 1 2 0.1u_0201_10V6K EDP_TX0- 6 5
C16

C14

C15
1 1 4 CPU_EDP_TX0- 6
7
CPU_EDP_TX1+ 1 2 0.1u_0201_10V6K EDP_TX1+ 8 7

C1968
0.1u_0201_10V6K
CD@

C31
0.1u_0201_10V6K
CD@
C17
4 CPU_EDP_TX1+ CPU_EDP_TX1- 1 2 0.1u_0201_10V6K EDP_TX1- 9 8
C18
2 2 4 CPU_EDP_TX1- 9
EMI Request 10
PCH_ENVDD CPU_EDP_TX2+ UHD@ EDP_TX2+ 10
C2633 1 2 0.1u_0201_10V6K 11
4 PCH_ENVDD 4 CPU_EDP_TX2+ CPU_EDP_TX2- EDP_TX2- 11
C2634 1 2 0.1u_0201_10V6K 12
4 CPU_EDP_TX2- UHD@ 12
1

13
CPU_EDP_TX3+ UHD@ EDP_TX3+ 13
R1 C2635 1 2 0.1u_0201_10V6K 14
4 CPU_EDP_TX3+ CPU_EDP_TX3- EDP_TX3- 14
100K_0402_5% C2636 1 2 0.1u_0201_10V6K 15
4 CPU_EDP_TX3- 16 15
CPU_EDP_AUX UHD@ EDP_AUX 16
C20 1 2 0.1u_0201_10V6K 17
4 CPU_EDP_AUX 17
2

CPU_EDP_AUX# C21 1 2 0.1u_0201_10V6K EDP_AUX# 18

4 CPU_EDP_AUX# 19 18
DISPOFF# 20 19
INVT_PWM 21 20
+3VS 22 21
C +3VS 4 CPU_EDP_HPD 22 C
23
+3VALW 24 23
+LCDVDD_CON
+3VS_TOUCH W=60mils 25 24
2

Q170 26 25
R10 +3VS_TOUCH 26

1
PCH_ENBKL R1062 LP2301ALT1G_SOT23-3 27
R11 1 @ 2 4.7K_0402_5% EC_LID_OUT# EC_LID_OUT#_TS 27
10K_0402_5% MS@ D4022 1 2 28
0_0402_5% @ 3 1 35,44,45 EC_LID_OUT# PCH_THS_RST#_R 28
MS@ R127 1 2 0_0402_5% LRB751V-40T1G_SOD323-2 29

D
8 PCH_THS_RST# 29
30 41
1

8 PM_I2C_SCL0 30 GND1
1 31 42
R12 1 2 0_0402_5% DISPOFF# 8 PM_I2C_SDA0 31 GND2

2
44 BKOFF# R1052 C8639 32 43

G
8 THS_IRQ 32 GND3

2
1 2 0.1u_0201_10V6K 33 44
+3VS MS@ 34 33 GND4 45
R14 1 2 0_0402_5% ENBKL 2 34 GND5
4 PCH_ENBKL ENBKL 44 100K_0402_5% 1 35 46
MS@ C8640 +3VS_TOUCH 36 35 GND6 47
1

0.01U_0201_10V6K +3VS_TOUCH 36 GND7

37 48
1
R16 37 GND8
MS@ 38 49
100K_0402_5% 2 39 38 GND9 50
R1064 39 GND10
40 51
100K_0402_5% 40 GND11
2

MS@

2
HIGHS_WS12401-S0151-HF
2

1
D R1356

2
ME@
R1063 1 MS@ 2 0_0402_5% 2 Q169
U55
100K_0402_5%
+3VS 8 TOUCHPANEL_PWR_EN AZ5123-01F.R7GR_DFN1006P2X2

2
G 2N7002KW_SOT323-3
R1080 1 2 0_0402_5% EMC_NS@
44,45 EC_DEVICE_ON MS@
@ 1026 change

1
S EC_LID_OUT#_TS
1 C8638
3
2

0.1u_0201_10V6K
R18

1
1K_0402_5% MS@ EMC@
@ 2 1 2 PCH_THS_RST#_R

1
C203 0.01U_0402_25V7K
1

R19 1 2 0_0402_5% INVT_PWM

4 PCH_EDP_PWM
1

R20
100K_0402_5%
B B
2

CMOS Camera
+3VS_CMOS
+3VS
W=40mils
2 1
R1027 NOMS@ 0_0603_5%
W=40 mils 1 1
C3 C4
0.1u_0201_10V6K 10U_0603_6.3V6M
2
CD@
2
@ For EMI
EXC24CH900U_4P
USB20_N4 4 3 USB20_N4_R
+3VS 4 3

+3VALW USB20_P4 1 2 USB20_P4_R

+3VS_CMOS 1 2
Q172 L12 EMC_NS@
1

R1061 LP2301ALT1G_SOT23-3
+3VL +3VL_DMIC1 JCAM
10K_0402_5% MS@ 12
MS@ 3 1
S

GND1
R1090 1 2 0_0402_5% 1
1 1 +3VL_DMIC1
2
2

R1028 C8643 35 DMIC_DATA_IN1 2

G

3
2

1 2 0.1u_0201_10V6K 35 DMIC_CLK_OUT1 3
+3VS 4
MS@ 4
2 5 1
100K_0402_5% 1 6 5 C8653
MS@ C8644 6
7 0.1u_0201_10V6K
1

0.01U_0201_10V6K 7
R182 1 2 0_0402_5% USB20_P4_R 8
MS@ 9 USB20_P4 2 0_0402_5% USB20_N4_R 8 2
2 R183 1 9
R1065 9 USB20_N4 9
+3VS_CMOS 10
100K_0402_5% 10
MS@ W=40mils 11
2

A 1 GND2 A
C24
1

D
MS@ .047U_0201_6.3V6K HIGHS_WS42101-S0131-HF
R1060 1 2 0_0402_5% 2 Q171
8 CAMERA_PWR_EN G EMC_NS@ ME@
EC_DEVICE_ON 1 2 0_0402_5% 2N7002KW_SOT323-3 2
R1081
MS@
@ S 1130 update symbol
1
3

C8642
0.1u_0201_10V6K EMI request
MS@
2

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 eDP/CMOS/Touch screen/DMIC

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
DS321 0.1

Date: Monday, January 16, 2017 Sheet 34 of 61

5 4 3 2 1
 5 4 3 2 1

+3VALW
+VDD_WOV +VDD_WOV +3VL
+DCVDD +1.8VL
UA4
RA748
CODEC_I2C_SCL RA728 1 2 0_0402_5% 8 13 2 1 0_0402_5% RA722 2 1 0_0402_5%
240uA 0_0402_5% 1 2RA721
43 CODEC_I2C_SCL CODEC_I2C_SDA RA729 1 2 0_0402_5% 7 I2C_SCL VDD 1 2
@

CA426
2.2U_0402_10V6-K
43 CODEC_I2C_SDA I2C_SDA 11

CA425
0.1U_0201_6.3V6-K
1240uA 1 2
DCVDD +DCVDD
RA730 1 2 0_0402_5% 24

CA423
2.2U_0402_10V6-K

CA424
0.1U_0201_6.3V6-K
34,44,45 EC_LID_OUT# 25 SPI_SCL/UART_CTS 14 2.2U_0402_10V6-K 1 2 CA427 2 1
32 SPI_SDI/UART_IN LDOCAP
1 SPI_SDO/UART_OUT 15 2 1
D SPI_CS/UART_RTS VREF D

5 21 RA731 1 2 0_0402_5% DMIC_CLK_OUT1

43 I2S_LRCLK 6 I2S_LRCK DMIC_CLK_OUT1 22 RA732 1 2 0_0402_5% DMIC_DATA_IN1 DMIC_CLK_OUT1 34
43 I2S_BCLK 3 I2S_SCLK DMIC_DATA_IN1 DMIC_DATA_IN1 34
43 I2S_OUT I2S_DIN
RA723 1 2 22_0402_5% 2
43 I2S_IN 4 I2S_DOUT 23 RA733 1 2 0_0402_5% DMIC_CLK_OUT2
43 I2S_MCLK I2S_MCLK/DMIC_DATA2 DMIC_CLK_OUT2 18 RA734 1 2 0_0402_5% DMIC_DATA_IN2
9 DMIC_DATA_IN2/AMIC_L
connect EC and CODEC 43,44 WOV_IRQ IRQ 17
20 AMIC_R
43 DMIC_CLK 19 DMIC_CLK 16 +3VL
connect CODEC
43 DMIC_DATA DMIC_DATA1 NC_1 26 +1.8VL
RA720 1 @ 2 0_0402_5% RT_CLK 10 NC_2 27
10,40 SUSCLK rt_clk NC_3 28 U3312
12 NC_4 29 RA737 2 1 0_0402_5% 3 4
VIN VOUT

4.7U_0402_6.3V6M
GND_1 NC_5 30 1 2 2

CA435
33 NC_6 31 CA434 GND 5 RA738 1 2 25.5K_0402_1%
GND_2 NC_7 1U_0201_6.3V6-K 1 SET
SHDN RA739 1 2 20K_0402_1% 1
ALC5514-CG_QFN32_4X4 2
G918T12U_SOT23-5

C C
+3VALW +3VL_DMIC2

+3VL DMIC_CLK_OUT1 DMIC_CLK_OUT2

2 RA743 1 0_0402_5% +3VL_DMIC2 DMIC_DATA_IN1 DMIC_DATA_IN2
JDMIC WOV_IRQ RA746 1 2 100K_0402_5%

EMC_NS@

EMC_NS@

EMC_NS@

EMC_NS@
2 RA740 1 0_0402_5% 1
DMIC_CLK_OUT2 @ 2 1 @
2

100P_0201_25V8J

100P_0201_25V8J

100P_0201_25V8J

100P_0201_25V8J
DMIC_DATA_IN2 3
3 2
4 1 1 1 1

CA436
0.1U_0201_6.3V6-K
4 5
GND1 6
GND2 1
2 2 2 2

CA437

CA438

CA439

CA440
HIGHS_WS83040-S0171-HF
ME@

1117 update For EMI

+3VL

B 2 RA744 1 B

10K_0402_5%

YA1

1 4
CLK_OE VCC

2 3 2 RA745 1 RT_CLK
GND CLK_OUT
0_0402_5%
32.768KHZ_15PF_1XSF000032AR10

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 VOICE DSP ALC5514

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
DS321 0.1

Date: Monday, January 16, 2017 Sheet 35 of 61

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 Blank
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. DS321
Date: Monday, January 16, 2017 Sheet 36 of 61
5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 Blank

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
DS321 0.1

Date: Monday, January 16, 2017 Sheet 37 of 61

5 4 3 2 1
 5 4 3 2 1

Mini Card(WWAN)
1.1A average
+3VS
+1.8VS
D D
JWWAN
1
2 1
3 2
PCIE_WAKE# 4 3
11,29,40 PCIE_WAKE# WWAN_RESET# 5 4
44 WWAN_RESET# 5
6
8 PCH_WWAN_OFF# 7 6
9 FULL_CARD_POWER_OFF# 8 7
8 PCH_GNSS_DISABLE# 8
9
9 USB20_P5 10 9
9 USB20_N5 10
11
12 11
13 12
14 13
15 14 17
16 15 GND2 18
16 GND1
ELCO_046809616210846+
ME@

1121 update symbol

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2014/11/15 Deciphered Date

Reserve
2013/11/08 WWAN CONN
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
D 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. DS321
Date: Monday, January 16, 2017 Sheet 38 of 61
5 4 3 2 1
 5 4 3 2 1

change to main source SB00000ZJ00 01/16 JT

REMOTE+
Close to U1

1
REMOTE+_R R176 1 2 0_0402_5% REMOTE+ 1 Q16
Near CPU core
REMOTE+_R C46

C
1 100P_0201_25V8J 2 B
C44 REMOTE-_R R177 1 2 0_0402_5% REMOTE- LMBT3904WT1G_SOT323-3
2200P_0201_25V7-K 2

E
2 REMOTE-_R REMOTE-

3
D REMOTE+/-_R, REMOTE1+/-, REMOTE2+/-: +3VALW D

Trace width/space:10/10 mil Near CPU

Trace length:<8"

1
R25
13.7K_0402_1%

2
NTC_V2
SMSC thermal sensor

1
placed near DIMM R288
100K_0402_1%_NCP15WF104F03RC
+3VS
U1

2
1 8 EC_SMB_CK2
VDD SCL EC_SMB_CK2 44
REMOTE+_R 2 7 EC_SMB_DA2
1 D+ SDA EC_SMB_DA2 44
C47
0.1u_0201_10V6K REMOTE-_R 3 6
D- ALERT#
2 R51 2 1 4 5
+3VS T_CRIT# GND
10K_0402_5%
NCT7718W_MSOP8

Address 1001_101xb for layout optimized, change the EC_AGND to GND

C C

+5VLP +5VLP
+5VS +5VS_FAN
+5VLP

HW thermal sensor R52 1 2 0_0603_5%

0.1u_0201_10V6K
2

2
1 R252 R253
1 @1
C7 21.5K_0402_1% 21.5K_0402_1%
0.1u_0201_10V6K C49
10U_0603_6.3V6M

C50
1

1
2
@ @ @ 2 2
U4 JFANC1 ME@
1 8 TMSNS1 +5VS_FAN 5
VCC TMSNS1 GND1
2 7 PHYST1 R6 1 2 10K_0402_5% 1
GND RHYST1 2 1
NTC_V2 44 EC_FAN_PWM 2
3 6 TMSNS2 @ R197 1 2 0_0402_5% 44 EC_FAN_SPEED
3
44,53 EC_ON OT1 TMSNS2 NTC_V2 44 3
4
4 5 PHYST2 R7 1 2 10K_0402_5% 4
@
OT2 RHYST2 6
G718TM1U_SOT23-8 GND2
@
@ HIGHS_FC5AF041-2931H
B over temperature threshold: B

RSET=3*RTMH
92+/-30C
Hysteresis temperature threshold.
RHYST=(RSET*RTML)/(3*RTML-RSET)
56+/-30C +5VS +5VS_FAN1 1114 change new symbol
R102071 2 0_0603_5%

0.1u_0201_10V6K
1 @1
C2604
10U_0603_6.3V6M

C2605
2 2
JFANC2 ME@
+5VS_FAN1 5
GND1
1
2 1
44 EC_FAN_PWM1 2
44 EC_FAN_SPEED1
3
4 3
4
6
GND2
HIGHS_FC5AF041-2931H

A A

1114 change new symbol

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 Thermal sensor/FAN CONN

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. DS321
Date: Monday, January 16, 2017 Sheet 39 of 61
5 4 3 2 1
 A B C D E

Mini-Express Card(WLAN/WiMAX)
+3VS
+3VS_W LAN

+3VS +3VS_W LAN

JW LAN1
1 1

1
R31 1 2 0_0603_5% 1 2
3 GND1 3.3VAUX1 4 R258 R259
9 USB20_P7 USB_D+ 3.3VAUX2
1 5 6 49.9K_0402_1% 49.9K_0402_1%
9 USB20_N7 USB_D- LED#1
C53 7 8
0.1u_0201_10V6K 9 GND2 PCM_CLK 10
SDIO_CLK PCM_SYNC

2
@ 11 12
2 13 SDIO_CMD PCM_IN 14
15 SDIO_DAT0 PCM_OUT 16
17 SDIO_DAT1 LED#2 18
19 SDIO_DAT2 GND11 20
21 SDIO_DAT3 UART_WAKE 22 UART_RX_DEBUG_R R256 1 2 0_0402_5%
SDIO_WAKE UART_RX UART_RX_DEBUG 8
23
SDIO_RESET

KEY E
25 PIN24~PIN31 NC PIN 24
27 26
29 28
31 30

33 32 UART_TX_DEBUG_R R257 1 2 0_0402_5%

GND3 UART_TX UART_TX_DEBUG 8
35 34
9 PCIE_PTX_C_DRX_P4 PETP0 UART_CTS
37 36
9 PCIE_PTX_C_DRX_N4 PETN0 UART_RTS EC_TX_RSVD
39 38 R62 1 @ 2 0_0402_5%
41 GND4 RSRVD10 40 EC_RX_RSVD R63 1 @ 2 0_0402_5%
9 PCIE_PRX_DTX_P4 PERP0 RSRVD11
43 42
9 PCIE_PRX_DTX_N4 PERN0 RSRVD9
45 44 R88 1 2 0_0402_5%
GND5 COEX3 EC_RX 44
47 46
10 CLK_PCIE_W LAN REFCLKP0 COEX2
49 48
10 CLK_PCIE_W LAN# REFCLKN0 COEX1 SUSCLK_R
2 51 50 R55 1 2 0_0402_5% 2
W LAN_CLKREQ_Q# GND6 SUSCLK PLT_RST# SUSCLK 10,35
10 W LAN_CLKREQ# R61 1 2 0_0402_5% 53 52
PCIE_W AKE#_W LAN CLKEQ0# PERST0# BT_OFF# PLT_RST# 11,29,42,44
R262 1 @ 2 0_0402_5% 55 54 R53 1 2 1K_0402_5%
11,29,38 PCIE_W AKE# PEWAKE0# RSRVD/W_DISABLE#2 W LAN_OFF# PCH_BT_OFF# 8,9
57 56 R56 1 2 0_0402_5%
GND7 W_DISABLE#1 PCH_W LAN_OFF# 8,9

59 58
61 RSRVD/PETP1 I2C_DATA 60
63 RSRVD/PETN1 I2C_CLK 62
65 GND8 ALERT# 64 EC_TX_R R89 1 2 0_0402_5%
RSRVD/PERP1 RSRVD6 EC_TX 44
67 66
69 RERVD/PERN1 RSRVD7 68 +3VS_W LAN
GND9 RSRVD8

1
71 70
73 RSRVD1 RSRVD12 72 R186
75 RSRVD2 3.3VAUX3 74 100K_0402_5%
GND10 3.3VAUX4
77 76
GND15 GND14

2
DEREN_40-42258-06741RHF
ME@

1114 change new symbol

3 3

4 4

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 NGFF WLAN
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. DS321 0.1

Date: Monday, January 16, 2017 Sheet 40 of 61

A B C D E
 A B C D E

+USB_VCCA
RIGHT SIDE USB3.0 PORT x1

L13 EMC@ USB20_P1_R

USB30_RX_P1 1 2 USB30_RX_R_P1 +USB_VCCA
1 2 USB20_N1_R
D12 EMC@

AZ5725-01F.R7GR_DFN1006P2X2
USB30_RX_N1 4 3 USB30_RX_R_N1 USB30_RX_R_N1 9 1USB30_RX_R_N1
10 1
4 3

2
D11
USB30_RX_R_P1 8 2 USB30_RX_R_P1

EMC@

D10
AZ5425-01F.R7GR DFN1006P2E
EMC@

D9
AZ5425-01F.R7GR DFN1006P2E
EXC24CH900U_4P 9 2

2
USB30_TX_R_N1 7 4USB30_TX_R_N1
7 4
L16 EMC@
USB30_TX_C_P1 1 2 USB30_TX_R_P1 USB30_TX_R_P1 6 5 USB30_TX_R_P1
6 5 JUSB1 ME@
1 1 2 USB30_TX_P1 C126 1 2 0.1u_0201_10V6K USB30_TX_C_P1 1 2 0_0402_5% USB30_TX_R_P1 9 1

1
R95 @
3 9 USB30_TX_P1 1 StdA_SSTX+
EMC@ 3 VBUS

1
USB30_TX_C_N1 4 3 USB30_TX_R_N1 USB30_TX_N1 C124 1 2 0.1u_0201_10V6K USB30_TX_C_N1 R96 1 @ 2 0_0402_5% USB30_TX_R_N1 8
4 3 8 9 USB30_TX_N1 USB20_P1_C 1 2 0_0402_5% USB20_P1_R 3 StdA_SSTX-
R97 @
EXC24CH900U_4P 7 D+
EMC USB20_N1_C 1 2 0_0402_5% USB20_N1_R 2 GND_DRAIN 10
AZ1045-04F_DFN2510P10E-10-9 R93 @
L8 EMC@ USB30_RX_P1 R94 1 @ 2 0_0402_5% USB30_RX_R_P1 6 D- GND_1 11
USB20_N1_C USB20_N1_R 9 USB30_RX_P1 StdA_SSRX+ GND_2
1 2 4 12
1 2 USB30_RX_N1 R98 1 @ 2 0_0402_5% USB30_RX_R_N1 5 GND_5 GND_3 13
9 USB30_RX_N1 StdA_SSRX- GND_4
USB20_P1_C 4 3 USB20_P1_R LOTES_AUSB0392-P001A11
4 3
EXC24CH900U_4P
EMC
1125 update symbol

+USB_VCCA
+5VALW_2 USB charger pin number 6 7 8 4
+5VALW_2 C2631 1 2 100U_1206_6.3V6M
ILIM_SEL R2064 2 1
10K_0402_5%
2.2A @ C2630 1 2 100U_1206_6.3V6M pin name Ctl1 Ctl2 Ctl3 ILM_SEL
STATUS#_U R2051 1 2 100K_0402_5% C197 1 2 @ U8 C187 1 2 0.1u_0201_10V6K
1 12
S0 CDP
@ 0.1u_0201_10V6K
IN OUT USB20_P1_C
1 1 1 1
10
USB20_P1 3 DP_IN 11 USB20_N1_C
USB_CHG_EN 2 1 9 USB20_P1 USB20_N1 2 DP_OUT DM_IN 14 Charge port
9 USB20_N1 DM_OUT GND Pin5 Enable
S3 DCP
R2052 10K_0402_5%
STATUS#_U
R2659 H for all 0 1 1 0/1
@ 9 1 2 @
ILIM_SEL STATUS# EC_STATUS# 44
R2065 2 1
4 ILIM_SEL 0_0402_5%
S4/S5 DCP
10K_0402_5%
ILIM_SEL
0 0 1 0/1
2 13 2
9 USB_OC0# 5 FAULT# 48.7K_0402_1%
44 USB_CHG_EN EN ILIM_LO
15 R2048 1 2
CHG_MOD1 6 ILIM_LO 16 ILIM_HI R2047 1 2
44 CHG_MOD1 CHG_MOD2 7 CLT1 ILIM_HI S0 SDP1 0/1
44 CHG_MOD2 CHG_MOD3 8 CLT2 17 22.6K_0402_1% Normal port 1 1 0
44 CHG_MOD3 CLT3 GND_Pad Pin5 Enable
H for S0/S3
TPS2546RTER_QFN16_4X4
L for S4/S5 S3 SDP1 0 0/1
1 0

S4/S5 Disable 0 0 0 0/1

+5VALW +USB_VCCB
U2
LEFT SIDE USB3.0 PORT x1 5
IN OUT
1
USB_OC1#
1 3
C128 FLAG USB_OC1# 9
1U_0402_6.3V6K 4 2 1
44 USB_ON# EN GND C140
2 G517E2T11U_SOT23-5 1000P_0201_50V7-K
EMC_NS@
2
Low Active +USB_VCCB
3
USB20_P2_R 3

USB20_N2_R C8008 1 2
100U_1206_6.3V6M

L19 EMC@ C8005 1 2

2

USB30_RX_P2 1 2 USB30_RX_R_P2 +USB_VCCB @ 47U_0805_6.3V6-M

EMC@

D4018
AZ5425-01F.R7GR DFN1006P2E
EMC@

D4017
1 2 AZ5425-01F.R7GR DFN1006P2E
2

D32 EMC@ C8009 1 2

AZ5725-01F.R7GR_DFN1006P2X2

USB30_RX_N2 4 3 USB30_RX_R_N2 USB30_RX_R_N2 9 1USB30_RX_R_N2

10 1 @ 1U_0402_10V6K
4 3
1

D33
EXC24CH900U_4P USB30_RX_R_P2 8 2 USB30_RX_R_P2 1 2
9 2 C8006
1

@ 1U_0402_10V6K
USB30_TX_R_N2 7 4USB30_TX_R_N2
7 4
1

L18 EMC@
USB30_TX_C_P2 1 2 USB30_TX_R_P2 USB30_TX_R_P2 6 5 USB30_TX_R_P2
6 5 JUSB2 ME@
1 2 USB30_TX_P2 C8007 1 2 0.1u_0201_10V6K USB30_TX_C_P2 R102461 2 0_0402_5% USB30_TX_R_P2 9
2

@
3 9 USB30_TX_P2 1 StdA_SSTX+
EMC@ 3 VBUS
2

USB30_TX_C_N2 4 3 USB30_TX_R_N2 USB30_TX_N2 C8004 1 2 0.1u_0201_10V6K USB30_TX_C_N2 R102411 @ 2 0_0402_5% USB30_TX_R_N2 8

4 3 9 USB30_TX_N2 USB20_P2 USB20_P2_R StdA_SSTX-
8 R102431 @ 2 0_0402_5% 3
9 USB20_P2 D+
EXC24CH900U_4P EMC 7
AZ1045-04F_DFN2510P10E-10-9 USB20_N2 R102451 @ 2 0_0402_5% USB20_N2_R 2 GND_DRAIN 10
9 USB20_N2 USB30_RX_P2 USB30_RX_R_P2 D- GND_1
L17 EMC@ R102421 @ 2 0_0402_5% 6 11
USB20_P2 USB20_P2_R 9 USB30_RX_P2 StdA_SSRX+ GND_2
1 2 4 12
1 2 USB30_RX_N2 R102441 @ 2 0_0402_5% USB30_RX_R_N2 5 GND_5 GND_3 13
9 USB30_RX_N2 StdA_SSRX- GND_4
USB20_N2 4 3 USB20_N2_R LOTES_AUSB0392-P001A11
4 3
EXC24CH900U_4P
EMC
1125 update symbol

4 4

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 USB3.0 PORT (Right/Left)

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
DS321 0.1

Date: Monday, January 16, 2017 Sheet 41 of 61

A B C D E
 A B C D E F G H

+3VS +3VS_SSD

MAX 1.5A
R23 1 2 0_0603_5%

10U_0402_6.3V6-M

4.7U_0402_6.3V6M

0.1u_0201_10V6K
C2037

C207
10U_0402_6.3V6M
1 1 1 1

C137

C146
1 1

@
2 2 2 2

+3VS_SSD
JSSD1

1 2
3 GND_1 3.3V_1 4
5 GND_2 3.3V_2 6
9 PCIE_PRX_DTX_N5 PERN3 N/C_2
7 8
9 PCIE_PRX_DTX_P5 PERP3 N/C_3
9 10
0.22U_0201_6.3V6-K 1 2 C2039 PCIE_PTX_C_DRX_N5 11 GND_3 DAS/DSS#/LED1# 12
9 PCIE_PTX_DRX_N5 PCIE_PTX_C_DRX_P5 PETN3 3.3V_3
0.22U_0201_6.3V6-K 1 2 C2038 13 14
9 PCIE_PTX_DRX_P5 PETP3 3.3V_4
15 16
17 GND_4 3.3V_5 18
9 PCIE_PRX_DTX_N6 PERN2 3.3V_6
19 20
9 PCIE_PRX_DTX_P6 PERP2 N/C_4
21 22
0.22U_0201_6.3V6-K 1 2 C2040 PCIE_PTX_C_DRX_N6 23 GND_5 N/C_5 24
9 PCIE_PTX_DRX_N6 PCIE_PTX_C_DRX_P6 PETN2 N/C_6

1
9 PCIE_PTX_DRX_P6 0.22U_0201_6.3V6-K 1 2 C2041 25 26
27 PETP2 N/C_7 28 R3100
29 GND_6 N/C_8 30
9 PCIE_PRX_DTX_N7 PERN1 N/C_9 10K_0402_5%
31 32
9 PCIE_PRX_DTX_P7 PERP1 N/C_10 @
33 34
GND_7 N/C_11

2
0.22U_0201_6.3V6-K 1 2 C2042 PCIE_PTX_C_DRX_N7 35 36
9 PCIE_PTX_DRX_N7 PCIE_PTX_C_DRX_P7 PETN1 N/C_12
2 9 PCIE_PTX_DRX_P7 0.22U_0201_6.3V6-K 1 2 C2043 37 38 R70 1 2 0_0402_5% 2
PETP1 DEVSLP PCH_SATA_DEVSLP 9
39 40
GND_8 N/C_13 @
41 42
9 PCIE_PRX_DTX_P8 PERN0/SATA-B+ N/C_14
43 44
9 PCIE_PRX_DTX_N8 45 PERP0/SATA-B- N/C_15 46
0.22U_0201_6.3V6-K 1 2 C2044 PCIE_PTX_C_DRX_N8 47 GND_9 N/C_16 48
9 PCIE_PTX_DRX_N8 PCIE_PTX_C_DRX_P8 PETN0/SATA-A- N/C_17 PLT_RST#
9 PCIE_PTX_DRX_P8 0.22U_0201_6.3V6-K 1 2 C2045 49 50
PETP0/SATA-A+ PERST# SSD_CLKREQ_Q# R3098 1 PLT_RST# 11,29,40,44
51 52 2 0_0402_5% SSD_CLKREQ# 10
53 GND_10 CLKREQ# 54 TP264 1
10 CLK_PCIE_SSD# REFCLKN PEW AKE#
55 56
10 CLK_PCIE_SSD REFCLKP NC18
57 58
GND_11 NC19
59 NC NC 60
61 NC NC 62
63 NC NC 64 +3VS_SSD
65 NC NC 66
+3VS_SSD 67 68
SSD_DET 69 N/C_1 SUSCLK 70
71 PEDET 3.3V_7 72
73 GND_12 3.3V_8 74
GND_13 3.3V_9
1

75 76
R3102 77 GND_14 PEG2
PEG1
10K_0402_5%

ARGOS_NASM0-S6701-TS20
2

R1024 1 2 0_0402_5% SSD_DET ME@

9 SSD_SATA_PCIE_DET#

3
@ 3
1

1110 change
10K_0402_5% @ SSD_DET#
R3101
0--SATA
1--PCIE
2

4 4

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 NGFF-SSD

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. DS321
Date: Monday, January 16, 2017 Sheet 42 of 61
A B C D E F G H
 5 4 3 2 1

+5VS +5VD_AUD +5VS +5VA_AUD +1.8VS +1.8VA_AUD +3VS +3VD_AUD +3VL +3VALW_AUD

1 2 1 2 1 2 1 2 1 2
RA726 0_0603_5% RA727 0_0603_5% RA702 0_0603_5% RA703 0_0603_5% RA704 0_0603_5%
2 2 2 2 2 2 1

CA403
10U_0402_6.3V6M

CA405
10U_0402_6.3V6M

CA415
2.2U_0402_10V6-K
CA404
0.1u_0201_10V6K

CA407
0.1u_0201_10V6K

CA408
4.7U_0402_6.3V6M

CA410
0.1u_0201_10V6K
1 1 1 1 1 1 2

+3V_AUD_IO +3VD_AUD +3VALW_AUD +5VA_AUD

D D
+3VALW +3V_AUD_IO
+5VD_AUD +3VL +2.25V
1 2
RA725 0_0603_5%
2 2 1

CA412
2.2U_0402_10V6-K
+3VALW_PCH

CA433
0.1u_0201_10V6K

CA411
0.1u_0201_10V6K
UA3

51

46

19

10

45

43
1 1 2

7
DVDD
PVDD2

PVDD1

AVDD1
DVDD-IO

VREF
VD33STB
+3VD_AUD

RPA1
2 3 CODEC_I2C_SCL SPK_L+ 47
1 4 CODEC_I2C_SDA SPK-OUT-LP 44 CA392 1 2 4.7U_0402_6.3V6M
SPK_L- 48 LDO1-CAP
2.2K_0404_4P2R_5% SPK-OUT-LN 41 CA393 1 2 4.7U_0402_6.3V6M
SPK_R- 49 MIC1-CAP
SPK-OUT-RN 40
SPK_R+ 50 Line1-VREFO
RA713 2 1 10K_0402_5% SPK-OUT-RP 39 MIC1_VREF_R RA700 1 2 2.2K_0402_5%
+3VD_AUD Mic1-VREFO-R/AGPO-1
RA705 2 1 0_0402_5% 52
44 EC_MUTE# EAPD+PD#/GPIO_11 38 MIC1_VREF_L 1 2 2.2K_0402_5%
RA699
RA706 2 1 33_0402_5% 53 Mic1-Vref_O-L
35 DMIC_CLK DMIC-CLK1 37 MIC1R_SLEEVE
RA707 2 1 0_0402_5% 54 Mic1-R/Sleeve
35 DMIC_DATA DMIC-DATA1 MIC1L_RING2
36
35 I2S_MCLK
RA7101 2 22_0402_5% 55
I2S_MCLK ALC3268-CG Mic1-L/Ring2

Line1-L
35
RA7121 2 22_0402_5% 56
35 I2S_BCLK I2S_BCLK 34
RA7111 2 22_0402_5% 1 Line1-R
35 I2S_LRCLK I2S_LRCLK A_HP_OUTR 2 47_0402_1% A_HP_OUTR_R
RA747 1 2 100K_0402_5% 33 RA741 1
2 HP_Out-R DA10 CA323
C C
GPIO_1/DMIC_CLK2 32 A_HP_OUTL 2 47_0402_1% A_HP_OUTL_R RA697
RA742 1 44 BEEP#
2 0.1u_0201_10V6K
change to main source SCS00007P00 01/16 JT RA7141 2 22_0402_5% 3 HP_Out-L 1 1 2 1 2 PC_BEEP
35 I2S_OUT I2S_OUT 31 -1.8V CA394 1 2 2.2U_0402_10V6-K 3
CPVEE 8 PCH_BEEP
D4026 1 2 RA735 2 1 0_0402_5% 4 1K_0402_5%
35,44 WOV_IRQ GPIO_2/DMIC DATA2 30 LBAT54CWT1G_SOT323-3
RA708 2 1 0_0402_5% 5 CPVREF
LRB751V-40T1G_SOD323-2 35 I2S_IN I2S_IN

2
29 +1.8V CA395 1 2 2.2U_0402_10V6-K
RA709 1 2 100K_0402_5% 6 CPVPP RA696
+3VD_AUD HD-I2S SEL 28 CA396 1 2 2.2U_0402_10V6-K 10K_0402_5%
@ 1 PAD 8 CBN1
TA1 GPI-JD1
RA716 2 1 100K_0402_1% 27
A_PLUG_IN +3VD_AUD CBP1

1
RA715 1 2 200K_0402_1% HDA_JD2 9
CA419 1 2 0.1u_0201_10V6K GPI-JD2 26 CA397 1 2 2.2U_0402_10V6-K +1.8VA_AUD
@ CODEC_I2C_SDA 11 CBP2
35 CODEC_I2C_SDA I2C -SDA 25
CODEC_I2C_SCL 12 CBN2
35 CODEC_I2C_SCL I2C-SCL 24
HDA_BITCLK_AUDIO RA717 1 2 22_0402_5% 13 CPVDD/AVDD2
2 1

CA399
4.7U_0402_6.3V6M
8 HDA_BITCLK_AUDIO CA420 1 2 22P_0402_50V8-J MHDA BCLK 23 PC_BEEP

CA398
0.1u_0201_10V6K
HDA_SYNC_AUDIO 14 PCBEEP
8 HDA_SYNC_AUDIO MHDA SYNC 22 +1.5V
HDA_RST_AUDIO# RA701 2 @ 1 0_0402_5% 15 LDO2-CAP 1 2
1

CA400
4.7U_0402_6.3V6M
8 HDA_RST_AUDIO# MHDA RESET 21 +0.45V
HDA_SDIN0 RA698 2 1 33_0402_5% PCH_HDA_SDIN0_R 16 VBG_OUT
2 1

CA401
4.7U_0402_6.3V6M
8 HDA_SDIN0 MHDA SDATA In

CA402
0.1u_0201_10V6K
HDA_SDOUT_AUDIO 17 42 2
8 HDA_SDOUT_AUDIO MHDA SDATA OUT AVSS1
+1.2V 18 20 1 2
LDO3-CAP AVSS2
1
CA391
4.7U_0402_6.3V6M

57
TPAD

MIC1R_SLEEVE 2

MIC1L_RING2

B A_HP_OUTL_R B
HDA_RST_AUDIO#
A_HP_OUTR_R
RA1 1 @ 2 0_0402_5% HDA_SYNC_AUDIO
A_PLUG_IN
RA4 1 @ 2 0_0402_5% DMIC_CLK HDA_SDOUT_AUDIO
AZ5123-01F.R7GR_DFN1006P2X2

AZ5123-01F.R7GR_DFN1006P2X2

AZ5123-01F.R7GR_DFN1006P2X2

AZ5123-01F.R7GR_DFN1006P2X2

AZ5123-01F.R7GR_DFN1006P2X2

EMC_NS@
RA6 1 @ 2 0_0402_5% DMIC_DATA RA27 1 2 HDA_BITCLK_AUDIO
27_0402_5%

EMC_NS@

EMC_NS@
HDA_SDIN0
1

DA5 DA6 DA7 DA8 DA11 RA9 1 @ 2 0_0402_5%

EMC_NS@

EMC_NS@

EMC_NS@

EMC_NS@

EMC_NS@
1

100P_0201_25V8J

100P_0201_25V8J
RA12 1 @ 2 0_0402_5% 1 1

22P_0201_25V8

22P_0201_25V8
68P_0402_50V8J

33P_0201_50V8-J

33P_0201_50V8-J
RA13 1 @ 2 0_0402_5% 1 1 1 1 1
2 2
2

CA37

CA38
2

2 2 2 2 2
GND GNDA

CA22

CA23

CA24

CA25

CA26
EMC_NS@ EMC_NS@ EMC_NS@ EMC_NS@ EMC@ Use 250mils wide trace bridging For EMI
AGND and DGND at codec
FOR ESD Close to Connector For EMI

JSPK1
15_0402_5% 1 CD@ 2 RA25 SPK_R+ RA26 EMC@ 1 2 BLM15PX800SN1D SPK_R+_CONN 1
JHP1 15_0402_5% 1 CD@ 2 RA29 SPK_R- RA31 EMC@ 1 2 BLM15PX800SN1D SPK_R-_CONN 2 1
MIC1R_SLEEVE 4 15_0402_5% 1 CD@ 2 RA32 SPK_L+ RA30 EMC@ 1 2 BLM15PX800SN1D SPK_L+_CONN 3 2
EMC_NS@ G/M SPK_L- SPK_L-_CONN 3
15_0402_5% 1 CD@ 2 RA33 RA34 EMC@ 1 2 BLM15PX800SN1D 4
RA719 1 2 C2643 2 1 A_HP_OUTL_R 1 4 5
EMC_NS@ 0_0402_5% 1000P_0201_50V7-K L GND1 6
A_PLUG_IN 5 GND2

EMC@

EMC@

EMC@

EMC@
CD@

CD@

CD@

CD@

6 5 HIGHS_WS83040-S0171-HF
EMC_NS@
220P_0201_25V7-K

220P_0201_25V7-K

220P_0201_25V7-K

220P_0201_25V7-K

6 ME@

470P_0201_50V7-K

470P_0201_50V7-K

470P_0201_50V7-K

470P_0201_50V7-K
A_HP_OUTR_R 2 2 2 2 1 1 1 1
RA718 1 2 C2642 2 1 2
EMC_NS@ 0_0402_5% 1000P_0201_50V7-K R
A A

CA31

CA32

CA33

CA34
MIC1L_RING2 1 1 1 1 2 2 2 2
3
M/G 1116 update symbol
CA27

CA28

CA29

CA30

7
100P_0201_25V8J

100P_0201_25V8J

MS
1 1
LOTES_AJAK0076-P001A
CA422 CA421 ME@
GNDA EMC@ EMC@
2 2
1130 update symbol
Security Classification LC Future Center Secret Data Title
GNDA Issued Date 2015/08/20 Deciphered Date 2016/08/20 Codec_ALC3268 & Audio jack
GNDA THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
DS321 0.1

Date: Monday, January 16, 2017 Sheet 43 of 61

5 4 3 2 1
 5 4 3 2 1

For EMI RE1 1 2 0_0603_5%

For ESD +3VL
PLT_RST# CLK_PCI_EC RE2 1 2 10_0402_5%
EMC@
1 1 RE3 1 @ 2 0_0603_5%
CE1 CE2 Close EC +3VALW
220P_0201_25V7-K 10P_0201_50V8F
+3VL_EC +3VL_EC +3VL_EC_R
EMC@ EMC@
2 2 CE3 1 2 VCOREVCC
LE1 1 2 0_0603_5%
0.1u_0201_10V6K +3VL_EC All capacitors close to EC

CD@
1 1

0.1u_0201_10V6K

0.1u_0201_10V6K

0.1u_0201_10V6K

0.1u_0201_10V6K

0.1u_0201_10V6K

0.1u_0201_10V6K
1 1 1 @1 1 @ 1 CE4 CE5
0.1u_0201_10V6K 1000P_0201_50V7-K
+3VS +3VL_EC_R
2 2
D 2 2 2 2 2 2 EC_AGND D
Change RE6 to 0ohm jump LE2 1 2 0_0603_5%

CE10

CE11
CE6

CE7

CE8

CE9
RE6 1 @ 2 0_0402_5%
EC_AGND

minimum trace width 12

114
121
127
12

11

26
50
92

74
3
UE1 mil +3VS

VSTBY1
VSTBY2
VSTBY3
VSTBY4
VSTBY5
VCC

AVCC
VBAT

VCORE

VSTBY(PLL)
EC_FAN_SPEED1 RE276 1 2 10K_0402_5%
EC_FAN_SPEED RE10 1 2 10K_0402_5%
EC_FAN_PWM RE11 1 @ 2 10K_0402_5%
RE56 1 2 0_0402_5% 4 24 PWR_LED#
7 KBRST# 1 2 0_0402_5% 5 KBRST#/GPB6 PWM0/GPA0 25 PWR_LED# 45
RE59 EC_FAN_PWM1
+3VL_EC 7 SERIRQ LPC_FRAME#_EC 6 SERIRQ/GPM6 PWM1/GPA1 BATT_LOW_LED# 45 RE277 1 @ 2 10K_0402_5%
RE60 1 2 0_0402_5% 28
7 LPC_FRAME# 1 2 0_0402_5% LPC_AD3_EC 7 LFRAME#/GPM5 PWM2/GPA2 29 BATT_CHG_LED# 45
RE61 LPC_FRAME# 1 2 10K_0402_5%
7 LPC_AD3 LPC_AD2_EC LAD3/GPM3 PWM3/GPA3 EC_FAN_PWM1 EC_BKL_EN 45 RE7 @
DE1 1 2 @ RE62 1 2 0_0402_5% 8 PWM 30
7 LPC_AD2 LPC_AD1_EC LAD2/GPM2 PWM4/GPA4 EC_FAN_PWM EC_FAN_PWM1 39
RE63 1 2 0_0402_5% 9 31
7 LPC_AD1 LPC_AD0_EC LAD1/GPM1 PWM5/GPA5 EC_FAN_PWM 39 ENBKL RE9 1 @ 2 100K_0402_5%
RB751V-40_SOD323-2 RE64 1 2 0_0402_5% 10 32
7 LPC_AD0 CLK_PCI_EC LAD0/GPM0 PWM6/SSCK/GPA6 EC_VCCST_EN BEEP# 43
7 CLK_PCI_EC
13
LPCCLK/GPM4 LPC PWM7/RIG1#/GPA7
34
EC_ON_5V EC_VCCST_EN 13 CPU_VR_READY RE270 1 @ 2 10K_0402_5%
1 2 WRST# 14 120
WRST# TMRI0/GPC4 EC_ON_5V 53
RE8 1 15 124 SUSP#
9 EC_SMI# EC_RX ECSMI#/GPD4 TMRI1/GPC6 SUSP# 46,57
100K_0402_5% 16
CE12 40 EC_RX EC_TX 17 PWUREQ#/BBO/SMCLK2ALT/GPC7 66 Type_C_I_CTRL
1U_0402_6.3V6K 40 EC_TX PLT_RST# LPCPD#/GPE6 ADC0/GPI0 EC_CCG4_ON 31 Type_C_I_CTRL
32
22 67 NTC_V2 39
2 11,29,40,42 PLT_RST# 23 LPCRST#/GPD2 ADC1/GPI1 68 BATT_TEMP
4 EC_SCI# EC_RTCRST#_ON ECSCI#/GPD3 ADC2/GPI2 BATT_TEMP 52
126
GA20/GPB5 ADC ADC3/GPI3
69
EC_LID_OUT# 34,35,45 +3VL_EC
70
IT8586E/AX ADC4/GPI4
ADC5/DCD1#/GPI5
71
72 Type_C_I_CTRL
CPU_VR_READY
ADP_I 52
61
+3VL_EC

45 KSI[0..7]
KSI[0..7] KSI0 58
LQFP-128L ADC6/DSR1#/GPI6
ADC7/CTS1#/GPI7
73
SYS_PWROK 11
31 EC_SMB_DA3
EC_SMB_DA3 3
RPE4
2
KSI0/STB# EC_SMB_CK3

1
KSI1 59 78 4 1
KSO[0..15] KSI1/AFD# DAC2/TACH0B/GPJ2 SUSWARN# 11 31 EC_SMB_CK3
KSI2 60 79 RE65
45 KSO[0..15] KSI2/INIT# DAC3/TACH1B/GPJ3 H_PROCHOT#_EC EC_STATUS# 41
C KSI3 61
KSI3/SLIN# DAC DAC4/DCD0#/GPJ4
80 100K_0402_5% 2.2K_0404_4P2R_5% C
KSI4 62 81
KSI4 DAC5/RIG0#/GPJ5 ENBKL 34
KSI5 63
KSI5

2
+3VL_EC KSI6 64 85 EC_ON_GPIO 0_0402_5% 1 2 RE57
65 KSI6 PS2CLK0/TMB0/CEC/GPF0 86 EC_ON 39,53
KSI7
KSI7 PS2DAT0/TMB1/GPF1 EC_SMB_CK3 PBTN_OUT# 11
KSO0 36 87
EC_SMB_CK1 1 37 KSO0/PD0 GPF2 88 EC_SMB_DA3
RPE2
EC_SMB_DA1 EC_SMB_DA1
PAD @
IT1
KSO1
KSO1/PD1 Int. K/B PS2 GPF3
2 3 PAD 1 @ KSO2 38 Matrix 89 0_0402_5% 1 2 RE281 CCG4_I2C_INT_EC 31
EC_SMB_CK1 IT2 KSO2/PD2 PS2CLK2/GPF4
1 4 PAD 1 @ KSO3 39 90
1 IT3 40 KSO3/PD3 PS2DAT2/GPF5 CHG_MOD1 41
PAD @ KSO4
IT4 KSO4/PD4
2.2K_0404_4P2R_5% PAD 1 @
IT5
KSO5 41
KSO5/PD5 EXTERNAL SERIAL FLASH GPH3/ID3
96
CAPS_LED# 45
KSO6 42 97 +3VL_EC
KSO6/PD6 GPH4/ID4 CHG_MOD3 41
KSO7 43 98
KSO7/PD7 GPH5/ID5 EC_VCCST_PWRGD 11
KSO8 44 99 EC_STATUS#
+3VS 1 45 KSO8/ACK# GPH6/ID6 PCH_PWROK 11 RE283 1 2 100K_0402_5%
KSI7 PAD @ KSO9
IT6 KSO9/BUSY EC_SPI_CS0#
KSI6 PAD 1 @ KSO10 46 101 USB_ON#
1 IT7 51 KSO10/PE NC1 102 EC_SPI_SI RE15 1 2 10K_0402_5%
RPE3 WRST# PAD @ KSO11
EC_SMB_CK2 IT8 KSO11/ERR# NC2 EC_SPI_SO
1 4
EC_SMB_DA2
KSO12 52
KSO12/SLCT SPI Flash ROM NC3
103
EC_SPI_CLK SUSP# RE18 1 @ 2 100K_0402_5%
2 3 KSO13 53 105
KSO13 NC4
For factory EC flash KSO14 54
KSO14 EC_CCG4_ON RE282 1 2 100K_0402_5%
2.2K_0404_4P2R_5% KSO15 55
56 KSO15 108 ACIN#
41 CHG_MOD2 KSO16/SMOSI/GPC3 AC_IN# LID_SW# SUSP# RE19 1 2 100K_0402_5%
35,43 WOV_IRQ 1 2 57
KSO17/SMISO/GPC5 UART LID_SW#
109
LID_SW# 45
RE278 0_0402_5% SYSON_R RE21 1 2 100K_0402_5%

45 ON/OFF ON/OFF 110 82 RE53 1 2 0_0402_5% PM_SLP_S0# 9,11,13,54 EC_VCCST_EN

EC_ON PWRSW# EGAD/GPE1 RE269 1 @ 2 100K_0402_5%
RE58 2 @ 1 0_0402_5% 111 SM Bus 83 VDDQ_PGOOD 57
EC_SMB_CK1 115 XLP_OUT EGCS#/GPE2 84 EC_VPP_PWREN
52 EC_SMB_CK1 SMCLK1/GPC1 EGCLK/GPE3 EC_VPP_PWREN 55 EC_VCCIO_EN RE268 1 @ 2 100K_0402_5%
EC_SMB_DA1 116
52 EC_SMB_DA1 PECI_EC SMDAT1/GPC2
4 H_PECI RE24 1 2 43_0402_5% 117 GPIO 77
SMCLK2/PECI/GPF6 GPJ1 EC_MUTE# 43
118 100 GPG2
31 CCG4_XRES EC_SMB_CK2 94 SMDAT2/PECIRQT#/GPF7 SSCE0#/GPG2 106
39 EC_SMB_CK2 EC_SMB_DA2 CRX1/SIN1/SMCLK3/GPH1/ID1 SSCE1#/GPG0 EC_DEVICE_ON 34,45
95 104
+3VL 39 EC_SMB_DA2 CTX1/SOUT1/GPH2/SMDAT3/ID2 DSR0#/GPG6 SYSON_R ME_FLASH 8
107 RE271 1 2 0_0402_5% SYSON
DTR1#/SBUSY/GPG1/ID7 119 SYSON 13,57 Add to fix Reset&PWRGD test fail issue
CRX0/GPC0 EC_RSMRST# 11 EC_VCCIO_EN
123 RE55 1 2 0_0402_5% VDDQ_PGOOD CE51 1
CTX0/TMA0/GPB2 EC_VCCIO_EN 13,54 2 0.01U_0201_10V6K
RE27 1 2 0_0402_5% 112 18
VSTBY0 RI1#/GPD0 PM_SLP_S3# 11,29
RE272 1 2 0_0402_5% 125 21 PM_SLP_S4# 11
B 61 EC_VR_ON GPE4 RI2#/GPD1 B
WAKE UP 76 NOVO# 45 PM_SLP_S4#
TACH2/GPJ0 48 EC_FAN_SPEED1 CE50 1 2 EMC_NS@ 1000P_0201_50V7-K
TACH1A/TMA1/GPD7 EC_FAN_SPEED EC_FAN_SPEED1 39
47 EC_FAN_SPEED 39
USB_ON# 33 TACH0A/GPD6 19
41 USB_ON# GINT/CTS0#/GPD5 L80HLAT/BAO/GPE0 WWAN_RESET# 38 PM_SLP_S3# CE21 1 2 EMC_NS@ 1000P_0201_50V7-K
35 20 EC_ON_1.8V
41 USB_CHG_EN RTS1#/GPE5 GPIO L80LLAT/GPE7 EC_ON_1.8V 54,55
93
7 PM_CLKRUN# CLKRUN#/GPH0/ID0
SYSON CE13 1 2 EMC_NS@ 1000P_0201_50V7-K
BKOFF# 2
34 BKOFF# CK32KE/GPJ7
+3VL 11 AC_PRESENT
128
CK32K/GPJ6 Clock
EMC Request

RE34 1 2 H_PROCHOT# 4
52,61 VR_HOT# 0_0402_5%
AVSS
VSS1

VSS2
VSS3
VSS4
VSS5
VSS6

EC_RTC_RST# 10

1
RE36 1 @ 2 10K_0402_5% BKOFF# 1
IT8586E-AX_LQFP128_14X14 RE267 CE14
113
122
1

27
49
91

75

RE38 2 1 100K_0402_5% LID_SW# 100_0402_5% 47P_0201_25V8-J

EMC_NS@
2

1
QE3 D

1 2
EC_RTCRST#_ON 2
RE40 1 2 10K_0402_5% BKOFF# QE1 D G
EC_AGND H_PROCHOT#_EC 2 +3VL
G @ S 2N7002KW_SOT323-3

3
1
2N7002KW_SOT323-3 S RE50
for EC version update to EX, manual modify PN to FX

2
100K_0402_5%
RE42 Power side install @
100K_0402_5%

2
@

1
+3VL +3VS ACIN# RE262 1 2 0_0402_5%
PECI_EC EMC_NS@ CE15 1 2 47P_0201_25V8-J
+3VL_EC
BATT_TEMP

1
EMC_NS@ CE16 1 2 100P_0201_25V8J 1 D QE2
A GPG2 RE43 2 @ 1 10K_0402_5% CE19 2 A
ACIN 52
ACIN# EMC_NS@ CE17 1 2 100P_0201_25V8J 0.1u_0201_10V6K G
GPG2 RE44 2 1 10K_0402_5% EC_SPI_CS0# RE45 1 2 0_0402_5% SPI_CS0#
SPI_CS0# 7 NOVO# ON/OFF @ CE18 1 2 1U_0402_6.3V6K 2 S 2N7002KW_SOT323-3

3
GPG2 RE46 2 @ 1 10K_0402_5% @
EC_SPI_SI RE47 1 2 0_0402_5% SPI_SI
SPI_SI 7
when mirror, GPG2 pull high
EC_SPI_SO SPI_SO
when no mirror, GPG2 pull low RE48 1 2 0_0402_5%
SPI_SO 7 1
CE48
0.01U_0201_10V6K Title
EC_SPI_CLK RE49 1 2 0_0402_5% SPI_CLK EMC_NS@
Security Classification LC Future Center Secret Data
SPI_CLK 7 2
Issued Date 2015/08/20 Deciphered Date 2016/08/20 EC ITE8586LQFP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
DS321 0.1

Date: Monday, January 16, 2017 Sheet 44 of 61

5 4 3 2 1
 5 4 3 2 1

Novo button Finger Print Connector +3VS

ON/OFF switch +3VALW
+3VS_FP
Q176
+3VL

1
NOVO_BTN# R1056 LP2301ALT1G_SOT23-3
10K_0402_5% MS@
ON/OFFBTN# MS@ 3 1

D
2

1
R82 +3VS 1

1
AZ5123-01F.R7GR_DFN1006P2X2
SW2

2
100K_0402_5% R1032 C8651

G
EVQP7L01K_4P D24

2
1
D25 1 2 0.1u_0201_10V6K

1
AZ5123-01F.R7GR_DFN1006P2X2
MS@

1
1
EMC@ 2

1
100K_0402_5% 1
MS@ C8650
R1066

4
0.01U_0201_10V6K

2
100K_0402_5%
MS@

4
NOVO_BTN# MS@ 2
NOVO# R261 1 2

1
44 NOVO# D
0_0402_5% EMC@ 1 MS@ 2 0_0402_5% 2
R1057 Q175

2
8 FP_PWR_EN
1 2 0_0402_5%
G 2N7002KW_SOT323-3
R1082
34,44 EC_DEVICE_ON MS@
1026 change @ S
1

3
D C8649 D
0.1u_0201_10V6K
MS@
2
+3VS +3VS_FP
+3VL LID switch
USB20_P3_R R1031 1 2 0_0402_5%
USB20_N3_R NOMS@

2
R114 R1096 1 2 0_0402_5%
100K_0402_5%

2
JFP1
1

EMC_NS@

D4024
AZ5425-01F.R7GR DFN1006P2E
EMC_NS@

D4023
AZ5425-01F.R7GR DFN1006P2E
1

2
EXC24CH900U_4P 2 1
C1104

1
U14 100P_0201_25V8J USB20_P3 4 3 USB20_P3_R 3 2
ON/OFFBTN# R119 1 2 0_0402_5% ON/OFF 1 9 USB20_P3 4 3 4 3
ON/OFF 44
GND 2 5 4
1 LID_SW# USB20_N3 USB20_N3_R USB20_P3_R 5
C1105 3 1 2 6

1
J5 1 2 @ 0.01U_0201_10V6K OUTPUT LID_SW# 44 9 USB20_N3 1 2 USB20_N3_R 6
7
7

1
L34 EMC_NS@ 8
SHORT PADS 2 +VCC_LID +3VS_FP 8
+3VL R264 1 2 2
0_0402_5% VCC 9
R1097 1 2 0_0402_5%
10 GND1
AH9247-W-7_SC59-3
GND2
1116 change HIGHS_FC5AF081-2931H
ME@

K/B Connector KSI[0..7]

KSI[0..7] 44
JKB1
KB Backlight Connector +5VS

KSO[0..15] +5VALW
KSO[0..15] 44 32 33 +VCC_KB_LED
ON/OFFBTN# 31 32 GND1 34
PWR_LED#_R 31 GND2 Q31
R279 1 2 0_0402_5% 30

1
44 PWR_LED# 30 R265 LP2301ALT1G_SOT23-3
29 10K_0402_5%
EMC_NS@ 29
PWR_CAPS_LED C133 1 2 100P_0201_25V8J 28 3 1

D
27 28
KSI1 26 27
KSI7 25 26 1 1

2
25 R266 C1106 C1107

G
KSI6 24

2
24 1 2 10U_0603_6.3V6M 0.1u_0201_10V6K
KSO9 23
KSI4 22 23 2 2
22 100K_0402_5%
KSI5 21

1
KSO0 20 21 C1108
KSI2 19 20
EMC@ 19 0.1U_0402_10V6-K

2
CAPS_LED# C117 1 2 100P_0201_25V8J KSI3 18
KSO5 17 18
PWR_LED#_R KSO1 16 17
C C118 1 2 100P_0201_25V8J 16 C
KSI0 15
KSO2 14 15

1
EMC@ 14 D
KSO4 13
13 1 R10248 2 2 Q32
KSO7 12 44 EC_BKL_EN
12 0_0402_5%
G 2N7002KW_SOT323-3
KSO8 11
KSO6 10 11
10 1 S
CAPS_LED# PWR_LED#_R KSO3 9

3
9 C1109
KSO12 8 0.1u_0201_10V6K
KSO13 7 8
6 7 +5VS
KSO14 2 JKBL1
KSO11 5 6
+VCC_KB_LED 1
KSO10 4 5 KB_BL_CTL 1
1

4 2
D22 D23 KSO15
CAPS_LED#
3
3 1 R10252 2 3 2
3
1

AZ5123-01F.R7GR_DFN1006P2X2 AZ5123-01F.R7GR_DFN1006P2X2 2 4
1 2 44 CAPS_LED# PWR_CAPS_LED 1 2 0_0402_5% 4
EMC@ EMC@ +3VALW R84

0.1u_0201_10V6K
1 @ 1
150_0402_5% 5

C1110
KB_BL_CTL 6 GND1
HIGHS_FC8AF321-3201H
GND2
2

1
ME@

1
D 2
@ HIGHS_FC1AF041-1201H

0_0402_5%
1 R10251 EC_BKL_EN_R

R10250
2 2
2

Q177
1116 change 0_0402_5%
G ME@

For EMC @ S 1026 change

2
@

3
2N7002KW_SOT323-3

TP/B Connector

TP_PWR
+3VS
JTP1
NOMS@ 2
R141 1 1
0_0402_5% PM_I2C_SCL1 2 1 7
8 PM_I2C_SCL1 PM_I2C_SDA1 3 2 GND1
8 PM_I2C_SDA1 PCH_TP_INT# 3

0.1u_0201_10V6K
1 R338 1 2 0_0402_5% 4 8
4 PCH_TP_INT# EC_LID_OUT# EC_LID_OUT#_TP 4 GND2
D4021 1 2 5
34,35,44 EC_LID_OUT# 6 5
6
PM_I2C_SCL1 2 LRB751V-40T1G_SOD323-2

C114
PM_I2C_SDA1 ELCO_04-6809-606-110-846-+
ME@

2
B B

EMC@

D4020
AZ5425-01F.R7GR DFN1006P2E
EMC@

D4019
AZ5425-01F.R7GR DFN1006P2E
2

2
+3VS
1202 change
PM_I2C_SCL1 SP01001WB00 2nd source for SP01001WX00
PM_I2C_SDA1

1
1

100P_0201_25V8J

100P_0201_25V8J

2
TP_PWR
1 1

EMC_NS@

EMC_NS@
RG48
100K_0402_5%
2 2
For EMC

C115

C116

1
PCH_TP_INT#

2
RG49
100K_0402_5%

EC_LID_OUT#_TP

1
BATT_CHG_LED#
44 BATT_CHG_LED# +3VS

+3VALW
1

LED2
D18 TP_PWR
1

AZ5123-01F.R7GR_DFN1006P2X2 3 Q174

1
EMC_NS@ R1059 LP2301ALT1G_SOT23-3
2 1 2 150_0402_5% 10K_0402_5% MS@
R143 +3VALW 3 1
MS@

D
2

1
1
2

2
R1030 C8648

G
2
1 2 0.1u_0201_10V6K
B2102UDBS05P-000433_AMBER_WHITE MS@
BATT_LOW_LED# 100K_0402_5% 2
44 BATT_LOW_LED# +3VS 1
MS@ C8647
0.01U_0201_10V6K
MS@
1

2
1

D19
R1067
1

AZ5123-01F.R7GR_DFN1006P2X2
100K_0402_5%
EMC_NS@
MS@
1

D
2

R1058 1 MS@ 2 0_0402_5% 2 Q173

8 TOUCHPAD_PWR_EN
2N7002KW_SOT323-3
2

EC_DEVICE_ON G
R1083 1 2 0_0402_5%
MS@
@
2

1 S
3

A C8646 A
0.1u_0201_10V6K
MS@
2

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 KBD/PWR/IO/LED/TP Conn.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Re v
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. DS321
Date: Monday, January 16, 2017 Sheet 45 of 61
5 4 3 2 1
 A B C D E

Load Switch
+5VALW To +5VS +3VS, C173 --> 2.74ms
+3VALW To +3VS +5VS, C176 --> 2.03ms
VIN 5V and 3.3V (VBIAS=5V), IMAX(per channel)=6A, Rds=16mohm Need Short
R64 1 2 0_0402_5% 3VSON
+5VALW U13 +5VS
1 14 J12 @
2 IN1_1 OUT1_2 13 +5VS_LS 1 2
1 IN1_2 OUT1_1 1 2 1

1 5VSON 3 12 C176 1 2 1000P_0201_50V7-K JUMP_43X118 1

SUSP# R27 1 2 0_0402_5% 5VSON EN1 CT1 C174
C177 4 11 0.1u_0201_10V6K
+5VALW VBIAS GND
1U_0402_6.3V6K @
+3VALW 2 3VSON 5 10 C173 1 2 2200P_0402_25V7-K 2 +3VS
1 1 EN2 CT2 J11 @
C180 C179 6 9 +3VS_LS 1 2
1U_0402_6.3V6K 1U_0402_6.3V6K 7 IN2_1 OUT2_2 8 1 2
2 2 IN2_2 OUT2_1 JUMP_43X118
1 1
15 C175
GPAD 0.1u_0201_10V6K
C178 Need Short
1U_0402_6.3V6K G5016KD1U_TDFN14_2X3 @
2 @ 2
Change the main source to SA000067600 (GMT) 7/16

2 +3VALW Need short +3VALW_PCH 2

+1.8VALW +1.8VS
J7 @
1 2
1 2 Q35 0.6A
JUMP_43X79 3 1

D
1 LP2301ALT1G_SOT23-3 1

C201
0.1u_0201_10V6K

C8637
0.1u_0201_10V6K
G
2
2 2
1 1

C204
0.1u_0201_10V6K

C205
0.1u_0201_10V6K
SUSP 1 2
R201 0_0402_5%
2 2

1
1

C202
0.1u_0201_10V6K
R202
@ 470K_0402_5%
2

2
8/29 Add +1.8VS Circuit for Audio wei
3 3

+5VLP +5VALW
For DisCharge
1

R156 R157 +0.6VS +DDR_2.5V

100K_0402_5% 100K_0402_5%
@
1

1
2

R159 R278
SUSP 47_0603_5% 200_0402_5%
@ @
2

2
1

1
Q10 D Q11 Q33
2
44,57 SUSP# G
2 SUSP 2 SUSP
S 2N7002KW_SOT323-3
3

LSI1012XT1G_SC-89-3 LSI1012XT1G_SC-89-3
3

3
@ @

4 4
08/29: Need double check enable signal and the resistance

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 DC V TO VS INTERFACE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. DS321
Date: Monday, January 16, 2017 Sheet 46 of 61
A B C D E
 5 4 3 2 1

B2 A2
D
+3VLP PCH_PWR_EN# 2 D

Q25,+3V_PCH

V
V
AC A1
MODE VIN
A2 A4 B5

V V
3 +3V_PCH
PU301 PU904

V
B+
+3VALW
BATT BATT V 1
DPWROK_EC
V
MODE

V V V
B1
4
PCH_RSMRST#
EC 14
PM_DRAM_PWRGD
5 PBTN_OUT#

V
EC_ON PM_SLP_S3# PCH 15
A3 B4
PM_SLP_S4# H_CPUPWRGD CPU

V V
PM_SLP_S5#
PM_SLP_SUS# 6
CPU_PLTRST# 16

V
12
PCH_PWROK

V V
C C

B3 13
SYS_PWROK

V
ON/OFF V
NOVO

NVDD_PWR_EN
(DIS)
Vb
+VGA_CORE
+1.35V

V
11 VR_REDY SYSON 7 PU801
PU501

V
DGPU_PWROK
DGPU_PWR_EN
10 Va (DIS)
+1.5VS_VGA

V
PU901 VR_ON Q31

V
PU601
V

+CPU_CORE

V
+5VS

B B
Q32 +1.05VSP_VGA

V
SUSP#,SUSP +3VS PU702
9 VGA

V
PU602

V
+1.5VS +3VS_VGA

V
Q27
PU502

V
+0.675V
8
SUS_VCCP PU701
V
+1.05VS

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 Power sequence block
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. DS321
Date: Monday, January 16, 2017 Sheet 47 of 61
5 4 3 2 1
 5 4 3 2 1

PCB And LOGO Config

ZZZ1
D D
DA8@
LOGO
PCB
PCB 149 NM-B331 REV0 M/B
ZZZ2 i7@ ZZZ10 I5@ ZZZ11 I3@

CPU
Intel i7-7500U 2.7G/2C/4M/H Intel i5-7200U 2.5G/2C/3M/H Intel i3-7100U 2.4G/2C/3M/H

ZZZ4 MIC8G@ ZZZ5 MIC4G@ ZZZ6 SAM8G@ ZZZ7 SAM4G@ ZZZ9 HY4G@

VRAM
MICRON8G MICRON 4G SAMSUNG 8G SAMSUNG 4G HYNIX 4G

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 Virtual symbol
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. DS321
Date: Monday, January 16, 2017 Sheet 48 of 61
5 4 3 2 1
 5 4 3 2 1

PCB Fedical Mark PAD EMI-STOP_SUL-15A2

FD1 FD2 FD3 FD4 FD5 FD6
SH1 ME@ SH2 ME@

1 1

1
1 1

Pad_o2p0x2p2d2p0x2p2n SPRING_FINGER_6.2X1.64 SPRING_FINGER_6.2X1.64

H1
HOLEA

D EMI-STOP_SML-08A2M D
1

Pad_o2p0x2p2d2p0x2p2n ME@
SH3 ME@ SH4
1
2 1 1
pad_c5p0d2p3 3 2
3
1

SHIELDING_SML-08A2M_8X1P5_3P
H2 H3 H19 H20
HOLEA HOLEA HOLEA HOLEA SPRING_FINGER_6.2X1.64

SH5 ME@ SH6 ME@

1

1
1 1
1 1
pad_c5p0d2p3 pad_c5p0d2p3 pad_c5p0d2p3 pad_c5p0d2p3

pad_c5p0d3p2 SPRING_FINGER_6.2X1.64 SPRING_FINGER_6.2X1.64

H4 H5 H6 H7 H8 H9 H10 H11 H22

SH7 ME@ SH8 ME@
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
1 1
2 1 2 1
3 2 3 2
3 3
1

1
SHIELDING_SML-08A2M_8X1P5_3P SHIELDING_SML-08A2M_8X1P5_3P

pad_c5p0d3p2 pad_c5p0d3p2 pad_c5p0d3p2 pad_c5p0d3p2 pad_c5p0d3p2 pad_c5p0d3p2 pad_c5p0d3p2 pad_c5p0d3p2 pad_c5p0d3p2

SH9 ME@ SH10 ME@

pad_c4p5d2p3 1
2 1
1
2 1
3 2 3 2
C H13 H15 H16 H12 3 3 C
HOLEA HOLEA HOLEA HOLEA
SHIELDING_SML-08A2M_8X1P5_3P SHIELDING_SML-08A2M_8X1P5_3P
1

pad_c4p5d2p3 pad_c4p5d2p3 pad_c4p5d2p3 pad_c4p5d2p3

pad_o1p2x2p8d1p2x2p8n
H17
HOLEA
1

pad_o1p2x2p8d1p2x2p8n

pad_o4p0x2p0d4p0x2p0n
H18
HOLEA
1

pad_o4p0x2p0d4p0x2p0n

B Pad_cb4p5d2p1 B

H23 H24
HOLEA HOLEA
1

Pad_cb4p5d2p1 Pad_cb4p5d2p1

Pad_ct4p0b4p5d2p1
H25
HOLEA
1

Pad_ct4p0b4p5d2p1

Pad_o7p0x9p0d4p0x6p0
H26
HOLEA
1

Pad_o7p0x9p0d4p0x6p0
A A

PAD_C2P3D2P3N
H21
HOLEA

Security Classification LC Future Center Secret Data Title

1

Issued Date 2015/08/20 Deciphered Date 2016/08/20 Hole

PAD_C2P3D2P3N
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
DS321 0.1

Date: Monday, January 16, 2017 Sheet 49 of 61

5 4 3 2 1
 5 4 3 2 1

Silergy
SY8104ADC +1.0VALW/3.8A
D
_TSOT23-6 D
Converter
SUSP# EN PGOOD
FOR PCH
PAGE 54

TYPE-C MPS
Adaptor
NB682GD-Z VCCIO/3.1A
_QFN13_2X3
V9B+ SUSP# EN Converter PGOOD
FOR PCH
PAGE 54

MPS
NB682GD-Z VCCPRIM/2.57A
_QFN13_2X3
Converter
SUSP# EN PGOOD
FOR PCH
C PAGE 54 C

+5VLP/ 100mA
TI Silergy GMT
BQ25700RSNR SY8288C G9661-25ADJRE1U
_QFN32_4X4 +5VALW/8A
Converter TDFN10_3X3
Battery Charger LDO +1.8VALW/1A
EC_ON EN FOR SYSTEM PGOOD 5VALW_PWRGD FOR SYSTEM/DDR4/GPU
Switch Mode
EN PGOOD
PAGE 52
PAGE 55
Silergy +3VLP/ 100mA

SY8286B GMT
Converter +3VALW/ 6A G9661-25ADJRE1U
SMBus
FOR SYSTEM TDFN10_3X3
EN PGOOD +2.5V/1A
EC_ON EN PGOOD ALW_PWRGD
LDO
FOR DDR4
+5VLP/ 100mA EN PGOOD
Silergy PAGE 55
B B

Battery SY8286C +5VALW/8A

Converter
Polymer FOR SYSTEM
EC_ON EN PGOOD ALW_PWRGD
2S2P

MPS +1.2V/6A
NB686GQ-Z
SYSON S5
QFN16_3X3
SUSP# S3 Switch Mode +0.6VS/1A
FOR DDR4
PAGE 57 PGOOD

MPS CPU Core/64A

MP2939*1+MP86901*2
+MP86901*1+MP86901*1 VCCGT/28A

Switch Mode VCCSA/5A

VR_ON
EN FOR CPU Core PGOOD
A A
VGATE
PAGE 61 PGOOD_NB

Security Classification LC Future Center Secret Data Title

Issued Date 2013/08/08 Deciphered Date 2013/08/05 Power Diagram

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
DS321 0.1

Date: Monday, January 16, 2017 Sheet 50 of 61

5 4 3 2 1
 5 4 3 2 1

D PJ1001 D
2 1
2 1

JUMP_43X79 @

PL1002
HCB2012KF-121T50_0805
ADIN_1 1 2
EMC_NS@ +VIN_20V

PL1003
HCB2012KF-121T50_0805
1 2

EMC_NS@
Try to delete

2.2_0805_5%
1
2

PR1004
PC1004 PC1003
0.1U_0201_25V6-K 0.1U_0201_25V6-K

1
EMC@ EMC@

10U_0805_25V6K
1
PC1002
C C

2
B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2016/01/20 Deciphered Date 2016/01/20 PWR-XXXX
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number Re v
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom DS321 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, January 16, 2017 Sheet 51 of 61
5 4 3 2 1
 5 4 3 2 1

+3VL

1
PR512
PQ503
+VIN_20V PQ501 AON7408L_DFN8-5 V9B+ 100K_0402_5%

AON7380_DFN8-5

2
1
PL501
2 S1 5
8A
PR515 1 1 2 3 S2 D 44 BATT_TEMP
S1 S3 1

10U_0805_25V6K

10U_0805_25V6K
1 2 5 2
D S2

47U_B3_10VM_R45M
G

1
3 2.2UH_PCMB062D-2R2MS_7A_20% +
S3

0.047U_0402_25V7K

0.047U_0402_25V7K
0.01_0805_LE_1%

PC501

PC518

PC510
10U_0805_25V6K

0.1U_0402_25V6

4
G
1

1
EMC_NS@

PC529

PC517
4.7_0805_5%
10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

2
2
1

1
BATT+

EMC@
PC535

PR529
PQ504

4
PR514 PR506

EMC_NS@
PC537

PC514

PC534

PC536

PC513

4.7_0805_5%
2

CHARGER_BST_R1 2

CHARGER_BST_R2 2
5

5
D
10_0402_5% 10_0402_5% AON7405_DFN8-5 D

PC516
2

2
1 ME@

AON7408L_DFN8-5
PF503

PR534
PR520

D
2
AON7754_DFN8-5
2
8A 12A_24V_F1206HB12V024T/M 8
8

1
@ 3 5 1 2 1 2 7

PQ502
EC_SMCA 6 7

PQ505
@ @ @ EC_SMDA 6

2
1 2 4 4 0.01_0805_LE_1% 5

CHG_SN
G G BATT_TEMP 5

0.1U_0402_25V6
1
4 10

PC508
4 GND2

10U_0805_25V6K
1000P_0402_50V7K
4
0.01U_0402_25V7K 3 9

0.01U_0402_25V7K

100P_0402_50V8J
PC505

S3
S2
S1

S1
S2
S3
1U_0402_25V6-K
3 GND1

1000P_0402_50V9-J
1

1
CHG_SN2
2

100P_0402_50V8J
0.1U_0402_25V6

EMC_NS@
CHARGER_SW1
2

2
1

1
1
PC504

PC503

PC523
PR508

PC524

PC512

PC533

100_0402_1%

100_0402_1%
1

3
2
1

1
2
3
1

PC522
0_0402_5%

PC520

0_0402_5%

0_0402_5%
CHARGER_SW2
CHARGER_BGATE_N 2 CHARGER_BGATE
RTC_VCC
2

2
1

PR533

PR517
JBATT5

0.1U_0402_25V6

0.1U_0402_25V6
2

2
1000P_0402_50V9-J
EMC_NS@
2

1
SUYIN_125022HB008M202ZL

PC530

PC506
1

1
PC515
EMC@

1
30 25 PC519
BTST1 BTST2

1
1000P_0201_25V7K

2
32 23
SW1 SW2 @
CHARGER_LG1 29 26 CHARGER_LG2
LODRV1 LODRV2 PC509
CHARGER_HG1 CHARGER_HG2

2
31 24 1 2
HIDRV1 HIDRV2

PR504

PR521
CHARGER_VBUS 1 22 0.1U_0402_25V6
VBUS VSYS
CHARGER_ACN 2 21 CHARGER_BGATE_N 1 2
PR503 10_0402_5%
ACN BATDRV#
CHARGER_ACP 3 20 CHARGER_SRP EC_SMB_CK1
ACP SRP PR516 1 2 10_0402_5%
7 19 CHARGER_SRN
VDDA SRN BQ25700_VDD PC525
BQ25700_VDD VDDA 2.2U_0603_10V6-K
PR507

383K_0402_1%
CHARGER_ILIM EC_SMB_DA1

1
6 28 1 2
1 2 PC526 ILIM_HIZ REGN

PR502
1 2 PR530 1 2 40.2K_0402_1% PC527 2 1 15P_0402_50V8J
10_0603_5% 16 17 PC528 VDDA
COMP1 COMP2
1

1800P_0402_50V7-K PC521 1 2 100P_0402_50V8J PR531 2 1 20K_0402_1% 2 1

2

PC502
1U_0402_10V6K 2 1 0_0402_5% CHARGER_PROCHOT# 11 18 CHG_PRES
44,61 VR_HOT# PR501 680P_0402_50V7K
PROCHOT# CELL_BATPRES
2

220K_0402_1%

137K_0402_1%
CHARGER_SCL 13
1

1
PR513 2 1 0_0402_5% PR518
31,44 EC_SMB_CK1 SCL CHARGER_IADP
8 1 2
PR509

PR527
CHARGER_SDA 12 IADPT ADP_I 44
PR510 2 1 0_0402_5% 0_0402_5%
31,44 EC_SMB_DA1 SDA CHARGER_IDCHG
9
CHARGER_CHGOK 4 IBAT PR511
CHRG_OK CHARGER_PMON CHG_PRES
2

2
+3VL BQ25700_VDD 10 1 2
PR519 5 PSYS PSYS_CPU 61
PR524 @ 0_0402_5%

30K_0402_1%
100K_0402_1%
ENZ_OTG

100P_0201_25V8J

100P_0201_25V8J

100P_0201_25V8J
1

1
2 1 1 2 27 PQ506 D

100K_0402_1%
PGND BATT_TEMP

1
100K_0402_5% 200K_0402_1% 15 2

PR532

PC511

PR505

PC507

PC532
CMPOUT 33 G

PR528
C PR522 2 1 0_0402_5% 14 PAD C
44 ACIN CMPIN

2
S DMN63D1L-7 1N SOT23-3

3
PR523 @

2
1 2 PR526
249K_0402_1% PU503 1 2
VDDA PR525
BQ25700RSNR_QFN32_4X4 1M_0402_5%

2 1
2

10K_0402_5%

10K_0402_5%
PR535

BACK UP OTG function pull high

1

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/12/08 Deciphered Date 2016/12/08 PWR_NVDC Charger

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
D 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. DS321
Date: Monday, January 16, 2017 Sheet 52 of 61
5 4 3 2 1
 5 4 3 2 1

+3VALW

1
PR601
V9B+ 0106 change PC603 and PC604 from 10U_0805_25V6K to 4.7U_0603_16V6-K 100K_0402_5%
add PC666 and PC669
@
@ PU603

2
4A 2
PJ601
1 +3VALW_VIN 5 9 +3VALW_PG
2 1 4 IN1 PG 1 +3VALW_BS 1 2 +3VALW_PG 31

4.7U_0603_16V6-K

4.7U_0603_16V6-K

4.7U_0603_16V6-K

4.7U_0603_16V6-K
3 IN2 BS PC602

PC601 EMC@
+3VALW

0.1U_0201_25V6-K
IN3

1
JUMP_43X79 2 0.1U_0603_25V7-M

PC666

PC669

PC603

PC604
IN4 6
LX1
PL601 @
7
GND1 LX2
19 2.2UH +-20% PCMB053T-2R2MS 5.5A PJ602
5A

2
8 20 +3VALW_LX 1 2 +3VALW_P 2 1
18 GND2 LX3 2 1

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M
D GND3 D

1
21
GND4

1
@ @ PR602 JUMP_43X79
+3VALW_EN 12 14 +3VALW_P 4.7_0805_5%

PC605

PC606

PC607

PC608

PC609
+3VALW_VIN 11 EN1 OUT
EN2 EMC_NS@

2
13 +3VALW_FB
FF

2
10
Vout=3.3V± 5%
100mA+3VLP
16 NC1
NC2

+3VALW_SN
@ 15 17 @ Vset=3.37V± 1.5%

1M_0402_5%
0.1U_0201_25V6-K
NC3 LDO

PR603

4.7U_0603_6.3V6K
1
OCP=12A

PC610
SY8286BRAC_QFN20_3X3

1
PC611
OVP=(1.15~1.25)*Vout

1
PC612
1000P_0402_50V9-J UVP=(0.55~0.65)*Vout
EMC_NS@ Fsw=600Khz

2
PC613
PR604
1 2 +3VALW_FB_C 1 2

1K_0402_1%
+3VL 1000P_0201_25V7K
+3VLP @
PJ603
2 1 PL601 PL602 change to 062D from 053T
2 1

JUMP_43X39

+3VALW

1
C C
PR606
100K_0402_5%
V9B+ @
0106 change PC616 and PC617 from 10U_0805_25V6K to 4.7U_0603_16V6-K

2
@ PU602
7A 2
PJ604
1 +5VALW_VIN 5 9 +5VALW_PG +5VALW
2 1 IN1 PG +5VALW_BS +5VALW_PG 55 +5VALW_2
4 1 1 2
4.7U_0603_16V6-K

4.7U_0603_16V6-K

4.7U_0603_16V6-K

4.7U_0603_16V6-K

3 IN2 BS PC615 0.1U_0603_25V7-M PL602 @

PC614 EMC@

PJ653
0.1U_0201_25V6-K

IN3
1

JUMP_43X79 2 2.2UH +-20% PCMB053T-2R2MS 5.5A PJ605

6A
PC630

PC629

PC616

PC617
47U_B3_10VM_R45M

IN4 6 +5VALW_LX 1 2 +5VALW_P 2 1 1 2

1 LX1 2 1 1 2
7 19
PC665

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M
GND1 LX2
2

+ 8 20
GND2 LX3 JUMP_43X79

1
18 JUMP_43X79
GND3
21 PR608 PR607 @

PC622

PC618

PC623

PC619

PC620

PC621
2 GND4 14 +5VALW_OUT 1 2 +5VALW_P
@ OUT
4.7_0805_5%

2
+5VALW_EN 12
+5VALW_VIN EN1 +5VALW_FB
0_0402_5% EMC_NS@
11 13
0106 add PC665 47UF cap
EN2 FF Vout=5V± 3%

2
100mA +5VLP
PR3712
LDO
15 @ @ Vset=5.1V± 1.5%

1+5VALW_SN
0_0402_5% @ 10
0.1U_0201_25V6-K

NC1

4.7U_0603_6.3V6K
EC_ON +3VALW_EN +5VALW_VCC

1
1 2 16 17
OCP=12A
1M_0402_5%

NC2 VCC
1

39,44 EC_ON
PC625

PC624
1U_0603_25V6M
1

1
PR656
OVP=(1.15~1.25)*Vout
PR609

PC626

2
0_0402_5% SY8288CRAC_QFN20_3X3
1 2 +5VALW_EN PC627
UVP=(0.55~0.65)*Vout
2

2
1000P_0402_50V9-J
2

EMC_NS@ Fsw=600Khz

2
PR658
0_0402_5% @ PC628
EC_ON_5V 1 2 +5VALW_EN PR610
1 2 +5VALW_FB_C 1 2
44 EC_ON_5V
PR657
1K_0402_1%
0_0402_5% 1000P_0201_25V7K
1 2 +5VALW2_EN

B B

+3VALW

1
PR655
100K_0402_5%
V9B+ @
0106 change PC661 and PC658 from 10U_0805_25V6K to 4.7U_0603_16V6-K 2
@ PU651
7A 2
PJ652
1 5VALW_VIN 5 9 5VALW_PG
2 1 4 IN1 PG 1 5VALW_BS 1 2 PL651
4.7U_0603_16V6-K

4.7U_0603_16V6-K

4.7U_0603_16V6-K

4.7U_0603_16V6-K

3 IN2 BS +5VALW_2
PC655 0.1U_0603_25V7-M @
PC652 EMC@
0.1U_0201_25V6-K

IN3
1

JUMP_43X79 2 HBME041H-3R3MS PJ651

3A
PC668

PC667

PC661

PC658

IN4 6 5VALW_LX 1 2 5VALW_P 2 1

7 LX1 19 2 1

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M
GND1 LX2
2

8 20
GND2 LX3
1

1
18 JUMP_43X79
21 GND3 PR651 PR652

PC653

PC659

PC660

PC664
GND4 14 5VALW_OUT 1 2 5VALW_P 4.7_0805_5%
@ @ OUT

2
+5VALW2_EN 12
5VALW_VIN EN1 5VALW_FB
0_0402_5% EMC_NS@
11 13
EN2 FF Vout=5V± 3%
2

100mA +5VLP_1
@ 10 LDO
15 @ Vset=5.1V± 1.5%
15VALW_SN
0.1U_0201_25V6-K

NC1
4.7U_0603_6.3V6K

5VALW_VCC
1

16 17
OCP=12A
1M_0402_5%

NC2 VCC
1
PC663

PC651
1U_0603_25V6M
1

OVP=(1.15~1.25)*Vout
PR653

PC654

SY8286CRAC_QFN20_3X3
PC657
UVP=(0.55~0.65)*Vout
2

1000P_0402_50V9-J
2

EMC_NS@ Fsw=600Khz
2

A A
PC662
PR654
1 2 5VALW_FB_C 1 2

1K_0402_1%
1000P_0201_25V7K

Security Classification LC Future Center Secret Data Title

Issued Date 2016/01/20 Deciphered Date 2016/01/20 PWR-XXXX

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C
Size Document Number
DS321 Rev
0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, January 16, 2017 Sheet 53 of 61
5 4 3 2 1
 A B C D

PR3001
0_0402_5%
1 2
13,44 EC_VCCIO_EN

1
@ PC3009 +3VALW

2
0.1U_0402_25V6

2
10K_0402_5%

2
PR3033

10K_0402_5%
PR3028
1
@

1
PR3029
2 1 1 2
+3VALW VCCIO_LPM# 9
10K_0402_5% 0_0402_5%
PR3032 MS@

6
+VCCIO

C1

C0

LP#
EN
7
2 MODE PL3000
PGND 1UH_HMMB25201T-1R0MSR_3.4A_20% PJ3001
3.1A
1 1

V9B+ NB682GD-Z_QFN13_2X3 8 1 2 2 1
SW 2 1
PJ3000
2A

0.1U_0603_25V7-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M
2
2 1 1
2 1 VIN

AGND
4.7U_0603_16V6-K

4.7U_0603_16V6-K

1
VOUT
9 JUMP_43X79

PC3004
BST

0.1U_0402_25V6

3V3
1

1
PR3000 PR3016

PG
PC3002

PC3003

PC3005

PC3006

PC3007

PC3008
JUMP_43X39

1
0_0603_5% 4.7_0603_5%

PC3001
@

2
PU3003 1 2 EMC_NS@

13

12

11

10
@ +3VALW

12
+3VALW
PR3022 PC3033 @

2
1 2 680P_0402_50V7K

2
1
PR3002 EMC_NS@
100K_0402_5% 5.1_0603_5%
PC3010

2
4.7U_0603_6.3V6K
VCCIO_PWRGD

1
PR3010 PJ3006
CPU_VCCIO_SENSE_R 1 2 1 2

5.1_0603_5% JUMPER
VCCIO_GND
1
PR3011 20_0402_5%
CPU_VCCIO_SENSE 13 @
VCCIO_GND
VCCIO_GND 1 20_0402_5%
PR3013
+CPU_VCCPRIM_P CPU_VSSIO_SENSE 13

2
PR3012 +3VALW
5.1_0603_5%

4.7U_0603_6.3V6K
PR3023

1
1 2

PC3020

1
5.1_0603_5%

VCCPRIM_SENSE_R
+3VALW

2
2
PR3005
100K_0402_5%

VCCPRIM_GND
VCCPRIM_PWRGD

1
PR3003
0_0603_5%
1 2
V9B+
PJ3002
2A +CPU_VCCPRIM_IN

0.1U_0603_25V7-M
2 1

13

12

11

10
2 1
4.7U_0603_16V6-K

4.7U_0603_16V6-K

2
PU3001
0.1U_0402_25V6
1

1
+CPU_VCCPRIM
PC3012

PC3013

PC3014
VOUT

3V3
PG

AGND
JUMP_43X39 9
PC3011

2 2

BST

1
1 PL3001
VIN
2

2
@
8 +CPU_VCCPRIM_LX
1UH_HMMB25201T-1R0MSR_3.4A_20%
1 2 +CPU_VCCPRIM_P 2
PJ3003
1
2.57A
SW 2 1

1
NB682GD-Z_QFN13_2X3
+3VALW +3VALW 2 PR3015
PGND

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M
7 4.7_0603_5% JUMP_43X79
MODE

LP#

1
EMC_NS@

EN
C1

C0
2

PC3015

PC3016

PC3017

PC3018
@

1 2
10K_0402_5%

2
10K_0402_5%
PR3027 PR3026 PC3032
PR3024 680P_0402_50V7K
1

2
0_0402_5% EMC_NS@ @
1 2
14 VID1
PR3025
0_0402_5%
1 2
14 VID0 PR3021
2

0_0402_5%
VCCPRIM_SENSE_R 1 2
10K_0402_5% 10K_0402_5% PR3020 CPU_VCCPRIM_SENSE 14
PR3037 PR3036 0_0402_5%
VCCPRIM_GND 1 2
1

CPU_VSSPRIM_SENSE 14
@ @

PR3004
0_0402_5%
EC_ON_1.8V 1 2 +CPU_VCCPRIM_EN
PJ3007
+3VALW
1 2
1

JUMPER

2
@ PC3019

10K_0402_5%
0.1U_0402_25V6

PR3030
@
2

VCCPRIM_GND
1

PR3031
1 2 PM_SLP_S0#
@

0_0402_5%
MS@

3 3

V9B+ PU3002 PR3006 PC3023

PJ3004 0_0603_5% 0.1U_0603_25V7-M
2
2 1
1 +1.0VALW_IN 4
IN BS
6 +1.0VALW_BS
1 2 1 2 PL3002 +1.0VALW
0.1U_0402_25V6

4.7U_0603_16V6-K

4.7U_0603_16V6-K
1

JUMP_43X39 EMC@ +1.0VALW_EN +1.0VALW_LX

1.0UH_PCMB041B-1R0MS_4.2A_20%
+1.0VALW_P
PJ3005
3.8A
1

2 5 1 2 2 1
PC3021

PC3022

PC3031

EN LX 2 1
2

@
2

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M
1

3 1 JUMP_43X79
GND FB

1
PR3007

0.1U_0402_25V6
4.7_0603_5%

PC3030

PC3024

PC3025

PC3026
@
PR3019 SY8104ADC_TSOT23-6 EMC_NS@

PC3027
2

2
0_0402_5%
1 2

1 2
44,55 EC_ON_1.8V
1

PC3028 @
1M_0402_5%

0.1U_0402_25V6
1

680P_0402_50V7K PR3008 EMC@

2
1

EMC_NS@ PC3029 90.9K_0402_1%

PR3014

PC3034

220P_0402_50V7K
2

2
2

+1.0VALW_FB
1

PR3009
133K_0402_1%
2

4 4

Security Classification LC Future Center Secret Data Title

Issued Date 2013/08/08 Deciphered Date 2013/08/05 1.35VS/+0.675VS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
D 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. DS321
Date: Monday, January 16, 2017 Sheet 54 of 61
A B C D
 A B C D

+3VALW
+5VALW

1
1
PR3701
PC3701 100K_0402_5%
1U_0402_6.3V6K
PU3701

2
+1.8VALW

2
10 5
VPP POK
1A PJ3701
1.8VALW_VIN
2 1 7 1A PJ3702
+3VALW 2 1 VIN1 2 +1.8VALW_P 2 1
8 VO1 2 1
JUMP_43X39 VIN2 3
VO2 JUMP_43X39

1
1
@ @ 1
PC3702 PC3703 @

22U_0603_6.3V6-M
4.7U_0603_6.3V6K 6 PR3702 220P_0402_50V7K
VEN

1
30K_0402_1%

PC3704
2
1.8VALW_FB

2
1 4
NC1 ADJ
9 11
NC2 THERMAL_PAD

1
PR3703
23.7K_0402_1%
PR3704 @ G9661-25ADJRE1U_TDFN10_3X3
0_0402_5%
+5VALW_PG 1.8VALW_EN

2
1 2

1
PR3705
0_0402_5% PC3705
1 2 0.1U_0201_25V6-K
44,54 EC_ON_1.8V

+3VALW

+5VALW

1
PR3706
100K_0402_5%
1

2
PC3706
+3VALW 1U_0402_6.3V6K
PU3702
+DDR_2.5V
2

+2.5V_POK
2 2

@ 10 5
VPP POK
1A PJ3703
+2.5V_VIN 1A @
2 1 7 PJ3704
2 1 VIN1 2 +2.5V_P 2 1
8 VO1 2 1
JUMP_43X39 VIN2 3
VO2 JUMP_43X39
1

1
PC3707 PC3708 @

22U_0603_6.3V6-M
4.7U_0603_6.3V6K +2.5V_EN 6 PR3707
VEN 220P_0402_50V7K
2

1
39K_0402_1%

PC3709
2
+2.5V_FB

2
1 4
NC1 ADJ
9 11
NC2 THERMAL_PAD

1
PR3708
18.2K_0402_1%
G9661-25ADJRE1U_TDFN10_3X3
PR3709 @
0_0402_5%
Vout=2.5V± 5%

2
1 2
53 +5VALW_PG Vset=2.514V± 3%
OCP=3A
1

PR3710
0_0402_5% PC3710
Vref=0.8V
1 2 0.1U_0402_10V6-K
44 EC_VPP_PWREN
2

3 3

4 4

Security Classification LC Future Center Secret Data Title

Issued Date 2015/12/08 Deciphered Date 2016/12/08 1.2VS/+0.6VS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
DS321 0.1

Date: Monday, January 16, 2017 Sheet 55 of 61

A B C D
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 Blank

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
DS321 0.1

Date: Monday, January 16, 2017 Sheet 56 of 61

5 4 3 2 1
 A B C D

NB687 must add below circuit

@
PJ408 @
2 1 PJ409
+0.6VSP 2 1 2 1+DDR_2.5V_L
+DDR_2.5V 2 1
JUMP_43X39

22U_0603_6.3V6-M
JUMP_43X39
PR1415

1
PC1420
2 1 VPPIN
+3VALW

2
1 1
0106 change PC1402 and PC1403 from 10U_0805_25V6K to 4.7U_0603_16V6-K
add PC1418,PC1419 2.2_0805_5%

22U_0603_6.3V6-M
1
1.2V_GND
V9B+

PC1421
@

2
2A 2
PJ1401
1 +1.2V_VIN
2 1
@
0.1U_0402_25V6

4.7U_0603_16V6-K

4.7U_0603_16V6-K

4.7U_0603_16V6-K

4.7U_0603_16V6-K
1

1
JUMP_43X79 PC1404
PC1401

PC1418

PC1419

PC1402

PC1403
PR1401 0.1U_0603_25V7-M
PU1402 0_0603_5% 1 2 PL1401 @ +1.2V
2

2
1 10 +1.2V_BST 1 2+1.2V_BST_R
@ @
VIN BST
0.68UH_PCMB063T-R68MN_16A_20%
1 2 +1.2V_P 6A 2
PJ1402
1
9 +1.2V_LX 2 1
+1.2V_S3 SW

1
+3VALW 16 JUMP_43X79

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M
NB687GQ-Z_QFN16_3X3
EN1

1
@
+1.2V_S5 +1.2V_FB

1
2 1 15 13 PR1402 PR1404 PC1405
PR1403 100K_0402_1% EN2 FB 2.2_0805_5% 1M_0402_5% 220P_0402_50V7K

PC1406

PC1407

PC1408

PC1409

PC1410

PC1417
EMC_NS@
+0.6VSP

2
44 VDDQ_PGOOD 12 6 +1.2V_P

+1.2V_SN
PG VDDQ @

2
1 2
+3VALW +1.2V_3V3 1A @

1
PR1405 3

1U_0402_6.3V6K
4.7_0603_5% 3V3 5 +1.2V_COMP
VTT @

1
PC1412 PR1407

PC1411
4 1200P_0402_50V7-K 102K_0402_1%
AGND

1
8 VPPIN EMC_NS@
VTTS
2

2
2 PR1406

22U_0603_6.3V6-M
PGND 7 MPS_VTTREF
VTTREF
499_0402_1%
Vout=1.2V± 5%

1
PC1413
+1.2V_Mode 14 11
Vset=1.212V± 2%

+DDR_2.5V_L
2 2

1U_0402_6.3V6K
MODE OTW#

2
@

2
2

1
1.2V_GND
OCP=13A

PC1415
PR1410
PR1408 0_0402_5% Vref=0.6V

2
0_0402_5%
+1.2V_S3

1
1 2
5 CPU_DRAMPG_CNTL OVP=(1.25~1.35)*Vref
1

1.2V_GND PR1411
UVP=(0.7~0.8)*Vref
1

PC1414 1.2V_GND 100K_0402_1%

1 2
44,46 SUSP# 0.1U_0402_10V7K PJ1404 @ Fsw=700Khz(Rmode=0)

2
1 2
@
2

PR1409
0_0402_5% JUMPER
Fsw=500Khz(Rmode=150K)
@
1.2V_GND 1.2V_GND
+0.6VSP @
+0.6VS
2
PJ405
1
Vout=0.6V± 5%
2 1
1 2 +1.2V_S5 OCP=1.5A
13,44 SYSON NB685 PN change to N687 JUMP_43X39
PR1412
VTT=1/2VDDQ
1

0_0402_5% PC1416
0.1U_0402_10V7K
@
2

STATE EN1 EN2 VDDQ VTT_REFP VTT

3
S0 Hi Hi On On On 3

Off
S3 Lo Hi On On (Hi-Z)

S4/S5 Lo Lo Off Off Off

Note: S3 - sleep ; S5 - power off

4 4

Security Classification LC Future Center Secret Data Title

Issued Date 2016/01/20 Deciphered Date 2016/01/20 PWR-XXXX

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom DS321 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, January 16, 2017 Sheet 57 of 61
A B C D
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 Blank

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
DS321 0.1

Date: Monday, January 16, 2017 Sheet 58 of 61

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 Blank

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
DS321 0.1

Date: Monday, January 16, 2017 Sheet 59 of 61

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 Blank

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
DS321 0.1

Date: Monday, January 16, 2017 Sheet 60 of 61

5 4 3 2 1
 5 4 3 2 1

+3VALW

10K_0402_5%
+3VALW

PR2667
V9B+

1
PR2664
PC2601 PC2602 charge to H0.5

2
0_0402_5% MP2939_VR_OK

10_0603_5%
1 2

PR2601
2M_0402_5%
44 CPU_VR_READY

PR2602
V9B+ B+_GT

1
D D

1
PJ2601 @
2 1
2 1

1
PR2603 PC2603
+VCCST_CPU

47U_B3_10VM_R45M

47U_B3_10VM_R45M

47U_B3_10VM_R45M
0_0402_5% 4.7U_0603_16V6-K 1 1 1

300K_0402_5%

1U_0402_25V6-K

0.1U_0402_25V6
1
1 2 PR2605 JUMP_43X79

PC2606
MP2939_IREF

2
MP2939_VCC

MP2939_VDD
1

1
44 EC_VR_ON 2 1 + + +

MP2939_VIN
PR2604

PC2712

PC2605

PC2607

4.7U_0603_16V6-K

4.7U_0603_16V6-K
PC2604

PC2678
4.7U_0603_16V6-K

4.7U_0603_16V6-K
1

1
0.1U_0402_25V7-K 80.6K_0402_1%

PC2692

PC2691
2

2
2 2 2

1
PC2608

PC2601

PC2602
1U_0402_10V6-K

2
@

100_0402_1%
10K_0402_5%
45.3_0402_1%

2
1

1
0.1U_0402_25V7-K

2
1
PU2601

36

46

48

38
PR2606

PR2607

PR2608

PC2609
MP2939GQK-Z_QFN48_6X6 PR2609 U42@
0_0402_5% @ EMC@ @
MP2939_EN MP2939_OTP MP2939_VDD

VIN

VCC

VDD

IREF
2
21 47 1 2

1U_0402_16V6K
EN OTP_P

PC2611
MP2939_SVID_CLK MP2939_VR_OK
PR2610 2 1 49.9_0402_1% 1 5
12 VR_SVID_CLK SCLK VRRDY
PR2614

2
0_0402_5%
MP2939_SVID_ALRT# MP2939_VREF Vboot=0V Loadline=3.1mΩ

8
12 VR_SVID_ALRT#
1 2 2
ALERT# VREF
22
PR2615
+3VALW
VCCCORE_BST Ripple=+30mV/-10mV(0A-0.5A)

VIN1

VIN2
MP2939_SVID_DAT MP2939_SYNC
1 2 TEMP PR2617 15
PR2616 2 1 10_0402_1% 3 30 11.3K_0402_1% 0_0402_5% BST
12 VR_SVID_DAT SDIO STB Ripple=± 10mV(0.5A-TDC)

49.9K_0402_1%
1

2
PR2612 1 2 14
VCC +VCC_GT

1
0_0402_5% PC2610
Ripple=± 15mV(TDC-Iccmax)

PR2611
MP2939_VRHOT# MP2939_TEMP
1 2 4 34 PC2612 2 1U_0402_25V6-K
44,52 VR_HOT# VRHOT# TEMP/FLT SW1 PL2601

1
1
PR2618 PC2613
1U_0402_25V6-K VCCCORE_SW TDC=18A Iccmax=32A OCP=37A

2
0_0402_5% PR2619 1U_0402_25V6-K PU2602 3 1 2
MP2939_PSYS MP2939_FSET SW2

2
1 2 35 37 1 2
52 PSYS_CPU Psys FSET OVP=1.72V(during SS)OVP=VID+300mV

330U_B2_2VM_R15M

330U_B2_2VM_R15M
13 4 0.1UH_PCMB061H-R10MS_21.5A_20% 1 1
PR2613 AGND SW3

0.1U_0201_25V6-K

1
30.9K_0402_1%
MP2939_VSS_SENSE UVP=VID-300mV

22U_0402_4V6-M

22U_0402_4V6-M
22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M
1

1
1 2 44 MP86901-CGLT-Z_TQFN21-15_3X4 PR2620 + +

PC2614

PC2622

PC2623
12 VCCGT_VSS_SEN GNDSENX 2.2_0805_5%
Fsw=800Khz

PC2615

PC2616

PC2617

PC2618

PC2619

PC2620

PC2621
PR2621 MP2939_PWMX
MP2939_VCC_SENSE
29 9 11 TEMP EMC_NS@
1 0_0402_5% PWMX PWM VTEMP/FLT

2
2 43 2 2
VOSENX MP2939_SYNC MP2939_CSX

2
12 VCCGT_VCC_SEN 10 12
PC2624 PR2622
VCORE PORTION SYNC CS

VCCCORE_SN
VDIFFX_1 MP2939_VDIFFX
2 10_0402_5% 2 1 42

PGND1

PGND2

PGND3
PR2623 1 2 4.87K_0402_1% VDIFFX @ @
MP2939_ICCMAX
PC2625 PR2624 330P_0402_50V8J 200_0402_1% 25
2 1
FBX_1
2 1
MP2939_FBX
41 ICCMAX/VBOOT PC2694 PC2693 charge to H0.5
FBX

1
MP2939_OCPX PR2626

1
560P_0402_50V7-K 4.87K_0402_1% PR2625 PC2626 45 2 1
COMPX_1 MP2939_COMPX OCPX
2 1 PC2627 2 1 82P_0402_50V9-G 33P_0402_50V8J 40 PC2628
COMPX

2
49.9K_0402_1%
MP2939_CSX
68.1K_0402_1% V9B+ B+_CORE 1000P_0402_50V9-J

2
IMONX_1 MP2939_IMONX
39 EMC_NS@
PR2628 2 1 78.7K_0402_1% PR2627 2 1 1.3K_0402_1% 33 CSX
IMONX @

22U_0402_4V6-M

22U_0402_4V6-M

22U_0402_4V6-M

22U_0402_4V6-M

22U_0402_4V6-M

22U_0402_4V6-M

22U_0402_4V6-M

22U_0402_4V6-M
1

22U_0603_6.3V6-M
1

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M
1

22U_0603_6.3V6-M

1
C C
PC2629 2 1 330P_0402_50V8J PJ2602 @

PC2630

PC2631

PC2680

PC2632

PC2633

PC2634

PC2681

PC2682

PC2683

PC2684

PC2635

PC3732

PC3733

PC3734

PC3735

PC3736

PC3737
PR2629
2 1
MP2939_VSSGT_SENSE MP2939_PWMY1 2 1

2
2 1 14 28
12 VCORE_VSS_SEN GNDSENY PWMY1
PR2630 VCCGT PORTION

1U_0402_25V6-K

0.1U_0402_25V6
4.7U_0603_16V6-K

4.7U_0603_16V6-K
+3VALW JUMP_43X79
MP2939_VCCGT_SENSE
1 0_0402_5%

4.7U_0603_16V6-K

4.7U_0603_16V6-K
1

EMC@
2 15 PR2631

PC2694

PC2693

PC2638
12 VCORE_VCC_SEN VOSENY 27
MP2939_PWMY2
2 1 @ @ @ @ @ @ @

PC2636

PC2637

PC2679
PC2639 PWMY2
PR2632 1K_0402_1%
VDIFFY_1 0_0402_5% MP2939_VDIFFY

2
2 1 2 1 16
VDIFFY +CPU_CORE
PC2640
FBY_1
PR2634 200_0402_1% PR2633 2 1 3.74K_0402_1% MP2939_FBY
330P_0402_50V7K

8
2 1 2 1 17 U42@ @
FBY

1
MP2939_ICCMAXY +3VALW U42@ @ VCCGT1_BST Vboot=0V Loadline=2.4mΩ

VIN1

VIN2
560P_0402_50V7-K 3.74K_0402_1% PR2638 COMPY_1 PC2641 MP2939_COMPY
24 PR2635 15
2 1 PC2642 2 1 82P_0402_50V9-G 27P_0402_50V8J 18 ICCMAXY/ADRR/JI 0_0402_5% BST
COMPY VCCGT1_VCC Ripple=+30mV/-10mV(0A-0.5A)

2
52.3K_0402_1%
MP2939_CSY2
1 2 14
PR2637 20 VCC PC2643
IMONY_1 MP2939_IMONY CSY2 Ripple=± 10mV(0.5A-TDC)

1U_0402_25V6-K
PR2636 2 1 78.7K_0402_1% 2 1 32 2 1U_0402_25V6-K
IMONY SW1 PL2602

1
1
PR2639
Ripple=± 15mV(TDC-Iccmax)

PC2645
MP2939_CSY1 VCCGT1_SW
PC2644 1.3K_0402_1% 35.7K_0402_1% 19 PU2603 3 1 2
MP2939_OCPY CSY1 SW2
2 1 1 2 13
OCPY TDC=21A Iccmax=64A OCP=75A

330U_B2_2VM_R15M

330U_B2_2VM_R15M
13 4 0.1UH_PCMB061H-R10MS_21.5A_20%
AGND SW3

1
330P_0402_50V8J
PR2640
MP86901-CGLT-Z_TQFN21-15_3X4 PR2641
1 1 OVP=1.72V(during SS)OVP=VID+300mV
MP2939_VCCSA_SENSE 1

22U_0402_4V6-M

22U_0402_4V6-M
1

22U_0603_6.3V6-M
2 1 7 2.2_0805_5% + +
UVP=VID-300mV

PC2646

PC2649

PC2650
13 CPU_VCCSA_SENSE VOSENZ MP2939_PWMZ
26 9 11 TEMP EMC_NS@

PC2647

PC2648
PR2642 PWMZ PWM VTEMP/FLT
2 0_0402_5%
MP2939_VSSSA_SENSE MP2939_SYNC MP2939_CSY1 Fsw=800Khz

2
1 6 10 12 2 2 2

GTCORE1_SN
13 CPU_VSSSA_SENSE GNDSENZ SYNC CS
PC2651 PR2643 VCCSA PORTION

PGND1

PGND2

PGND3
VDIFFZ_1 0_0402_5% MP2939_VDIFFZ
U22 U42 2 1 2 1 8
VDIFFZ
MP2939_CSZ U42@ U42@
PC2652
FBZ_1
PR2645 220P_0402_50V7K 1K_0402_1% PR2644 2 1 4.12K_0402_1% MP2939_FBZ 11
2 1 2 1 9 CSZ
PR2636 78.7K 39.2K FBZ

7
1

1
4.12K_0402_1%
390P_0201_25V7-K PR2646 PC2653 PC2655
COMPZ_1 MP2939_COMPZ MP2939_ICCMAXZ
PR2637 1.3K 806 2 1 PC2654 2 1 68P_0402_50V8J 56P_0402_50V8-J 10 23 1000P_0402_50V9-J
COMPZ ICCMAXZ/DROOP

2
71.5K_0402_1% EMC_NS@

22U_0402_4V6-M

22U_0402_4V6-M

22U_0402_4V6-M

22U_0402_4V6-M

22U_0402_4V6-M

22U_0402_4V6-M

22U_0402_4V6-M
22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M
1

1
IMONZ_1 PR2648 MP2939_IMONZ B+_CORE

22U_0402_4V6-M
1

22U_0603_6.3V6-M

22U_0603_6.3V6-M
1
PR2639 35.7K 35.7K PR2647 2 1 127K_0603_1% 2 1 31 PR2649

PC2659

PC2660

PC2661

PC2662

PC2687

PC2686

PC2685

PC2690

PC2689

PC2688
IMONZ MP2939_OCPZ

AGND
12 2 1

PC3717

PC3720

PC3715
OCPZ

2
PC2663 1K_0402_1%

2
PR2651 182 825 2 1 115K_0402_1%
PC2705 PC2699 charge to H0.5

49
330P_0402_50V8J
PR2655 37.4K 57.6K U42@

1U_0402_25V6-K
4.7U_0603_16V6-K

4.7U_0603_16V6-K
PR2660 12.4K 51.1K

1
4.7U_0603_16V6-K

4.7U_0603_16V6-K
B B

PC2701

PC2702

PC2703
PC2705

PC2699
MP2939_VREF
PR2661 130 1.18K

2
1

PR2668 NA 0 1
U42@
100_0402_1%

464_0402_1%
VREF_Y 2.21K_0402_1%

8
@
PR2650

PR2651

PR2652

+3VALW @ VCCGT2_BST

VIN1

VIN2
PR2669 NA 0 PR2666
0_0402_5% BST
15 +CPU_CORE
VCCGT2_VCC
2

2
1 2 14
VCC
PR2631 1K NA PC2700

1U_0402_25V6-K
VREF_X

VREF_Z

U42@ 2 1U_0402_25V6-K
SW1 PL2604

1
1
PC2696 PC2695 charge to H0.8 BOT

PC2697
VCCGT2_SW U42@
PU2605 3 1 2
SW2

330U_B2_2VM_R15M

330U_B2_2VM_R15M
13 4 0.1UH_PCMB061H-R10MS_21.5A_20%
115K_0402_1%
37.4K_0402_1%

29.4K_0402_1%

AGND SW3
1

1
V9B+ 1 1
PR2654

PR2656

PR3711 MP86901-CGLT-Z_TQFN21-15_3X4 PR2665 1

U42@
PR2655

22U_0402_4V6-M

22U_0402_4V6-M

22U_0402_4V6-M

22U_0402_4V6-M

22U_0402_4V6-M

22U_0402_4V6-M

22U_0402_4V6-M
1

1
0_0402_5% 2.2_0805_5% + +

PC2707

PC2706

PC3714
MP2939_PWMY2
1 2 9 11 TEMP EMC_NS@

PC2708

PC3721

PC3722

PC3719

PC3731

PC3730
PWM VTEMP/FLT
MP2939_SYNC MP2939_CSY2
2

2
10 12 2 2 2
U42@

GTCORE2_SN
MP2939_ICCMAX_1 MP2939_ICCMAX SYNC CS
PR2658 2 1 33.2K_0402_1% PR2659 2 1 357_0402_1%

PGND1

PGND2

PGND3
U42@ U42@ U42@ U42@
MP2939_ICCMAXY_1 MP2939_ICCMAXY U42@

1U_0402_25V6-K

1
4.7U_0603_16V6-K

4.7U_0603_16V6-K

4.7U_0603_16V6-K

4.7U_0603_16V6-K
PR2660 2 1 698_0402_1% PR2661 2 1 38.3K_0402_1%

1
PC2696

PC2695

PC2666

PC2664

PC2665

1
2

2
PC2698
MP2939_ICCMAXZ_1 MP2939_ICCMAXZ +CPU_CORE

2
PR2662 2 1 13K_0402_1% PR2663 2 1 140_0402_1% 1000P_0402_50V9-J
U42@

2
EMC_NS@
@
@
1

22U_0402_4V6-M

22U_0402_4V6-M

22U_0402_4V6-M

22U_0402_4V6-M

22U_0402_4V6-M

22U_0402_4V6-M

22U_0402_4V6-M

22U_0402_4V6-M
22U_0603_6.3V6-M

22U_0603_6.3V6-M
1

1
PU2604

PC3716
+3VALW

PC2710

PC3728

PC3729

PC3718

PC3727

PC3724

PC3725

PC3726

PC3723
VCCSA_BST

VIN1

VIN2
PR2653 13
BST

2
2
0_0402_5% VCCSA_VCC +VCCSA

2
1 2 12
VCC

MP86901-AGQT-Z_TQFN13_3X3
PC2667

1U_0402_25V6-K
2 1U_0402_25V6-K
SW1 PL2603 U42@ U42@

1
1
PC2668
VCCSA_SW
3 1 2
SW2

2
11 0.24UH_HMMB25201B-R24MSR_6.4A_20%
AGND

1
@ Vboot=1.05V Loadline=10.3mΩ

22U_0402_4V6-M

22U_0402_4V6-M

22U_0402_4V6-M

22U_0402_4V6-M
22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M
1

1
PR2657
2.2_0805_5%
Ripple=+30mV/-10mV(0A-0.5A)

PC2669

PC2670

PC2671

PC2672

PC2673

PC2674

PC2675

PC2676
A 7 9 TEMP EMC_NS@ A
PWM VTEMP/FLT

2
MP2939_SYNC MP2939_CSZ Ripple=± 10mV(0.5A-TDC)

2
8 10
SYNC CS
Ripple=± 15mV(TDC-Iccmax)

+VCCSA_SN
PGND1

PGND2
TDC=4A Iccmax=4.5A OCP=8A
OVP=1.72V(during SS)OVP=VID+300mV

5
UVP=VID-300mV

1
PC2677
1000P_0402_50V9-J Fsw=1Mhz

2
EMC_NS@

Security Classification LC Future Center Secret Data Title

Issued Date 2015/12/08 Deciphered Date 2016/12/08 PWR_IMVP8
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. DS321
Date : Monday, January 16, 2017 Sheet 61 of 61
5 4 3 2 1