0% found this document useful (0 votes)
902 views

Microprocessor 8086 Cheat Sheet

The document provides a cheat sheet for the 8086 microprocessor, summarizing its key features and addressing modes. It notes that the 8086 is a 16-bit microprocessor with 4 16-bit general purpose registers (AX, BX, CX, DX), 8 8-bit general purpose registers, a 1MB maximum external memory, 16-bit data and address buses, a 6-byte instruction queue, and 16-bit ALU. It describes the 4 segmented memories and their registers. Finally, it outlines the various addressing modes used by the 8086 like direct, register, stack, indexed, based, and relative addressing.

Uploaded by

aziz ahmad
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
902 views

Microprocessor 8086 Cheat Sheet

The document provides a cheat sheet for the 8086 microprocessor, summarizing its key features and addressing modes. It notes that the 8086 is a 16-bit microprocessor with 4 16-bit general purpose registers (AX, BX, CX, DX), 8 8-bit general purpose registers, a 1MB maximum external memory, 16-bit data and address buses, a 6-byte instruction queue, and 16-bit ALU. It describes the 4 segmented memories and their registers. Finally, it outlines the various addressing modes used by the 8086 like direct, register, stack, indexed, based, and relative addressing.

Uploaded by

aziz ahmad
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 3

ASM 8086 Cheat Sheet

by Deathtitan77 (Deathtitan77) via cheatography.com/122246/cs/22730/

Microp​roc​essor 8086 Features Microp​roc​essor 8086 Features Addressing Modes Addressing Modes (cont)
(cont)
How many bits is the 8086 Direct addressing mode Index addressing
Microp​roc​essor? How many segmented The addressing mode in In this addressing mode, the
16 bit memories are there and what's which the effective address of operands offset address is
the maximum available space? the memory location is found by adding the contents
What and how many 16 bit
CS (Code Segment), DS written directly in the instru​‐ of SI or DI register and 8-bit/​‐
general purpose registers are
(Data Segment), SS (Stack ction. 16-bit displa​cem​ents.
there?
Segment), EX (Extra
4, 16 bit general purpose Register addressing Base-index addressing
Segment), all of which are 64
registers. They are: AX, BX, It means that the register is In this addressing mode, the
KB each in space
CX, DX the source of an operand for offset address of the operand
What are the corres​ponding an instru​ction. is computed by summing the
What and how many 8 bit
points for the segments? base register to the contents
general purpose registers are Immediate addressing
IP (Instr​uction Pointer), SP of an Index register.
there? The addressing mode in
(Stack Pointer), BP (Base
8, 8 bit general purpose which the data operand is a Relative addressing
Pointer), SI (Source Index),
registers. They are: AL, AH, part of the instru​ction itself is In this the effective address is
DI (Desti​nation Index)
BL, BH, CL, CH, DL, DH known as immediate calculated with reference to
What is the clock frequency of addressing mode. instru​ction pointer.
What is the maximum for an
the microc​ont​roller?
external memory of the 8086 Register indirect addressing Addressing applied in string
5MHz frequency
microc​ont​roller? This addressing mode allows processing instru​ctions
1 MB How many pins does the data to be addressed at any This addressing mode is
miroco​ntr​oller have? memory location through an related to string instru​ctions.
How many bits is the data bus?
40 pins offset address held in any of In this the value of SI and DI
16 bits
the following registers: BP, are auto increm​ented and
A microp​roc​essor is the brain of
How many bits is the address BX, DI & SI. decrem​ented depending upon
the computer, it is:
bus? the value of direct​ional flag.
Base addressing
20 bits
1. Multip​urpose In this addressing mode, the
How many bytes is the instru​‐ 2. Clock Driven offset address of the operand
ction queue? 3. Register Based is given by the sum of
6 byte 4. Progra​mmable contents of the BX/BP
5. Digital Integrated Circuit registers and 8-bit/​16-bit
How many bits is the ALU (Arith​‐
displa​cement.
metic Logic Unit)
Notes:
16 bits
IP (Instr​uction Pointer) is
respon​sible for storing the
instru​ction of the next
executable instru​ction

By Deathtitan77 Published 10th May, 2020. Sponsored by Readable.com


(Deathtitan77) Last updated 13th May, 2020. Measure your website readability!
Page 1 of 3. https://readable.com

cheatography.com/deathtitan77/
ASM 8086 Cheat Sheet
by Deathtitan77 (Deathtitan77) via cheatography.com/122246/cs/22730/

Addressing Modes (cont) General Purpose Registers Addressing Modes (cont) Addressing Modes (cont)
(cont)
Stack addressing Direct Addressing Mode Register Relative Addressing
The stack memory BX In it, a 16-bit memory Mode
addressing mode is used This is the base register. It is address (offset) or an input/​‐ In it, data is available at an
whenever you perform a of 16 bits and is divided into output address is directly effective address formed by
push or pop operation. two 8-bit registers BH and BL specified in the instru​ction as adding an 8 bit or 16-bit
Always a word will be entered to also perform 8-bit instru​‐ a part of it. displa​cement with content,
or popped from the stack in ctions. It is used to store the any one of the registers Bx,
Register Addressing Mode
this addressing mode, and value of the offset. Bp, SI, DI in the default (DS
Here data is stored in a
the value of the Stack Pointer or ES) segment.
CX register and referred using
(SP) will be increm​ented or
This is the counter register. It the particular register. Based Indexed Addressing
decrem​ented accord​ingly.
is of 16 bits and is divided Mode
Register Indirect Addressing
Examples below into two 8-bit registers CH The effective address of data
Mode
1. and CL to also perform 8-bit is formed by adding content
In this offset address of data
MOV AX, [1592H] instru​ctions. It is used in of base register Bx or Bp to
is in either Bx, SI, DI, (Base
2. looping and rotation. the content of index register.
register, source index or
MOV CX, AX
DX Destin​ation index) default Relative Based Indexed
ADD BX, AX
This is the data register. It is segment is either DS or ES. Addressing Mode
3.
of 16 bits and is divided into Data is supposed to be Here the effective address is
ADD AX, 2387H
two 8-bit registers DH and DL available at the address formed by adding an 8 bit or
4.
to also perform 8-bit instru​‐ pointed to by the content of 16-bit displa​cement with the
MOV AX, [BX]
ctions. It is used in multip​lic​‐ any of the above registers in sum of the content of any one
5.
ation an input/​output port the default data segment. of the index registers in the
MOV DX, [BX+04]
addres​sing. default segment.
6. Indexed Addressing Mode
MOV BX, [SI+16] Every digit of hex corres​ponds Here offset of the operand is
7. Index Registers
to 4 bits stored in one of the index
ADD CX, [AX+SI] registers. DS is the default SI
Examples: segment for SI and DI in This is the source index
General Purpose Registers string instru​ction DS and ES register. It is of 16 bits. It is
AX MOV AX, 05H default segment for register used in the pointer
MOV [500], AX SI and DI. addressing of data and as a
This is the accumu​lator. It is
of 16 bits and is divided into source in some string related
MOV BL, [500] operat​ions. It’s offset is
two 8-bit registers AH and AL
to also perform 8-bit instru​‐ relative to data segment.
Addressing Modes
ctions. It is generally used for
arithm​etical and logical Immediate Addressing Mode
instru​ctions but in 8086 In this immediate data is the
microp​roc​essor it is not part of the instru​ction itself.
mandatory to have accumu​‐ Example: Mov AX, 0005H
lator as the destin​ation
operand.

By Deathtitan77 Published 10th May, 2020. Sponsored by Readable.com


(Deathtitan77) Last updated 13th May, 2020. Measure your website readability!
Page 2 of 3. https://readable.com

cheatography.com/deathtitan77/
ASM 8086 Cheat Sheet
by Deathtitan77 (Deathtitan77) via cheatography.com/122246/cs/22730/

Index Registers (cont) Pointer Registers Control Flags (cont)

DI SP Interrupt Flag (I)


This is the destin​ation index This is the stack pointer. It is This flag is for interr​upts. If
register. It is of 16 bits. It is of 16 bits. It points to the interrupt flag is set (1), the
used in the pointer topmost item of the stack. If microp​roc​essor will recognize
addressing of data and as a the stack is empty the stack interrupt requests from the
destin​ation in some string pointer will be (FFFE)H. It’s periph​erals. If interrupt flag is
related operat​ions. It’s offset offset address relative to reset (0), the microp​roc​essor
is relative to extra segment. stack segment. will not recognize any
interrupt requests and will
BP
Segment Registers ignore them.
This is the base pointer. It is
CS of 16 bits. It is primary used Trap Flag (T)

Points to the segment in accessing parameters This flag is used for on-chip
containing the current passed by the stack. It’s debugging. Setting trap flag
program offset address relative to puts the microp​roc​essor into
stack segment. single step mode for
DS
debugging. In single
IP
Points to the segment where
stepping, the microp​roc​essor
the variables are defined To access instru​ction the
executes a instru​ction and
8086 uses the register CS
ES enters into single step ISR. If
and IP. The CS register
It is an extra segment trap flag is set (1), the CPU
contains the segment number
register, and it is up to the automa​tically generates an
of the next instru​ction and IP
coder for the usage internal interrupt after each
contains the offset.
instru​ction, allowing a
SS
program to be inspected as it
Points at the segment Control Flags
executes instru​ction by
containing the stack Direct​ional Flag (D) instru​ction. If trap flag is reset
Note: This flag is specif​ically used (0), no function is performed.
These registers each have an in string instru​ctions. If direct​‐
available space of 64 KB and ional flag is set (1), then Status Flags
256 KB in total. The rest of the 1 access the string data from Overflow Flag (O)
MB total memory goes to the higher memory location
This flag will be set (1) if the
microc​ont​roller. It can be towards lower memory
result of a signed operation is
assumed as an "​Ope​rating location. If direct​ional flag is
too large to fit in the number
System​". reset (0), then access the
of bits available to represent
string data from lower
it, otherwise reset (0).
memory location towards
higher memory location. There are also 5 other flags, but
they are the same as the 8085.

By Deathtitan77 Published 10th May, 2020. Sponsored by Readable.com


(Deathtitan77) Last updated 13th May, 2020. Measure your website readability!
Page 3 of 3. https://readable.com

cheatography.com/deathtitan77/

You might also like