; generated by ARM C/C++ Compiler, 5.

03 [Build 76]
; commandline ArmCC [--list --split_sections --debug -c --asm --interleave
-o.\flash\obj\stm32f10x_gpio.o --asm_dir=.\Flash\List\ --list_dir=.\Flash\List\
--depend=.\flash\obj\stm32f10x_gpio.d --cpu=Cortex-M3 --apcs=interwork -O0
--diag_suppress=870 -I..\..\Libraries\CMSIS\Device\ST\STM32F10x\Include
-I..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I..\..\User\bsp
-I..\..\User\bsp\inc -I..\..\uCOS-II\uCOS-II\Ports\ARM-Cortex-M3\Generic\RealView
-I..\..\uCOS-II\uCOS-II\Source -I..\..\uCOS-II\uC-LIB -I..\..\uCOS-II\uC-
LIB\Ports\ARM-Cortex-M3\RealView -I..\..\uCOS-II\uC-CPU -I..\..\uCOS-II\uC-CPU\ARM-
Cortex-M3\RealView -I..\..\User -I..\..\Libraries\CMSIS\Include
-IC:\Keil\ARM\RV31\INC -IC:\Keil\ARM\CMSIS\Include -IC:\Keil\ARM\Inc\ST\STM32F10x
-D__MICROLIB -DUSE_STDPERIPH_DRIVER -DSTM32F10X_HD
..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_gpio.c]
THUMB

AREA ||i.GPIO_AFIODeInit||, CODE, READONLY, ALIGN=1

GPIO_AFIODeInit PROC
;;;164 */
;;;165 void GPIO_AFIODeInit(void)
000000 b510 PUSH {r4,lr}
;;;166 {
;;;167 RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, ENABLE);
000002 2101 MOVS r1,#1
000004 4608 MOV r0,r1
000006 f7fffffe BL RCC_APB2PeriphResetCmd
;;;168 RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, DISABLE);
00000a 2100 MOVS r1,#0
00000c 2001 MOVS r0,#1
00000e f7fffffe BL RCC_APB2PeriphResetCmd
;;;169 }
000012 bd10 POP {r4,pc}
;;;170
ENDP

AREA ||i.GPIO_DeInit||, CODE, READONLY, ALIGN=2

GPIO_DeInit PROC
;;;113 */
;;;114 void GPIO_DeInit(GPIO_TypeDef* GPIOx)
000000 b510 PUSH {r4,lr}
;;;115 {
000002 4604 MOV r4,r0
;;;116 /* Check the parameters */
;;;117 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
;;;118
;;;119 if (GPIOx == GPIOA)
000004 4829 LDR r0,|L2.172|
000006 4284 CMP r4,r0
000008 d108 BNE |L2.28|
;;;120 {
;;;121 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, ENABLE);
00000a 2101 MOVS r1,#1
00000c 2004 MOVS r0,#4
00000e f7fffffe BL RCC_APB2PeriphResetCmd
;;;122 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, DISABLE);
000012 2100 MOVS r1,#0
000014 2004 MOVS r0,#4
000016 f7fffffe BL RCC_APB2PeriphResetCmd
00001a e046 B |L2.170|
|L2.28|
;;;123 }
;;;124 else if (GPIOx == GPIOB)
00001c 4824 LDR r0,|L2.176|
00001e 4284 CMP r4,r0
000020 d108 BNE |L2.52|
;;;125 {
;;;126 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, ENABLE);
000022 2101 MOVS r1,#1
000024 2008 MOVS r0,#8
000026 f7fffffe BL RCC_APB2PeriphResetCmd
;;;127 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, DISABLE);
00002a 2100 MOVS r1,#0
00002c 2008 MOVS r0,#8
00002e f7fffffe BL RCC_APB2PeriphResetCmd
000032 e03a B |L2.170|
|L2.52|
;;;128 }
;;;129 else if (GPIOx == GPIOC)
000034 481f LDR r0,|L2.180|
000036 4284 CMP r4,r0
000038 d108 BNE |L2.76|
;;;130 {
;;;131 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, ENABLE);
00003a 2101 MOVS r1,#1
00003c 2010 MOVS r0,#0x10
00003e f7fffffe BL RCC_APB2PeriphResetCmd
;;;132 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, DISABLE);
000042 2100 MOVS r1,#0
000044 2010 MOVS r0,#0x10
000046 f7fffffe BL RCC_APB2PeriphResetCmd
00004a e02e B |L2.170|
|L2.76|
;;;133 }
;;;134 else if (GPIOx == GPIOD)
00004c 481a LDR r0,|L2.184|
00004e 4284 CMP r4,r0
000050 d108 BNE |L2.100|
;;;135 {
;;;136 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, ENABLE);
000052 2101 MOVS r1,#1
000054 2020 MOVS r0,#0x20
000056 f7fffffe BL RCC_APB2PeriphResetCmd
;;;137 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, DISABLE);
00005a 2100 MOVS r1,#0
00005c 2020 MOVS r0,#0x20
00005e f7fffffe BL RCC_APB2PeriphResetCmd
000062 e022 B |L2.170|
|L2.100|
;;;138 }
;;;139 else if (GPIOx == GPIOE)
000064 4815 LDR r0,|L2.188|
000066 4284 CMP r4,r0
000068 d108 BNE |L2.124|
;;;140 {
;;;141 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, ENABLE);
00006a 2101 MOVS r1,#1
00006c 2040 MOVS r0,#0x40
00006e f7fffffe BL RCC_APB2PeriphResetCmd
;;;142 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, DISABLE);
000072 2100 MOVS r1,#0
000074 2040 MOVS r0,#0x40
000076 f7fffffe BL RCC_APB2PeriphResetCmd
00007a e016 B |L2.170|
|L2.124|
;;;143 }
;;;144 else if (GPIOx == GPIOF)
00007c 4810 LDR r0,|L2.192|
00007e 4284 CMP r4,r0
000080 d108 BNE |L2.148|
;;;145 {
;;;146 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, ENABLE);
000082 2101 MOVS r1,#1
000084 2080 MOVS r0,#0x80
000086 f7fffffe BL RCC_APB2PeriphResetCmd
;;;147 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, DISABLE);
00008a 2100 MOVS r1,#0
00008c 2080 MOVS r0,#0x80
00008e f7fffffe BL RCC_APB2PeriphResetCmd
000092 e00a B |L2.170|
|L2.148|
;;;148 }
;;;149 else
;;;150 {
;;;151 if (GPIOx == GPIOG)
000094 480b LDR r0,|L2.196|
000096 4284 CMP r4,r0
000098 d107 BNE |L2.170|
;;;152 {
;;;153 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, ENABLE);
00009a 2101 MOVS r1,#1
00009c 1580 ASRS r0,r0,#22
00009e f7fffffe BL RCC_APB2PeriphResetCmd
;;;154 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, DISABLE);
0000a2 2100 MOVS r1,#0
0000a4 15a0 ASRS r0,r4,#22
0000a6 f7fffffe BL RCC_APB2PeriphResetCmd
|L2.170|
;;;155 }
;;;156 }
;;;157 }
0000aa bd10 POP {r4,pc}
;;;158
ENDP

|L2.172|
DCD 0x40010800
|L2.176|
DCD 0x40010c00
|L2.180|
DCD 0x40011000
|L2.184|
DCD 0x40011400
|L2.188|
DCD 0x40011800
|L2.192|
 DCD 0x40011c00
|L2.196|
DCD 0x40012000

AREA ||i.GPIO_ETH_MediaInterfaceConfig||, CODE, READONLY,

GPIO_ETH_MediaInterfaceConfig PROC
;;;635 */
;;;636 void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface)
000000 4901 LDR r1,|L3.8|
;;;637 {
;;;638 assert_param(IS_GPIO_ETH_MEDIA_INTERFACE(GPIO_ETH_MediaInterface));
;;;639
;;;640 /* Configure MII_RMII selection bit */
;;;641 *(__IO uint32_t *) MAPR_MII_RMII_SEL_BB = GPIO_ETH_MediaInterface;
000002 6008 STR r0,[r1,#0]
;;;642 }
000004 4770 BX lr
;;;643
ENDP

000006 0000 DCW 0x0000

AREA ||i.GPIO_EXTILineConfig||, CODE, READONLY, ALIGN=2

GPIO_EXTILineConfig PROC
;;;614 */
;;;615 void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
000000 b530 PUSH {r4,r5,lr}
;;;616 {
;;;617 uint32_t tmp = 0x00;
000002 2200 MOVS r2,#0
;;;618 /* Check the parameters */
;;;619 assert_param(IS_GPIO_EXTI_PORT_SOURCE(GPIO_PortSource));
;;;620 assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
;;;621
;;;622 tmp = ((uint32_t)0x0F) << (0x04 * (GPIO_PinSource & (uint8_t)0x03));
000004 078b LSLS r3,r1,#30
000006 0f1c LSRS r4,r3,#28
000008 230f MOVS r3,#0xf
00000a fa03f204 LSL r2,r3,r4
;;;623 AFIO->EXTICR[GPIO_PinSource >> 0x02] &= ~tmp;
00000e 4b0b LDR r3,|L4.60|
000010 108c ASRS r4,r1,#2
000012 f8533024 LDR r3,[r3,r4,LSL #2]
000016 4393 BICS r3,r3,r2
000018 4c08 LDR r4,|L4.60|
00001a 108d ASRS r5,r1,#2
00001c f8443025 STR r3,[r4,r5,LSL #2]
;;;624 AFIO->EXTICR[GPIO_PinSource >> 0x02] |= (((uint32_t)GPIO_PortSource) <<
(0x04 * (GPIO_PinSource & (uint8_t)0x03)));
000020 4623 MOV r3,r4
000022 108c ASRS r4,r1,#2
000024 f8533024 LDR r3,[r3,r4,LSL #2]
000028 078c LSLS r4,r1,#30
00002a 0f24 LSRS r4,r4,#28
00002c fa00f404 LSL r4,r0,r4
000030 4323 ORRS r3,r3,r4
000032 4c02 LDR r4,|L4.60|
000034 108d ASRS r5,r1,#2
000036 f8443025 STR r3,[r4,r5,LSL #2]
;;;625 }
00003a bd30 POP {r4,r5,pc}
;;;626
ENDP

|L4.60|
DCD 0x40010008

AREA ||i.GPIO_EventOutputCmd||, CODE, READONLY, ALIGN=2

GPIO_EventOutputCmd PROC
;;;488 */
;;;489 void GPIO_EventOutputCmd(FunctionalState NewState)
000000 4901 LDR r1,|L5.8|
;;;490 {
;;;491 /* Check the parameters */
;;;492 assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;493
;;;494 *(__IO uint32_t *) EVCR_EVOE_BB = (uint32_t)NewState;
000002 61c8 STR r0,[r1,#0x1c]
;;;495 }
000004 4770 BX lr
;;;496
ENDP

000006 0000 DCW 0x0000

AREA ||i.GPIO_EventOutputConfig||, CODE, READONLY,

GPIO_EventOutputConfig PROC
;;;467 */
;;;468 void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t
GPIO_PinSource)
000000 4602 MOV r2,r0
;;;469 {
;;;470 uint32_t tmpreg = 0x00;
000002 2000 MOVS r0,#0
;;;471 /* Check the parameters */
;;;472 assert_param(IS_GPIO_EVENTOUT_PORT_SOURCE(GPIO_PortSource));
;;;473 assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
;;;474
;;;475 tmpreg = AFIO->EVCR;
000004 4b05 LDR r3,|L6.28|
000006 6818 LDR r0,[r3,#0]
;;;476 /* Clear the PORT[6:4] and PIN[3:0] bits */
;;;477 tmpreg &= EVCR_PORTPINCONFIG_MASK;
000008 f64f7380 MOV r3,#0xff80
00000c 4018 ANDS r0,r0,r3
;;;478 tmpreg |= (uint32_t)GPIO_PortSource << 0x04;
00000e ea401002 ORR r0,r0,r2,LSL #4
;;;479 tmpreg |= GPIO_PinSource;
000012 4308 ORRS r0,r0,r1
;;;480 AFIO->EVCR = tmpreg;
000014 4b01 LDR r3,|L6.28|
000016 6018 STR r0,[r3,#0]
;;;481 }
000018 4770 BX lr
;;;482
ENDP

00001a 0000 DCW 0x0000

AREA ||i.GPIO_Init||, CODE, READONLY, ALIGN=1

GPIO_Init PROC
;;;178 */
;;;179 void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
000000 e92d41f0 PUSH {r4-r8,lr}
;;;180 {
000004 4602 MOV r2,r0
;;;181 uint32_t currentmode = 0x00, currentpin = 0x00, pinpos = 0x00, pos =
0x00;
000006 2500 MOVS r5,#0
000008 2600 MOVS r6,#0
00000a 2000 MOVS r0,#0
00000c 2300 MOVS r3,#0
;;;182 uint32_t tmpreg = 0x00, pinmask = 0x00;
00000e 2400 MOVS r4,#0
000010 2700 MOVS r7,#0
;;;183 /* Check the parameters */
;;;184 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
;;;185 assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode));
;;;186 assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin));
;;;187
;;;188 /*---------------------------- GPIO Mode Configuration
-----------------------*/
;;;189 currentmode = ((uint32_t)GPIO_InitStruct->GPIO_Mode) &
((uint32_t)0x0F);
000012 f891c003 LDRB r12,[r1,#3]
000016 f00c050f AND r5,r12,#0xf
;;;190 if ((((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x10)) !=
0x00)
00001a f891c003 LDRB r12,[r1,#3]
00001e f01c0f10 TST r12,#0x10
000022 d003 BEQ |L7.44|
;;;191 {
;;;192 /* Check the parameters */
;;;193 assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed));
;;;194 /* Output mode */
;;;195 currentmode |= (uint32_t)GPIO_InitStruct->GPIO_Speed;
000024 f891c002 LDRB r12,[r1,#2]
000028 ea4c0505 ORR r5,r12,r5
|L7.44|
;;;196 }
;;;197 /*---------------------------- GPIO CRL Configuration
------------------------*/
;;;198 /* Configure the eight low port pins */
;;;199 if (((uint32_t)GPIO_InitStruct->GPIO_Pin & ((uint32_t)0x00FF)) != 0x00)
00002c f891c000 LDRB r12,[r1,#0]
000030 f1bc0f00 CMP r12,#0
000034 d031 BEQ |L7.154|
;;;200 {
;;;201 tmpreg = GPIOx->CRL;
000036 6814 LDR r4,[r2,#0]
;;;202 for (pinpos = 0x00; pinpos < 0x08; pinpos++)
000038 2000 MOVS r0,#0
00003a e02b B |L7.148|
|L7.60|
;;;203 {
;;;204 pos = ((uint32_t)0x01) << pinpos;
00003c f04f0c01 MOV r12,#1
000040 fa0cf300 LSL r3,r12,r0
;;;205 /* Get the port pins position */
;;;206 currentpin = (GPIO_InitStruct->GPIO_Pin) & pos;
000044 f8b1c000 LDRH r12,[r1,#0]
000048 ea0c0603 AND r6,r12,r3
;;;207 if (currentpin == pos)
00004c 429e CMP r6,r3
00004e d120 BNE |L7.146|
;;;208 {
;;;209 pos = pinpos << 2;
000050 0083 LSLS r3,r0,#2
;;;210 /* Clear the corresponding low control register bits */
;;;211 pinmask = ((uint32_t)0x0F) << pos;
000052 f04f0c0f MOV r12,#0xf
000056 fa0cf703 LSL r7,r12,r3
;;;212 tmpreg &= ~pinmask;
00005a 43bc BICS r4,r4,r7
;;;213 /* Write the mode configuration in the corresponding bits */
;;;214 tmpreg |= (currentmode << pos);
00005c fa05fc03 LSL r12,r5,r3
000060 ea4c0404 ORR r4,r12,r4
;;;215 /* Reset the corresponding ODR bit */
;;;216 if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
000064 f891c003 LDRB r12,[r1,#3]
000068 f1bc0f28 CMP r12,#0x28
00006c d106 BNE |L7.124|
;;;217 {
;;;218 GPIOx->BRR = (((uint32_t)0x01) << pinpos);
00006e f04f0c01 MOV r12,#1
000072 fa0cfc00 LSL r12,r12,r0
000076 f8c2c014 STR r12,[r2,#0x14]
00007a e00a B |L7.146|
|L7.124|
;;;219 }
;;;220 else
;;;221 {
;;;222 /* Set the corresponding ODR bit */
;;;223 if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
00007c f891c003 LDRB r12,[r1,#3]
000080 f1bc0f48 CMP r12,#0x48
000084 d105 BNE |L7.146|
;;;224 {
;;;225 GPIOx->BSRR = (((uint32_t)0x01) << pinpos);
000086 f04f0c01 MOV r12,#1
00008a fa0cfc00 LSL r12,r12,r0
00008e f8c2c010 STR r12,[r2,#0x10]
 |L7.146|
000092 1c40 ADDS r0,r0,#1 ;202
|L7.148|
000094 2808 CMP r0,#8 ;202
000096 d3d1 BCC |L7.60|
;;;226 }
;;;227 }
;;;228 }
;;;229 }
;;;230 GPIOx->CRL = tmpreg;
000098 6014 STR r4,[r2,#0]
|L7.154|
;;;231 }
;;;232 /*---------------------------- GPIO CRH Configuration
------------------------*/
;;;233 /* Configure the eight high port pins */
;;;234 if (GPIO_InitStruct->GPIO_Pin > 0x00FF)
00009a f8b1c000 LDRH r12,[r1,#0]
00009e f1bc0fff CMP r12,#0xff
0000a2 dd34 BLE |L7.270|
;;;235 {
;;;236 tmpreg = GPIOx->CRH;
0000a4 6854 LDR r4,[r2,#4]
;;;237 for (pinpos = 0x00; pinpos < 0x08; pinpos++)
0000a6 2000 MOVS r0,#0
0000a8 e02e B |L7.264|
|L7.170|
;;;238 {
;;;239 pos = (((uint32_t)0x01) << (pinpos + 0x08));
0000aa f1000c08 ADD r12,r0,#8
0000ae f04f0801 MOV r8,#1
0000b2 fa08f30c LSL r3,r8,r12
;;;240 /* Get the port pins position */
;;;241 currentpin = ((GPIO_InitStruct->GPIO_Pin) & pos);
0000b6 f8b1c000 LDRH r12,[r1,#0]
0000ba ea0c0603 AND r6,r12,r3
;;;242 if (currentpin == pos)
0000be 429e CMP r6,r3
0000c0 d121 BNE |L7.262|
;;;243 {
;;;244 pos = pinpos << 2;
0000c2 0083 LSLS r3,r0,#2
;;;245 /* Clear the corresponding high control register bits */
;;;246 pinmask = ((uint32_t)0x0F) << pos;
0000c4 f04f0c0f MOV r12,#0xf
0000c8 fa0cf703 LSL r7,r12,r3
;;;247 tmpreg &= ~pinmask;
0000cc 43bc BICS r4,r4,r7
;;;248 /* Write the mode configuration in the corresponding bits */
;;;249 tmpreg |= (currentmode << pos);
0000ce fa05fc03 LSL r12,r5,r3
0000d2 ea4c0404 ORR r4,r12,r4
;;;250 /* Reset the corresponding ODR bit */
;;;251 if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
0000d6 f891c003 LDRB r12,[r1,#3]
0000da f1bc0f28 CMP r12,#0x28
0000de d105 BNE |L7.236|
;;;252 {
;;;253 GPIOx->BRR = (((uint32_t)0x01) << (pinpos + 0x08));
0000e0 f1000c08 ADD r12,r0,#8
0000e4 fa08f80c LSL r8,r8,r12
0000e8 f8c28014 STR r8,[r2,#0x14]
|L7.236|
;;;254 }
;;;255 /* Set the corresponding ODR bit */
;;;256 if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
0000ec f891c003 LDRB r12,[r1,#3]
0000f0 f1bc0f48 CMP r12,#0x48
0000f4 d107 BNE |L7.262|
;;;257 {
;;;258 GPIOx->BSRR = (((uint32_t)0x01) << (pinpos + 0x08));
0000f6 f1000c08 ADD r12,r0,#8
0000fa f04f0801 MOV r8,#1
0000fe fa08f80c LSL r8,r8,r12
000102 f8c28010 STR r8,[r2,#0x10]
|L7.262|
000106 1c40 ADDS r0,r0,#1 ;237
|L7.264|
000108 2808 CMP r0,#8 ;237
00010a d3ce BCC |L7.170|
;;;259 }
;;;260 }
;;;261 }
;;;262 GPIOx->CRH = tmpreg;
00010c 6054 STR r4,[r2,#4]
|L7.270|
;;;263 }
;;;264 }
00010e e8bd81f0 POP {r4-r8,pc}
;;;265
ENDP

AREA ||i.GPIO_PinLockConfig||, CODE, READONLY, ALIGN=1

GPIO_PinLockConfig PROC
;;;437 */
;;;438 void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
000000 f44f3280 MOV r2,#0x10000
;;;439 {
;;;440 uint32_t tmp = 0x00010000;
;;;441
;;;442 /* Check the parameters */
;;;443 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
;;;444 assert_param(IS_GPIO_PIN(GPIO_Pin));
;;;445
;;;446 tmp |= GPIO_Pin;
000004 430a ORRS r2,r2,r1
;;;447 /* Set LCKK bit */
;;;448 GPIOx->LCKR = tmp;
000006 6182 STR r2,[r0,#0x18]
;;;449 /* Reset LCKK bit */
;;;450 GPIOx->LCKR = GPIO_Pin;
000008 6181 STR r1,[r0,#0x18]
;;;451 /* Set LCKK bit */
;;;452 GPIOx->LCKR = tmp;
00000a 6182 STR r2,[r0,#0x18]
;;;453 /* Read LCKK bit*/
;;;454 tmp = GPIOx->LCKR;
00000c 6982 LDR r2,[r0,#0x18]
;;;455 /* Read LCKK bit*/
;;;456 tmp = GPIOx->LCKR;
00000e 6982 LDR r2,[r0,#0x18]
;;;457 }
000010 4770 BX lr
;;;458
ENDP

AREA ||i.GPIO_PinRemapConfig||, CODE, READONLY, ALIGN=2

GPIO_PinRemapConfig PROC
;;;554 */
;;;555 void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState)
000000 b5f0 PUSH {r4-r7,lr}
;;;556 {
000002 460a MOV r2,r1
;;;557 uint32_t tmp = 0x00, tmp1 = 0x00, tmpreg = 0x00, tmpmask = 0x00;
000004 2300 MOVS r3,#0
000006 2400 MOVS r4,#0
000008 2100 MOVS r1,#0
00000a 2500 MOVS r5,#0
;;;558
;;;559 /* Check the parameters */
;;;560 assert_param(IS_GPIO_REMAP(GPIO_Remap));
;;;561 assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;562
;;;563 if((GPIO_Remap & 0x80000000) == 0x80000000)
00000c f0004600 AND r6,r0,#0x80000000
000010 f1b64f00 CMP r6,#0x80000000
000014 d102 BNE |L9.28|
;;;564 {
;;;565 tmpreg = AFIO->MAPR2;
000016 4e1d LDR r6,|L9.140|
000018 69f1 LDR r1,[r6,#0x1c]
00001a e001 B |L9.32|
|L9.28|
;;;566 }
;;;567 else
;;;568 {
;;;569 tmpreg = AFIO->MAPR;
00001c 4e1b LDR r6,|L9.140|
00001e 6871 LDR r1,[r6,#4]
|L9.32|
;;;570 }
;;;571
;;;572 tmpmask = (GPIO_Remap & DBGAFR_POSITION_MASK) >> 0x10;
000020 f3c04503 UBFX r5,r0,#16,#4
;;;573 tmp = GPIO_Remap & LSB_MASK;
000024 b283 UXTH r3,r0
;;;574
;;;575 if ((GPIO_Remap & (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK)) ==
(DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK))
000026 f4001640 AND r6,r0,#0x300000
00002a f5b61f40 CMP r6,#0x300000
00002e d108 BNE |L9.66|
;;;576 {
;;;577 tmpreg &= DBGAFR_SWJCFG_MASK;
000030 f0216170 BIC r1,r1,#0xf000000
;;;578 AFIO->MAPR &= DBGAFR_SWJCFG_MASK;
000034 4e15 LDR r6,|L9.140|
000036 6876 LDR r6,[r6,#4]
000038 f0266670 BIC r6,r6,#0xf000000
00003c 4f13 LDR r7,|L9.140|
00003e 607e STR r6,[r7,#4]
000040 e012 B |L9.104|
|L9.66|
;;;579 }
;;;580 else if ((GPIO_Remap & DBGAFR_NUMBITS_MASK) == DBGAFR_NUMBITS_MASK)
000042 f4001680 AND r6,r0,#0x100000
000046 f5b61f80 CMP r6,#0x100000
00004a d106 BNE |L9.90|
;;;581 {
;;;582 tmp1 = ((uint32_t)0x03) << tmpmask;
00004c 2603 MOVS r6,#3
00004e fa06f405 LSL r4,r6,r5
;;;583 tmpreg &= ~tmp1;
000052 43a1 BICS r1,r1,r4
;;;584 tmpreg |= ~DBGAFR_SWJCFG_MASK;
000054 f0416170 ORR r1,r1,#0xf000000
000058 e006 B |L9.104|
|L9.90|
;;;585 }
;;;586 else
;;;587 {
;;;588 tmpreg &= ~(tmp << ((GPIO_Remap >> 0x15)*0x10));
00005a 0d46 LSRS r6,r0,#21
00005c 0136 LSLS r6,r6,#4
00005e fa03f606 LSL r6,r3,r6
000062 43b1 BICS r1,r1,r6
;;;589 tmpreg |= ~DBGAFR_SWJCFG_MASK;
000064 f0416170 ORR r1,r1,#0xf000000
|L9.104|
;;;590 }
;;;591
;;;592 if (NewState != DISABLE)
000068 b122 CBZ r2,|L9.116|
;;;593 {
;;;594 tmpreg |= (tmp << ((GPIO_Remap >> 0x15)*0x10));
00006a 0d46 LSRS r6,r0,#21
00006c 0136 LSLS r6,r6,#4
00006e fa03f606 LSL r6,r3,r6
000072 4331 ORRS r1,r1,r6
|L9.116|
;;;595 }
;;;596
;;;597 if((GPIO_Remap & 0x80000000) == 0x80000000)
000074 f0004600 AND r6,r0,#0x80000000
000078 f1b64f00 CMP r6,#0x80000000
00007c d102 BNE |L9.132|
;;;598 {
;;;599 AFIO->MAPR2 = tmpreg;
00007e 4e03 LDR r6,|L9.140|
000080 61f1 STR r1,[r6,#0x1c]
000082 e001 B |L9.136|
|L9.132|
;;;600 }
;;;601 else
;;;602 {
;;;603 AFIO->MAPR = tmpreg;
000084 4e01 LDR r6,|L9.140|
000086 6071 STR r1,[r6,#4]
|L9.136|
;;;604 }
;;;605 }
000088 bdf0 POP {r4-r7,pc}
;;;606
ENDP

00008a 0000 DCW 0x0000

AREA ||i.GPIO_ReadInputData||, CODE, READONLY, ALIGN=1

GPIO_ReadInputData PROC
;;;310 */
;;;311 uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx)
000000 4601 MOV r1,r0
;;;312 {
;;;313 /* Check the parameters */
;;;314 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
;;;315
;;;316 return ((uint16_t)GPIOx->IDR);
000002 6888 LDR r0,[r1,#8]
000004 b280 UXTH r0,r0
;;;317 }
000006 4770 BX lr
;;;318
ENDP

AREA ||i.GPIO_ReadInputDataBit||, CODE, READONLY, ALIGN=1

GPIO_ReadInputDataBit PROC
;;;286 */
;;;287 uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
000000 4602 MOV r2,r0
;;;288 {
;;;289 uint8_t bitstatus = 0x00;
000002 2000 MOVS r0,#0
;;;290
;;;291 /* Check the parameters */
;;;292 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
;;;293 assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
;;;294
;;;295 if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)Bit_RESET)
000004 6893 LDR r3,[r2,#8]
000006 420b TST r3,r1
000008 d001 BEQ |L11.14|
;;;296 {
;;;297 bitstatus = (uint8_t)Bit_SET;
00000a 2001 MOVS r0,#1
00000c e000 B |L11.16|
|L11.14|
;;;298 }
;;;299 else
;;;300 {
;;;301 bitstatus = (uint8_t)Bit_RESET;
00000e 2000 MOVS r0,#0
|L11.16|
;;;302 }
;;;303 return bitstatus;
;;;304 }
000010 4770 BX lr
;;;305
ENDP

AREA ||i.GPIO_ReadOutputData||, CODE, READONLY, ALIGN=1

GPIO_ReadOutputData PROC
;;;348 */
;;;349 uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx)
000000 4601 MOV r1,r0
;;;350 {
;;;351 /* Check the parameters */
;;;352 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
;;;353
;;;354 return ((uint16_t)GPIOx->ODR);
000002 68c8 LDR r0,[r1,#0xc]
000004 b280 UXTH r0,r0
;;;355 }
000006 4770 BX lr
;;;356
ENDP

AREA ||i.GPIO_ReadOutputDataBit||, CODE, READONLY,

GPIO_ReadOutputDataBit PROC
;;;325 */
;;;326 uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
000000 4602 MOV r2,r0
;;;327 {
;;;328 uint8_t bitstatus = 0x00;
000002 2000 MOVS r0,#0
;;;329 /* Check the parameters */
;;;330 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
;;;331 assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
;;;332
;;;333 if ((GPIOx->ODR & GPIO_Pin) != (uint32_t)Bit_RESET)
000004 68d3 LDR r3,[r2,#0xc]
000006 420b TST r3,r1
000008 d001 BEQ |L13.14|
;;;334 {
;;;335 bitstatus = (uint8_t)Bit_SET;
00000a 2001 MOVS r0,#1
00000c e000 B |L13.16|
|L13.14|
;;;336 }
;;;337 else
;;;338 {
;;;339 bitstatus = (uint8_t)Bit_RESET;
00000e 2000 MOVS r0,#0
|L13.16|
;;;340 }
;;;341 return bitstatus;
;;;342 }
000010 4770 BX lr
;;;343
ENDP

AREA ||i.GPIO_ResetBits||, CODE, READONLY, ALIGN=1

GPIO_ResetBits PROC
;;;379 */
;;;380 void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
000000 6141 STR r1,[r0,#0x14]
;;;381 {
;;;382 /* Check the parameters */
;;;383 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
;;;384 assert_param(IS_GPIO_PIN(GPIO_Pin));
;;;385
;;;386 GPIOx->BRR = GPIO_Pin;
;;;387 }
000002 4770 BX lr
;;;388
ENDP

AREA ||i.GPIO_SetBits||, CODE, READONLY, ALIGN=1

GPIO_SetBits PROC
;;;363 */
;;;364 void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
000000 6101 STR r1,[r0,#0x10]
;;;365 {
;;;366 /* Check the parameters */
;;;367 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
;;;368 assert_param(IS_GPIO_PIN(GPIO_Pin));
;;;369
;;;370 GPIOx->BSRR = GPIO_Pin;
;;;371 }
000002 4770 BX lr
;;;372
ENDP

AREA ||i.GPIO_StructInit||, CODE, READONLY, ALIGN=1

GPIO_StructInit PROC
;;;271 */
;;;272 void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct)
000000 f64f71ff MOV r1,#0xffff
;;;273 {
;;;274 /* Reset GPIO init structure parameters values */
;;;275 GPIO_InitStruct->GPIO_Pin = GPIO_Pin_All;
000004 8001 STRH r1,[r0,#0]
;;;276 GPIO_InitStruct->GPIO_Speed = GPIO_Speed_2MHz;
000006 2102 MOVS r1,#2
000008 7081 STRB r1,[r0,#2]
;;;277 GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN_FLOATING;
00000a 2104 MOVS r1,#4
00000c 70c1 STRB r1,[r0,#3]
;;;278 }
00000e 4770 BX lr
;;;279
ENDP

AREA ||i.GPIO_Write||, CODE, READONLY, ALIGN=1

GPIO_Write PROC
;;;422 */
;;;423 void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal)
000000 60c1 STR r1,[r0,#0xc]
;;;424 {
;;;425 /* Check the parameters */
;;;426 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
;;;427
;;;428 GPIOx->ODR = PortVal;
;;;429 }
000002 4770 BX lr
;;;430
ENDP

AREA ||i.GPIO_WriteBit||, CODE, READONLY, ALIGN=1

GPIO_WriteBit PROC
;;;399 */
;;;400 void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction
BitVal)
000000 b10a CBZ r2,|L18.6|
;;;401 {
;;;402 /* Check the parameters */
;;;403 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
;;;404 assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
;;;405 assert_param(IS_GPIO_BIT_ACTION(BitVal));
;;;406
;;;407 if (BitVal != Bit_RESET)
;;;408 {
;;;409 GPIOx->BSRR = GPIO_Pin;
000002 6101 STR r1,[r0,#0x10]
000004 e000 B |L18.8|
|L18.6|
;;;410 }
;;;411 else
;;;412 {
;;;413 GPIOx->BRR = GPIO_Pin;
000006 6141 STR r1,[r0,#0x14]
|L18.8|
;;;414 }
;;;415 }
000008 4770 BX lr
;;;416
ENDP
;*** Start embedded assembler ***

#line 1 "..\\..\\Libraries\\STM32F10x_StdPeriph_Driver\\src\\stm32f10x_gpio.c"
AREA ||.rev16_text||, CODE, READONLY
THUMB
EXPORT |__asm___16_stm32f10x_gpio_c_f8e8e39a____REV16|
#line 114 "..\\..\\Libraries\\CMSIS\\Include\\core_cmInstr.h"
|__asm___16_stm32f10x_gpio_c_f8e8e39a____REV16| PROC
#line 115

rev16 r0, r0
bx lr
ENDP
AREA ||.revsh_text||, CODE, READONLY
THUMB
EXPORT |__asm___16_stm32f10x_gpio_c_f8e8e39a____REVSH|
#line 128
|__asm___16_stm32f10x_gpio_c_f8e8e39a____REVSH| PROC
#line 129

revsh r0, r0
bx lr
ENDP

;*** End embedded assembler ***