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Parallel System Architectures: System and Network Engineering Lab, Uva E-Mail: A.D.Pimentel@Uva - NL

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vamshi krishna
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35 views

Parallel System Architectures: System and Network Engineering Lab, Uva E-Mail: A.D.Pimentel@Uva - NL

Uploaded by

vamshi krishna
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Parallel System

Architectures
Andy D. Pimentel
System and Network Engineering Lab, UvA
e-mail: [email protected]
Aims of this course
The aims of this course are:
to give a thorough understanding of modern
microprocessor design and related issues
to introduce you to parallelism in computer
architecture
You should already have an understanding of instruction set design
and the principles and operation of (pipelined) processors
Bibliography
The main course text is:
Computer architecture - a quantitative approach, 

Hennessy & Patterson
4th Edition, ISBN 978-0-12-370490-0, or
5th edition, ISBN 978-0-12-383872-8
Other useful texts are
Processor Architecture, Silc, Robic and Ungerer, Springer, ISBN 13-540-64798-8
D. Sima, T. Fountain and P. Kacsuk, Advanced Computer Architecture a Design space approach
(Addison-Wesley)
Additional material will be made available at https://staff.fnwi.uva.nl/a.d.pimentel/psa/
Assessment
Assessment will be by coursework assignment and exam
The following weighting will be used
Exam 60% and Assignment 40%
Assignment labs supervised by Simon Polstra and Jun Xiao
Website for assignments: https://staff.fnwi.uva.nl/s.polstra/psa2017/
Mailing list: [email protected]
https://list.uva.nl/mailman/listinfo/psa2017
Assignment assessment will be based on demonstration to the lab supervisors (60%) and a
brief report (40%) on the observations of your results
‘Topic flow’ of this course
Network

Processor + what happens in a multi-core context

Memory Hierarchy

Caches + what happens in a multi-core context

Memory
Overview
The following topics will be covered in a bottom-up approach to the subject
1. Memory and memory hierarchies
2. Processor (micro-)architecture: Dynamic concurrency
Pipelined processors, superscalar microprocessors
3. Processor (micro-)architecture: Explicit concurrency
VLIW, EPIC, and hardware multi-threading
4. Multi-core systems and networks of processors
5. Embedded computer systems
6. Interconnection networks

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