Digital Systems I Assignment Solutions
Digital Systems I Assignment Solutions
First, simplify each internal expression using identity and distributive laws. For instance, (A’ . B)’ is simplified to A + B', (C’ + D) and ((E . F’)’ + G) further transform into canonical forms by applying Demorgan's laws and distributive transformations to eliminate inversion bubbles, finally combining through nested stages to a sum or product form .
First, identify M = (A + B . C')' and N = (A . D')' + B. By applying DeMorgan’s theorem, M becomes A + B . C' and N becomes A . D' . B'. Therefore, the expression Y is transformed as Y = M' + N' which simplifies to Y = A + B . C' + A . D' . B'. According to T9-L, A + A . D' . B' simplifies to A, resulting in Y = A + B . C' .
By applying the principle of duality, the expression X . Y + X’ . Z + Y . Z = X . Y + X’ . Z is converted to its dual: (X + Y) . (X’ + Z) . (Y + Z) = (X + Y) . (X’ + Z). Analyzing the logic circuits, the left expression requires three 2-input AND gates and one 3-input OR gate, while the right uses two 2-input AND gates and one 2-input OR gate, indicating the right side needs less hardware .
The principle of duality is used to compare X . Y + X’ . Z + Y . Z vs. (X + Y) . (X’ + Z). Calculating the gate count, the first uses two 2-input AND gates for each conjunction part then merges with OR, and the second requires fewer gates due to merging redundancies and collective simplifications, making it more efficient .
The expression for Y is initially given as Y = (Z1 + C + Z2)'. Substituting Z1, where Z1 = (B . (A + D)')', translates to Z1 = (B . Z3)' and Z3 = (A + D)'. For Z2, where Z2 = G . (E . F)', we substitute. Thus, Y transforms to Y = ((B . (A + D)')' + C + G . (E . F)')' through substitution and expansion .
To prove the theorem, apply the expansion first. Consider X + X' . Y to be rewritten as (X + X’) . (X + Y) using T8-R. Then simplify (X + X’) using T5-L to expand it to 1, leading to (1 . (X + Y)), and by applying T1-R, simplify to X + Y, confirming equivalence .
DeMorgan's theorem is used to absorb inversion bubbles by redefining gate outputs using OR and AND gates only. Each inverted bubble is addressed separately by ensuring the inversions apply directly to the inputs only, maintaining circuit topology. This provides a circuit simplified to only uses AND, OR gates, with inputs naturally complemented when needed .
The consensus theorem (A + B) . (A' + C) = (A + B) . (A' + C) . (B + C) can be proven using switching algebra. Applying T10-R, B + C = (B + C + A) . (B + C + A'), substitute B + C in (1) leading to: (A + B) . (A' + C) . (A + B + C) . (A' + B + C) simplifies to (A + B) . (A + B + C) . (A' + C) . (A' + B + C), which reduces back to the original expression through simplification .
To derive the canonical POS, we list the minterms for which Y = 1, corresponding to 0, 4, and 6. The maxterm approach requires finding outputs where Y = 0, resulting in Σ(1, 2, 3, 5, 7). The canonical POS formula is constructed using the complement of these values, creating a product of sums expression capturing these conditions .
By applying the combining theorem (T10-L), the expression Y = A . B' . F' + A . B . F' can be simplified to Y = A . F'. This is done by recognizing that A . F' is common in both terms, allowing the simplification through the theorem to Y = A . F' .