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This programming paradigm is based on the “objects” i.e. it contains data in the form of
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programming languages that
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Client-Side Scripting Languages: Javascript, AJAX, Jquery r
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PROCEDURAL VS FUNCTIONAL
VS OOP
PROCEDURAL VS FUNCTIONAL
VS OOP
PROCEDURAL VS FUNCTIONAL
VS OOP
ABSTRACTION
PROGRAM DEVELOPMENT
PROGRAM
C++ PROGRAM

// Your First C++ Program

#include <iostream>

int main() {

std::cout << "Hello World!";

return 0;

}
 JAVA PROGRAM

* This is a simple Java program. public static void main(String args[

FileName : "HelloWorld.java". */ {

lass HelloWorld System.out.println("Hello, World");

/ Your program begins with a call to main(). }

/ Prints "Hello, World" to the terminal

window.
DEVELOPMENT CYCLE (PDLC)

Define
Scope, objective
Analyze
Input – process - output
Assumptions, deliverables, exceptions
Algorithm development
Coding and Documentation
Testing and Debugging
Maintenance
ALGORITHM

An algorithm is a sequence of unambiguous instructions for solving a problem,

i.e., for obtaining a required output for any legitimate input in a finite amount of
time
ALGORITHMIC ANALYSIS

Space complexity
How much space is required

Time complexity
How much time does it take to run the algorithm
GENERAL ANALYSIS

Depends on the machine and platform.

However, the analysis should be independent of machine and platform.

Exact value cannot be arrived.

Further, dependency on
amount of input

Sequence of input
WHAT DOES “SIZE OF THE INPUT” MEAN?

If we are searching an array, the “size” of the input could be the size of the array

If we are merging two arrays, the “size” could be the sum of the two array sizes

If we are computing the nth Fibonacci number, or the nth factorial, the “size” is n

We choose the “size” to be the parameter that most influences the actual
time/space required
It is usually obvious what this parameter is

Sometimes we need two or more parameters

13
GENERAL ANALYSIS

Complexity is measured as a function of size of input

Time is measured as T(n) and Space as S(n) for ‘n’ inputs

Rate of growth - Exponential

2n, nn,n!

Polynomial Growth – n2, n3, log(n)

Better execution time is through algorithm with linear growth for large amount
of data
TIME ANALYSIS

Active or Characteristic Operations alone to be considered

What a “characteristic operation” is depends on the particular problem
If searching, it might be comparing two values
If sorting an array, it might be:
comparing two values
swapping the contents of two array locations
both of the above
Sometimes we just look at how many times the innermost loop is executed
TIME ANALYSIS

Bookkeeping operations shall be ignored.

Count the number of active operations

Ignore the constants and arrive at a common notation with respect to ‘n’ with the
highest value.
 IS IT POSSIBLE TO FIND EXACT VALUES?

It is sometimes possible, in assembly language, to compute exact time and space

requirements

We know exactly how many bytes and how many cycles each machine instruction takes

For a problem with a known sequence of steps (factorial, Fibonacci), we can determine
how many instructions of each type are required

However, often the exact sequence of steps cannot be known in advance

The steps required to sort an array depend on the actual numbers in the array (which
we do not know in advance)
 HIGH LEVEL LANGUAGES
n a higher-level
level language (such as Java), we do not know how long each operation
akes
Which is faster, x < 10 or x <= 9 ?
We don’t know exactly what the compiler does with this
The compiler probably optimizes the test anyway (replacing the slower version with the
faster one)

n a higher-level
level language we cannot do an exact analysis
Our timing analyses will use major oversimplifications
Nevertheless, we can get some very useful results
 CONSTANT TIME
Constant time means there is some constant k such that this operation always takes k
nanoseconds

A Java statement takes constant time if:

It does not include a loop

It does not include calling a method whose time is unknown or is not a constant

f a statement involves a choice (if or switch) among operations, each of which takes constant
ime, we consider the statement to take constant time
This is consistent with worst-case analysis
 LINEAR TIME
We may not be able to predict to the nanosecond how long a Java program will take, but
do know some things about timing:
for (i = 0, j = 1; i < n; i++) { j = j * i;; }

This loop takes time k*n + c, for some constants k and c

k : How long it takes to go through the loop once

(the time for j = j * i, plus loop overhead)

n : The number of times through the loop (we

( can use this as the “size” of the problem)

c : The time it takes to initialize the loop

The total time k*n + c is linear in n

CONSTANT TIME IS (USUALLY)
USUALLY) BETTER THAN LINEAR TIME

Suppose we have two algorithms to solve a task:

Algorithm A takes 5000 time units
Algorithm B takes 100*n time units

Which is better?
Clearly, algorithm B is better if our problem size is small, that is, if n < 50
Algorithm A is better for larger problems, with n > 50
So B is better on small problems that are quick anyway
But A is better for large problems, where it matters more

We usually care most about very large problems

But not always!
 THE ARRAY SUBSET PROBLEM

Suppose you have two sets, represented as unsorted arrays:

int[] sub = { 7, 1, 3, 2, 5 };
int[] super = { 8, 4, 7, 1, 2, 3, 9 };

and you want to test whether every element of the first set (sub) also occurs in the second set (super):
System.out.println(subset(sub, super));

(The answer in this case should be false, because sub contains the integer 5, and super doesn’t)

We are going to write method subset and compute its time complexity (how fast it is)

Let’s start with a helper function, member, to test whether one number is in an array
22
 MEMBER
static boolean member(int x, int[] a) {
int n = a.length;
for (int i = 0; i < n; i++) {
if (x == a[i]) return true;
}
return false;
}
If x is not in a, the loop executes n times, where n = a.length
This is the worst case
If x is in a, the loop executes n/2 times on average
Either way, linear time is required: k*n+c
 SUBSET
static boolean subset(int[] sub, int[] super) {
int m = sub.length;
for (int i = 0; i < m; i++)
if (!member(sub[i], super) return false;
return true;
}
The loop (and the call to member) will execute:
m = sub.length times, if sub is a subset of super
This is the worst case, and therefore the one we are most interested in
Fewer than sub.length times (but we don’t know how few)
We would need to figure this out in order to compute average time complexity
The worst case is a linear number of times through the loop
But the loop body doesn’t take constant time, since it calls member, which takes linear time
ANALYSIS OF ARRAY SUBSET ALGORITHM

We’ve seen that the loop in subset executes m = sub.length times (in the worst case)

Also, the loop in subset calls member, which executes in time linear in n = super.length

Hence, the execution time of the array subset method is m*n, along with assorted
constants
We go through the loop in subset m times, calling member each time

We go through the loop in member n times

If m and n are similar, this is roughly quadratic

25
 WHAT ABOUT THE CONSTANTS?

Forget the constants!

An added constant, f(n)+c, becomes less and less important as n gets larger

A constant multiplier, k*f(n), does not get less important, but...

Improving k gives a linear speedup (cutting k in half cuts the time required in half)
Improving k is usually accomplished by careful code optimization, not by better algorithms
We aren’t that concerned with only linear speedups!
SIMPLIFYING THE FORMULAE

Throwing out the constants is one of two things we do in analysis of algorithms

By throwing out constants, we simplify 12n2 + 35 to just n2

Our timing formula is a polynomial, and may have terms of various orders (constant,
linear, quadratic, cubic, etc.)
We usually discard all but the highest-order
order term

We simplify n2 + 3n + 5 to just n2
BIG O NOTATION

When we have a polynomial that describes the time requirements of an algorithm, we

simplify it by:
Throwing out all but the highest-order
order term
Throwing out all the constants

If an algorithm takes 12n3+4n2+8n+35 time, we simplify this formula to just n3

We say the algorithm requires O(n3) time

We call this Big O notation
(More accurately, it’s Big Ω,, but we’ll talk about that later)
BIG O FOR SUBSET ALGORITHM

Recall that, if n is the size of the set, and m is the size of the (possible) subset:
We go through the loop in subset m times, calling member each time

We go through the loop in member n times

Hence, the actual running time should be k*(m*n) + c, for some constants k and c

We say that subset takes O(m*n) time

CAN WE JUSTIFY BIG O NOTATION?

Big O notation is a huge simplification; can we justify it?

It only makes sense for large problem sizes
For sufficiently large problem sizes, the highest-order
highest term swamps all the rest!
Consider R = x2 + 3x + 5 as x varies:
x=0 x2 = 0 3x = 0 5=5 R=5
x = 10 x2 = 100 3x = 30 5=5 R = 135
x = 100 x2 = 10000 3x = 300 5 = 5 R = 10,305
x = 1000 x2 = 1000000 3x = 3000 5 = 5 R = 1,003,005
x = 10,000 x2 = 108 3x = 3*104 5 = 5 R = 100,030,005
x = 100,000 x2 = 1010 3x = 3*105 5 = 5 R = 10,000,300,005
30
Y = X2 + 3X + 5, FOR X=1..10

31
Y = X2 + 3X + 5, FOR X=1..20

32
COMMON TIME COMPLEXITIES

BETTER O(1) constant time

O(log n) log time
O(n) linear time
O(n log n) log linear time
O(n2) quadratic time
O(n3) cubic time
O(2n) exponential time
WORSE

33
ALGORITHM

Repeat for I = 1 to N
Repeat for J = 1 to N
SUM 0
Repeat for K = 1 to N
SUM SUM + A[I, K] * B[K, J]
End Repeat K
C[I,J] SUM
End Repeat J
End Repeat I
ORDER NOTATION

The Big-O notation:

the running time of an algorithm as a function of the size of its input

worst case estimate

asymptotic behavior

O(n2) means that the running time of the algorithm on an input of size n is
limited by the quadratic function of n
 BIG-OH
OH NOTATION DEFINITION

iven functions f(n) and g(n), we say that 80

70 3n
n) is O(g(n)) if there are positive constants
60 2n+10
and n0 such that
50
n
n) ≤ cg(n) for n ≥ n0 40
30
xample: 2n + 10 is O(n) 20
2n + 10 ≤ cn 10
0
(c − 2) n ≥ 10 0 10 20
n
n ≥ 10/(c − 2)
Pick c = 3 and n0 = 10
 More Big-Oh
Oh Examples
7n-2
7n-2 is O(n)
need c > 0 and n0 ≥ 1 such that 7n-2 ≤ c•n for n ≥ n0
this is true for c = 7 and n0 = 1
3n3 + 20n2 + 5
3n3 + 20n2 + 5 is O(n3)
need c > 0 and n0 ≥ 1 such that 3n3 + 20n2 + 5 ≤ c•n3 for n ≥ n0
this is true for c = 4 and n0 = 21
3 log n + 5
3 log n + 5 is O(log n)
need c > 0 and n0 ≥ 1 such that 3 log n + 5 ≤ c•log n for n ≥ n0
this is true for c = 8 and n0 = 2
BIG-OH
OH AND GROWTH RATE

The big-Oh
Oh notation gives an upper bound on the growth rate of a function

The statement “f(n) is O(g(n))”” means that the growth rate of f(n) is no more than the
growth rate of g(n)

We can use the big-Oh

Oh notation to rank functions according to their growth rate

f(n)) is O(g(n)) g(n) is O(f(n))

g(n) grows more Yes No
f(n) grows more No Yes
Same growth Yes Yes
 BIG-OH RULES

f (n ) = a 0 + a 1 n + a 2 n 2 + ... + a d n d

If is f(n) a polynomial of degree d, then f(n) is O(nd), i.e.,

1. Drop lower-order terms
2. Drop constant factors

Use the smallest possible class of functions

Say “2n is O(n)” instead of “2n
2n is O(n2)”

Use the simplest expression of the class

Say “3n + 5 is O(n)” instead of “3n
3n + 5 is O(3n)”
 ASYMPTOTIC ALGORITHM ANALYSIS

The asymptotic analysis of an algorithm determines the running time in big-Oh

big notation

To perform the asymptotic analysis

We find the worst-case
case number of primitive operations executed as a function of the input size
We express this function with big-Oh
Oh notation

Example:
We determine that algorithm arrayMax executes at most 7n − 1 primitive operations

We say that algorithm arrayMax “runs in O(n) time”

Since constant factors and lower-order

order terms are eventually dropped anyhow, we can disregard them
when counting primitive operations
 IMPORTANT FUNCTIONS GROWTH RATES

n log(n) n nlog(n) n2 n3 2n
8 3 8 24 64 512 256

16 4 16 64 256 4096 65536

32 5 32 160 1024 32768 4.3x109

64 6 64 384 4096 262144 1.8x1019

128 7 128 896 16384 2097152 3.4x1038

256 8 256 2048 65536 16777218 1.2x1077

TYPES OF ANALYSIS

Best Case Analysis

Average Case Analysis

Worst Case Analysis

TYPES OF ANALYSIS

Best case running time is usually useless

Average case time is very useful but often difficult to determine

We focus on the worst case running time

Easier to analyze

Crucial to applications such as games, finance and robotics

SPACE COMPLEXITY

Space complexity = The amount of memory required by an algorithm to run to

completion
[Core dumps = the most often encountered cause is “dangling pointers”]

Some algorithms may be more efficient if data completely loaded into memory
Need to look also at system limitations

E.g. Classify 2GB of text in various categories [politics, tourism, sport, natural
disasters, etc.] – can I afford to load the entire collection?
SPACE COMPLEXITY

Fixed part: The size required to store certain data/variables, that is

independent of the size of the problem:
- e.g. name of the data collection
same size for classifying 2GB or 1MB of texts

Variable part: Space needed by variables, whose size is dependent on the size
of the problem:
- e.g. actual text
- load 2GB of text VS. load 1MB of text
SPACE COMPLEXITY

Space complexity is the amount of memory used by the algorithm (including the
input values to the algorithm) to execute and produce the result.

Sometime Auxiliary Space is confused with Space Complexity. But Auxiliary

Space is the extra space or the temporary space used by the algorithm during it's
execution.

Space Complexity = Auxiliary Space + Input space

 MEMORY DURING EXECUTION

Instruction Space: It's the amount of memory used to save the compiled version of

instructions.

Environmental Stack: Sometimes an algorithm(function) may be called inside another

algorithm(function). In such a situation, the current variables are pushed onto the system

stack, where they wait for further execution and then the call to the inside

algorithm(function) is made.
 MEMORY DURING EXECUTION

For example, If a function A() calls function B() inside it, then all th variables of the

function A()will get stored on the system stack temporarily, while the function B() is called

and executed inside the funciton A().

Data Space: Amount of space used by the variables and constants.

But while calculating the Space Complexity of any algorithm, we usually consider only Data

Space and we neglect the Instruction Space and Environmental Stack.

SPACE COMPLEXITY

S(P) = c + S(instance characteristics) for(i = 0; i<n; i++) {

c = constant
s+= a[i];
Example: }
float summation(const float (&a)[10], int n )
return s;
{
}
float s = 0;
Space? one for n, one for a [passed b
int i;
reference!], one for i constant sp
EXAMPLE

int square(int a) { return a*a; }

Linear: int sum(int A[], int n) { int sum = 0, i; for(i = 0; i < n; i++) sum = sum + A[i];
return sum; }
RELATIVES OF BIG-OH

big-Omega

f(n) is Ω(g(n))
(g(n)) if there is a constant c > 0 and an integer constant n0 ≥ 1 such that
f(n) ≥ c•g(n) for n ≥ n0

big-Theta

f(n) is Θ(g(n))
(g(n)) if there are constants c’ > 0 and c’’ > 0 and an integer constant n0 ≥
1 such that c’•g(n) ≤ f(n) ≤ c’’•g(n) for n ≥ n0
 EXAMPLES

You go and ask the first person of the class, if he has the pen. Also, you ask this person about
other 99 people in the classroom if they have that pen & So on.

O(n): Going and asking each student individually is O(N).

O(log n): Now I divide the class in two groups, then ask: “Is it on the left side, or the right
side of the classroom?” Then I take that group and divide it into two and ask again, and so
on. Repeat the process till you are left with one student who has your pen. This is what you
mean by O(log n).
PROBLEM

int i, j, k = 0;
for (i = n / 2; i <= n; i++) {
for (j = 2; j <= n; j = j * 2) {
k = k + n / 2;
}
}
Output:
O(nLogn)
PROBLEM

int a = 0, i = N;
while (i > 0) {
a += i;
i /= 2;
}
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JAVA PREPROCESSOR
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PREPROCESSOR
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COMPILER
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OPERATINGyri SYSTEM
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CENTRALp yri PROCESSING UNIT
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SECONDARYp yri STORAGE MEDIA
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I/O (INPUT/OUTPUT) DEVICES
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CENTRAL p yri PROCESSING UNIT (CPU)
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CENTRAL p yri PROCESSING UNIT (CPU)
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ARITHMETIC yri LOGIC UNIT (ALU)
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the ALU (Arithmetic and Logical
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REGISTERS
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REGISTERS
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REGISTERS
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REGISTERS
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Accumulator: Stores the results of calculations made by ALU.

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by this next address to Memory
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REGISTERS
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COMPUTERS yri
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Fixed Program Computers es– Their function is very specific and they couldn’t be
programmed, e.g. Calculators.er
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STOREDp yri PROGRAM CONCEPT
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VON NEUMANN ARCHITECTURE
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COMPARISON
HARVARD ARCHITECTURE
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Data Stream: Operations performed
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CONTROLrve UNIT
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CLASSIFICATION OF CONTROL UNIT
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CONTROL p yri UNIT – INPUT & OUTPUT
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memory
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HARDWIRED yri CONTROL UNIT
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An instruction fetched from the rve unit is placed in the instruction register (IR).
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MICRO p yrPROGRAMMED CONTROL UNIT
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The Control memory address register specifies thed
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MICRO p yrPROGRAMMED CONTROL UNIT
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next address generator circuit and then transferred
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INSTRUCTION CYCLE
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Read the effective address from memory. yD
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DESIGN p yriOF COMPUTER
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t rewords of 16 bits each
Registers: AC (Accumulator), seDR (Data register), AR (Address register), IR
(Instruction register), PC (Programr vcounter), TR (Temporary register), SC
ed and OUTR (Output register).
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Control Logic Gates
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MEMORY ORGANIZATION
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STORAGEp yri UNIT - REGISTERS
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es memory used to quickly accept, store, and transfer
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data and instructions that aree rveused immediately by the CPU.
being

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sequence or individual characters).
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REGISTERS
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Commonly
Register
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Symbol Number of bits Function

Data register DR
rve 16 Holds memory operand

Address register AR
db 12 Holds address for the memory

Accumulator AC
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Instruction register IR 16
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Program counter PC 12
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Temporary register TR 16 Ra
Holds temporary data

Input register INPR 8 jba

Carries input character

Output register OUTR 8 b

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REGISTER
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Accumulator: This is the most common register,

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General Purpose Registers: This is used to store data intermediate
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REGISTER
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Special Purpose Registers: Users do not access these registers. These registers are for
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MAR: Memory Address Register are those registers that holds the address for
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MBR: Memory Buffer Register stores instruction and data r. received from the
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PC: Program Counter points to the next instruction to be executed.ajb
IR: Instruction Register holds the instruction to be executed.
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REGISTERS
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The Memory unit has a capacity of 4096 words, and each word contains 16 bits.
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The Temporary Register (TR) is used for holding the temporary data during the processing.
The Input Registers (IR) holds the input characters given by the user.
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The Output Registers (OR) holds the output after processing the input data.
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p yri UNIT – CACHE MEMORY
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Bridge the speeds of the main memory and the CPU
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DRAM: Dynamic RAM, is made of capacitors and transistors,r. and must be refreshed every
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SRAM: Static RAM, has a six transistor circuit in each cell and retains data,a jbpowered
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re memory that uses Bistable latching circuitry to store each bit.
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In this type of RAM, data is stored using
used as a cache memory for the processor
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DRAM is a type of RAM which allows you to stores
within a particular integrated circuit.
y bit of data in a separate capacitor
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MAINyMEMORY rig
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SRAM re DRAM
SRAM has lower access time, whichseis faster DRAM has a higher access time. It is slower
compared to DRAM. rve than SRAM.
SRAM is costlier than DRAM.
SRAM needs a constant power supply, which
d DRAM cost is lesser compared to SRAM.
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DRAM requires reduced power consumption as
means it consumes more power. the y
information stored in the capacitor.
SRAM offers low packaging density. Dr a high packaging density.
DRAM offers
Uses transistors and latches. . Kand very few transistors.
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L2 and L3 CPU cache units are some general
application of an SRAM.
The DRAM is mostly
memory in computers.
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The storage capacity of SRAM is 1MB to 16MB. The storage capacity of DRAM jbisa1 GB to 16GB.
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MAINyMEMORY rig
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SRAM re DRAM
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SRAM is in the form of on-chip memory. DRAM has the characteristics of off-chip
rve memory.
The SRAM is widely used on the processor or
lodged between the main memory and
d The DRAM is placed on the motherboard.
by
processor of your computer.
DRAM isD
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SRAM is of a smaller size. available in larger storage capacity.
This type of RAM works on the principle of
changing the direction of current through
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MAINyMEMORY
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NVRAM: Non-Volatile RAM, retains its data, even when turned off. Example: Flash memory.

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ROM: Read Only Memory, is non-volatile and is more like a permanent storage for information.
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computer is turned on. PROM(Programmable ROM), EPROM(Erasable PROM)
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MAINyMEMORY
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MAINyMEMORY
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The internal clock rate is the frequency needed to match the external clock rate.
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Bus clock speed, is the speed at which the connection between CPU & memory operates at.

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Higher bus speed means you can send more data more quickly

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Data rate is how many bits a module can transfer in a given time, and speed is how many bytes
it can transfer.
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SECONDARY yri MEMORY
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External memory or non-volatile.
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These are magnetic and optical memories.
d b to CPU directly.
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It is a non-volatile memory. yD
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It is used for storage of data in a computer.
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Computer may run without the secondary memory.
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CONTROLrvLOGIC
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LOGICyGATES rig
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Fundamental element ofecomputer
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using diodes or transistors actingrasvelectronic switches
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using vacuum tubes, electromagnetic relays (relay logic), fluidic logic, pneumatic
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logic, optics, molecules, or even mechanical elements.

NOT, AND, OR and XOR

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Inverse gates - NAND, NOR and XNOR
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LOGICyGATES rig
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Main structural part of a digital
s erinput logic requirements are satisfied.
Produces signals of binary 1 or 0 when
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dbebdescribed by means of algebraic
Distinct graphic symbol, and its operation can
expressions. yD
r. NOR, and XNOR.
The seven basic logic gates includes: AND, OR, XOR, NOT, NAND,
K.
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Truth Table: Depicts the relationship between the input-output binary
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in tabular
form.
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One or two binary input (A, B) variables designated and one binary output variable
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AND GATE
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High output only if all its inputs are high

Represented by a dot (.) sign rv

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OR GATE yri
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High output only if any e
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NOT GATE
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Inverted version of the input at its output.

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NANDyGATE
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Equal to an AND gate followed by a NOT gate

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Gives a high output if any of the inputs are
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Represented by a AND gate with a small circle on the output

Small circle represents inversion

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NOR GATE
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Equal to an OR gate followed by a NOT gate

rvhigh
Low output if any of the inputs are
ed
output
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Represented by an OR gate with a small circle on the
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XOR GATE
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Exclusive OR
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rveis high but not both of them
Give a high output if one of its inputs

Represented by an encircled plus sign

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XNORyGATE
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Exclusive NOR Gate
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Inverse operation to the XOR gate rve
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Low output if one of its inputs is high but not both of them
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BOOLEAN p yri ALGEBRA
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t revariables and logic operations
Algebra that deals with binary
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COMBINATIONAL CIRCUIT
gh
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Comprises of logic gates whosereoutputs at any time are determined directly from the
se any regard to previous inputs.
present combination of inputs without
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Information-processing operation fully specified logically by a set of Boolean functions

Input variables, logic gates, and output variables y

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COMBINATIONAL CIRCUIT
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Design Procedure: tr
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The problem is stated. er
v edand required output variables is determined.
The total number of available input variables
b y Dsymbols.
The input and output variables are allocated with letter

r.between inputs and outputs is

The exact truth table that defines the required relationships
derived.
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The simplified Boolean function is obtained from each output. (K-Map) aj
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The logic diagram is drawn. bu
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HALF yADDER rig
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Two binary inputs (augend r
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and addend bits) and two binary outputs ( sum and carry).

erexpressions is: S = x'y+xy', C = xy

The simplified sum of products (SOP)
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FULL ADDERyri
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t readdend , carry from the previous lower significant position
Three binary inputs (augend,
seand carry).
bits) and two binary outputs ( sum
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FULL ADDER
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LATCHESp yri
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es changes its output based on the applied input.
Electronic device that instantly
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We use latch to store either 0 orr1 v
ed
at any specified time.

complement to each other.

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The "SET" and "RESET" are two inputs in a latch, and there are two outputs that are
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Used to store one bit of data and it is a memory device..
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A latch is just like a flip-flop, but latch is not a synchronous device.

The Latch does not work on the clock edges like the flipflop.
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LATCHES p yri
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LATCH
e s
FLIP-FLOP

er stable states of Flip-Flop, which are represented as

A Latch is a bistable device, and the state of the Flip-Flop is also a bistable device and there are two
latch is represented as 0 and 1.
ve0 and 1.
A Latch is a level triggered device.
d b
Flip-flop is an edge triggered device.
We can y
We cannot classify the Latch.
Dflipflops.
classify the flip-flop as synchronous or
asynchronous
r
To form sequential circuits, latches are
. K Flip-Flop is constructed
To form sequential circuits,
from latches along with. an additional clock signal.
constructed from logic gates.
Latches are fast as compared to the Flip-Flop. Flip-Flops are slow as compared
R ajtobthe latches.
Less power is consumed by the Latches.
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More power is consumed by the Flip-Flop.

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LATCHES p yri
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LATCH
e s
FLIP-FLOP
The latches can be clocked or clockless.
ether By the clock signal and binary input, the Flip-Flop
For all the time, Flip-Flops are clocked.
Only binary inputs can be used to operate
latches. veworks.
d bis sensitive to the clock signals and until
The latch is sensitive to the input and as long Flip-Flop
as it is 'On', we can transmit the data.
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there is a change in the input clock signal, it never
changes the output.
The latch cannot be used as a register because Flip-Flop can work r .as a register because it contains
the register requires more advanced K
clock signals in its input.
.
electronic circuits where time plays an
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LATCHES p yri
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LATCH
e s
FLIP-FLOP

not work on the basis of the time signal.er the basis of the clock signal.
The latch is asynchronous because latch does Flip-Flop is synchronous because flip-flop work on

The latch cannot be built from the gates. ve Flip-Flop cannot be built from the latches.
Latches are responsive towards faults on d b are protected toward fault.
Flip-Flops
enable pin.
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FLIP-FLOPS
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Flip flops are an application of logic gates under sequential circuit.
s er Latch. Synchronous are called Flip Flop
Asynchronous or transparent are called
ve
dindefinitely
A flip-flop circuit can remain in a binary state
bystates.(as long as power is delivered to
the circuit) until directed by an input signal to switch
Dr Bounce elimination switch
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Counters, Frequency Dividers, Shift Registers. Storage Registers,

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FLIP-FLOPS
gh
t re
Trigger: state of the flip-flop is changed by a momentary change in the input signal.
s er pulse is either positive or negative.
Pulses trigger clocked flip-flops. A clock
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A pulse start from the initial value of '0', goesdmomentarily to '1', and after a short while,
returns to its initial '0' value.
by
D r. pulses and goes to 1
A positive clock source remains at '0' during the interval between
during the occurrence of a pulse.
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The pulse goes through two signal transition: from '0' to '1' and return from '1' to '0'.

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FLIP-FLOPS
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S-R FLIP-FLOPS
gh
t re flip-flops.
Basic Flip flops stands for SET-RESET
s erNAND gates
Consists of two NOR gates or also two
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S-R FLIP-FLOPS
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CLOCKEDp yri S-R FLIP-FLOPS
gh
t
Additional control input thatredetermines when the state of the circuit is to be changed
s er NOR and NAND gate is the invalid state. This
The limitation with a S-R flip-flop using
problem can be overcome by using a stable
v edSR flip-flop that can change outputs when
by of either the Set or the Reset
certain invalid states are met, regardless of the condition
inputs. Dr
A clock pulse is given to the inputs of the AND Gate.
. K.
Ra '0'.
If the value of the clock pulse is '0', the outputs of both the AND Gates remain
jba
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CLOCKED
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D FLIP-FLOPS
gh
t re of clocked SR flip-flop.
D flip-flop is a slight modification
s
D input is connected to the S inpute rvtheecomplement of the D input is connected to the
and
R input.
db
y toDthe SET state if it is '0' (LOW), the
When the value of CP is '1' (HIGH), the flip-flop moves
flip-flop switches to the CLEAR state.
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D FLIP-FLOPS
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J-K FLIP-FLOPS
gh
t
J-K flip-flop can be consideredreas a modification of the S-R flip-flop.
s er state is more refined and precise than that of
The main difference is that the intermediate
an S-R flip-flop.
v ed
b 'S' and 'R' inputs of the S-R flip-flop.
The characteristics of inputs 'J' and 'K' is same as they

J stands for SET, and 'K' stands for CLEAR.

D r.
K.
When both the inputs J and K have a HIGH state, the flip-flop switches Rtoathe complement
jba
state, so, for a value of Q = 1, it switches to Q=0, and for a value of Q = 0, it switches to Q=1.

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J-K FLIP-FLOPS
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T FLIP-FLOPSyri
gh
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T flip-flop is a much simplerr
es
version of the J-K flip-flop. er
Both the J and K inputs are
v ed
connected and are also called as by
a single input J-K Flip-flop. Dr.
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DECODERS
gh
t re
Combinational circuit that converts binary information from the 'n' coded inputs to a
se
maximum of 2^n different outputs
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DECODERS
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ENCODERS
gh
t re
Maximum of 2^n (or less) input lines and n output lines
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MULTIPLEXERyri
gh
t re2n input lines and a single output line
Combinational circuit that has
s er circuit
Multi-input and single-output combinational
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The binary information is received from the inputd blines and directed to the output line. On
y Ddata inputs will be connected to the
the basis of the values of the selection lines, one of these
output.
r.
K. lines. So, there is a total
Unlike encoder and decoder, there are n selection lines and 2n input
Ra
of 2N possible combinations of inputs. A multiplexer is also treated as Mux.
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MULTIPLEXER
gh
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DEMULTIPLEXER
gh
t re circuit that has only 1 input line and 2N output lines.
A De-multiplexer is a combinational
s
Total of 2n possible combinations ofeinputs.
rveDe-multiplexer is also treated as De-mux.
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COMPARISON yri
gh
t
D Flip-Flop: When the clockrtriggers, the value remembered by the flip-flop becomes the
es
value of the D input (Data) at thate instant.
rve
d
T Flip-Flop: When the clock triggers, the value remembered by the flip-flop either toggles or
remains the same depending on whether the T input by(Toggle) is 1 or 0.
Dr
.
J-K Flip-Flop: When the clock triggers, the value remembered by the flip-flop toggles if
the J and K inputs are both 1 and the value remains the same ifK
.
both are 0; if they are
RKa(Kill) input is 1.
different, then the value becomes 1 if the J (Jump) input is 1 and 0 if the
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COMPARISON yri
gh
t
S-R Flip-Flop: When the clock retriggers, the value remembered by the flip-flop remains
unchanged if R and S are both 0, sbecomes
er 0 if the R input (Reset) is 1, and becomes 1 if
ve if both inputs are 1. (In Logisim, the value in
the S input (Set) is 1. The behavior in unspecified
the flip-flop remains unchanged.)
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BUILDING A rSIMPLE
ve MEMORY
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BUILDING p yri A SIMPLE MEMORY
gh
t
To store a single bit, were
can use Flip flops or latches

Larger memories can be builte

s byr
v ed(i) “Horizontal” expansion to increase
Using a 2D array of these 1-bit devices
word size by
Dr
(ii) “Vertical” expansion to increase number of words

Dynamic RAMs use a tiny capacitor to store a bit

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R ajtobstore a
Design concepts are mostly independent of the actual technique used
bit of data ab
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BUILDING yri A SIMPLE MEMORY
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4X3 memory design re
t
s er
Uses 12 D flip flops in a 2D array
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d abword)
Uses a 2-to-4 decoder to select a row (i.e.
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Multiplexers are used to gate the appropriate output
r . signal
A single WRITE (WR) is used to serve as a write and read K. – zero is used to
indicate write operation – one is used for read operation Ra
Two address lines are needed to select one of four words of 3 bits eachjb
ab
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BUILDING
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NUMBER rve SYSTEM
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p yri REPRESENTATION
STORAGE
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BIT AND p yri BYTE
gh
t r stored in a computer and it has a value of 0 or 1
A bit is the smallest unit of data
es
It’s like a switch, on (1) or off (0) e
r v in RAM and auxiliary storage devices by two-
In computers, bits are stored electronicallye

state digital circuits

d by
Drrepresents, but software
The storage device itself doesn’t know what the bit pattern
. K stores and interprets the
(application software, operating system, and I/O device firmware)

pattern
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That is, data is coded then stored and when retrieved it is decoded jba
A byte is a string of 8 bits and is called a character when the data is text bu
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BITS, y p BYTES, AND WORDS
rig
ht
re(a 1 or 0).
A bit is a single binary digit
A byte is 8 bits
s er
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A word is 32 bits or 4 bytes
Long word = 8 bytes = 64 bits
d by
Quad word = 16 bytes = 128 bits
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Programming languages use these standard number of bits when organizing data
storage and access. K.
What do you call 4 bits? Ra
(hint: it is a small byte)
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NUMBER p yri SYSTEMS
gh
tr
es in RAM can be thought of as the values 1 and 0,
respectively.
e
The on and off states of the capacitors
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Therefore, thinking about how informationd
binary (base 2) number system.
b
is stored in RAM requires knowledge of the
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Let’s review the decimal (base 10) number system first.
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THE DECIMAL NUMBER SYSTEM
gh
t re is a positional number system.
• The decimal number system
Example: se
2 1 rv
•
Value
Position
5 6
4 3 2 1
ed 1 X 100 = 1
2 X 101 = 20
Address 103 102 101 100 by 6 X 102 = 600
D5rX 103 = 5000
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THE DECIMAL NUMBER SYSTEM (CON’T)
gh
t
The decimal number systemrisealso known as base 10. The values of the positions are
•
s er
calculated by taking 10 to some power.

Why is the base 10 for decimal numbers? e

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•
db
o
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Because we use 10 digits, the digits 0 through 9.

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THE BINARYyri NUMBER SYSTEM
gh
•
t
The binary number system reis also known as base 2. The values of the positions are
calculated by taking 2 to somesepower.
rv
Why is the base 2 for binary numbers?e
•
d
Because we use 2 digits, the digits 0 and 1.b
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THE BINARYyri NUMBER SYSTEM (CON’T)
gh
t reis also a positional numbering system.
• The binary number system
s ether binary system uses only two digits, 0 and 1.
• Instead of using ten digits, 0 - 9,

Example of a binary number and thee

v
• d bof the positions:
values

1 0 0 1 1 0 1 yD
26 25 24 23 22 21 20
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CONVERTINGyri FROM BINARY TO DECIMAL
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1 0 0 1 1 0 1 es 1 X 20 = 1
0e r
1 X 22 v
26 25 24 23 22 21 20 X 21 = 0
= e
4
1 X 23 = 8 d
20 = 1 24 = 16
21 = 2 25 = 32 0 X 24 = 0
by
22 = 4 26 = 64 0 X 25 = 0 Dr
23 = 8 1 X 26 = 64 .K
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CONVERTING FROM BINARY TO DECIMAL (CON’T)
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Practice conversions: re
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Decimal rv
Binary
ed
11101
by
1010101 Dr
100111
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CONVERTING FROM DECIMAL TO BINARY (CON’T)
rig
ht
• re values up to the number being converted.
Make a list of the binary place
Perform successive divisions bys
•
er
2, placing the remainder of 0 or 1 in each of the positions

•
from right to left.
Continue until the quotient is zero.
v ed
• Example: 4210
by
25 24 23 22 21 20 Dr
32 16 8 4 2 1 .K
1 0 1 0 1 0 .R
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CONVERTING FROM DECIMAL TO BINARY (CON’T)
rig
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• Practice conversions: re
se
• Decimal rve
Binary

• 59
d b
• 82 yD
• 175 r.
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WORKING p yri WITH LARGE NUMBERS
gh
tr
0 1 0 1 0 0 0 0 1 0 1 0 0 1 1 1e
•
se
= ?

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• d there
Humans can’t work well with binary numbers;
b are too many digits to deal with.

• y DTherefore, we sometimes use the

Memory addresses and other data can be quite large.
hexadecimal number system. r.
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THE HEXADECIMAL NUMBER SYSTEM
gh
tr
•The hexadecimal number essystem is also known as base 16. The values of the
er 16 to some power.
v
positions are calculated by taking

Why is the base 16 for hexadecimale

• d b?
numbers

•Because we use 16 symbols, the digits 0 and 1y

and the letters A through F.
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THE HEXADECIMAL NUMBER SYSTEM (CON’T)
rig
ht
• Binary
re
Decimal Hexadecimal Binary Decimal Hexadecimal
• 0 0 0
se 1010 10 A
•
• 10
1 1
2
1
2
rve
1011
1100
11
12
B
C
• 11 3 3 db
1101 13 D
•
•
100
101
4
5
4
5
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1110
1111
14
15
E
F
110 6 6 r.
•
• 111 7 7 K.
• 1000 8 8 Ra
• 1001 9 9
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THE HEXADECIMAL NUMBER SYSTEM (CON’T)
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re number and the values of the positions:
Example of a hexadecimal
se
3 C 8 B 0 5 v1
r e
166 165 164 163 162 161 160d
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Binary: 1 0 1 0 0 0 0 1 0 1 0r0e1 1 12
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Decimal: 2064710
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Hexadecimal: 50A716 yD
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BINARYp yriREPRESENTATION
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es(as suppose to decimal or octal, etc..)?
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representation.

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possible values.
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Because the electronic signals are easier to maintain if they
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BINARY p yriREPRESENTATION
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One bit can be either 0 orr1.eTherefore, one bit can represent only two things.
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d b of 0 and 1 that can be made from
four things because there are four combinations
two bits: 00, 01, 10,11. yD
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of bits by 1, we double the number of things we can represent.
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DATA REPRESENTATION
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DATAyREPRESENTATION
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Symbols
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Roman Numbers ve
db
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Positional system – radix ten or decimal system

133 = 1 X 10^2 + 3 X 10^1 + 3 * 10^0 r.

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Binary Number System Ra
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DATAyREPRESENTATION
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Octal
r es
5378
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5 * 8^2 + 3 * 8^1 + 7 * 8^0

HexaDecimal
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Ranges from 0 to F Dr
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PRIMITIVE yri DATA STRUCTURE
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Basic representation of any r es
data.
Integer er
A natural number, the negative of av ed number, and 0.
natural

way
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Real Numbers r.
Integer + floating decimal values K.
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BASICyOPERATIONS ON PRIMITIVE DS
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CREATE
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Declare n, a, b as integer

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SELECTION
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INTEGER
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Represent the quantity and discrete in nature
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{…-(n+1), -n,…,-2,-1,0, 1, 2, …., n, (n+1),..}
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REPRESENTATION OF INTEGER
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Signed numbers
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integer
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The length of storage is set by the data type the programmer specifies forjabvariable
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UNSIGNED yri INTEGER
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es
erstorage location
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For example, the decimal number 9 is represented
000010012 = 910 yD
When stored in a 2-byte location, 9 would be represented asr0000000000001001
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UNSIGNED yri INTEGER
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One may use the following re to work with binary numbers:
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For example, given 00001001, what decimal number does it represent?

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Add the non-negative powers of two, that is, 8 + 1 = 9
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One may use the same tablereto go the other way, that is, given the decimal number 13,
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Find the largest power of 2 that doesn’t exceed the number and place a 1 in that cell:

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Subtract that power of 2 from the number and use this as the newR number: 13 – 8 = 5
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UNSIGNED yri INTEGER
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Then continue in this way until
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Now, 5 – 4 = 1, and so finally:
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Note that 8 + 4 + 1 = 13
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UNSIGNED p yri INTEGER
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t rein a memory location that is not large enough we have what is
If one tries to store a number
called overflow
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In this case, depending on the system, onee d orbmay not receive an error message
may

So, one must not store a number that is larger thanythe maximum for a given length of
storage
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For example, if one tries torestore 256 in 1-byte there is overflow because the largest value
storable in 8 bits is 255 as one s eseer from the following table:
can
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Note that 128 + 64 + 32 + 16 + 8 + 4 + 2 + 1 = 255 r.
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SIGNED p yriINTEGER
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A sign-and-magnitude format reis used to allow for positive and negative numbers (and zero)
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rvbit:e 0 for positive or zero, 1 for negative
The leading bit is designated as the sign

The remaining bits represent the value

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SIGNED p yriPOSITIVE INTEGER
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To determine what the sign-and-magnitude representation of a positive decimal
number is: se
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Convert the decimal number to binaryve
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If needed add leading zeros to fill the storage
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For example, decimal 12 is represented in 1-byte as 00001100 because 8 + 4 = 12:
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SIGNED p yriPOSITIVE INTEGER
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Leftmost bit will be 0 indicating positive
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Convert the remaining bits to a decimal number

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CONCERNS
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Not economical re
se operation (+7+ (-6)) or (-7+ 6)
Extra Effort required to perform
rvethe sign of the operand.
Additional operation required to find
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Hence, it is proposed to have radix complement
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2’S COMPLEMENT
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Two’s complement is tstillra sign-and-magnitude format
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In two’s complement, some of
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0
Modulo M = R N
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binythe modulo M.
R is the radix, N is the number of bits required
-x = M – x Dr
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2’S COMPLEMENT
Integer
gh 2’s Complement Integer 2’s Complement
0
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0000 -1 (16-1=15) 1111
1
es
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2 0010
er -3 (16-3=13) 1101
3 0011
ve -4 (16-4=12) 1100
4
5
0100
0101 db -5 (16-5=11)
-6 (16-6=10)
1011
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6 0110 yD -7 (16-7=9) 1001
7 0111 -8 (16-8=8)
r. 1000

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2’S COMPLEMENT
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Two’s complement is the standard
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way
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2’S COMPLEMENT
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complement representation is: e
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Ignore the sign and convert the decimal number to binary

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Flip all the bits

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CONCERNS
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Only addition and complement operation sufficient for all operations.
seto overflow.
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CONCERNS
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Addition: 5 + 3 = 5 + (+3)
Subtraction : 5 - 3 = 5 + (-3)se
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DIMINISHED yri RADIX-COMPLEMENT
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DIMINISHED
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Integer es
1’s Complement Integer 1’s Complement
0 0000 er -1(16-1-1) 1110
1 0001 ve -2(16-1-2) 1101
2 0010 db -3(16-1-3) 1100
3
4
0011
0100
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-5(16-1-5)
1011
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5 0101 r.
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6 0110 -7(16-1-7) K. 1000
7 0111 -0(16-1-0)
Ra 1111

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CONCERNS
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Only addition and complement operation sufficient for all operations.
Available of both -0 and +0 swhich
er may lead to computational issues.
3+4 = 7, 3 -4 = -1, -3 + 4 result in ‘0’.v
7+7 = -1, -7 – 7 = 0
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Error due to overflow. yD
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OVERFLOW p yri RULES
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Addition of 2 +ve or 2 –ve numberse rvnotecause overflow if the resulting sum has the
does
same sign as the two operands.
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INTEGER p yri REPRESENTATION
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Range of values for n-bitestorage representation is 2 -1
se n

In 2’s complement, 2 <= N <= 2rv-1

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n-1 n-1

In 1’s complement, 2 +1 <= N <= 2 -1

n-1 n-1
by
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BINARY p yriCODED DECIMAL (BCD)
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escomputers adopt BCD format to represent integer
Recent computers and large
53 in a 4 bit representation ise rv0011
0101 0
Mainly used in IBM mainframes ed
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-53 = 0101 0010 1 Dr
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BINARY p yriCODED DECIMAL (BCD)
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es of BCD have different rules.
The addition and subtraction
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REAL yNUMBERS rig
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Fixed Point Representation
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In the floating-point notation a r venumber is represented by a 32-bit string.
real
d b of Mantissa and remaining 8-bit
Including in 32-bit, 24-bit use for representation
y D and the exponent are twos
use for representation of Exponent .Both the mantissa
complement binary Integers.
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REAL yNUMBERS rig
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refrom distance of sun to earth (16,800,000,000,000) and
To assign values ranging
s er
energy emission (0.000000000000832).
v edof the computer.
Precision is directly affected in the cost

The general form of a real number in radix Ry

b is
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F-1 f-2… f-M X RE
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Where F f … f is the fractional part or mantissa
-1 -2 -M .R
And E is the exponent which is always integer ajb
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REAL yNUMBERrig
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re Vs Accurate measurement
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Round off Error - Approximation

14 rve
168 X 10 vs 168,817,210,391,704 kms

General Format
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REAL yNUMBER - EXCESS NOTATION
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This fixed length notation
s er makes it possible to store negative (-) and
altered once set at the beginning)
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non-negative (+ including zero) valuesedby treating the right-most digits referred
by the sign of the number.
to as the Most Significant Bit (MSB) as representing

In excess notation the MSB also known as the signD

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REAL yNUMBER - EXCESS NOTATION
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h t r for example: 0110 the digit/column value of the most
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significant bit is 8, so 4 bit patterns
er
To convert this example find the sum valueveof the entire pattern as though a standard
binary number: db
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REAL yNUMBER - EXCESS NOTATION
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re 11110, the digit/column value of the most significant bit is 16,
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number:
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To convert this example find the sum value of the entire pattern as though a standard binary
by
(1x16) + (1x8) + (1x4) + (1x2) + (0x1) = 16 + 8 + 4 + 2 + 0 = 30 D
r.
K. result is a signed value, + 14.
Then subtract the current excess value, 16, from the sum, (30 - 16). The
R anegative
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represents the non-negative sign to denote a signed value.
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MANTISSA
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F must lie in the interval
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DATAyINTERPRETATION IN COMPUTER
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Character String
r es
e rvthee eight bits 11000000 is used to represent
For example, in some computers,
d b "B" and another for each
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y Dmachine. So, the character
character that has a representation in a particular
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string "AB" would be represented by the bit string 1100000011000001.
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CHARACTER yri REPRESENTATION
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The American Standard
esof the characters
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for Information Interchange (ASCII) is the scheme used

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ASCII charts come in different flavors:
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Some have 7 bit strings, some 8 or more
db
Some show the binary code for the various characters as well as the code
y Dhex, octal
represented in other number systems, e.g., decimal,
For example, the letter A has the ASCII code:
1000001 in binary for a 7-bit chart
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Note:. AllKfour of these numbers
65 in decimal .
represent the
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41 in hex
different number
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101 in octal
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p yri OF ASCII CHART
SUBSET
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ASCII y p CHART
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Uppercase characters have
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Uppercase characters come beforee
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Numbers come before letters db

The special characters are spread around yD
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codes increment by one
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ASCII y p CHART
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The only difference between
e sefor a lowercase character is 32 greater than the
sixth bit, that is, the decimal code
uppercase character’s decimal code rv
ed
by (nonprintable) like bell, backspace,
ASCII codes before decimal 32 are control characters
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The final ASCII code in the 7-bit chart is the control character K.with decimal code 127
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EXTENDED p yri ASCII & UNICODE
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The eight-bit ASCII charttis rsometimes called Extended ASCII
es
The seven-bit ASCII codes are the e
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same in eight-bit chart except have a zero at the left

Some manufactures use the extra bit to created additional special characters, these
bfory½, or 246 for ÷
however are nonstandard, e.g., using decimal 171
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Unicode is another scheme developed so that the many symbolsr. in international languages
may be represented. It also uses bit patterns. UTF-32 uses 32 K bits.
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EBCDIC
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re decimal interchange code (EBCDIC) is an 8-
The extended binary coded
s
bit alphanumeric code which e hasr been extensively used by IBM in its mainframe
applications.
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by8-bit code.
ASCII code is a 7-bit code whereas EBCDIC is an
D r. is used primarily in
ASCII code is more commonly used worldwide while EBCDIC
large IBM computers.
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LOW LEVEL rve LANGUAGE
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INSTRUCTIONyri SET
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eofsmachine language instructions that a particular processor
Computer instructions are a set
er performs tasks on the basis of the instruction provided.
understands and executes. A computer
ve
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An instruction comprises of groups called fields.
by fields include:
The Operation code (Opcode) field which specifies the operation to be performed.
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The Address field which contains the location of the operand, i.e., register or memory location.

The Mode field which specifies how the operand will be located.
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INSTRUCTION CODE FORMAT
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Each microprocessor has respecific set of instructions
seby 8-bit byte called OPCODE or instruction byte
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Memory - reference instruction v
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Register - reference instruction db
Input-Output instruction yD
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INSTRUCTION yri SET
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instructions in each of the followinge rve
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Arithmetic, logical and shift instructions db

y Dmemory and processor registers.
A set of instructions for moving information to and from
r . Kthat check status conditions.
Instructions which controls the program together with instructions

Input and Output instructions

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CLASSIFICATION OF INSTRUCTION
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Data Transfer – transfer
MOV B, A MVI A Data se
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DATAyTRANSFERrig
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LDA <Addr> – Load accumulator
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LDAX <Register> Load accumulator
LXI <Register> <Address>
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LHLD <Address> - Load to Register ‘L’ d
STA, STAX – Store Accumulator Direct
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INSTRUCTION TYPES
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Data operation se
Program control
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DATAyTYPES
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Character (ASCII, Unicode)
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ADDRESSING MODES - DIRECT
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ADDRESSING MODES - INDIRECT
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ADDRESSING MODES - REGISTER DIRECT
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ADDRESSING MODES - REGISTER INDIRECT
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ADDRESSING MODES - IMMEDIATE
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ADDRESSING MODES - IMPLICIT
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ADDRESSING MODES - RELATIVE
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ADDRESSING MODES - INDEXED
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INSTRUCTION FORMATS
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More operands = less instructions
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Register set se
Memory access information
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ISA ATTRIBUTES
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p yri 8085 PROGRAM CODE
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HDL is a language thatre describes the hardware of digital systems in a textual
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hardware structures and behaviors by
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parallel instructions
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The principal feature of ea hardware description language is that it contains the
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variety of performance characteristics and features.

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VERILOG p yri DESIGN CONCEPT
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comp2 instantiates sub3
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PRIMITIVES
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type.
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Primitives are pre-defined module types. They can be instantiated just like any other module
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v ed because for the most part, they are simple
The Verilog primitives are sometimes called gates,
logical primitives. by
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REGISTER
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Registers are storage elements. Values are stored in registers in procedural assignment
statements. se
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reg r1, r2; y D
reg [31:0] bus32;
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integer i;
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real fx1, fx2;
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There are four types of registers:
s etype.
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db
bit wide to 1 million bits wide. A register declared as a reg is always unsigned.

2. Integer Integers are 32 bit signed values. Arithmetic ydone

D on integers is 2's complement.

3. Time Registers declared with the time keyword are 64-bitrunsigned

. K integers.
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EXAMPLE
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Primitives are instantiated in a module like any other module instance. For example, the
se
module represented by this diagram would be instantiated:
module test; rve
wire n1, n2; db ain n2
reg ain, bin;
and and_prim(n1, ain, bin);
y D bin
n1

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not not_prim(n2, n1);
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endmodule
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ASSIGN p yri
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t re known as data flow statements because they describe
Continuous assignments are sometimes
how data moves from one place, s era net or register, to another. They are usually thought
either
of as representing combinational logic. ve

Example:
d by
assign w1 = w2 & w3; Dr
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SOLUTIONSp yri USING “ASSIGN” AND “WIRE”
gh
module AOI (input A, B, C,tD,
output F);
res end of a block comment */

/* start of a block comment er // Equivalent...

wire F;
v wire AB = A & B;
ed wire CD = C & D;
wire AB, CD, O; bwirey O = AB | CD;
wire FD
assign AB = A & B;
assign CD = C & D; r
= ~O;
endmodule. //K end of Verilog code
assign O = AB | CD; .R
assign F = ~O; ajb
end of a block comment */
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MODULE p yri ABC IN VABC
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module vabc (d, s);
t re
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input [1:0] s;
r ved[0], s[1], s[0]);
output [3:0] d; abc a1 (d[3], d[2], d[1],
db
endmodule
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MODULEyDEFINITION + GATE LEVEL DIAGRAM
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module abc (a, b, c, d, s1, s0);

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not (s1_, s1), (s0_, s0);

and (a, s1_, s0_);

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p yri MODULE EXAMPLE
VERILOG
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module shift (shiftOut, dataIn, shiftCount);
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parameter width = 4;
output [width-1:0]
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shiftOut; input [width-1:0] dataIn;
input [31:0] shiftCount;
db
assign shiftOut = dataIn << shiftCount;
endmodule yD
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This module can now be used for shifters of various sizes, simply by changing the width parameter.
Parameters can be changed per instance.
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shift sh1 (shiftedVal, inVal, 7); //instantiation of shift module defparam sh1.width = 16; // parameter
redefinition
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NET COMPONENT (CONNECTORS)
gh
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es
Nets are the things that connect model components together. They are usually thought of as wires in a
circuit. Nets are declared in statements like this:
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net_type [range] [delay3] list_of_net_identifiers ;
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or
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net_type [drive_strength] [range] [delay3]
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list_of_net_decl_assignments ;

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wire w1, w2;
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wire wire_number_5 = wire_number_2 & wire_number_3;
& here represents AND operation (AND gate)
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ADDER : LETS WRITE VERILOG SOURCE
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