PD-95025A

IRFR5305PbF
IRFU5305PbF
l Ultra Low On-Resistance HEXFET® Power MOSFET
l Surface Mount (IRFR5305) D
l Straight Lead (IRFU5305) VDSS = -55V
l Advanced Process Technology
l Fast Switching RDS(on) = 0.065Ω
l Fully Avalanche Rated G
l Lead-Free ID = -31A
S
Description
Fifth Generation HEXFETs from International Rectifier utilize
advanced processing techniques to achieve extremely low
on-resistance per silicon area. This benefit, combined with
the fast switching speed and ruggedized device design that
HEXFET® Power MOSFETs are well known for, provides
the designer with an extremely efficient and reliable device
for use in a wide variety of applications.

The D-Pak is designed for surface mounting using vapor

phase, infrared, or wave soldering techniques. The straight
lead version (IRFU series) is for through-hole mounting D-Pak I-Pak
applications. Power dissipation levels up to 1.5 watts are IRFR5305 IRFU5305
possible in typical surface mount applications.

Absolute Maximum Ratings

Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ -10V -31
ID @ TC = 100°C Continuous Drain Current, VGS @ -10V -22 A
IDM Pulsed Drain Current † -110
PD @TC = 25°C Power Dissipation 110 W
Linear Derating Factor 0.71 W/°C
VGS Gate-to-Source Voltage ± 20 V
EAS Single Pulse Avalanche Energy‚† 280 mJ
IAR Avalanche Current† -16 A
EAR Repetitive Avalanche Energy 11 mJ
dv/dt Peak Diode Recovery dv/dt Ġ -5.0 V/ns
TJ Operating Junction and -55 to + 175
TSTG Storage Temperature Range °C
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting torque, 6-32 or M3 srew 10 lbf•in (1.1N•m)

Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 1.4
RθJA Junction-to-Ambient (PCB mount)* ––– 50 °C/W
RθJA Junction-to-Ambient** ––– 110
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Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage -55 ––– ––– V VGS = 0V, ID = -250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– -0.034 ––– V/°C Reference to 25°C, ID = -1mA
RDS(on) Static Drain-to-Source On-Resistance ––– ––– 0.065 Ω VGS = -10V, ID = -16A „
VGS(th) Gate Threshold Voltage -2.0 ––– -4.0 V VDS = VGS, ID = -250µA
gfs Forward Transconductance 8.0 ––– ––– S VDS = -25V, ID = -16A†
––– ––– -25 VDS = -55V, VGS = 0V
IDSS Drain-to-Source Leakage Current µA
––– ––– -250 VDS = -44V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V
IGSS nA
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V
Qg Total Gate Charge ––– ––– 63 ID = -16A
Qgs Gate-to-Source Charge ––– ––– 13 nC VDS = -44V
Qgd Gate-to-Drain ("Miller") Charge ––– ––– 29 VGS = -10V, See Fig. 6 and 13 „†
td(on) Turn-On Delay Time ––– 14 ––– VDD = -28V
tr Rise Time ––– 66 ––– ID = -16A
ns
td(off) Turn-Off Delay Time ––– 39 ––– RG = 6.8Ω
tf Fall Time ––– 63 ––– RD = 1.6Ω, See Fig. 10 „†
D
Between lead,
LD Internal Drain Inductance ––– 4.5 –––
6mm (0.25in.)
nH G
from package
LS Internal Source Inductance ––– 7.5 –––
and center of die contact … S

Ciss Input Capacitance ––– 1200 ––– VGS = 0V

Coss Output Capacitance ––– 520 ––– pF VDS = -25V
Crss Reverse Transfer Capacitance ––– 250 ––– ƒ = 1.0MHz, See Fig. 5 †

Source-Drain Ratings and Characteristics

Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current MOSFET symbol D

––– ––– -31

(Body Diode) showing the
A
ISM Pulsed Source Current integral reverse G
––– ––– -110
(Body Diode)  p-n junction diode. S

VSD Diode Forward Voltage ––– ––– -1.3 V TJ = 25°C, IS = -16A, VGS = 0V „
trr Reverse Recovery Time ––– 71 110 ns TJ = 25°C, IF = -16A
Qrr Reverse RecoveryCharge ––– 170 250 nC di/dt = -100A/µs „†

Notes:
 Repetitive rating; pulse width limited by „ Pulse width ≤ 300µs; duty cycle ≤ 2%.
max. junction temperature. (See Fig. 11) … This is applied for I-PAK, LS of D-PAK is measured between
‚ VDD = -25V, starting TJ = 25°C, L = 2.1mH lead and center of die contact.
RG = 25Ω, IAS = -16A. (See Figure 12) † Uses IRF5305 data and test conditions.
ƒ ISD ≤ -16A, di/dt ≤ -280A/µs, VDD ≤ V(BR)DSS,
T J ≤ 175°C
* When mounted on 1" square PCB (FR-4 or G-10 Material).
For recommended footprint and soldering techniques refer to application note #AN-994.
** Uses typical socket mount.

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 IRFR/U5305PbF
1000 1000 VGS
VGS
TOP - 15V TOP - 15V
- 10V - 10V
- 8.0V - 8.0V

-ID , Drain-to-Source Current (A)

- 7.0V
-ID , Drain-to-Source Current (A)

- 7.0V
- 6.0V - 6.0V
- 5.5V - 5.5V
- 5.0V - 5.0V
BOTTOM - 4.5V BOTTOM - 4.5V
100 100

10 10

-4.5V
-4.5V

20µs PULSE WIDTH 20µs PULSE WIDTH

TJc = 25°C TCJ = 175°C
1 A 1 A
0.1 1 10 100 0.1 1 10 100
-VDS , Drain-to-Source Voltage (V) -VDS , Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

100 2.0
I D = -27A
R DS(on) , Drain-to-Source On Resistance
-ID , Drain-to-Source Current (A)

TJ = 25°C
1.5
TJ = 175°C
(Normalized)

10 1.0

0.5

V DS = -25V
20µs PULSE WIDTH V GS = -10V
1 0.0
A A
4 5 6 7 8 9 10 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
-VGS , Gate-to-Source Voltage (V) TJ , Junction Temperature (°C)

Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance

Vs. Temperature

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IRFR/U5305PbF
2500 20
V GS = 0V, f = 1MHz I D = -16A
C iss = Cgs + C gd , Cds SHORTED V DS = -44V

-VGS , Gate-to-Source Voltage (V)

C rss = C gd V DS = -28V
2000 C oss = C ds + C gd 16
Ciss
C, Capacitance (pF)

Coss
1500 12

1000 8
Crss

500 4

FOR TEST CIRCUIT

SEE FIGURE 13
0 A 0 A
1 10 100 0 10 20 30 40 50 60
-VDS , Drain-to-Source Voltage (V) Q G , Total Gate Charge (nC)

Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs.

Drain-to-Source Voltage Gate-to-Source Voltage

1000 1000
OPERATION IN THIS AREA LIMITED
-ISD , Reverse Drain Current (A)

BY R DS(on)
-ID , Drain Current (A)

100

100
100µs
TJ = 175°C
10
1ms
TJ = 25°C

TC = 25°C 10ms
TJ = 175°C
VGS = 0V Single Pulse
10 A 1 A
0.4 0.8 1.2 1.6 2.0 1 10 100
-VSD , Source-to-Drain Voltage (V) -VDS , Drain-to-Source Voltage (V)

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area

Forward Voltage

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 IRFR/U5305PbF
RD
VDS
35
VGS
D.U.T.
30 RG -
+ VDD
-ID , Drain Current (A)

25
-10V
Pulse Width ≤ 1 µs
20 Duty Factor ≤ 0.1 %

15 Fig 10a. Switching Time Test Circuit

10
td(on) tr t d(off) tf
VGS
5 10%

0
25 50 75 100 125 150 175
TC , Case Temperature ( °C)
90%
VDS

Fig 9. Maximum Drain Current Vs. Fig 10b. Switching Time Waveforms
Case Temperature

10
Thermal Response (Z thJC )

1
D = 0.50

0.20

0.10
PDM
0.1 0.05
t1
0.02 SINGLE PULSE
0.01 (THERMAL RESPONSE) t2

Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.01
0.00001 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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IRFR/U5305PbF
VDS L
700
ID

E AS , Single Pulse Avalanche Energy (mJ)

- TOP -6.6A
RG D.U.T -11A
+ VDD 600
IAS A BOTTOM -16A
-20V DRIVER
tp 0.01Ω 500

400

15V 300

200
Fig 12a. Unclamped Inductive Test
Circuit
I AS 100

VDD = -25V
0 A
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (°C)

Fig 12c. Maximum Avalanche Energy

Vs. Drain Current
tp
V(BR)DSS

Fig 12b. Unclamped Inductive Waveforms

Current Regulator
Same Type as D.U.T.

50KΩ
QG 12V .2µF
.3µF
-10V -
QGS QGD D.U.T. +VDS

VGS
VG
-3mA

IG ID
Charge Current Sampling Resistors

Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit

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 IRFR/U5305PbF
Peak Diode Recovery dv/dt Test Circuit

+ Circuit Layout Considerations

D.U.T
• Low Stray Inductance
• Ground Plane
ƒ
• Low Leakage Inductance
Current Transformer
-

+
‚
„
- +
-

 **
RG • dv/dt controlled by RG +
• ISD controlled by Duty Factor "D"
*
VDD
-
• D.U.T. - Device Under Test
VGS*

* Reverse Polarity for P-Channel

** Use P-Channel Driver for P-Channel Measurements

Driver Gate Drive

P.W.
Period D=
P.W. Period

[VGS=10V ] ***

D.U.T. ISD Waveform

Reverse
Recovery Body Diode Forward
Current Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
[VDD]
Re-Applied
Voltage Body Diode Forward Drop
Inductor Curent

Ripple ≤ 5% [ISD ]

*** VGS = 5.0V for Logic Level and 3V Drive Devices

Fig 14. For P-Channel HEXFETS

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IRFR/U5305PbF
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)

D-Pak (TO-252AA) Part Marking Information

EXAMPLE: THIS IS AN IRFR120
PART NUMBER
WITH ASSEMBLY INTERNAT IONAL
LOT CODE 1234 RECTIF IER IRFU120 DATE CODE
ASSEMBLED ON WW 16, 1999 LOGO 916A YEAR 9 = 1999
IN THE ASSEMBLY LINE "A" 12 34 WE EK 16
LINE A
Note: "P" in ass embly line pos ition ASSEMBLY
indicates "Lead-Free" LOT CODE

OR
PART NUMBER
INT ERNATIONAL
RECTIFIER IRFU120 DATE CODE
LOGO P = DESIGNATES LEAD-FREE
PRODUCT (OPT IONAL)
12 34
YEAR 9 = 1999
ASSEMBLY WEEK 16
LOT CODE
A = ASSEMBLY S IT E CODE

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I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)

I-Pak (TO-251AA) Part Marking Information

EXAMPLE : T HIS IS AN IRF U120 PART NUMBER
INT ERNATIONAL
WIT H ASS EMB LY DAT E CODE
RE CT IFIE R IRF U120
LOT CODE 5678
LOGO 919A YEAR 9 = 1999
AS SE MBLED ON WW 19, 1999
56 78 WEEK 19
IN T HE ASS EMBLY LINE "A"
LINE A
ASS EMBLY
Note: "P" in as s embly line
LOT CODE
pos ition indicates "Lead-F ree"

OR
PART NUMB ER
INT ERNAT IONAL
RECT IFIER IRF U120 DAT E CODE
LOGO P = DES IGNAT ES LEAD-FREE
56 78 PRODUCT (OPT IONAL)
YEAR 9 = 1999
AS SEMBLY WEEK 19
LOT CODE A = AS SEMBLY SIT E CODE

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IRFR/U5305PbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)

TR TRR TRL

16.3 ( .641 ) 16.3 ( .641 )

15.7 ( .619 ) 15.7 ( .619 )

12.1 ( .476 ) FEED DIRECTION 8.1 ( .318 )

FEED DIRECTION
11.9 ( .469 ) 7.9 ( .312 )

NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.

13 INCH

16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.

Data and specifications subject to change without notice.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.12/04
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Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
IMPORTANT NOTICE
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characteristics (“Beschaffenheitsgarantie”) . contact your nearest Infineon Technologies office
(www.infineon.com).
With respect to any examples, hints or any typical
values stated herein and/or any information
regarding the application of the product, Infineon WARNINGS
Technologies hereby disclaims any and all Due to technical requirements products may
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applicable legal requirements, norms and Technologies, Infineon Technologies’ products may
standards concerning customer’s products and any not be used in any applications where a failure of
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The data contained in this document is exclusively
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responsibility of customer’s technical departments
to evaluate the suitability of the product for the
intended application and the completeness of the
product information given in this document with
respect to such application.