FET BIASING_PART 1

Chapter 7
Reference book: Electronic Devices and Circuit Theory
(11th Edition) Robert F. Boylestad

1
 OBJECTIVES
■ Be able to perform a dc analysis of JFET, MOSFET, and MESFET networks.

■ Become proficient in the use of load-line analysis to examine FET networks.

■ Develop confidence in the dc analysis of networks with both FETs and BJTs.

■ Understand how to use the Universal JFET Bias Curve to analyze the various FET
configurations.

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 GENERAL RELATIONSHIPS
■ For all FETs: IG  0A ID = IS
VGS 2
■ For JFETs and Depletion-Type MOSFETs: ID = IDSS(1− )
VP

■ For Enhancement-Type MOSFETs: I D = k (VGS −VT ) 2

■ BJT: Linear Relationship between IB and IC

■ FET: Non-linear Relationship between VGS and ID.

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 COMMON FET BIASING CIRCUITS
■ JFET
■ Fixed – Bias
■ Self-Bias
■ Voltage-Divider Bias

■ Depletion-Type MOSFET
■ Self-Bias
■ Voltage-Divider Bias

■ Enhancement-Type MOSFET
■ Feedback Configuration
■ Voltage-Divider Bias
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 FIXED-BIAS JFET
■ The simplest biasing arrangements:

IG  0A ID = IS
VGS 2
ID = IDSS(1− )
VP
■ For the DC analysis,
■ Capacitors are open circuits

IG  0A VRG = I G RG = (0 A) RG = 0V

■ The zero-volt drop across RG permits replacing

RG by a short-circuit.

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 FIXED-BIAS JFET
■ Can be solved using either Mathematical Approach or Graphical Approach:
Mathematical Approach Graphical Approach
VGS = −VGG

VDS = VDD − I D RD

VS = 0

VD = VDS

VG = VGS

VGS 2
I D = I DSS (1 − )
VP
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 FIXED-BIAS JFET EXAMPLE
Graphical Approach

VGS ID
0 IDSS
0.3VP IDSS/2
0.5VP IDSS/4
VP 0mA
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 JFET: SELF-BIAS CONFIGURATION
■ The self-bias configuration eliminates the need for two dc supplies.

IG  0A

ID = IS

VGS 2
ID = IDSS(1− )
VP

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 SELF-BIAS CONFIGURATION
■ Can be solved using either Mathematical Approach or Graphical Approach:

VGS = − I D RS

VDS = VDD − I D ( RS + RD )
2
 VGS 
ID 
= I DSS 1 − 
 VP 
2
 I D RS 
ID = I DSS 1 + 
 VP 
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 SELF-BIAS CONFIGURATION
Graphical Approach
■ Draw the device transfer characteristic using shorthand method.
■ Draw the network load line
■ Use VGS = − I D RS to draw straight line.
■ First point, I D = 0, VGS = 0
■ Second point, any point from ID = 0 to ID = IDSS. Choose
I DSS
ID = then
2
I R
VGS = − DSS S
2
■ The Q-point obtained at the intersection of the straight line plot and the device
characteristic curve.
■ The quiescent value for ID and VGS can then be determined and used to find the other
quantities of interest.
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SELF-BIAS CONFIGURATION

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 SELF-BIAS EXAMPLE
■ Determine VGSQ, IDQ,VDS,VS,VG and VD.

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 SELF-BIAS EXAMPLE Contd.
■ Plot ID vs VGS and draw a line from the origin of the axis.

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 SELF-BIAS EXAMPLE Contd.
■ Plot the transfer curve using IDSS and VP using shorthand method:

VGS ID

0 IDSS

0.3VP IDSS/2

0.5VP IDSS/4

VP 0mA

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 SELF-BIAS EXAMPLE Contd.
■ Superimpose the load line on top of the transfer curve:

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 JFET: VOLTAGE-DIVIDER BIAS
■ The source VDD was separated into two equivalent sources to permit a further separation of the
input and output regions of the network.
■ Since IG = 0A, Kirchoff’s current law requires that IR1= IR2 and the series equivalent circuit appearing to
the left of the figure can be used to find the level of VG.

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 VOLTAGE-DIVIDER BIAS
■ VG can be found using the voltage divider rule:
R2VDD
VG =
R1 + R2
■ Using Kirchoff’s Law on the input loop:
VD = VDD − I D RD VDS = VDD − I D ( RD + RS )

VS = I D RS VGS = VG − I D RS

■ Rearranging and using ID =IS:

VDD
I R1 = I R 2 =
R1 + R2
■ Again the Q point needs to be established by plotting a line that
intersects the transfer curve.
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 VOLTAGE-DIVIDER BIAS
■ Graphical Approach ( to find VGSQ and IDQ):
■ Plot a line for:
■ VGS = VG when ID = 0A
■ VGS = 0V when ID = VG/RS.
■ Plot the transfer curve using IDSS and VP using shorthand method.
■ The Q-point is located at the intersection.

VGS ID VGS = VG − I D RS
0 IDSS
0.3VP IDSS/2
0.5VP IDSS/4
VP 0mA

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EFFECT OF INCREASING VALUES OF RS

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 JFET: VOLTAGE-DIVIDER BIAS EXAMPLE
■ Determine IDQ, VGSQ, VD, VS, VDS and VDG.

R2VDD
VG = VGS = VG − I D RS
R1 + R2

VDS = VDD − I D ( RD + RS )

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 VOLTAGE-DIVIDER BIAS EXAMPLE Contd.
■ Graphical Approach ( to find VGSQ and IDQ):
■ Plot a line for:
■ VGS = VG when ID = 0A
■ VGS = 0V when ID = VG/RS.
■ Plot the transfer curve using IDSS and VP
using shorthand method.
■ Identify the Q-point.
R2VDD VS = I D RS
VG =
R1 + R2
VDS = VDD − I D ( RD + RS )
VGS = VG − I D RS
VDS = VD − VS
VD = VDD − I D RD
VDG = VD − VG
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