2017 International Conference on Data Management, Analytics and Innovation (ICDMAI)

Zeal Education Society, Pune, India, Feb 24-26, 2017

A Brief review on multilevel inverter topologies

Amol K. Koshti M. N.Rao
M.Tech Electrical (power systems) Assistant Professor
Department of Electrical Engineering Department of Electrical Engineering
Rajarambapu institute of Technology Rajarambapu institute of Technology
Islampur, 415414 Islampur, 415414
[email protected] [email protected]

Abstract— This paper discusses the brief review of different 4) reduced switching losses
multilevel inverter topologies and the introduction of control 5) High power quality
strategies used for MLI’S. In today’s scenario multilevel inverter
6) Low rate of change of voltage
becoming popular in the industry for high voltage and medium
voltage application also in the renewable energy fields. The input
Unfortunately multilevel inverter do possess some drawback
voltage can be obtained from dc battery, energy storage
capacitors or any kind of renewable energy sources. The various
one main drawback of these it requires number of switches
topologies are, Diode clamped multilevel inverter, Flying even though they are of smaller rating. Each switch is related
capacitor multilevel inverter, Cascaded H-bridge converter and to its gate driving circuit because of that overall system
they can be used in AC motor drives, Uninterruptible power becomes more complex and expensive
supply (UPS), Harmonic current compensation, static
compensators. It requires a complex driving circuit to fire the
switches in the circuit is the main disadvantage of the multilevel II. CONCEPT OF MULTILEVEL INVERTER
inverter.
Conventional two level inverter produces only two levels
Keywords— cascaded H-bridge, diode clamped, flying in the output voltage and PWM is used to form the AC output
capacitor multilevel inverter(FCMLI), Multilevel inverter (MLI) waveform as shown in Fig.1. Even though the AC output
topology waveform is produced it includes harmonics and these causes
the high rate of change of voltage as compared to the
I. INTRODUCTION multilevel inverter [1]. Some devices requests for low rate of
change in voltage.
The power electronic device which has ability to convert the
DC power into AC power is called as inverter. In 1925 David
prince published his article named as “The Inverter”. Initially
the inverters were used to drive mostly the lightening load
when the grid gets off. But, nowadays due to increased
advancement in technology inverters enhances their horizon of
applications. In earlier days only two level inverter were used
and produces the output with two different voltage levels but it
has high switching losses and harmonic voltage causes the
flow of the harmonic current in the circuit and produces the
losses. So, to overcome the disadvantages certain
advancement takes place in existing inverter such that levels
can be increased more than two so that pure sinusoidal
waveform is produced at the output voltage and harmonics in
the output can be suppressed and percentage of losses can be
decreased and this topology is named as multilevel inverter
topology.
There are mainly three different types of the multilevel
inverter 1)Diode clamped multilevel inverter. 2)Flying
capacitor multilevel inverter.3)Cascaded H-bridge inverter.
Above these multilevel inverter has some advantages over the
two level inverter [1].
1) Decreased Harmonic effect of distortion.
2) Pure sine waveform due to multiple voltage levels.
Fig.1.One phase limb of a two-level inverter and a two-level waveform
3) Operates at both fundamental and high switching without PWM
frequency PWM

978-1-5090-4083-4/17/$31.00 ©2017 IEEE 187

 In multilevel inverter we generate more than two 6 Multiple voltage levels Multiple voltage
voltage levels which exhibits almost pure sinusoidal output can not be produced levels can be
produced
voltage waveform. Which has low dv/dt, low harmonic
7 Harmonics are more Harmonics are less
distortions.[1,2] because of multiple voltage levels in the
output the waveform becomes more smoother but with
increasing levels the circuit becomes more complex due to
addition of the valves. And complicated control circuit is III. DIFFERENT TOPOLOGIES OF MULTILEVEL
also required.
INVERTER.
For understanding purpose the circuit diagram of three There are basically three types of multilevel inverter
level inverter is shown Fig.2 and Fig.3 below [1,2] which classified according to the voltage source used in the inverter.
produces the voltage levels of +Vdc/2, 0, - Vdc/2. This The Fig.4 below shows the topologies of multilevel inverter
design resembles to the two level inverter having only two
additional switches and diodes are used and called as
clamping diodes.

Fig.4. classification of multilevel inverter

A. DIODE CLAMPED MULTILEVEL INVERTER

This topology uses the diodes to clamp the voltage that is
to suppress the voltage stress on power devices. These are the
first practically implemented multilevel inverter topology. The
Fig.2.single phase leg ofa3level inverter
configuration of the circuit topology is given below [1,2].
Number of switches for m-level= 2(m-1).
Input voltage source= (m-1).
Diodes for clamping voltage= (m-1)(m-2).

The circuit diagram for five level inverter and its

waveform is shown in Fig.5 and Fig.6 below and switching
Fig.3. A 3 level waveform,5-level waveform and a 7-level multilevel shown in Table no II.
waveform

A. COMPARISON BETWEEN CONVENTIONAL AND

MULTILEVEL INVERTER
TABLE NO I

SR TRADITIONAL MULTILEVEL
1 High rate of change of Low rate of change
voltage of voltage
2 Switching losses are Switching losses are
high low
3 For low voltage For high voltage
application application
4 voltage stress is more on voltage stress is less
switches on switches
5 Switching frequency is Switching
high frequency is low

188
 though it possess more capacitors, switches, diode in principle
it is complete MLI. And also has capability to give some new
MLI structure. In [7] presents and compares several topologies
of MLI in high power application. this topology is concern
with multicell converter with flying capacitor and proposed
new stacked multicell converter(SMC) in that input voltage is
distributed ‘n’ equal voltages corresponds to n stacks of
topology, here study of multicell inverter shows their
advantages concern with the energy stored and losses in the
switches for given application. In [8] is concern with the
design of the diode clamped MLI which can replace the heavy
transformer connected to the grid. Their main agenda is design
of the diode clamped MLI which can give the multiple voltage
levels for that they derived the number of equations and
figures. In [9] proposed practical way of balancing the DC-
link voltages. The back to back linking of the multilevel
rectifier with multilevel inverter allows the balance of the DC-
Fig.5.Single phase leg of a 3 level inverter link capacitor voltage and also offers power factor correction
capability. In [10,11] proposed five level diode clamped
inverter applied STATCOM. An offline optimization of
switching angle together with fundamental frequency
modulation strategy (FFM). When it is used in STATCOM the
reactive power compensation is accomplished by controlling
flow of active power between inverter circuit and ac system.

Fig.6. single phase-leg for a 5 level NPC Inverter and its waveform
TABLE NO II

Output
voltage B. FLYING CAPACITOR MULTILEVE
1 1 1 1 0 0 0 0 INVERTER

0 1 1 1 1 0 0 0 The flying capacitor multilevel inverter is alike to that of

the diode clamped MLI only difference is that instead of
0 0 0 1 1 1 1 0 0 clamping diodes capacitors are used for clamping purpose.
This topology is having the tree structure of dc side capacitors
0 0 0 1 1 1 1 0
where voltage of each capacitors differs from that of the next
capacitor. The statistics for this topology is given below for
0 0 0 0 1 1 1 1 five level.
The no. of switches for m-level= 2(m-1) = 8
The no. of DC-link capacitors= (m-1)= 4
In [5] proposed topology is derived from the traditional
The no. auxiliary capacitors= ((m-1)(m-2))/2=6
structure of MLI. This can be demonstrated by incorporating
asymmetrical type of arrangement so that multiple voltage The circuit diagram and the waveforms are shown in Fig.7
and switching shown in Table III
levels can be synthesized and this can be realized by high
voltage GTO and fast switching IGBT. And finally present the
comparison table for seven level inverter structure. In [6]
present generalized structure of multilevel inverter which can
balance the DC voltage without any external circuit.
Traditional two level inverter can also be obtained from this
generalized structure. Proposed generalized structure has more
than three levels with self voltage balancing capability, even

189
 studied for various levels. In [16] proposed the new PWM
strategy for DC capacitor balancing and can be called as the
carrier rotation strategy. This strategy uses phase leg voltage
redundancy for charging and discharging of the capacitor
using the simple algorithm for using the switch combination.
In [17] proposed novel design by combining the diode
clamped or flying capacitor with the two level inverter legs.
As compared to the conventional MLI this design need fewer
clamping diodes and switches for the same no of levels.

C. CASCADED H-BRIDGE INVERTER

In H-bridge inverter it uses more than one DC

sources. Every inverter generate output at different levels. The
output voltage is the sum of all voltage levels generated by
each cell. The number of levels in output voltage is = 2n+1
Where ‘n’ is the number of input sources. Especial feature of
this inverter is that it requires lesser no of switches than diode
clamped multilevel inverter. The circuit diagram and the
waveforms are shown in Fig.8 below

Fig.7.single phase of a 5-level Flying capacitor multilevel inverter.

TABLE NO III
Output
voltage

1 1 1 1 0 0 0 0

1 1 1 0 1 0 0 0

0 1 1 0 1 1 1 0 0
1 0 0 1 1 1 1 0

0 0 0 0 1 1 1 1

In [12] discussed about the developing the low cost boost-trap

power supply for FCMLI and its gate drive circuit is also Fig.8.Single-phase structure of a 5 level multilevel cascaded H-bridges
discussed. In [13] proposed about the soft-switching technique inverter.
in the flying capacitor multilevel inverter so that it can be
extended from three level to any level. The advantage of this
inverter is having low voltage and current rating of switching In [18] proposed novel design of cascaded H-bridge building
valves and this can be achieved by using the coupled inductor. block by newly developed emitter turn off thyrister to show
Design, operation, control and switching patterns are also the superior act of the ETO and this can be used in reactive
presented. power compensation application. The h-bridge blocks can be
In [14] proposed snubber for the flying capacitor multilevel added or removed based on requirement of the power. And
inverter. Snubber circuit uses less no of switches, less also proposed the new air core snubber inductor design which
switching losses, also improves efficiency. In [15] developed is lighter than conventional iron-core inductor and also
soft-switching active power filter for maglev train application. decreases the losses. In [19] proposed the control procedure of
This active filter is having the flying capacitor MLI based on the cascaded MLI used in shunt active filter and this can be
coupled inductor. And this proposed MLI active power filter is expanded to more levels. and according to the design
controller is proposed to suppress the harmonics and reactive

190
power for non-linear load. In [20] proposed the general B. MIXED LEVEL HYBRID MULTILEVEL INVERTER
structure of the h-bridge. Where voltage sources are connected
in series and equations are to be introduced to choose the To decrease the number of dc sources for high power
voltage ratios of the capacitor or sources to maximize the applications with multilevel inverter diode clamped and flying
output voltage level. In [21] proposed novel cascaded capacitor are used instead of cascaded multicell inverter. The
multilevel inverter which considerably reduces the voltage nine level cascade converter can be incorporated using three
ripples in the dc- link and this topology includes single diode level diode clamped inverter as shown in Fig.10 below. The
joined for each basic H-bridge. In [22] proposed novel design original cascade bridge inverter requires four dc sources for
of cascaded H-bridge which is combined with number of H- single phase. The voltage level is doubled because the five
bridge cells as compared with conventional cascaded H- level converter is replaced by the bridge. So to realize this for
bridge. This design reduce the cost as well as simplifies the nine level only two dc source are required for single phase.
circuit and THD is also limited here than conventional one. In The advantage of this novel structure is that it needs lesser dc
[23] H- bridge inverter causes some oscillations under light sources while disadvantage is its controlling is very
load and these oscillations are analyzed and novel mitigation complicated.
method is proposed. In [24,25] a new control algorithm is
investigated for inverter operating under faulty conditions.
IV. OTHER TOPOLOGIES OF MLI

A.GENERALISED MULTILEVEL TOPOLOGY

Existing MLI can be derived from the generalized converter

topology discovered by peng [26] called as the P2 topology as
shown in Fig.9 below.
This generalized topology has the ability to balance the
voltage independent of the load characteristics and also has the
capability to balance the active and reactive power
independent of the any external circuit. Thus, this topology is
provides the complete multilevel topology.
Any converter with an number of levels can be obtained from
this generalized level.

Fig.10. hybrid multilevel inverter using the 3-level diode clamped converter as
the cascaded converter cell to increase the voltage levels

C. SOFT- SWITCHED MULTILEVEL CONVERTER

Some soft switching methods are proposed for multilevel

Fig.9.Generalized P2 multilevel converter topology for one phase leg.
converter to limit the switching losses and increase the
efficiency. For diode clamped and capacitor clamped soft
switching techniques are proposed with different switching

191
combinations. One of the zero voltage switching is shown in
Fig. 11 below.

Fig.13.Modulation topologies

Fig.11.Zero-voltage switching capacitor-clamped inverter circuit VI. CONCLUSION

This paper presents the various topologies of the multilevel
D. BACK TO BACK DIODE CLAMPED CONVERTER inverter and importance of the multilevel inverter along with
Here, two multilevel converter can be connected in back to their advancement taken place. Also discussed the comparison
of MLI over the conventional two level inverter. MLI has the
back and then whole system can be connected in the electrical
ability to provide limit over the total harmonic distortion
system in series or parallel combination as shown in Fig.12 (THD), Electromagnetic interference (EMI), Voltage stress on
[26] Both the demand from the utility and the demand to the the switches and dv/dt problems. Nowadays multilevel
customer can be controlled and this series-parallel active inverters enhances their horizon of application in various
filters called as the universal power conditioner. fields. Mostly they are used in industry for medium and high
The diode clamped multilevel inverter are preferred for the voltage applications.
reasons given below
REFERENCES
• All phases are distributed common dc-link.
• Flying capacitors also share common dc link but, [1] Anjali Krishna R. and Dr L Padma suresh “A brief review on
extra auxiliary capacitor are required. multilevel inverter topologies” Conference on Circuit,Power and
Computing Technologies [ICCPCT] 2016 .
[2] Nordvall “Multilevel inverter topology survey” thesis in electrical power
engineering 2011.
[3] M. Murugesan and R. Sivakumar “Different types of multilevel inverter
topologies-A technical Review” E-ISSN, mar 2016.
[4] A. Narendra babu and sunil hansdah “Study and analysis of three phase
multilevel inverter”Thesis, 2007
[5] M. D Manjrekar, Thomas A. Lipo “A hybrid multilevel inverter
topology for drive applications” Power Electronics Conference and
Exposition, 1998. APEC '98. Conference Proceedings 1998., Thirteenth
Annual Year: 1998, Volume: 2 PP: 523 - 529 vol.2,
[6] Zheng Peng “A generalized multilevel inverter topology with self
voltage balancing”IEEE Transactions on Industry Applications Year:
2001, Volume: 37, Issue: 2 PP: 611 - 618
[7] L. Demas; T. A. Meynard; H. Foch; G. Gateau “Comparative study of
multilevel topologies: NPC, multicell inverter and SMC 828 – 833.with
Fig.12. back to back connection of the inverter in electrical system IGBT" IECON 02 [Industrial Electronics Society, IEEE 2002, 28th
Annual Conference of the Year: 2002, Volume: 1
[8] J. von Bloh; R. W. De Doncker “Design rules for diode-clamped
V. MODULATION TECHNIQUES FOR MULTILEVEL multilevel inverters used in medium-voltage applications” Power
Electronics Congress, 2002. Technical Proceedings. CIEP 2002. VIII
INVERTER. IEEE International Year: 2002 PP: 165 - 170,
Different modulation technique are given below. [9] M. Marchesoni; P. Tenca “Diode-clamped multilevel converters: a
practicable way to balance DC-link voltages” IEEE Transactions on
Industrial Electronics Year: 2002, Volume: 49, Issue: 4 PP: 752 - 765
[10] S. Kincic; A. Chandra; S. Babic “Five level diode clamped voltage
source inverter and its application in reactive power” Compensation”
Power Engineering 2002 Large Engineering Systems Conference on,
LESCOPE 02 Year: 2002 PP: 86 - 92,
[11] Alian Chen; Xiangning “A hybrid clamped multilevel inverter topology
with neutral point voltage balancing ability" Power Electronics
Specialists Conference, 2004. PESC 04. 2004 IEEE 35th Annual Year:
2004, Volume:5 PP: 3952 - 3956

192
[12] S. A. Molepo; H. D. T. Mouton Power “A flying capacitor multilevel
inverter with bootstrap- powered MOSFET gate drive
circuits”Electronics Specialists Conference, 2002. pesc 02.2002
IEEE 33rd Annual Year: 2002, Volume: 2 PP: 701 - 705
[13] Byeong-Mun Song; Juhyung Kim; Jih-Sheng Lai; Ki-Chul Seong; Hae-
Jong Kim “A multilevel soft-switching inverter with inductor coupling”;
Sun-Soon Park IEEE Transactions on Industry Applications Year: 2001,
Volume: 37, Issue: 2 PP: 628 - 636,
[14] In-Dong Kim; Eui-Cheol Nho; Heung-Geun “A generalized Undeland
snubber for flying capacitor multilevel inverter and converter” IEEE
Transactions on Industrial Electronics Year: 2004,Volume: 51, Issue: 6
PP: 1290 – 1296
[15] B. -M. Song; J. -S. Lai; Chang-Yong Jeong Dong-Wook Yoo “A soft-
switching high-voltage active power filter with flying capacitors for
urban Maglev system Applications” Industry Applications Conference,
2001. Thirty-Sixth IAS Annual Meeting. Conference Record of the 2001
IEEE Year: 2001, Volume: 3 PP: 1461 - 1468
[16] D. -W. Kang; W. -K. Lee; D. -S. Hyun “Carrier-rotation strategy for
voltage balancing in flying capacitor multilevel inverter” IEEE
Proceedings - Electric Power Applications Year: 2004,Volume: 151,
Issue: 2 PP: 239 – 248
[17] Sanmin Wei; Bin Wu; R. Cheung” A novel SVM algorithm for reducing
oscillations in cascaded H-bridge multilevel inverters” Industrial
Electronics Society, 2003. IECON '03. The 29th Annual Conference of
the IEEE Year: 2003, Volume: 1 PP: 18 - 23
[18] Sanmin Wei; Bin Wu; Fahai Li; Xudong Sun” Control method for
cascaded H-bridge multilevel inverter with faulty power cells” Applied
Power Electronics Conference and Exposition, 2003. APEC '03.
Eighteenth Annual IEEE Year: 2003, Volume: 1, PP: 261 – 267
[19] K. Corzine; Y. Familiant “A new cascaded multilevel -bridge drive K.
Corzine;” IEEE Transactions on Power ElectronicsYear Volume: 17,
PP: 125 – 131, Year: 2002,
[20] Andrés A. Valdez-Fernández, Pánfilo R. Martínez-Rodríguez, Gerardo
Escobar, Cesar A. Limones-Pozos,José M. Sosa” A Model-Based
Controller for the Cascade H-Bridge Multilevel Converter Used as a
Shunt Active Filter” IEEE Transactions on Industrial Electronics
Year:2013, Volume: 60 PP: 5019 – 5028
[21] S M. Carpaneto,G. Maragliano, M. Marchesoni and L. R. Vaccaro,” A
Novel approach for DC-link voltage ripple reduction in cascaded
multilevel converters” PEEDAM 2006. International Symposium on
Power Electronics, Electrical Drives, Automation and Motion Year:
2006 PP.571 – 576
[22] Sanmin Wei; Bin Wu; Fahai Li “Control method for cascaded H-bridge
multilevel inverter with faulty power cells” Xudong Sun Applied Power
Electronics Conference and Exposition, 2003. APEC '03. Eighteenth
Annual IEEE Year: 2003, Volume: PP: 261 - 267
[23] Corzine Y. Familiant “A new cascaded multilevel H-bridge drive” IEEE
Transactions on Power Electronics Year: 2002, Volume: 17, Issue: 1 PP:
125 – 131
[24] Andrés A. Valdez-Fernández “A Model-Based Controller for the
Cascade H-Bridge Multilevel Converter Used as a Shunt Active Filter”
IEEE Transactions on Industrial Electronics Year: 2013, Volume:
60,Issue: 11 PP: 5019 – 5028.
[25] M. Carpaneto; G. Maragliano “A Novel approach for DC-link voltage
ripple reduction in cascaded multilevel converters” International
Symposium on Power Electronics, Electrical Drives, Automation and
Motion, 2006. SPEEDAM 2006. Year: 2006 PP: 571 – 576.
[26] Surin Khomfoi and Leon M. Tolbert Chapter 31 Multilevel Power
Converters The University of Tennessee

193