Linear Integrated Circuits Assignment
Linear Integrated Circuits Assignment
Programme B tech
Department ECE
Faculty FET
Reg. No 17ETEC004083
i
Declaration Sheet
Student Name R .ABHISHEK PRASAD
Reg. No 17ETEC004083
Programme BTECH Semester/Year 5TH SEMESTER
Course Code ECC212A
Course Title LINEAR INTEGRATED CIRCUITS
Course Date to
Course Leader Bharath kumar
Declaration
The assignment submitted herewith is a result of my own investigations and that I have
conformed to the guidelines against plagiarism as laid out in the Student Handbook. All
sections of the text and results, which have been obtained from other sources, are fully
referenced. I understand that cheating and plagiarism constitute a breach of University
regulations and will be dealt with accordingly.
Signature of the
Date
Student
Marks
Sections
Max Marks
First
Marking Scheme
Examiner Moderator
Marks
A1.1 Introduction 02
Challenges of Integrated Circuit for Biomedical
Part-A
A1.2 Applications 05
A1.3 Conclusion 03
Part-A Max Marks 10
15
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Signature of First Examiner Signature of
Second Examiner
Please note:
1. Documental evidence for all the components/parts of the assessment such as the reports,
photographs, laboratory exam / tool tests are required to be attached to the assignment report in a
proper order.
2. The First Examiner is required to mark the comments in RED ink and the Second Examiner’s comments
should be in GREEN ink.
3. The marks for all the questions of the assignment have to be written only in the Component – CET B:
Assignment table.
4. If the variation between the marks awarded by the first examiner and the second examiner lies within
+/- 3 marks, then the marks allotted by the first examiner is considered to be final. If the variation is
more than +/- 3 marks then both the examiners should resolve the issue in consultation with the
Chairman BoE.
Assignment
Instructions to students:
1. The assignment consists of 2 questions: Part A – 1 Question and Part B- 1 Question.
2. Maximum marks is 25.
3. The assignment has to be neatly word processed as per the prescribed format.
4. The maximum number of pages should be restricted to 20.
5. Restrict your report for Part-A to 3 pages only.
6. Restrict your report for Part-B to a maximum of 17 pages.
7. The printed assignment must be submitted to the course leader.
8. Submission Date: 15/9/20
9. Submission after the due date is not permitted.
10. IMPORTANT: It is essential that all the sources used in preparation of the assignment must be
suitably referenced in the text.
11. Marks will be awarded only to the sections and subsections clearly indicated as per the problem
statement/exercise/question
Preamble:
The analog circuits are widely used in physiological signal acquisition, signal processing and in the signal
transmission. The key challenge in designing biomedical ICs is the pursuit of low frequency, low noise, and
low power, and thus, there is a trade-off between noise and power, and trade-off between area, cost and
bandwidth. Usually biomedical signals are low frequency, week and noisy.
PART A (10 Marks)
Write an easy on the topic “Challenges of Integrated Circuit for Biomedical Applications”
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Your report should consist of:
A1.1 Introduction
The developing maturing populace, soaring medical care expenses, and pervasiveness of ceaseless ailments
are the principle main thrusts to drive the basic change of the current medical services frameworks and
search for more savvy and responsive approaches to convey medical services administrations. The
customary hospital centered medical care framework, which centers around analysis and therapy, is
moving its attention on an individual-focused medical care framework with accentuation on early location,
early conclusion and long haul checking .
Compact, wearable and organized clinical gadgets for the early identification, early analysis, checking, and
treatment of infections are crucial and wanted for the individual-focused medical services framework in
mHealth applications . Some ongoing advances in IC structure innovation have prompted these gadgets
that can enhance, or even supplant some complex biomedical tasks or instruments. Without a doubt, the
preparing abilities of the plan of circuits are boundless, however later on, in biomedical application they are
exceptionally restricted. For instance, in the utilization of biomedical body sensor gadget, it ought to be
structured as little as feasible for comfort. At that point, the region of the circuits are quite restricted, yet
for the quality of biomedical sign, the circuits ought to be worked in the low recurrence space, since
enormous zones are required for actualizing extremely huge limits or exceptionally huge resistors.
Likewise, in light of the fact that numerous bioelectric signals are in the microvolt run, clamor structure
terminals, intensifiers, and nature is huge contrasted with the sign level, and the force utilization ought to
be lower for the more extended lifetimes of biomedical gadgets, so the improvement of incorporated
circuit (IC) for biomedical sign checking and handling is required for additional advances in these miniature
mHealth gadgets and sensor hubs.
1) biomedical signs are typically low recurrence, week and uproarious, and
2) the gadgets are wearable and convenient in application circumstances, when structured IC, there has a
tradeoff among clamor and power, and between region, cost and data transmission. In this way, the key
test in structuring circuits for biomedical application is the quest for low clamor, and low recurrence.
Surely, low force is consistently the interest in circuit plan whenever.
In this part, the ongoing low force, low clamor and low recurrence IC structure advances which have been
utilized in multi-boundaries, human-body signal observing and preparing are presented. These innovations
particularly are appropriate for biomedical and mHealth applications including the plan of simple circuits,
for example, intensifier and channel, are generally utilized in physiological sign obtaining, computerized
circuits typically applied in signal handling and radio-recurrence (RF) circuits in signal transmission. In the
last, some manufactured frameworks are presented.
today’s implantable circuits provide therapy to treat numerous conditions. Exciting new applications in
neurological stimulation can be used to treat sleep apnea, pain management, Parkinson’s Disease, epilepsy,
bladder control, gastrointestinal disorders, numerous autoimmune diseases and psychological disorders
such as obsessive compulsive disorder (OCD). Implantable systems can now provide precise dosage and
interval delivery of drugs to more effectively treat patient’s conditions while minimizing side effects. With
the ever increasing clinical need for implantable devices comes the continuous flow of technical challenges.
As with commercial portable products, implantable devices share the same need to reduce size, weight and
power (SWaP). Thus, the need for device integration becomes imperative. There are many challenges when
creating an implantable medical device. While this white paper focuses on the key electronic features of
implantable circuits and the integration of these features into silicon, it will cover how Freescale and Cactus
Semiconductor together can provide solutions that meet different aspects of the design. Freescale drives
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innovation and enables medical devices with their latest technology for microcontrollers, sensors, analog
and wireless products.
In addition, rigorous product testing at extended stress conditions filters out even an entire lot in the
presence of a small number of failures . Another rapidly growing class of electronic chips where reliability is
very critical in implantable biomedical chips . More interestingly, some of the safety approaches , such as
redundancy and complex packaging, are not readily applicable to implantable biomedical applications
because of low voltage, low power operation and small form factor requirements.
. In addition, rigorous product testing at extended stress conditions filters out even an entire lot in the
presence of a small number of fail- ures . Another rapidly growing class of electronic chips where reliability
is very critical in implantable biomedical chips ] . More interestingly, some of the safety approaches , such
as redundancy and complex packaging, are not readily applicable to implantable biomedical applications
because of low voltage, low power operation and small form factor requirements.
Implantable medical electronics are differentiated from most of the other electronic-system
implementations by their unique combination of extreme low-power and high-reliability requirements.
Many implanted medical devices rely on a fixed non rechargeable battery over their entire lifetime. These
constraints elevate power management and budgeting within the integrated circuits (ICs) to key system-
design parameters. So much so, in fact, that the requirements drive not only differences in circuit design,
but also place a number of constraints on the design environment and design tools, manufacturing
processes, and targets used to implement those designs, test methodologies, and the fundamental
understanding into the physics of failure. These constraints often make standard offerings available from
the wafer foundries, electronic-design-automation (EDA) suppliers, and commercial third-party IP providers
unviable without some level of modification. A successful design often requires process changes and
monitoring to ensure low-static-current drain, digital-cell-library optimization with synthesis tools for low-
power power-efficient memory design, weak-inversion analog design, accurate low-power models, and test
visibility. As system complexity and activity rise, without a proportional increase in available energy, these
challenges grow more persistent.
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1. Analog Front End
(AFE). The AFE’s unique requirements are often responsible for many IC technology challenges.
These analog interfaces often require high voltages for sensing or for delivering the required
therapy. In the digital world, IC technology continues to shrink in size, with smaller geometries that
inherently cannot tolerate the higher voltages required for these applications.
a. Sensing
function allows a medical device to determine what action to take and/or what therapy to deliver. There is
a need and requirement to integrate more sensing devices, such as accelerometers and pressure sensors
for medical implantables (such as catheters). Examples of sensing in an implantable application would be
detecting heart rhythm irregularities, or sensing the amount of glucose in the bloodstream. Various types
of sensors exist, such as pressure, magnetic, inertial, touch, optical, temperature, voltage and current
sensors
b. Stimulation (or Delivery)
or therapy delivery, will be defined as the output or response of the implanted device. In many cases the
response is based on the sensing of the condition being monitored, such as heart rate or glucose levels in
the blood. However, some implantable devices run in “open loop” where the device is programmed in the
doctor’s office to deliver a specific therapy. Once the device is turned on, the device delivers the
programmed therapy with no real-time closed loop feedback. Implantable devices have become
increasingly used for neurological stimulation. Neurological stimulation consists of generating current and/
or voltage pulses that provide stimulation to a particular nerve. The implantable device is then called upon
to generate and control severalpulse parameters, such as pulse frequency, duration, amplitude and ramp
rate.
2. Memory Storage
In addition to memory used for program and data storage, other devices, such as metal fuses, act like one-
time programmable memory. This type of storage is usually limited in size and primarily used to “trimin”
analog performance of the device. The trimming may be done at the IC manufacturer’s test site or at final
hybrid assembly. Some fuse programming might be done at hybrid assembly to associate tracking or lot
information with a device. Traceability is a key component for medical device manufacturers.
3. Microprocessor (CPU)
The microprocessor executes the program memory and establishes the register contents that control the
AFE. The control of the AFE output is often derived from the analysis of the incoming data that has been
digitized by an analog-to-digital converter (ADC) and read by the microprocessor. In many cases, the ADC
may be built into the same integrated circuit as the microprocessor. In other cases, the ADC is considered
part of the AFE. In addition, some microprocessor units may also have a companion floating point unit
(FPU) or digital signal processing unit (DSP) that allows for more detailed analysis of the incoming sensed
data. Freescale has a broad portfolio of 8-bit to 64-bit, as well as multicore options. An example of a CPU is
the Kinetis K50 family of microprocessors.
4. Communications
must occur between the implantable device and an external controller. Communication is necessary for
initial setup of the implantable device and for monitoring and control of the implantable device. There are
numerous communication standards that may be used to communicate between the implantable unit and
the external controller or programmer. These standards include medical band radio MedRadio or Medical
Implantable Communication Service (MICS), Bluetooth®, Bluetooth Low Energy and ANT. New system
architectures include translation functions which convert the more common MedRadio/MICs protocol to
one of the more open standards such as Bluetooth to allow ubiquitous connectivity to smart mobile
devices.
5. Power Management
critical in the development of implantable devices. Implantable devices are powered by some type of
battery or charge storage device such as a super capacitor. Though many of these power sources are
rechargeable, the recharging process involves patient interaction or may be otherwise inconvenient. Thus,
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maximizing the battery life or time between recharges is important. We will define power management as
the means by which we optimize and conserve the use of power for the implantable device.
Integrated circuits are only one component of an implantable medical device. In order to address the size,
weight and power challenges of the system we must look at the system in its entirety. For example, battery
technology is another key component. Decades ago, batteries accounted for a majority of the weight and
size of a pacemaker. Through the reduction in power requirements and advances in battery technology, the
size and weight of the implantable device has dropped significantly. However, battery size still presents a
challenge to the overall size of the system. Integrated intelligent thin film battery technology and energy
harvesting techniques may provide future advances in this area. A solid state battery can be made
extremely small with custom sizes and aspect ratios. The battery can be rechargeable with a DC voltage,
requiring no current charging. For increased battery capacity, the cells can be paralleled or made larger.
Cactus Semiconductor has developed two implantable systems based on this type of battery technology.
A1.3 Conclusion
When considering integrated circuits for an implantable device, one must examine the entire system from
the top level. Overall systemlevel requirements, such as functionality, performance, size, weight and power
should be considered. These requirements, along with the availability of existing off-the-shelf solutions and
desired system flexibility, should help drive design partitioning. Freescale’s latest packaging technologies,
low-power microcontrollers, sensors and RF technologies allow for an innovative design to meet the
requirements of implantable devices. To optimize or meet the device specifications for any of these
parameters, a custom integrated circuit may berequired, the design of which can expensive and time
consuming. The early engagement of an experienced IC development team that can help with the design
partitioning and process selection greatly increases the likelihood of success, reduces risk and potentially
reduces cost.
B1. Select a suitable application of a linear integrated circuit. Carry out the following for the selected
application:
B2.1Brief about the intended application
Integrator
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As its name infers, the Op-amp Integrator is an operational speaker circuit that plays
out the numerical activity of Integration, that is we can make the yield react to
changes in the information voltage after some time as the operation amp integrator
delivers a yield voltage which is corresponding to the indispensable of the info
voltage.
As it were the greatness of the yield signal is controlled by the timeframe a voltage is
available at its contribution as the current through the input circle charges or releases
the capacitor as the necessary negative criticism happens through the capacitor.
At the point when a stage voltage, Vin is initially applied to the contribution of an
incorporating speaker, the uncharged capacitor C has next to no opposition and acts
somewhat like a short out permitting greatest current to stream through the info
resistor, Rin as potential distinction exists between the two plates. No current
streams into the speakers information and point X is a virtual earth bringing about
zero yield. As the impedance of the capacitor now is extremely low, the increase
proportion of XC/RIN is additionally little giving a general voltage addition of short of
what one, ( voltage supporter circuit ).
Since the capacitor is associated between the operation amp's rearranging input
(which is at virtual ground potential) and the operation amp's yield (which is presently
negative), the expected voltage, Vc created over the capacitor gradually expands
making the charging current reduction as the impedance of the capacitor increments.
This outcomes in the proportion of Xc/Rin expanding creating a straightly expanding
incline yield voltage that keeps on expanding until the capacitor is completely
energized.
Now the capacitor goes about as an open circuit, obstructing any more progression of
DC current. The proportion of criticism capacitor to include resistor ( XC/RIN ) is
presently boundless bringing about vast addition. The aftereffect of this high increase
(like the operation amps open-circle gain), is that the yield of the intensifier goes into
immersion as demonstrated as follows. (Immersion happens when the yield voltage
of the intensifier swings vigorously to one voltage flexibly rail or the other with
practically no control in the middle).
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From the circuit, it is seen that node Y is grounded through a compensating resistor R1. Node X will also be
at ground potential, due to the virtual ground.
VX = VY = 0
Since the input current to an op-amp is ideally zero, the current flowing through the input resistor, due to
Vin, also flows through the capacitor Cf.
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In the above equation, the output is -{1/(R1.Cf)} times the integral of the input voltage, where the term
(R1.Cf) is known as the time constant of the integrator.
The negative sign indicates that there is a phase shift of 180 o between input and output, because the input
is provided to the inverting input terminal of the op-amp.
The main advantage of an active integrator is the large time constant, which results in the accurate
integration of the input signal.
Disadvantages
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Bandwidth is very small and used for only small range of input frequencies.
For dc input (f = 0), the reactance of the capacitance, Xc, is infinite. Because of this op-amp goes
into open loop configuration. In open loop configuration the gain is infinite and hence the small
input offset voltages are also amplified and appears at output as error. This is referred as false
triggering and must be avoided. Due to all such limitations, an ideal integrator needs to be
modified. Some additional components are used along with ideal integrator circuit to reduce the
effect of an error voltage in practice. This modified integrator is referred as practical integrator.
The operation amplifier has input offset voltage (Vm s) and the input bias current (I b).In the absence
of input voltage or at zero frequency (d.c.), op-amp gain is very high. The input offset voltage gets
amplified and appears at the output as an error voltage. The bias current also results in a capacitor
charging current and adds its effect in an output error voltage. The two components, due to high
d.c. gain of op-amp cause output to ramp up or down, depending upon the polarities of offset
voltage and/or bias current. After some time, output of op-amp may achieve its saturation level.
Hence there is a possibility of op-amp saturation due to such an error voltage and it is very difficult
to pull op-amp out of saturation. Thus the output of an ideal integrators in the absence of input
signal is likely to be offset towards the positive or negative saturation levels.
In the presence of the input signal also, the two components namely offset voltage and bias
current, contribute an error voltage at the output. Thus it is not possible to get a true
integration of the input signal at the output. Output waveform may be distorted due to such an
error voltage.
Another limitation of an ideal integrators is its bandwidth, which is very small. Hence an ideal
integrator can be used for a very small frequency range of the input only.
Due to all these limitations, an ideal integrators is not used in practice. Some additional
components are used alongwith the basic integrator circuit to reduce the effect of an error voltage,
in practice. Such an integrator is called Practical Integrators Circuit.
Advantages
The negative sign indicates that there is a phase shift of 180 o between input and output, because the input
is provided to the inverting input terminal of the op-amp.
The main advantage of an active integrator is the large time constant, which results in the accurate
integration of the input signal.
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An integrating circuit performs the mathematical operation of integration with respect to
time, on the input signal, i.e. the output voltage is proportional to the applied input voltage
integrated over time.
The output of an integrator is out of phase by 180 o with respect to the input, since the
input is applied to the inverting input terminal of the op-amp.
Integrating circuits are generally used to generate ramp wave from square wave input.
Integrating amplifiers have frequency limitations while operating on sine wave signals.
B2.3 Improvemts
Limitations
The ideal integrator suffers from two main limitations. One comes from the fact that the output voltage of
the opamp can not exceed the supply voltage. The output of the integrator is inversely proportional to the
time constant τ = RsCf. The larger the time constant τ, the longer it takes to saturate the integrator. The
second limitation is a consequence of the offset voltage present even for zero input. It may be only a few
millivolts, but it it gets integrated over time it eventually drives the OpAmp output to saturation. To
prevent this from occurring, a large (1-10 MΩ) resistor Rx is added in parallel with the capacitor,
1.Bandwidth is very small and used for only small range of input frequencies.
2. For dc input (f = 0), reactance of capacitance, Xc is infinite. Because of this op-amp goes into open loop
configuration.In open loop configuration the gain is infinite and hence the small input offset voltages are
also amplified and appears at output as error. This is referred as false triggering and must be avoided.
Due to all such limitations, an ideal integrator needs to be modified. Some additional components are used
along with ideal integrator circuit to reduce the effect of an error voltage in practice. This modified
integrator is referred as practical integrator.
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An ideal op-amp integrator uses a capacitor C1, connected between the output and the op-amp inverting
input terminal, as shown in the figure below.
The negative feedback to the inverting input terminal ensures that the node X is held at ground potential
(virtual ground). If the input voltage is 0 V, there will be no current through the input resistor R1, and the
capacitor is uncharged.
If a constant positive voltage (DC) is applied to the input of the integrating amplifier, the output voltage will
fall negative at a linear rate, in an attempt to keep the inverting input terminal at ground potential.
Conversely, a constant negative voltage at the input results in a linearly rising (positive) voltage at the
output. The rate of change of the output voltage is proportional to the value of the applied input voltage.
To avoid the saturation of the output voltage and to provide gain control, a resistor with high value of
resistance can be added in parallel with the feedback capacitor C f.
The closed-loop gain of the integrator will be (R 2/R1), just like a normal inverting amplifier.
Consequently, at low frequencies of the input signal the circuit behaves normally like an integrator. At high
frequencies, the capacitor acts as a short circuit and by-passes the resistor R 2.
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The frequency response of an AC integrating amplifier with DC gain control is as shown in the figure above.
At lower frequencies of the input, the capacitor remains uncharged and acts as an open-circuit.
This results in the gain of (R2/R1). As the input signal frequency increases, the feedback capacitor gets
charged and acts almost like short-circuit, bypassing the feedback resistor R2. This results in the gain,
decreasing linearly at a rate of 20 dB per decade.
If the integrating amplifier is provided with a sine wave input whose frequency is varying, the integrator
behaves like a “Low-Pass Filter”, which produces only low frequency signal at the output. All the high
frequency signal components are blocked or attenuated.
At 0 Hz, the feedback capacitor behaves like an open-circuit, so there is no feedback from the output to the
inverting input of the op-amp. Now the circuit behaves like an open-loop inverting amplifier with very high
gain.
This will result in the saturation of the output voltage. As the input frequency increases, the capacitor gets
charged. At higher frequencies, the capacitor acts like a short circuit.
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Bibliography
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http://www.msruas.ac.in/pdf_files/VCBlogs/Academic%20Good%20Practices.pdf
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Guidelines for writing the report
1. Inserting a table
Title of the table should be at the top of the table and be left justified with ref to table
[Note: the table should be centered w.r.t the page width. Use suitable SI units]
[Note: Please do not write as “As shown below” or “As shown above”]
Figure
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The machine is shown in Figure 7.1
[Note: Please do not write as “As shown below” or “As shown above”]
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