Scribd
Upload
73 views1 page

Learning Activity No.2

This document provides a learning activity that tests understanding of computer architecture concepts. It asks students to define the differences between registers and cache memory, address bus, data bus and control bus. It also asks students to explain the fetch-decode-execute mechanism of the CPU. Finally, it asks students to identify the operation codes and operand codes in three sample instructions.

Uploaded by

Miki Anton
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
73 views1 page

Learning Activity No.2

This document provides a learning activity that tests understanding of computer architecture concepts. It asks students to define the differences between registers and cache memory, address bus, data bus and control bus. It also asks students to explain the fetch-decode-execute mechanism of the CPU. Finally, it asks students to identify the operation codes and operand codes in three sample instructions.

Uploaded by

Miki Anton
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 1

LEARNING ACTIVITY No.

Name: Date:

Yr./Section: Score:

Check your understanding!

A. Give differences between the following:

1. Registers and cache memory


___________________________________________________________________________________________________________
___________________________________________________________________________________________________________
___________________________________________________________________________________________________________
___________________________________________________________________________________________________________
___________________________________________________________________________________________________________
___________________________________________________________________________________________________________
___________________________________________________________________________________________________________
___________________________________________________________________________________________________________
___________________________________________________________________________________________________________
___________________________________________________________________________________________________________
___________________________________________________________________________________________________________
2. Address Bus, Data Bus and Control Bus
___________________________________________________________________________________________________________
___________________________________________________________________________________________________________
___________________________________________________________________________________________________________
___________________________________________________________________________________________________________
___________________________________________________________________________________________________________
___________________________________________________________________________________________________________
___________________________________________________________________________________________________________
___________________________________________________________________________________________________________
___________________________________________________________________________________________________________
___________________________________________________________________________________________________________
___________________________________________________________________________________________________________

B. Explain the fetch-decode-execute mechanism used by the CPU.

___________________________________________________________________________________________________________
___________________________________________________________________________________________________________
___________________________________________________________________________________________________________
___________________________________________________________________________________________________________
___________________________________________________________________________________________________________
___________________________________________________________________________________________________________
___________________________________________________________________________________________________________
___________________________________________________________________________________________________________
___________________________________________________________________________________________________________
___________________________________________________________________________________________________________
___________________________________________________________________________________________________________

C. In each instruction below determine which is the operation code and the operand code:

Instruction Operation Code Operand Code


LOAD R1, A
ADD R2, B
STORE , X

CBE4 – Computer Fundamentals and Programming Computer System Organization


Instructor: J. O. Balolot 1

You might also like