Ice40 Ultraplus Breakout Board: Fpga-Ug-02001 Version 1.1
Ice40 Ultraplus Breakout Board: Fpga-Ug-02001 Version 1.1
User Guide
March 2017
iCE40 UltraPlus Breakout Board
User Guide
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trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
2 FPGA-UG-02001-1.1
iCE40 UltraPlus Breakout Board
User Guide
Contents
1. Introduction .................................................................................................................................................................. 5
2. Features ........................................................................................................................................................................ 6
3. iCE40 UltraPlus Device .................................................................................................................................................. 7
4. Software Requirements ................................................................................................................................................ 8
5. Demonstration Design Shunts ...................................................................................................................................... 9
6. Clock Sources .............................................................................................................................................................. 10
7. Board Power ............................................................................................................................................................... 11
8. Board Configuration and Programming....................................................................................................................... 12
9. Test Points .................................................................................................................................................................. 15
10. RGB LED Demonstration Design and Software GUI ................................................................................................ 17
11. GUI Serial Communication Interface ...................................................................................................................... 20
11.1. LED Control via SPI ............................................................................................................................................ 20
11.2. SPI Protocol ....................................................................................................................................................... 20
11.3. Register Definitions ........................................................................................................................................... 21
12. Ordering Information .............................................................................................................................................. 23
Appendix A. Schematic Diagrams ....................................................................................................................................... 24
Appendix B. Bill of Materials............................................................................................................................................... 30
References .......................................................................................................................................................................... 33
Standards Documents..................................................................................................................................................... 33
Technical Support Assistance ......................................................................................................................................... 33
Revision History .................................................................................................................................................................. 34
Figures
Figure 2.1. iCE40 UltraPlus Breakout Board (Top Side) ........................................................................................................ 6
Figure 5.1. Default Shunt Locations ...................................................................................................................................... 9
Figure 8.1. Board Configuration for Programming Flash .................................................................................................... 12
Figure 8.2. Device Property Settings for Programming Flash ............................................................................................. 13
Figure 8.3. Setting Status in Diamond Programmer for Programming Flash ...................................................................... 13
Figure 8.4. Device Property Settings for Programming iCE40 UltraPlus ............................................................................. 14
Figure 9.1. J52 Header ‘A’ Breakouts .................................................................................................................................. 15
Figure 9.2. J2 Header ‘B’ Breakouts .................................................................................................................................... 15
Figure 9.3. J3 Header ‘C’ Breakouts .................................................................................................................................... 15
Figure 9.4. U6 PMOD Connector ........................................................................................................................................ 16
Figure 9.5. J1 Adardvark Connector.................................................................................................................................... 16
Figure 9.6. Breakout Headers ............................................................................................................................................. 16
Figure 10.1. SPI Flash Selection (Horizontal) for J6............................................................................................................. 17
Figure 10.2. iCE40 UltraPlus Selection (Vertical) for J6 ...................................................................................................... 18
Figure 10.3. iCE40 UltraPlus LED Demonstration Interface ................................................................................................ 18
Figure 11.1. SPI Physical Transaction .................................................................................................................................. 20
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trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02001-1.1 3
iCE40 UltraPlus Breakout Board
User Guide
Tables
Table 11.1. Register Address and Bit Field Allocation ........................................................................................................20
Table 11.2. Bit Field Functionality Definition ......................................................................................................................20
Table 11.3. RGB Color Code Definition ...............................................................................................................................21
Table 11.4. LED Brightness Code Definition .......................................................................................................................21
Table 11.5. Breathe Ramp Code Definition ........................................................................................................................22
Table 11.6. Blink Rate Code Definition ...............................................................................................................................22
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
4 FPGA-UG-02001-1.1
iCE40 UltraPlus Breakout Board
User Guide
1. Introduction
Thank you for choosing the Lattice iCE40 UltraPlusTM Breakout Board.
This guide describes how to begin using the iCE40 UltraPlus Breakout Board, an easy-to-use platform for demonstrating
the high-current LED drive capabilities of the iCE40 UltraPlus ; which has more memory to achieve functions mainly
required in the customer mobile market. Along with the evaluation board and accessories, this kit includes a pre-loaded
LED Driver Demo that demonstrates driving the RGB LEDs with a PWM circuit. In addition, most of the device's I/O pins
are accessible via one of the several header locations on the board, facilitating rapid prototyping of user functions.
The contents of this user guide include demo operation, top-level functional descriptions of the various portions of the
evaluation board, descriptions of the onboard connectors, shunts, and a complete set of schematics and the bill of
materials for the iCE40 UltraPlus Breakout Board.
Note: Static electricity can severely shorten the lifespan of electronic components. Be careful
when handling the iCE40 UltraPlus Breakout Board as to not damage it from ESD.
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02001-1.1 5
iCE40 UltraPlus Breakout Board
User Guide
2. Features
The iCE40 UltraPlus Breakout Board includes:
iCE40 UltraPlus Breakout Board – The iCE40 UltraPlus Breakout Board features the following on-board components
and circuits:
— iCE40 UltraPlus (iCE40UP5K-SG48) device in a 48-PIN QFN package.
— Example of a board using this 0.5mm pitch QFN package.
— High-current LED output
— iCE40 UltraPlus Current Measurements
— Standard USB cable for device programming.
— RoHS-compliant packaging and process
Pre-loaded Demo – The kit includes a pre-loaded demo to control the onboard RGB LED in conjunction with a
software run GUI.
USB Connector Cable – A mini B USB port provides power, a programming interface and communication for the
software RGB LED GUI to the iCE40 UltraPlus SPI port.
Figure 2.1 shows the top side of the iCE40 UltraPlus Breakout Board indicating the specific features that are designed on
the board.
D13 USB
Power Interface
LED Socket
iCE40UP5K-
SG48
RGB
LED
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trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
6 FPGA-UG-02001-1.1
iCE40 UltraPlus Breakout Board
User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02001-1.1 7
iCE40 UltraPlus Breakout Board
User Guide
4. Software Requirements
You should install the following software before you begin developing designs for the board:
Lattice iCEcube2 2017.01 (or higher)
Diamond Programmer 3. 9 (or higher)
These software are available at the Lattice website Design Software & IP page. Make sure you log in to
www.latticesemi.com, otherwise these software downloads will not be visible. It is also recommended to download the
RGB LED software GUI which interfaces with the iCE40 UltraPlus Breakout Board. This GUI allows you to control the
RGB LED for color, brightness, blinking and breathing. Download the PC or MAC version of the GUI at
www.latticesemi.com.
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
8 FPGA-UG-02001-1.1
iCE40 UltraPlus Breakout Board
User Guide
J6 – Program SPI
Flash or iCE40UP
J7 – Isolate
J51 – Enable SPI Flash CSn
12 MHz clock
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02001-1.1 9
iCE40 UltraPlus Breakout Board
User Guide
6. Clock Sources
The board has a single 12 MHz clock source. The 12 MHz clock drives both the FTDI USB interface device, and the
iCE40UP5K device. The iCE40UP5K can be disconnected from the 12 MHz oscillator using J51. This is necessary, for
example, when iCE40UP5K device pin35 is mistakenly programmed as an output and prevents the FTDI USB interface
from operating.
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
10 FPGA-UG-02001-1.1
iCE40 UltraPlus Breakout Board
User Guide
7. Board Power
The board provides the following power features:
Board Power
— Board power is derived from the USB connection.
— D13 Blue LED indicates Board Power
iCE40 UltraPlus VCC/VCC_PLL
— Onboard 1.2 V supply
— ICC can be measured across the series resistor R76 (1 Ω) at TP11 and TP12
— ICC_PLL can be measured across the series resistor R77 (1 Ω) at TP13 and TP14
iCE40 UltraPlus VCCIO
— Onboard 3.3 V supply
— ICC0 can be measured across the series resistor R73 (1 Ω) at TP5 and TP6
— ICC1 can be measured across the series resistor R75 (1 Ω) at TP9 and TP10
— ICC2 can be measured across the series resistor R74 (1 Ω) at TP7 and TP8
The power supplies on the iCE40 UltraPlus Breakout Board are simplified and suitable for booting from the external SPI
flash. The power supply sequencing does not conform to the NVCM boot requirements as specified in DS1056, iCE40
UltraPlus Family Data Sheet. The user may encounter intermittent boot success and/or higher than specified startup
currents when attempting to boot from NVCM.
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02001-1.1 11
iCE40 UltraPlus Breakout Board
User Guide
USB Interface
Socket
U5 – N25Q032A13ESC40F
J6 – Program SPI
Flash or iCE40 UltraPlus
U1 –
iCE40UP5K-SG48
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
12 FPGA-UG-02001-1.1
iCE40 UltraPlus Breakout Board
User Guide
Load from File button should be used to refresh fields such as “Data file size” and “End address(Hex)”.
6. Click OK to exit Device Properties dialog.
7. Click the Program button in Diamond Programmer to download the bitstream file.
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02001-1.1 13
iCE40 UltraPlus Breakout Board
User Guide
The differences between programming ICE40 UltraPlus and programming flash are described below.
To program ICE40 UltraPlus in Diamond Programmer:
1. Change jumpers on J6, shunt pins 1-2 and 3-4.
2. Apply the settings in the Device Properties dialog as shown in Figure 8.4.
For more information on Diamond Programmer, please refer to its user guide.
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
14 FPGA-UG-02001-1.1
iCE40 UltraPlus Breakout Board
User Guide
9. Test Points
The board features a number of headers and test connections which provide access to the iCE40 UltraPlus I/Os:
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02001-1.1 15
iCE40 UltraPlus Breakout Board
User Guide
The break-out headers and test connectors are shown in Figure 9.6.
U6 - "PMOD SOCKET"
J1 - "Aardvark SPI
emulator connector
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
16 FPGA-UG-02001-1.1
iCE40 UltraPlus Breakout Board
User Guide
3. Connect the iCE40 UltraPlus breakout board via the USB cable to a PC or MAC.
4. After the iCE40 UltraPlus device has initialized and the RGB LED is illuminated RED, change the J6 jumper positions
to vertical, shorting pins 1-2 and 3-4. This is required to allow the USB port to communicate with the iCE40UP5K
device.
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02001-1.1 17
iCE40 UltraPlus Breakout Board
User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
18 FPGA-UG-02001-1.1
iCE40 UltraPlus Breakout Board
User Guide
Now you can control the RGB LED on the iCE40 UltraPlus Breakout Board. You can set the color, brightness, blinking
rate as well as breathing.
Note: The RGB GUI is the same demo tool used with iCE40 Ultra Breakout board.
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02001-1.1 19
iCE40 UltraPlus Breakout Board
User Guide
CSn
SCK
MOSI
ADDR[7:0] REG[15:8] REG[7:0]
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
20 FPGA-UG-02001-1.1
iCE40 UltraPlus Breakout Board
User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02001-1.1 21
iCE40 UltraPlus Breakout Board
User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
22 FPGA-UG-02001-1.1
iCE40 UltraPlus Breakout Board
User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02001-1.1 23
iCE40 UltraPlus Breakout Board
User Guide
Page : 4
BLOCK DIAGRAM
Header C
D D
Page : 4
BANK 1 & 2
Switches
Page : 4
Aardvark Connector
RGB
Lattice Semiconductor FPGA
BANK 1
C C
BANK 0
Header A
SPI
Page : 4
USB
Connector USB to SPI SPI
iCE40UP5K-SG48
Page : 5 Page : 6
Page : 2
BANK 0
B B
Page : 3
Header B
Page : 4
A A
Lattice Semiconductor Applications
Email: [email protected]
Title
Block Diagram
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice
24 FPGA-UG-02001-1.1
iCE40 UltraPlus Breakout Board
User Guide
5 4 3 2 1
+3.3V
FB4 FTDI CONNECTION
FB_60ohm C1 C2
PART_NUMBER = HI0603P600R-10
Manufacturer = Laird-signal 4.7uF 0.1uF
D +3.3V D
FB5
VBUS_5V
R54
FB_60ohm C3 C4
PART_NUMBER = HI0603P600R-10
1
1K
D13 Manufacturer = Laird-signal 4.7uF 0.1uF VCC1_8FT +3.3V
C64 Green
L4
0.1uF
600 OHM 800MA
2
J5
1
VCC 2 U2
D- 3 FT2232HL
12
37
64
20
31
42
56
4
9
D+ 4 R49 0
ID 5
VPLL
VCCIO
VCCIO
VCCIO
VCCIO
VPHY
VCORE
VCORE
VCORE
GND C66 0.1uF +3.3V
SKT_MINIUSB_B_RA 16 SCK 0 R5
VCC1_8FT ADBUS0 ICE_SCK 3,4,6
50 17 SI 0 R6
VREGIN ADBUS1 FLASH_MOSI 6
C PART_NUMBER = 5075BMR-05-SM-CR 18 SO 0 R7 C
ADBUS2 FLASH_MISO 6
Manufacturer = Neltron 49 19
VREGOUT ADBUS3 21 SS 0 R8
ADBUS4 ICE_SS 3,4,6
22
+3.3V 7 ADBUS5 23 0 R70
DM ADBUS6 CDONE 3
8 24 0 R71
DP ADBUS7 CRESET_B 3
C10 C11 R9 2.2K 26
14 ACBUS0 27
+3.3V 10uF 0.1uF RESET# ACBUS1 28
R11 R12 R13 R10 12K ACBUS2 29
6 ACBUS3 30
10K 10K 10K REF ACBUS4 32
U2 ACBUS5 33
ACBUS6 34
8 1 FT_EECS 63 ACBUS7
7 VCC CS 2 FT_EECLK 62 EECS 38
6 NU CLK 3 FT_EEDATA 61 EECLK BDBUS0 39
5 ORG DI 4 EEDATA BDBUS1 40
C12 VSS DO BDBUS2 41
93LC56-SO8 R19 2.2K 2 BDBUS3 43
0.1uF OSCI BDBUS4 44
PART_NUMBER = 93LC56CT-I/SN BDBUS5 45
Manufacturer = Microchip BDBUS6 46
+3.3V
B 3 BDBUS7 B
OSCO 48
BCBUS0 52
X1 C53 BCBUS1 53
13 BCBUS2 54
1 4 0.1uF TEST BCBUS3 55
OE_ST# VDD BCBUS4 57
BCBUS5 58
2 3
FTDI High-Speed USB BCBUS6 59
GND OUTPUT BCBUS7
FT2232H PWREN#
60
12.0000MHZ J51
2 1 ICE_CLK 3,4 36
SUSPEND#
AGND
GND
GND
GND
GND
GND
GND
GND
GND
PART_NUMBER = SiT1602AC-12-33E-12.000 2 PIN JPR
Manufacturer = SiTime
10
1
5
11
15
25
35
47
51
PART_NUMBER = FT2232HL-REEL
+3.3V Manufacturer = FTDI
C5 C6 C7 C8 C9
A 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF A
Lattice Semiconductor Applications
Email: [email protected]
Title
FTDI Connection
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02001-1.1 25
iCE40 UltraPlus Breakout Board
User Guide
5 4 3 2 1
DUT CONNECTION
+1.2V TP11 TP12 VCC
DNI DNI
R76
1
D D
1 C95 C94 C98
1
VCC SPI_VCCIO1
30 16 ICE_SS C99 C91 C92 1
1
Bank1
1 2 24 12 IOB_22A
VPP_2V5 IOB_22A IOB_22A 4
21 IOB_23B
C93 IOB_23B IOB_23B 4
CDBU0520 13 IOB_24A
iCE40UP5K - SG48
IOB_24A IOB_24A 4
20 IOB_25B_G3
0.1uF IOB_25B_G3 IOB_25B_G3 4
19 IOB_29B
C IOB_29B IOB_29B 4 C
18 IOB_31B
IOB_31B IOB_31B 4
11 IOB_20A
IOB_20A IOB_20A 4
33 10 IOB_18A
VCCIO_0 IOB_18A IOB_18A 4
9 IOB_16A
IOB_16A IOB_16A 4
IOT_37A 23 6 IOB_13B
4 IOT_37A IOT_37A IOB_13B IOB_13B 4
IOT_36B 25
4 IOT_36B IOT_36B
IOT_39A 26
4 IOT_39A IOT_39A
IOT_38B 27
4 IOT_38B IOT_38B VCCIO_2 TP8 TP7 +3.3V
IOT_43A 32 DNI DNI
4 IOT_43A IOT_43A R74
IOT_42B 31
4 IOT_42B IOT_42B
IOT_45A_G1 37 1
4 IOT_345A_G1
1
IOT_44B 34 IOT_45A_G1 VCCIO_2
4 IOT_44B IOT_44B
IOT_49A 43 4 IOB_8A C100 C89 C90 1
4 IOT_49A IOT_49A IOB_8A IOB_8A 4
IOT_48B 36 3 IOB_9B
Bank0
Bank2
4 IOT_48B IOT_48B IOB_9B IOB_9B 4
IOT_51A 42 48 IOB_4A 1uF 0.1uF 10nF
4 IOT_51A IOB_4A 4
+3.3V TP5 TP6 VCCIO_0 IOT_50B 38 IOT_51A IOB_4A 45 IOB_5B
DNI DNI 4 IOT_50B IOT_50B IOB_5B IOB_5B 4
4 IOT_41A IOT_41A 28 47 IOB_2A
R73 IOT_41A IOB_2A IOB_2A 4
2,4 ICE_CLK IOT_46B_G0 35 44 IOB_3B_G6
IOT_46B_G0 IOB_3B_G6 IOB_3B_G6 4
46 IOB_0A
IOB_0A 4
1
IOB_0A 2 IOB_6A
C101 IOB_6A IOB_6A 4
1 C88 C87 39
4 LED_BLUE 40 RGB0
1uF 0.1uF 10nF 4 LED_GREEN 41 RGB1
B B
4 LED_RED RGB2
GND
Paddle
iCE40UP5K- SG48
+3.3V
Done LED
+3.3V
R34
10k
CRESETB Button J11
SW1
Default: Open R35
2k2
J28
CRESET_B 2 CRESET_B
1
CRST
A 1 A
PART_NUMBER = TL1015AF160QG 2 CDONE Lattice Semiconductor Applications
Manufacturer = E-Switch D3 PART_NUMBER = LG L29K-G2J1-24-Z Email: [email protected]
CRST Green Manufacturer = Osram
PART_NUMBER = 77311-801-02LF
DONE Title
Manufacturer = FCI
PART_NUMBER = 77311-801-02LF DUT Connection
Manufacturer = FCI
Size Project Schematic Rev A
B iCE40 UltraPlus Breakout Board
Board Rev A
Date: 6-DEC-2015 Sheet 3 of 6
5 4 3 2 1
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice
26 FPGA-UG-02001-1.1
iCE40 UltraPlus Breakout Board
User Guide
5 4 3 2 1
RGB LED
D
PMOD Socket D
VBUS_5V +3.3V
U10 +3.3V U11
D8
J27 R97 110 3 4 2 1 ICE_SS 1 7 IOT_38B
SM_R_0603 DI CDBU0520 ICE_MOSI 2 8 IOT_39A
D9
LED_RED 2 1 ICE_MISO 3 9 IOT_43A
3,4 LED_RED LED_GREEN 4 3 R94 62 2 5 2 1 ICE_SCK 4 10 IOT_42B
3,4 LED_GREEN LED_BLUE 6 5 SM_R_0603 DI CDBU0520
D10 5 11
3,4 LED_BLUE
6 12
Default: Shunt R95 62 1 6 2 1
HEADER 3X2 SM_R_0603 DI CDBU0520 (Bank 0)
PMOD socket
DNI
Manufacturer = Seoul Semiconductor Inc
PART_NUMBER = SFT722N-S
LED TRI-COLOUR_1
C C
+3.3V
+3.3V +3.3V +3.3V
+3.3V
MAKE PWR TRACES
CAPABLE OF 1A
C76
C73 C75 C74 0.1uF
0.1uF C72 0.1uF 0.1uF
0.1uF
J52 J2 J3
1 2 1 2
IOB_22A 3
2 1 IOT_37A 3 4 3 4
3 IOT_37A 3 IOB_8A IOB_23B 3
3,4,6 ICE_MOSI ICE_MOSI 4 3 LED_BLUE IOT_36B 5 6 5 6
3 IOT_36B 3 IOB_9B IOB_24A 3
3,4,6 ICE_MISO ICE_MISO 6 5 LED_GREEN IOT_39A 7 8 7 8
3,4 IOT_39A IOT_48B 3 3 IOB_4A IOB_25B_G3 3
2,3,4,6 ICE_SCK ICE_SCK 8 7 IOT_38B 9 10 9 10
3,4 IOT_38B IOT_51A 3 3 IOB_5B IOB_29B 3
2,3,4,6 ICE_SS ICE_SS 10 9 LED_RED IOT_43A 11 12 11 12
3,4 IOT_43A IOT_50B 3 3 IOB_2A IOB_31B 3
11 12 IOT_42B 13 14 IOT_41A 3
13 14
3,4 IOT_42B 3 IOB_3B_G6 IOB_20A 3
15 16 ICE_CLK 2,3 3 IOB_0A 15 16
3 IOT_345A_G1 IOB_18A 3
IOT_44B 17 18 3 IOB_6A 17 18
3 IOT_44B IOB_16A 3
IOT_49A 19 20 19 20
B 3 IOT_49A IOB_13B 3 B
HEADER 5X2_0
DNI
Header2x10 Header2x10
DNI DNI
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02001-1.1 27
iCE40 UltraPlus Breakout Board
User Guide
5 4 3 2 1
REGULATOR CONNECTION
D D
R68 L6
18 3
17 IN1_1 OUT1_1
14 IN1_2 4 C46 0.1 600 OHM 800MA
13 IN2_1 OUT1_2 R64 C47 R66 C84 C49
IN2_2 0.01uF
C65 R63 R62 20 2 357K 10uF 100 22uF 0.1uF
SHDN1 BYP1 R65 210K
10uF 1M 1M 11 1
SHDN2 ADJ1
+1.22V VCC_1.2V +1.2V +3.3V
19 R69 L7
PWRGD1 7
12 OUT2_1
PWRGD2 8 C48 0.1 600 OHM 800MA C42 C43 C44 C45
OUT2_2 C67 R67 C85
0.01uF 10uF 1uF 0.1uF 0.01uF
21 9 4.7uF 100 22uF
C THERMPAD BYP2 C
10
ADJ2
GND1
GND2
GND3
GND4
+1.2V
16
15
LT3030EFE#TRPBF
PART_NUMBER = LT3030EFE#TRPBF
Manufacturer = Linear C35 C36 C37 C38 C39 C40 C41
+3.3V +1.2V
1
1
B B
A A
Lattice Semiconductor Applications
Email: [email protected]
Title
Regulator Connection
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice
28 FPGA-UG-02001-1.1
iCE40 UltraPlus Breakout Board
User Guide
5 4 3 2 1
+3.3V
SPI
R25
10K
D D
C63
8
SPI PGM
PART_NUMBER = 77313-801-10LF
VCC
FLASH_MOSI 5 2 FLASH_MISO
Manufacturer = FCI SDI SDO
2,3,4 ICE_SCK 6
SCK
J7 3
WP
1 2 1 7
GND
2,3,4,6 ICE_SS CS HOLD
C C
4
N25Q032A13ESC40F
Short-circuit Jumper
JU1 JU2 JU3
J6
A A
Lattice Semiconductor Applications
Email: [email protected]
Title
SPI
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02001-1.1 29
iCE40 UltraPlus Breakout Board
User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice
30 FPGA-UG-02001-1.1
iCE40 UltraPlus Breakout Board
User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice
FPGA-UG-02001-1.1 31
iCE40 UltraPlus Breakout Board
User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice
32 FPGA-UG-02001-1.1
iCE40 UltraPlus Breakout Board
User Guide
References
Standards Documents
The standards used in this document and their abbreviations are listed on the table below.
Abbreviation Standards Publication, Organization, and Date
HDMI High Definition Multimedia Interface, Revision 1.4a, HDMI Licensing LLC., March 2010
HCTS HDMI Compliance Test Specification, Revision 1.4a, HDMI Licensing LLC., March 2010
High-bandwidth Digital Content Protection, Revision 2.2, Digital Content Protection, LLC; February 2013
HDCP
High-bandwidth Digital Content Protection, Revision 1.4, Digital Content Protection, LLC; July 2009
DVI Digital Visual Interface, Revision 1.0, Digital Display Working Group, April 1999
E-EDID Enhanced Extended Display Identification Data Standard, Release A Revision 1, VESA; February 2000
CEA-861-D A DTV Profile For Uncompressed High Speed Digital Interfaces, EIA/CEA, July 2006
EDDC Enhanced Display Data Channel Standard, Version 1, VESA, September 1999
MHL MHL (Mobile High-definition Link) Specification, Version 3.0, MHL, LLC, August 2013
For more information on the specifications that are applied in this document, contact the responsible standards groups
listed on the table below.
Standards Group Web URL
ANSI/EIA/CEA http://global.ihs.com
VESA http://www.vesa.org
HDCP http://www.digital-cp.com
DVI http://www.ddwg.org
HDMI http://www.hdmi.org
MHL http://www.mhlconsortium.org
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice
FPGA-UG-02001-1.1 33
iCE40 UltraPlus Breakout Board
User Guide
Revision History
Date Version Change Summary
March 2017 1.1 — Corrected document status; removed “Preliminary”.
— iCE40 UltraPlus Family Data Sheet document number changed to DS1056.
— Update Lattice iCEcube2 to version 2017.01.
— Updated Diamond Programmer version to 3.9.
— Updated Appendix A. Schematic Diagrams.
— Removed Lattice Semiconductor Documents section.
September 2016 1.0 Initial release.
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice
34 FPGA-UG-02001-1.1
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