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Lab Session 3

This lab session focuses on filter design using a novel 1-D periodic defected ground structure for planar circuits. A new defected ground unit lattice is proposed to improve effective inductance and control cutoff frequency characteristics. Periodic defected ground structures can realize additional equivalent circuit components and properties when cascaded in the ground plane. Simulation results will analyze how design parameters like the etched area, gap distance, number of periods, and unit shape and spacing affect bandgap properties. The supervisor is Dr. Hany Hammad and the TAs are Yasmine Abdalla and Effat El-Khashab.

Uploaded by

Kunal Khandelwal
Copyright
© © All Rights Reserved
59 views

Lab Session 3

This lab session focuses on filter design using a novel 1-D periodic defected ground structure for planar circuits. A new defected ground unit lattice is proposed to improve effective inductance and control cutoff frequency characteristics. Periodic defected ground structures can realize additional equivalent circuit components and properties when cascaded in the ground plane. Simulation results will analyze how design parameters like the etched area, gap distance, number of periods, and unit shape and spacing affect bandgap properties. The supervisor is Dr. Hany Hammad and the TAs are Yasmine Abdalla and Effat El-Khashab.

Uploaded by

Kunal Khandelwal
Copyright
© © All Rights Reserved
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Lab Session (3)

Supervisor: Dr. Hany Hammad.


TAs: Yasmine Abdalla.
Effat El-Khashab.
Filter Design
“A Novel 1-D Periodic Defected Ground
Structure for Planar Circuits”
Filter Design
“ A Novel 1-D Periodic Defected Ground
Structure for Planar Circuits ”

A new one-dimensional (1-D) defected ground unit


lattice is proposed in order to improve the effective
inductance. Increasing the effective inductance
makes it easy to control the cutoff frequency
characteristics.
DGS Structures

• New DGSs are proposed which bring a great convenience to the design of
microwave circuit to realize various passive and active device compact structures
and to suppress the harmonics.

• In order to derive the equivalent circuit parameters of DGS unit at the reference
plane, the S-parameters vs. frequency should be calculated by full-wave
electromagnetic (EM)-simulation to explain the cutoff and attenuation pole
characteristics of the DGS section. The circuit parameters for the derived
equivalent circuit can be extracted from the simulation result which can be fit for
the one-pole Butterworth-type low-pass response.

• There is no direct correlation between the physical dimensions of DGS and the
equivalent LC parameters.
DGS Structures
“Equivalent Circuit of the Dumbbell Head DGS
Structure”

As the etched area of the unit lattice increases, the effective series inductance increase
and increasing the series inductance gives rise to a lower cutoff frequency. When the
etched gap distance increases, the effective capacitance decreases so that the
attenuation pole location moves up to higher frequency.
DGS Structures

There are too many design parameters, which effect on the


bandgap properties, such as the number of lattice, lattice shapes,
lattice spacing.
DGS Structures
• Periodic structures such as DGS for planar transmission lines have drawn a wide interest for
their extensive applicability in microwave circuits, Periodic means repetition of the physics
structure.
• Transmission lines with a periodic structure have additional equivalent components that are
important properties that can be realized.
• By cascading DGS resonant cells in the ground plane the depth and bandwidth of the stopband
for the proposed DGS circuit are inclined to depend on the number of period.
• Period DGSs care about parameters including the shape of unit DGS, distance between two DGS
units and the distribution of the different DGSs.

(a) horizontally periodic DGS (HPDGS).


(b) vertically periodic DGS (VPDGS).
Design Parameters
• TACNOIC CER-10 Substrate with height = 1.5748 mm and dielectric constant = 10.
• 50 ohm microstrip line with width = 1.46 mm.
• g = 0.2 mm.
Simulation Results
Design Parameters
• TACNOIC CER-10 Substrate with height = 1.5748 mm and dielectric constant = 10.
• 50 ohm microstrip line with width = 1.46 mm.
• g = 0.2 mm.
• d = 5 mm.
Simulation Results
Simulation Results
Simulation Results

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