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UDS LDS UDS LDS: Bytes of Memory Even Though It Has 23 Address Lines. A1

The document contains two questions regarding the MC68000 microprocessor. Question 1 has multiple parts asking about the logic states of various signal lines for different memory access types and the results of operations on registers and memory. Question 2 asks to write an assembly language program to count even and odd numbers in a block of memory and store the results in specific data registers, providing a flowchart for the solution.

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dedey123
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77 views

UDS LDS UDS LDS: Bytes of Memory Even Though It Has 23 Address Lines. A1

The document contains two questions regarding the MC68000 microprocessor. Question 1 has multiple parts asking about the logic states of various signal lines for different memory access types and the results of operations on registers and memory. Question 2 asks to write an assembly language program to count even and odd numbers in a block of memory and store the results in specific data registers, providing a flowchart for the solution.

Uploaded by

dedey123
Copyright
© Attribution Non-Commercial (BY-NC)
Available Formats
Download as PDF, TXT or read online on Scribd
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QUESTION 1

a. MC68000 can address 224 bytes of memory even though it has 23 address lines. A1
to A23 directly address memory and A0 is implied by signal lines UDS and LDS .
What are the logic state (low or high) of UDS and LDS when MC68000 is
transferring data in byte, word and long-word format? (4 marks)

b. What are the logic state of signal lines AS , UDS , LDS and R / W when MC68000 is
writing byte data at memory location $400FFF (hint: using data bus D0 to D7). (2
marks)

c. What are the logic state of signal lines AS , UDS , LDS and R / W when MC68000 is
reading word data at memory location $400FFE. (2 marks)

d. What are the logic state of signal lines UDS , LDS and BERR when MC68000 has
addressed an illegal memory location? (2 marks)

QUESTION 2

What are the results of the following operations? Show the contents of the affected
registers (data register, D0 and D1; address register, A0 and A1), the status register and
the memory where appropriate:

Memory Address Memory Map Memory Address

D0 = 00400C00 $000000 $000001


D1 = 00400CA0 -- --
A0 = 00400C00 -- --
A1 = 00400CA0 $400C00 $00 $40 $400C01
-- --
---XNZVC $400CA0 $0C $00 $400CA1
CCR = 00000000 -- --
-- --
$FFFFFE $FFFFFF

a. MOVE.B (A0)+,D1 (2 marks)

b. SUB.W D0,$A0(A0) (2 marks)

c. OR.W D1,D0 (2 marks)

d. ROR.W #4,D1 (2 marks)

e. BCHG #$10,D0 (2 marks)


3

PART B
QUESTION 1

Below is a MC68000 assembly language program.


START ORG $400400 ;
LEA BLOCK1,A0 ;Point to block1
MOVE.B #20,D0 ;Set counter
CLR.L D2 ;

NEXT MOVE.B (A0)+,D1 ;


BPL SKIP ;Line 6
ADDQ #1,D2 ;
SKIP SUBQ #1,D0 ;
BNE NEXT ;

STOP #$2000 ;

ORG $400500 ;
BLOCK1 DC.B $60,$61,$62,$63,$64 ;
DC.B $75,$76,$77,$78,$79 ;
DC.B $8A,$8B,$8C,$8D,$8E ;
DC.B $9A,$90,$91,$92,$93 ;

END START ;

a. BPL is one of Conditional Branch instructions. What is the name of the flag in
Condition Code Register (CCR) that will be logically test for this instruction?(1 marks)

b. Explain the operation of the program. (4 marks)

c. What is the content of data register D2 AFTER the program is executed. (1 marks)

d. Explain the operation of the program IF instruction at line 6 is changed from BPL
SKIP to BMI SKIP. (4 marks)

QUESTION 2

Write a MC68000 assembly language program to count EVEN and ODD numbers (even
numbers = {…,-6,-4,-2,0,2,4,6,…};odd numbers = {…,-5,-3,-1,1,3,5,…}) in a block of data.

The block of data (starting at location $400500) consists of ten UNSIGNED 16-bit
hexadecimal numbers.

Store the result of EVEN count in data register D2 and ODD count in data register D3.

Please give a flow chart for your answer.

(10 marks)
4

When both values are SIGNED, you may use any of the following branches after the instruction:
CMP.s D1,D0
SIGNED Comparison Branch That Will Be Taken
D0 > D1 BGT
D0 ≥ D1 BGE
D0 = D1 BEQ
D0 ≠ D1 BNE
D0 ≤ D1 BLE
D0 < D1 BLT

If both numbers are UNSIGNED, you may use any of the following branches after the
instruction: CMP.s D1,D0
UNSIGNED Comparison Branch That Will Be Taken
D0 > D1 BHI
D0 ≥ D1 BCC
D0 = D1 BEQ
D0 ≠ D1 BNE
D0 ≤ D1 BLS
D0 < D1 BCS

Condition Meaning Flag(s) Tested


T True None
F False None
HI High C+Z=0
LS Lower or same C+Z=1
CC Carry clear C=0
CS Carry set C=1
NE Not equal Z=0
EQ Equal Z=1
VC Overflow clear V=0
VS Overflow set V=1
PL Plus N=0
MI Minus N=1
GE Greater than or equal N V=0
LT Less than N V=1
GT Greater than Z + (N V) = 0
LE Less than or equal Z + (N V) = 1
Where is the Exclusive OR operation.

END OF QUESTION PAPER

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