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Layout of Multiplexer and Demultiplexer Using CMOS 0.25 Micron Technology in Microwind

This document outlines a lab assignment to design and simulate the layouts of a multiplexer, demultiplexer, and magnitude comparator using CMOS 0.25 micron technology in Microwind. Students will design a 4-to-1 multiplexer, 3-to-8 demultiplexer, and 1-bit and 2-bit magnitude comparators. They will analyze the layouts for configuration delay, gate delay, power consumption, and current. The goal is to understand how transistor sizing affects these parameters.

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142 views

Layout of Multiplexer and Demultiplexer Using CMOS 0.25 Micron Technology in Microwind

This document outlines a lab assignment to design and simulate the layouts of a multiplexer, demultiplexer, and magnitude comparator using CMOS 0.25 micron technology in Microwind. Students will design a 4-to-1 multiplexer, 3-to-8 demultiplexer, and 1-bit and 2-bit magnitude comparators. They will analyze the layouts for configuration delay, gate delay, power consumption, and current. The goal is to understand how transistor sizing affects these parameters.

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unity123d deew
Copyright
© © All Rights Reserved
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Download as DOCX, PDF, TXT or read online on Scribd
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Lab#06

“Layout of Multiplexer and Demultiplexer using CMOS 0.25 micron


Technology in Microwind”
Student Name: Roll No:

Lab Instructor Signatures: Date:

1. Objective
In this lab students will design and implement the layouts of Multiplexer and
Demultiplexer. The tool used in this lab is Microwind. .
The tasks given in lab include:

 Design of Multiplexer and Demultiplexer

 Layout Design using the tool.

 Gate delay, area, power and current analysis and the effects of transistor sizing on
these parameters.

2. Theory

Multiplexer
Generally speaking, a multiplexor is used to transmit a large amount of information
through a smaller number of connections. A digital multiplexor is a circuit that selects
binary information from one of many input logic signals and directs it to a single input
line. A behavioral description of the multiplexor is the case statement:

The usual symbol for the multiplexor is given in the following figure. It consists of the
two multiplexed inputs in0 and in1 on the left side, the command sel at the bottom of the
symbol, and the output f on the right.
Output of 2-to-1 MUX
Demultiplexer:

The data distributor, known more commonly as a Demultiplexer or “Demux” for short, is
the exact opposite of the Multiplexer we saw in the previous tutorial.

The demultiplexer takes one single input data line and then switches it to any one of a
number of individual output lines one at a time. The demultiplexer converts a serial data
signal at the input to a parallel data at its output lines as shown below.
Task#1: Design the layout of 4-to1 line multiplexer/Encoder in Microwind. Simulate the
Design. Observe the values of configuration delay, gate delay, power and current.

Task#2: Design the layout of 3-to-8 line Demultiplexer/Decoder in Microwind. Simulate the
Design. Observe the values of configuration delay, gate delay, power and current.

Task#3: Design the layout of 1 bit and 2 bit Magnitude Comparator in Microwind. Simulate
the Design. Observe the values of configuration delay, gate delay, power and current

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