68HC11 Instructions

Addressing  Instruction Registers and Memory Flags

Mnenomic Operation Bytes Cycles Explanation
Mode Prebyte Opcode Operand CCR A B D X Y Mem SP S X H I N Z V C
0 ABA Add Accumulators INH 1B 1 2 A=(A)+(B) W B ⇅ ⇅ ⇅ ⇅ ⇅
1 ABX Add B to X INH 3A 1 3 IX=(IX)+(B) B W
2 ABY Add B to Y INH 18 3A 2 4 IY=(IY)+(B) B W
3 ADCA Add with carry to A IMM 89 ii 2 2 A=(A)+(M)+(C) W M ⇅ ⇅ ⇅ ⇅ ⇅
4 ADCA Add with carry to A DIR 99 dd 2 3 A=(A)+(M)+(C) W M ⇅ ⇅ ⇅ ⇅ ⇅
5 ADCA Add with carry to A EXT B9 hh ll 3 4 A=(A)+(M)+(C) W M ⇅ ⇅ ⇅ ⇅ ⇅
6 ADCA Add with carry to A IND, X A9 ff 2 4 A=(A)+(M)+(C) W M ⇅ ⇅ ⇅ ⇅ ⇅
7 ADCA Add with carry to A IND, Y 18 A9 ff 3 5 A=(A)+(M)+(C) W M ⇅ ⇅ ⇅ ⇅ ⇅
8 ADCB Add with carry to B IMM C9 ii 2 2 B=(B)+(M)+(C) W M ⇅ ⇅ ⇅ ⇅ ⇅
9 ADCB Add with carry to B DIR D9 dd 2 3 B=(B)+(M)+(C) W M ⇅ ⇅ ⇅ ⇅ ⇅
10 ADCB Add with carry to B EXT F9 hh ll 3 4 B=(B)+(M)+(C) W M ⇅ ⇅ ⇅ ⇅ ⇅
11 ADCB Add with carry to B IND, X E9 ff 2 4 B=(B)+(M)+(C) W M ⇅ ⇅ ⇅ ⇅ ⇅
12 ADCB Add with carry to B IND, Y 18 E9 ff 3 5 B=(B)+(M)+(C) W M ⇅ ⇅ ⇅ ⇅ ⇅
13 ADDA Add memory to A IMM 8B ii 2 2 A=(A)+(M) W M ⇅ ⇅ ⇅ ⇅ ⇅
14 ADDA Add memory to A DIR 9B dd 2 3 A=(A)+(M) W M ⇅ ⇅ ⇅ ⇅ ⇅
15 ADDA Add memory to A EXT BB hh ll 3 4 A=(A)+(M) W M ⇅ ⇅ ⇅ ⇅ ⇅
16 ADDA Add memory to A IND, X AB ff 2 4 A=(A)+(M) W M ⇅ ⇅ ⇅ ⇅ ⇅
17 ADDA Add memory to A IND, Y 18 AB ff 3 5 A=(A)+(M) W M ⇅ ⇅ ⇅ ⇅ ⇅
18 ADDB Add Memory to B IMM CB ii 2 2 B=(B)+(M) W M ⇅ ⇅ ⇅ ⇅ ⇅
19 ADDB Add Memory to B DIR DB dd 2 3 B=(B)+(M) W M ⇅ ⇅ ⇅ ⇅ ⇅
20 ADDB Add Memory to B EXT FB hh ll 3 4 B=(B)+(M) W M ⇅ ⇅ ⇅ ⇅ ⇅
21 ADDB Add Memory to B IND, X EB ff 2 4 B=(B)+(M) W M ⇅ ⇅ ⇅ ⇅ ⇅
22 ADDB Add Memory to B IND, Y 18 EB ff 3 5 B=(B)+(M) W M ⇅ ⇅ ⇅ ⇅ ⇅
23 ADDD Add 16-bit to D IMM C3 jj kk 3 4 D=(D)+(M;M+1) W M ⇅ ⇅ ⇅ ⇅
24 ADDD Add 16-bit to D DIR D3 dd 2 5 D=(D)+(M;M+1) W M ⇅ ⇅ ⇅ ⇅
25 ADDD Add 16-bit to D EXT F3 hh ll 3 6 D=(D)+(M;M+1) W M ⇅ ⇅ ⇅ ⇅
26 ADDD Add 16-bit to D IND, X E3 ff 2 6 D=(D)+(M;M+1) W M ⇅ ⇅ ⇅ ⇅
27 ADDD Add 16-bit to D IND, Y 18 E3 ff 3 7 D=(D)+(M;M+1) W M ⇅ ⇅ ⇅ ⇅
28 ANDA AND A with Memory IMM 84 ii 2 2 A=(A)&(M) W M ⇅ ⇅ 0
29 ANDA AND A with Memory DIR 94 dd 2 3 A=(A)&(M) W M ⇅ ⇅ 0
30 ANDA AND A with Memory EXT B4 hh ll 3 4 A=(A)&(M) W M ⇅ ⇅ 0
31 ANDA AND A with Memory IND, X A4 ff 2 4 A=(A)&(M) W M ⇅ ⇅ 0
32 ANDA AND A with Memory IND, Y 18 A4 ff 3 5 A=(A)&(M) W M ⇅ ⇅ 0
33 ANDB AND B with Memory IMM C4 ii 2 2 B=(B)&(M) W M ⇅ ⇅ 0
34 ANDB AND B with Memory DIR D4 dd 2 3 B=(B)&(M) W M ⇅ ⇅ 0
35 ANDB AND B with Memory EXT F4 hh ll 3 4 B=(B)&(M) W M ⇅ ⇅ 0
36 ANDB AND B with Memory IND, X E4 ff 2 4 B=(B)&(M) W M ⇅ ⇅ 0
37 ANDB AND B with Memory IND, Y 18 E4 ff 3 5 B=(B)&(M) W M ⇅ ⇅ 0
38 ASL Arithmetic Shift Left EXT 78 hh ll 3 6 W ⇅ ⇅ ⇅ ⇅
39 ASL Arithmetic Shift Left IND, X 68 ff 2 6 W ⇅ ⇅ ⇅ ⇅
40 ASL Arithmetic Shift Left IND, Y 18 68 ff 3 7 W ⇅ ⇅ ⇅ ⇅
41 ASLA Arithmetic Shift Left A INH 48 1 2 W ⇅ ⇅ ⇅ ⇅
42 ASLB Arithmetic Shift Left B INH 58 1 2 W ⇅ ⇅ ⇅ ⇅
43 ASLD Arithmetic Shift Left D INH 5 1 3 W ⇅ ⇅ ⇅ ⇅
44 ASR Arithmetic Shift Right EXT 77 hh ll 3 6 W ⇅ ⇅ ⇅ ⇅
45 ASR Arithmetic Shift Right IND, X 67 ff 2 6 W ⇅ ⇅ ⇅ ⇅
46 ASR Arithmetic Shift Right IND, Y 18 67 ff 3 7 W ⇅ ⇅ ⇅ ⇅
47 ASRA Arithmetic Shift Right A INH 47 1 2 W ⇅ ⇅ ⇅ ⇅
48 ASRB Arithmetic Shift Right B INH 57 1 2 W ⇅ ⇅ ⇅ ⇅
49 BCC Branch if Carry Clear REL 24 rr 2 3 bra if C==0
50 BCLR Clear Bit(s) DIR 15 dd mm 3 6 bit clear W ⇅ ⇅ 0
51 BCLR Clear Bit(s) IND, X 1D ff mm 3 7 bit clear W ⇅ ⇅ 0
52 BCLR Clear Bit(s) IND, Y 18 1D ff 4 8 bit clear W ⇅ ⇅ 0
53 BCS Branch if Carry Set REL 25 rr 2 3 bra if C==1
54 BEQ Branch if = Zero REL 27 rr 2 3 bra if Z==1
bra if greater or
55 BGE Branch if >= Zero REL 2C rr 2 3
equal
56 BGT Branch if > Zero REL 2E rr 2 3 bra if greater than
57 BHI Branch if Higher REL 22 rr 2 3 bra if higher
58 BHS Branch if Higher or Same REL 24 rr 2 3 bra if high or same
59 BITA Bit(s) Test A with Memory IMM 85 ii 2 2 bit test A A M ⇅ ⇅ 0
60 BITA Bit(s) Test A with Memory DIR 95 dd 2 3 bit test A A M ⇅ ⇅ 0
61 BITA Bit(s) Test A with Memory EXT B5 hh ll 3 4 bit test A A M ⇅ ⇅ 0
62 BITA Bit(s) Test A with Memory IND, X A5 ff 2 4 bit test A A M ⇅ ⇅ 0
63 BITA Bit(s) Test A with Memory IND, Y 18 A5 ff 3 5 bit test A A M ⇅ ⇅ 0
64 BITB Bit(s) Test B with Memory IMM C5 ii 2 2 bit test B B M ⇅ ⇅ 0
65 BITB Bit(s) Test B with Memory DIR D5 dd 2 3 bit test B B M ⇅ ⇅ 0
66 BITB Bit(s) Test B with Memory EXT F5 hh ll 3 4 bit test B B M ⇅ ⇅ 0
67 BITB Bit(s) Test B with Memory IND, X E5 ff 2 4 bit test B B M ⇅ ⇅ 0
68 BITB Bit(s) Test B with Memory IND, Y 18 E5 ff 3 5 bit test B B M ⇅ ⇅ 0
bra if less than or
69 BLE Branch if <= Zero REL 2F rr 2 3
equal
70 BLO Branch if Lower REL 25 rr 2 3 bra if lower
71 BLS Branch if Lower or Same REL 23 rr 2 3 bra if lower or same
72 BLT Branch if < Zero REL 2D rr 2 3 bra if less than
73 BMI Branch if Minus REL 2B rr 2 3 bra if minus
74 BNE Branch if not = Zero REL 26 rr 2 3 bra if not equal
75 BPL Branch if Plus REL 2A rr 2 3 bra if plus
76 BRA Branch Always REL 20 rr 2 3 bra always
77 BRCLR Branch if Bit(s) Clear DIR 13 dd mm rr 4 6 bra bits clr
78 BRCLR Branch if Bit(s) Clear IND, X 1F ff mm rr 4 7 bra bits clr
79 BRCLR Branch if Bit(s) Clear IND, Y 18 1F ff mm rr 5 8 bra bits clr
80 BRN Branch Never REL 21 rr 2 3
81 BRSET Branch if Bit(s) Set DIR 12 dd mm rr 4 6 bra bits set
82 BRSET Branch if Bit(s) Set IND, X 1E ff mm rr 4 7 bra bits set
83 BRSET Branch if Bit(s) Set IND, Y 18 1E ff mm rr 5 8 bra bits set
84 BSET Set Bit(s) DIR 14 dd mm rr 3 6 bit set W ⇅ ⇅ 0
85 BSET Set Bit(s) IND, X 1C ff mm rr 3 7 bit set W ⇅ ⇅ 0
86 BSET Set Bit(s) IND, Y 18 1C ff mm rr 4 8 bit set W ⇅ ⇅ 0
87 BSR Branch to Subroutine REL 8D rr 2 6 bra to subroutine
88 BVC Branch if Overflow Clear REL 28 rr 2 3 bra if V==0
89 BVS Branch if Overflow Set REL 29 rr 2 3 bra if V==1
90 CBA Compare A to B INH 11 1 2 (A) – (B) A B ⇅ ⇅ ⇅ ⇅
91 CLC Clear Carry Bit INH 0C 1 2 C=0 0 ⇅
92 CLI Clear Interrupt Mask INH 0E 1 2 I=0 0
93 CLR Clear Memory Byte EXT 7F hh ll 3 6 M=0 W 0 1 0 0
94 CLR Clear Memory Byte IND, X 6F ff 2 6 M=0 W 0 1 0 0
95 CLR Clear Memory Byte IND, Y 18 6F ff 3 7 M=0 W 0 1 0 0
96 CLRA Clear Accumulator A INH 4F 1 2 A=0 W 0 1 0 0
97 CLRB Clear Accumulator B INH 5F 1 2 B=0 W 0 1 0 0
98 CLV Clear Overflow Flag INH 0A 1 2 V=0 0
99 CMPA Compare A to Memory IMM 81 ii 2 2 (A)-(M) A M ⇅ ⇅ ⇅ ⇅
100 CMPA Compare A to Memory DIR 91 dd 2 3 (A)-(M) A M ⇅ ⇅ ⇅ ⇅
101 CMPA Compare A to Memory EXT B1 hh ll 3 4 (A)-(M) A M ⇅ ⇅ ⇅ ⇅
102 CMPA Compare A to Memory IND, X A1 ff 2 4 (A)-(M) A M ⇅ ⇅ ⇅ ⇅
103 CMPA Compare A to Memory IND, Y 18 A1 ff 3 5 (A)-(M) A M ⇅ ⇅ ⇅ ⇅
104 CMPB Compare B to Memory IMM C1 ii 2 2 (B)-(M) B M ⇅ ⇅ ⇅ ⇅
105 CMPB Compare B to Memory DIR D1 dd 2 3 (B)-(M) B M ⇅ ⇅ ⇅ ⇅
106 CMPB Compare B to Memory EXT F1 hh ll 3 4 (B)-(M) B M ⇅ ⇅ ⇅ ⇅
107 CMPB Compare B to Memory IND, X E1 ff 2 4 (B)-(M) B M ⇅ ⇅ ⇅ ⇅
108 CMPB Compare B to Memory IND, Y 18 E1 ff 3 5 (B)-(M) B M ⇅ ⇅ ⇅ ⇅
Ones Complement Memory
109 COM EXT 73 hh ll 3 6 M=$FF-(M) W ⇅ ⇅ 0 1
Byte
Ones Complement Memory
110 COM IND, X 63 ff 2 6 M=$FF-(M) W ⇅ ⇅ 0 1
Byte
Ones Complement Memory
111 COM IND, Y 18 63 ff 3 7 M=$FF-(M) W ⇅ ⇅ 0 1
Byte
112 COMA Ones Complement A INH 43 1 2 A=$FF-(A) W ⇅ ⇅ 0 1
113 COMB Ones Complement B INH 53 1 2 B=$FF-(B) W ⇅ ⇅ 0 1
114 CPD Compare D to Memory 16-Bit IMM 1A 83 jj kk 4 5 (D)-(M:M+!) D M ⇅ ⇅ ⇅ ⇅
115 CPD Compare D to Memory 16-Bit DIR 1A 93 dd 3 6 (D)-(M:M+!) D M ⇅ ⇅ ⇅ ⇅
116 CPD Compare D to Memory 16-Bit EXT 1A B3 hh ll 4 7 (D)-(M:M+!) D M ⇅ ⇅ ⇅ ⇅
117 CPD Compare D to Memory 16-Bit IND, X 1A A3 ff 3 7 (D)-(M:M+!) D M ⇅ ⇅ ⇅ ⇅
118 CPD Compare D to Memory 16-Bit IND, Y CD A3 ff 3 7 (D)-(M:M+!) D M ⇅ ⇅ ⇅ ⇅
119 CPX Compare X to Memory 16-Bit IMM 8C jj kk 3 5 (IX)-(M:M+!) X M ⇅ ⇅ ⇅ ⇅
120 CPX Compare X to Memory 16-Bit DIR 9C dd 2 6 (IX)-(M:M+!) X M ⇅ ⇅ ⇅ ⇅
121 CPX Compare X to Memory 16-Bit EXT BC hh ll 3 7 (IX)-(M:M+!) X M ⇅ ⇅ ⇅ ⇅
122 CPX Compare X to Memory 16-Bit IND, X AC ff 2 7 (IX)-(M:M+!) X M ⇅ ⇅ ⇅ ⇅
123 CPX Compare X to Memory 16-Bit IND, Y AC ff 3 7 (IX)-(M:M+!) X M ⇅ ⇅ ⇅ ⇅
124 CPY Compare Y to Memory 16-Bit IMM 18 8C jj kk 4 5 (IY)-(M:M+!) Y M ⇅ ⇅ ⇅ ⇅
125 CPY Compare Y to Memory 16-Bit DIR 18 9C dd 3 6 (IY)-(M:M+!) Y M ⇅ ⇅ ⇅ ⇅
126 CPY Compare Y to Memory 16-Bit EXT 18 BC hh ll 4 7 (IY)-(M:M+!) Y M ⇅ ⇅ ⇅ ⇅
127 CPY Compare Y to Memory 16-Bit IND, X 1A AC ff 3 7 (IY)-(M:M+!) Y M ⇅ ⇅ ⇅ ⇅
128 CPY Compare Y to Memory 16-Bit IND, Y 18 AC ff 3 7 (IY)-(M:M+!) Y M ⇅ ⇅ ⇅ ⇅
129 DAA Decimal Adjust A INH 19 1 2 BCD adjust A W ⇅ ⇅ ⇅ ⇅
130 DEC Decrement Memory Byte EXT 7A hh ll 3 6 M=(M)-1 W ⇅ ⇅ ⇅
131 DEC Decrement Memory Byte IND, X 6A ff 2 6 M=(M)-1 W ⇅ ⇅ ⇅
132 DEC Decrement Memory Byte IND, Y 18 6A ff 3 7 M=(M)-1 W ⇅ ⇅ ⇅
133 DECA Decrement Accumulator A INH 4A 1 2 A=(A)-1 W ⇅ ⇅ ⇅
134 DECB Decrement Accumulator B INH 5A 1 2 B=(B)-1 W ⇅ ⇅ ⇅
135 DES Decrement Stack Pointer INH 34 1 3 SP=(SP)-1 W
136 DEX Decrement Index Register X INH 9 1 3 IX=(IX)-1 W ⇅
137 DEY Decrement Index Register Y INH 9 2 4 IY=(IY)-1 W ⇅
138 EORA Exclusive OR A with Memory IMM 88 ii 2 2 A=(A)⊕(M) W M ⇅ ⇅ 0
139 EORA Exclusive OR A with Memory DIR 98 dd 2 3 A=(A)⊕(M) W M ⇅ ⇅ 0
140 EORA Exclusive OR A with Memory EXT B8 hh ll 3 4 A=(A)⊕(M) W M ⇅ ⇅ 0
141 EORA Exclusive OR A with Memory IND, X A8 ff 2 4 A=(A)⊕(M) W M ⇅ ⇅ 0
142 EORA Exclusive OR A with Memory IND, Y 18 A8 ff 3 5 A=(A)⊕(M) W M ⇅ ⇅ 0
143 EORB Exclusive OR B with Memory IMM C8 ii 2 2 B=(B)⊕(M) W M ⇅ ⇅ 0
144 EORB Exclusive OR B with Memory DIR D8 dd 2 3 B=(B)⊕(M) W M ⇅ ⇅ 0
145 EORB Exclusive OR B with Memory EXT F8 hh ll 3 4 B=(B)⊕(M) W M ⇅ ⇅ 0
146 EORB Exclusive OR B with Memory IND, X E8 ff 2 4 B=(B)⊕(M) W M ⇅ ⇅ 0
147 EORB Exclusive OR B with Memory IND, Y 18 E8 ff 3 5 B=(B)⊕(M) W M ⇅ ⇅ 0
148 FDIV Fractional Divide 16 by 16 INH 3 1 41 W W ⇅ ⇅ ⇅
149 IDIV Integer Divide 16 by 16 INH 2 1 41 W W ⇅ 0 ⇅
150 INC Increment Memory Byte EXT 7C hh ll 3 6 M=(M)+1 W ⇅ ⇅ ⇅
151 INC Increment Memory Byte IND, X 6C ff 2 6 M=(M)+1 W ⇅ ⇅ ⇅
152 INC Increment Memory Byte IND, Y 18 6C ff 3 7 M=(M)+1 W ⇅ ⇅ ⇅
153 INCA Increment Accumulator A INH 4C 1 2 A=(A)+1 W ⇅ ⇅ ⇅
154 INCB Increment Accumulator B INH 5C 3 1 2 B=(B)+1 W ⇅ ⇅ ⇅
155 INS Increment Stack Pointer INH 31 1 3 SP=(SP)+1 W
156 INX Increment Index Register X INH 8 1 3 IX=(IX)+1 W ⇅
157 INY Increment Index Register Y INH 8 2 4 IY=(IY)+1 W ⇅
158 JMP Jump EXT 7E hh ll 3 3 jump
159 JMP Jump IND, X 6E ff 2 3 jump
160 JMP Jump IND, Y 18 6E ff 3 4 jump
161 JSR Jump to Subroutine DIR 9D dd 2 5 jump to sub.
162 JSR Jump to Subroutine EXT BD hh ll 3 6 jump to sub.
163 JSR Jump to Subroutine IND, X AD ff 2 6 jump to sub.
164 JSR Jump to Subroutine IND, Y 18 AD ff 3 7 jump to sub.
165 LDAA Load Accumulator A IMM 86 ii 2 2 A=(M) A M ⇅ ⇅ 0
166 LDAA Load Accumulator A DIR 96 dd 2 3 A=(M) A M ⇅ ⇅ 0
167 LDAA Load Accumulator A EXT B6 hh ll 3 4 A=(M) A M ⇅ ⇅ 0
168 LDAA Load Accumulator A IND, X A6 ff 2 4 A=(M) A M ⇅ ⇅ 0
169 LDAA Load Accumulator A IND, Y 18 A6 ff 3 5 A=(M) A M ⇅ ⇅ 0
170 LDAB Load Accumulator B IMM C6 ii 2 2 B=(M) B M ⇅ ⇅ 0
171 LDAB Load Accumulator B DIR D6 dd 2 3 B=(M) B M ⇅ ⇅ 0
172 LDAB Load Accumulator B EXT F6 hh ll 3 4 B=(M) B M ⇅ ⇅ 0
173 LDAB Load Accumulator B IND, X E6 ff 2 4 B=(M) B M ⇅ ⇅ 0
174 LDAB Load Accumulator B IND, Y 18 E6 ff 3 5 B=(M) B M ⇅ ⇅ 0
175 LDD Load Double Accumulator D IMM CC jj kk 3 3 D=(M:M+1) W M ⇅ ⇅ 0
176 LDD Load Double Accumulator D DIR DC dd 2 4 D=(M:M+1) W M ⇅ ⇅ 0
177 LDD Load Double Accumulator D EXT FC hh ll 3 5 D=(M:M+1) W M ⇅ ⇅ 0
178 LDD Load Double Accumulator D IND, X EC ff 2 5 D=(M:M+1) W M ⇅ ⇅ 0
179 LDD Load Double Accumulator D IND, Y 18 EC ff 3 6 D=(M:M+1) W M ⇅ ⇅ 0
180 LDS Load Stack Pointer IMM 8E jj kk 3 3 SP=(M:M+1) M W ⇅ ⇅ 0
181 LDS Load Stack Pointer DIR 9E dd 2 4 SP=(M:M+1) M W ⇅ ⇅ 0
182 LDS Load Stack Pointer EXT BE hh ll 3 5 SP=(M:M+1) M W ⇅ ⇅ 0
183 LDS Load Stack Pointer IND, X AE ff 2 5 SP=(M:M+1) M W ⇅ ⇅ 0
184 LDS Load Stack Pointer IND, Y 18 AE ff 3 6 SP=(M:M+1) M W ⇅ ⇅ 0
185 LDX Load Index Register X IMM CE jj kk 3 3 IX=(M:M+1)) W M ⇅ ⇅ 0
186 LDX Load Index Register X DIR DE dd 2 4 IX=(M:M+1)) W M ⇅ ⇅ 0
187 LDX Load Index Register X EXT FE hh ll 3 5 IX=(M:M+1)) W M ⇅ ⇅ 0
188 LDX Load Index Register X IND, X EE ff 2 5 IX=(M:M+1)) W M ⇅ ⇅ 0
189 LDX Load Index Register X IND, Y CD EE ff 3 6 IX=(M:M+1)) W M ⇅ ⇅ 0
190 LDY Load Index Register Y IMM 18 CE jj kk 4 4 IY=(M:M+1)) W M ⇅ ⇅ 0
191 LDY Load Index Register Y DIR 18 DE dd 3 5 IY=(M:M+1)) W M ⇅ ⇅ 0
192 LDY Load Index Register Y EXT 18 FE hh ll 4 6 IY=(M:M+1)) W M ⇅ ⇅ 0
193 LDY Load Index Register Y IND, X 1A EE ff 3 6 IY=(M:M+1)) W M ⇅ ⇅ 0
194 LDY Load Index Register Y IND, Y 18 EE ff 3 6 IY=(M:M+1)) W M ⇅ ⇅ 0
195 LSL Logical Shift Left EXT 78 hh ll 3 6 W ⇅ ⇅ ⇅ ⇅
196 LSL Logical Shift Left IND, X 68 ff 2 6 W ⇅ ⇅ ⇅ ⇅
197 LSL Logical Shift Left IND, Y 18 68 ff 3 7 W ⇅ ⇅ ⇅ ⇅
198 LSLA Logical Shift Left A INH 48 1 2 W ⇅ ⇅ ⇅ ⇅
199 LSLB Logical Shift Left B INH 58 1 2 W ⇅ ⇅ ⇅ ⇅
200 LSLD Logical Shift Left D INH 5 1 3 W ⇅ ⇅ ⇅ ⇅
201 LSR Logical Shift Right EXT 74 hh ll 3 6 W 0 ⇅ ⇅ ⇅
202 LSR Logical Shift Right IND, X 64 ff 2 6 W 0 ⇅ ⇅ ⇅
203 LSR Logical Shift Right IND, Y 18 64 ff 3 7 W 0 ⇅ ⇅ ⇅
204 LSRA Logical Shift Right A INH 44 1 2 W 0 ⇅ ⇅ ⇅
205 LSRB Logical Shift Right B INH 54 1 2 W 0 ⇅ ⇅ ⇅
206 LSRD Logical Shift Right D INH 4 1 3 W 0 ⇅ ⇅ ⇅
207 MUL Multiply 8 by 8 INH 3D 1 10 A B W ⇅
Two's Complement Memory
208 NEG EXT 70 hh ll 3 6 M=$00-(M) W ⇅ ⇅ ⇅ ⇅
Byte
Two's Complement Memory
209 NEG IND, X 60 ff 2 6 M=$00-(M) W ⇅ ⇅ ⇅ ⇅
Byte
Two's Complement Memory
210 NEG IND, Y 18 60 ff 3 7 M=$00-(M) W ⇅ ⇅ ⇅ ⇅
Byte
211 NEGA Two's Complement A INH 40 1 2 A=$00-(A) W ⇅ ⇅ ⇅ ⇅
212 NEGB Two's Complement B INH 50 1 2 b=$00-(B) W ⇅ ⇅ ⇅ ⇅
213 NOP No Operation INH 1 1 2 nooperation
214 ORAA OR Accumulator A (Inclusive) IMM 8A ii 2 2 A=(A)|(M) W M ⇅ ⇅ 0
215 ORAA OR Accumulator A (Inclusive) DIR 9A dd 2 3 A=(A)|(M) W M ⇅ ⇅ 0
216 ORAA OR Accumulator A (Inclusive) EXT BA hh ll 3 4 A=(A)|(M) W M ⇅ ⇅ 0
217 ORAA OR Accumulator A (Inclusive) IND, X AA ff 2 4 A=(A)|(M) W M ⇅ ⇅ 0
218 ORAA OR Accumulator A (Inclusive) IND, Y 18 AA ff 3 5 A=(A)|(M) W M ⇅ ⇅ 0
219 ORAB OR Accumulator B (Inclusive) IMM CA ii 2 2 B=(B)|(M) W M ⇅ ⇅ 0
220 ORAB OR Accumulator B (Inclusive) DIR DA dd 2 3 B=(B)|(M) W M ⇅ ⇅ 0
221 ORAB OR Accumulator B (Inclusive) EXT FA hh ll 3 4 B=(B)|(M) W M ⇅ ⇅ 0
222 ORAB OR Accumulator B (Inclusive) IND, X EA ff 2 4 B=(B)|(M) W M ⇅ ⇅ 0
223 ORAB OR Accumulator B (Inclusive) IND, Y 18 EA ff 3 5 B=(B)|(M) W M ⇅ ⇅ 0
224 PSHA Push A onto Stack INH 36 1 3 push A; decr SP A W
225 PSHB Push B onto Stack INH 37 1 3 push B; decr SP B W
226 PSHX Push X onto Stack INH 3C 1 4 push IX; decr SP X W
227 PSHY Push Y onto Stack INH 18 3C 2 5 push IY; decr SP Y W
228 PULA Pull A from Stack INH 32 1 4 incr SP; pull A W W
229 PULB Pull B from Stack INH 33 1 4 incr SP; pull B W W
230 PULX Pull X from Stack INH 38 1 5 incr SP; pull IX W W
231 PULY Pull Y from Stack INH 18 38 2 6 incr SP; pull IY W W
232 ROL Rotate Left EXT 79 hh ll 3 6 W ⇅ ⇅ ⇅ ⇅
233 ROL Rotate Left IND, X 69 ff 2 6 W ⇅ ⇅ ⇅ ⇅
234 ROL Rotate Left IND, Y 18 69 ff 3 7 W ⇅ ⇅ ⇅ ⇅
235 ROLA Rotate Left A INH 49 1 2 W ⇅ ⇅ ⇅ ⇅
236 ROLB Rotate Left B INH 59 1 2 W ⇅ ⇅ ⇅ ⇅
237 ROR Rotate Right EXT 76 hh ll 3 6 W ⇅ ⇅ ⇅ ⇅
238 ROR Rotate Right IND, X 66 ff 2 6 W ⇅ ⇅ ⇅ ⇅
239 ROR Rotate Right IND, Y 18 66 ff 3 7 W ⇅ ⇅ ⇅ ⇅
240 RORA Rotate Right A INH 46 1 2 W ⇅ ⇅ ⇅ ⇅
241 RORB Rotate Right B INH 56 1 2 W ⇅ ⇅ ⇅ ⇅
242 RTI Return from Interrupt INH 3B 1 12 rtn from int. ⇅ ↓ ⇅ ⇅ ⇅ ⇅ ⇅ ⇅
243 RTS Return from Subroutine INH 39 1 5 rtn from sub
244 SBA Subtract B from A INH 10 1 2 A=(A)-(B) W B ⇅ ⇅ ⇅ ⇅
245 SBCA Subtract with Carry from A IMM 82 ii 2 2 A=(A)-(M)-(C) W M ⇅ ⇅ ⇅ ⇅
246 SBCA Subtract with Carry from A DIR 92 dd 2 3 A=(A)-(M)-(C) W M ⇅ ⇅ ⇅ ⇅
247 SBCA Subtract with Carry from A EXT B2 hh ll 3 4 A=(A)-(M)-(C) W M ⇅ ⇅ ⇅ ⇅
248 SBCA Subtract with Carry from A IND, X A2 ff 2 4 A=(A)-(M)-(C) W M ⇅ ⇅ ⇅ ⇅
249 SBCA Subtract with Carry from A IND, Y 18 A2 ff 3 5 A=(A)-(M)-(C) W M ⇅ ⇅ ⇅ ⇅
250 SBCB Subtract with Carry from B IMM C2 ii 2 2 B=(B)-(M)-(C) W M ⇅ ⇅ ⇅ ⇅
251 SBCB Subtract with Carry from B DIR D2 dd 2 3 B=(B)-(M)-(C) W M ⇅ ⇅ ⇅ ⇅
252 SBCB Subtract with Carry from B EXT F2 hh ll 3 4 B=(B)-(M)-(C) W M ⇅ ⇅ ⇅ ⇅
253 SBCB Subtract with Carry from B IND, X E2 ff 2 4 B=(B)-(M)-(C) W M ⇅ ⇅ ⇅ ⇅
254 SBCB Subtract with Carry from B IND, Y 18 E2 ff 3 5 B=(B)-(M)-(C) W M ⇅ ⇅ ⇅ ⇅
255 SEC Set Carry INH 0D 1 2 C=1 1
256 SEI Set Interrupt Mask INH 0F 1 2 I=1 1
257 SEV Set Overflow Flag INH 0B 1 2 V=1 1
258 STAA Store Accumulator A DIR 97 dd 2 3 M=(A) A W ⇅ ⇅ 0
259 STAA Store Accumulator A EXT B7 hh ll 3 4 M=(A) A W ⇅ ⇅ 0
260 STAA Store Accumulator A IND, X A7 ff 2 4 M=(A) A W ⇅ ⇅ 0
261 STAA Store Accumulator A IND, Y 18 A7 ff 3 5 M=(A) A W ⇅ ⇅ 0
262 STAB Store Accumulator B DIR D7 dd 2 3 M=(B) B W ⇅ ⇅ 0
263 STAB Store Accumulator B EXT F7 hh ll 3 4 M=(B) B W ⇅ ⇅ 0
264 STAB Store Accumulator B IND, X E7 ff 2 4 M=(B) B W ⇅ ⇅ 0
265 STAB Store Accumulator B IND, Y 18 E7 ff 3 5 M=(B) B W ⇅ ⇅ 0
266 STD Store Accumulator D DIR DD dd 2 4 (M:M+1)=D D W ⇅ ⇅ 0
267 STD Store Accumulator D EXT FD hh ll 3 5 (M:M+1)=D D W ⇅ ⇅ 0
268 STD Store Accumulator D IND, X ED ff 2 5 (M:M+1)=D D W ⇅ ⇅ 0
269 STD Store Accumulator D IND, Y 18 ED ff 3 6 (M:M+1)=D D W ⇅ ⇅ 0
270 STOP Stop Internal Clocks INH CF 1 2
271 STS Store Stack Pointer DIR 9F dd 2 4 (M:M+1)=S W SP ⇅ ⇅ 0
272 STS Store Stack Pointer EXT BF hh ll 3 5 (M:M+1)=S W SP ⇅ ⇅ 0
273 STS Store Stack Pointer IND, X AF ff 2 5 (M:M+1)=S W SP ⇅ ⇅ 0
274 STS Store Stack Pointer IND, Y 18 AF ff 3 6 (M:M+1)=S W SP ⇅ ⇅ 0
275 STX Store Index Register X DIR DF dd 2 4 (M:M+1)=IX X W ⇅ ⇅ 0
276 STX Store Index Register X EXT FF hh ll 3 5 (M:M+1)=IX X W ⇅ ⇅ 0
277 STX Store Index Register X IND, X EF ff 2 5 (M:M+1)=IX X W ⇅ ⇅ 0
278 STX Store Index Register X IND, Y 18 EF ff 3 6 (M:M+1)=IX X W ⇅ ⇅ 0
279 STY Store Index Register Y DIR 18 DF dd 3 5 (M:M+1)=IY Y W ⇅ ⇅ 0
280 STY Store Index Register Y EXT 18 FF hh ll 4 6 (M:M+1)=IY Y W ⇅ ⇅ 0
281 STY Store Index Register Y IND, X 1A EF ff 3 6 (M:M+1)=IY Y W ⇅ ⇅ 0
282 STY Store Index Register Y IND, Y 18 EF ff 3 6 (M:M+1)=IY Y W ⇅ ⇅ 0
283 SUBA Subtract Memory from A IMM 80 ii 2 2 A=(A)-(M) W M ⇅ ⇅ ⇅ ⇅
284 SUBA Subtract Memory from A DIR 90 dd 2 3 A=(A)-(M) W M ⇅ ⇅ ⇅ ⇅
285 SUBA Subtract Memory from A EXT B0 hh ll 3 4 A=(A)-(M) W M ⇅ ⇅ ⇅ ⇅
286 SUBA Subtract Memory from A IND, X A0 ff 2 4 A=(A)-(M) W M ⇅ ⇅ ⇅ ⇅
287 SUBA Subtract Memory from A IND, Y 18 A0 ff 3 5 A=(A)-(M) W M ⇅ ⇅ ⇅ ⇅
288 SUBB Subtract Memory from B IMM C0 ii 2 2 B=(B)-(M) W M ⇅ ⇅ ⇅ ⇅
289 SUBB Subtract Memory from B DIR D0 dd 2 3 B=(B)-(M) W M ⇅ ⇅ ⇅ ⇅
290 SUBB Subtract Memory from B EXT F0 hh ll 3 4 B=(B)-(M) W M ⇅ ⇅ ⇅ ⇅
291 SUBB Subtract Memory from B IND, X E0 ff 2 4 B=(B)-(M) W M ⇅ ⇅ ⇅ ⇅
292 SUBB Subtract Memory from B IND, Y 18 E0 ff 3 5 B=(B)-(M) W M ⇅ ⇅ ⇅ ⇅
293 SUBD Subtract Memory from D IMM 83 ii 3 4 D=(D)-(M:M+1) W M ⇅ ⇅ ⇅ ⇅
294 SUBD Subtract Memory from D DIR 93 dd 2 5 D=(D)-(M:M+1) W M ⇅ ⇅ ⇅ ⇅
295 SUBD Subtract Memory from D EXT B3 hh ll 3 6 D=(D)-(M:M+1) W M ⇅ ⇅ ⇅ ⇅
296 SUBD Subtract Memory from D IND, X A3 ff 2 6 D=(D)-(M:M+1) W M ⇅ ⇅ ⇅ ⇅
297 SUBD Subtract Memory from D IND, Y 18 A3 ff 3 7 D=(D)-(M:M+1) W M ⇅ ⇅ ⇅ ⇅
298 SWI Software Interrupt INH 3F 1 14 software int. ↑
299 TAB Transfer A to B INH 16 1 2 B=(A) A W ⇅ ⇅ 0
300 TAP Transfer A to CC Register INH 6 1 2 CCR=(A) W A ⇅ ↓ ⇅ ⇅ ⇅ ⇅ ⇅ ⇅
301 TBA Transfer B to A INH 17 1 2 A=(B) W B ⇅ ⇅ 0
302 TEST TEST (Only in Test Modes) INH 0 1 ∞
303 TPA Transfer CC Register to A INH 7 1 2 A=(CCR) CCR W
304 TST Test for Zero or Minus EXT 7D hh ll 3 6 (M)-$00 M ⇅ ⇅ 0 0
305 TST Test for Zero or Minus IND, X 6D ff 2 6 (M)-$00 M ⇅ ⇅ 0 0
306 TST Test for Zero or Minus IND, Y 18 6D ff 3 7 (M)-$00 M ⇅ ⇅ 0 0
307 TSTA Test A for Zero or Minus INH 4D 1 2 (A)-$00 A ⇅ ⇅ 0 0
308 TSTB Test B for Zero or Minus INH 5D 1 2 (B)-$00 B ⇅ ⇅ 0 0
309 TSX Transfer Stack Pointer to X INH 30 1 3 IX=(SP)+1 X SP
310 TSY Transfer Stack Pointer to Y INH 18 30 2 4 IY=(SP)+1 Y SP
311 TXS Transfer X to Stack Pointer INH 35 1 3 SP=(IX)-1 X W
312 TYS Transfer Y to Stack Pointer INH 18 35 2 4 SP=(IY)-1 Y W
313 WAI Wait for Interrupt INH 3E 1 14+? wait
314 XGDX Exchange D with X INH 8F 1 3 exch. D & IX W W
315 XGDY Exchange D with Y INH 18 8F 2 4 exch. D & IY W W