LAB REPORT 03

OBJECTIVE :
 To display the Boolean expression in its simplified form using Karnaugh map.
 To display the results of simplified Boolean expression using hardware and software platforms.
 To show simplified Boolean expression using universal gates.

REQUIRED EQUIPMENT :
Hardware:

 Trainer set
 AND Gate (74HC08)
 OR Gate (74HC32)
 NOT Gate (74HC04)
 NAND Gate (74HC00)
 NOR Gate (74HC02)
 XOR Gate (74HC86)
 Jumper wires
 Power supply

Software:

 Proteus

METHDOLOGY :
Lab Task 1: INPUT OUTPUT
 Identify the minterms in the given truth table. A B C D Y
 Write a Boolean Expression of the minterms in SOP form. 0 0 0 0 0
 Construct the circuit according to the Boolean expression 0 0 0 1 0
𝑌 = 𝐴′𝐵′𝐶′𝐷 + 𝐴′𝐵𝐶′𝐷 + 𝐴𝐵𝐶𝐷′ + 𝐴𝐵′𝐶′𝐷 + 𝐴′𝐵′𝐶 0 0 1 0 1
′
𝐷 + 𝐴′𝐵′𝐶𝐷 + 𝐴′𝐵𝐶𝐷 0 0 1 1 0
and verify the truth table. 0 1 0 0 0
 Now simplify the Boolean Expression using K – 0 1 0 1 0
Map 0 1 1 0 1
𝑌 = 𝐴𝐵′ + 𝐶′𝐷 0 1 1 1 0
 Now re-construct the circuit diagram as shown and 1 0 0 0 1
verify the truth table. 1 0 0 1 1
1 0 1 0 1
1 0 1 1 1
1 1 0 0 0
1 1 0 1 0
1 1 1 0 1
1 1 1 1 0

Lab Task 2:

 Identify the minterms in the given truth table.

  Write a Boolean Expression of the minterms in SOP form. INPUT OUTPUT
 Construct the circuit according to the Boolean expression A B C D Y
𝑌 = 𝐴′𝐵′𝐶′𝐷’ + 𝐴′𝐵’𝐶’𝐷 + 𝐴’𝐵𝐶’𝐷′ + 𝐴𝐵𝐶′𝐷 + 0 0 0 0 1
𝐴𝐵𝐶𝐷 0 0 0 1 1
and verify the truth table. 0 0 1 0 0
 Now simplify the Boolean Expression using K – 0 0 1 1 0
Map 0 1 0 0 1
𝑌 = A’C’ + ABD 0 1 0 1 1
 Now re-construct the circuit diagram as shown and 0 1 1 0 0
verify the truth table. 0 1 1 1 0
1 0 0 0 0
1 0 0 1 0
1 0 1 0 0
1 0 1 1 0
1 1 0 0 0
1 1 0 1 1
1 1 1 0 0
1 1 1 1 1

POST LAB TASK :

 Task 1; Using NAND Gate :

 Task 2; Using NOR Gate :

CONCULUSION :
Analysis of this experiment shows how to display the Boolean expression in its simplified form
using Karnaugh map. How to display the results of simplified Boolean expression using hardware and software platforms.
How to show simplified Boolean expression using universal gates.
 LAB REPORT 04
OBJECTIVE :
 To identify basic functionality of a Binary Adder using logic gates
 To identify basic functionality of a Binary Subtractor using logic gates
 To design a binary adder using universal gates (NAND, NOR)
 To design a binary subtractor using universal gates (NAND, NOR)

REQUIRED EQUIPMENT :
Hardware:

 Trainer set
 AND Gate (74HC08)
 OR Gate (74HC32)
 NOT Gate (74HC04)
 NAND Gate (74HC00)
 NOR Gate (74HC02)
 XOR Gate (74HC86)
 Jumper wires
 Power supply

Software:

 Proteus

METHDOLOGY :
Lab Task 1:
 Construct half adder circuit on hardware using basic gates as shown;

 Here the output from XOR gate gives Sum (S) and output of AND gate OUTPUTS
will give carry (C). INPUTS Observed Values
 Also implement this on software and verify the results.
A B S C
Lab Task 2: 0 0 0 0
 Construct half adder circuit using NAND gate on hardware as shown;
0 1 1 0
1 0 1 0
1 1 0 1

 Here the output from NAND gate 1 gives Sum (S) and output of NAND
gate 2 will give carry (C).
 Also implement this on software and verify the results.
Lab Task 3:
 Construct full adder circuit using basic gates on hardware as shown;

 Here the output from XOR gate gives Sum (S) and output of OR gate INPUTS OUTPUTS
will give carry (C). A B Cin S C
 Also implement this on software and verify the results. 0 0 0 0 0
0 0 1 1 0
Lab Task 4: 0 1 0 1 0
 Construct full adder circuit using NAND gate on hardware as shown; 0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

 Here the output from NAND gate 1 gives Sum (S) and output of NAND
gate 2 will give carry (C).
 Also implement this on software and verify the results.

Lab Task 5:
 Construct half subtractor circuit using basic gates on hardware as shown;

 Here the output from XOR gate gives Difference (D) and output of OR
OUTPUTS
gate 2 will give Borrow (B).
 Also implement this on software and verify
INPUTSthe results.
Observed Values
A B D Br
Lab Task 6:
 0
Construct half subtractor circuit using NAND0gate on0hardware0as
shown; 0 1 1 1
1 0 1 0
1 1 0 0

 Here the output from NAND gate 1 gives Difference (D) and output of
NAND gate 2 will give Borrow (B).
 Also implement this on software and verify the results.

Lab Task 7:
 Construct full subtractor circuit using basic gates on hardware as shown;
  Here the output from XOR gate gives Difference (D) and output of OR
gate 2 will give Borrow (B).
 Also implement this on software and verify the results.
INPUTS OUTPUTS
Lab Task 8: A B BORin D BORout
 Construct full subtractor circuit using NAND gate on hardware as 0 0 0 0 0
shown; 0 0 1 1 1
0 1 0 1 1
0 1 1 0 1
1 0 0 1 0
1 0 1 0 0
1 1 0 0 0
1 1 1 1 1

 Here the output from NAND gate 1 gives Difference (D) and output of
NAND gate 2 will give Borrow (B).
 Also implement this on software and verify the results.

POST LAB TASK :

 Half Adder Using Nor Gate :

 Full Adder Using Nor Gate :

  Half Subtractor Using NOR Gate :

 Full Subtractor Using NOR Gate :

CONCULUSION :
Analysis of this experiment shows how to To identify basic functionality of a Binary Adder using
logic gates . To identify basic functionality of a Binary Subtractor using logic gates . To design a binary adder using
universal gates (NAND, NOR) . To design a binary subtractor using universal gates (NAND, NOR).