General Description: High-Speed CAN Transceiver With Standby Mode
General Description: High-Speed CAN Transceiver With Standby Mode
1. General description
The TJA1044 is part of the Mantis family of high-speed CAN transceivers. It provides an
interface between a Controller Area Network (CAN) protocol controller and the physical
two-wire CAN bus. The transceiver is designed for high-speed CAN applications in the
automotive industry, providing the differential transmit and receive capability to (a
microcontroller with) a CAN protocol controller.
The TJA1044 offers a feature set optimized for 12 V automotive applications, with
significant improvements over NXP's first- and second-generation CAN transceivers, such
as the TJA1040 and TJA1042, and excellent ElectroMagnetic Compatibility (EMC)
performance. Additionally, the TJA1044 features:
• Ideal passive behavior to the CAN bus when the supply voltage is off
• A very low-current Standby mode with bus wake-up capability
• Excellent EMC performance at speeds up to 500 kbit/s, even without a common mode
choke
• TJA1044GT/3 and TJA1044GTK/3 can be interfaced directly to microcontrollers with
supply voltages from 3 V to 5 V
These features make the TJA1044 an excellent choice for all types of HS-CAN networks,
in nodes that require a low-power mode with wake-up capability via the CAN bus.
The TJA1044 implements the CAN physical layer as defined in ISO 11898-2:2016 and
SAE J2284-1 to SAE J2284-5. The TJA1044T is specified for data rates up to 1 Mbit/s.
Additional timing parameters defining loop delay symmetry are specified for the other
variants. This implementation enables reliable communication in the CAN FD fast phase
at data rates up to 5 Mbit/s.
2.1 General
Fully ISO 11898-2:2016 and SAE J2284-1 to SAE J2284-5 compliant
Very low-current Standby mode with host and bus wake-up capability
Optimized for use in 12 V automotive systems
EMC performance satisfies 'Hardware Requirements for LIN, CAN and FlexRay
Interfaces in Automotive Applications’, Version 1.3, May 2012.
AEC-Q100 qualified
Dark green product (halogen free and Restriction of Hazardous Substances (RoHS)
compliant)
NXP Semiconductors TJA1044
High-speed CAN transceiver with Standby mode
2.3 Protection
High ESD handling capability on the bus pins (8 kV IEC and HBM)
Bus pins protected against transients in automotive environments
Undervoltage detection on pins VCC and VIO
Thermally protected
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4. Ordering information
Table 2. Ordering information
Type number[1] Package
Name Description Version
TJA1044T SO8 plastic small outline package; 8 leads; body width 3.9 mm SOT96-1
TJA1044GT
TJA1044GT/3
TJA1044GTK HVSON8 plastic thermal enhanced very thin small outline package; no leads; SOT782-1
TJA1044GTK/3 8 terminals; body 3 3 0.85 mm
[1] TJA1044GT/3 and TJA1044GTK/3 with VIO pin; all variants other than TJA1044T support CAN FD.
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5. Block diagram
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6. Pinning information
6.1 Pinning
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[1] HVSON8 package die supply ground is connected to both the GND pin and the exposed center pad. The
GND pin must be soldered to board ground. For enhanced thermal and electrical performance, it is
recommended that the exposed center pad also be soldered to board ground.
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7. Functional description
In Standby mode, the bus lines are biased to ground to minimize system supply current.
The low-power receiver is supplied from VIO (VCC in non-VIO variants) and can detect CAN
bus activity even if VIO is the only available supply voltage. Pin RXD follows the bus after
a wake-up request has been detected. A transition to Normal mode is triggered when STB
is forced LOW.
Dominant or recessive bits between the above mentioned phases that are shorter than
twake(busdom) and twake(busrec) respectively are ignored.
After a wake-up sequence has been detected, the TJA1044 will remain in Standby mode
with the bus signals reflected on RXD. Note that dominant or recessive phases lasting
less than tfltr(wake)bus will not be detected by the low-power differential receiver and will not
be reflected on RXD in Standby mode.
A wake-up event is not flagged on RXD if any of the following events occurs while a valid
wake-up pattern is being received:
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In versions with a VIO pin, if VIO drops below the switch-off undervoltage detection level
(Vuvd(swoff)(VIO)), the transceiver switches off and disengages from the bus (zero load) until
VIO has recovered.
In versions without a VIO pin, if VCC drops below the switch-off undervoltage detection
level (Vuvd(swoff)(VCC)), the transceiver switches off and disengages from the bus (zero
load) until VCC has recovered.
For variants of the TJA1044 without a VIO pin, all circuitry is connected to VCC (pin 5 is not
bonded). The signal levels of pins TXD, RXD and STB are then compatible with 5 V
microcontrollers. This allows the device to interface with both 3.3 V and 5 V-supplied
microcontrollers, provided the microcontroller I/Os are 5 V tolerant.
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8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). All voltages are referenced to GND.
Symbol Parameter Conditions Min Max Unit
Vx voltage on pin x[1] on pins CANH, CANL 42 +42 V
on pin VCC, VIO 0.3 +7 V
on any other pin [2] 0.3 VIO + 0.3[3] V
V(CANH-CANL) voltage between pin CANH and 27 +27 V
pin CANL
Vtrt transient voltage on pins CANH and CANL [4]
pulse 1 100 - V
pulse 2a - 75 V
pulse 3a 150 - V
pulse 3b - 100 V
VESD electrostatic discharge voltage IEC 61000-4-2 (150 pF, 330 ) [5]
charge; 4 pF
on corner pins 750 +750 V
on any other pin 500 +500 V
Tvj virtual junction temperature [9] 40 +150 C
Tstg storage temperature 55 +150 C
[1] The device can sustain voltages up to the specified values over the product lifetime, provided applied voltages (including transients)
never exceed these values.
[2] Maximum voltage should never exceed 7 V.
[3] VCC + 0.3 in the non-VIO product variants TJA1044T/TJA1044GT/TJA1044GTK.
[4] According to IEC TS 62228 (2007), Section 4.2.4; parameters for standard pulses defined in ISO7637 part 2: 2004-06.
[5] According to IEC TS 62228 (2007), Section 4.3; DIN EN 61000-4-2.
[6] According to AEC-Q100-002.
[7] According to AEC-Q100-003.
[8] According to AEC-Q100-011 Rev-C1. The classification level is C4B.
[9] In accordance with IEC 60747-1. An alternative definition of virtual junction temperature is: Tvj = Tamb + P Rth(vj-a), where Rth(vj-a) is a
fixed value to be used for the calculation of Tvj. The rating for Tvj limits the allowable combinations of power dissipation (P) and ambient
temperature (Tamb).
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9. Thermal characteristics
Table 6. Thermal characteristics
According to IEC 60747-1.
Symbol Parameter Conditions Value Unit
Rth(vj-a) thermal resistance from virtual junction SO8 package; in free air 97 K/W
to ambient HVSON8 package; in free air
dual-layer board [1] 91 K/W
four-layer board [2] 52 K/W
[1] According to JEDEC JESD51-2, JESD51-3 and JESD51-5 at natural convection on 1s board with thermal via array under the exposed
pad connected to the second copper layer.
[2] According to JEDEC JESD51-2, JESD51-5 and JESD51-7 at natural convection on 2s2p board. Board with two inner copper layers
(thickness: 35 m) and thermal via array under the exposed pad connected to the first inner copper layer.
CSPLIT = 4.7 nF
VO(dif) differential output voltage dominant; Normal mode;
VTXD = 0 V; t < tto(dom)TXD;
RL = 50 to 65 1.5 - 3 V
RL = 45 to 70 1.4 - 3.3 V
RL = 2240 1.5 - 5 V
recessive
Normal mode: VTXD = VIO[3]; 50 - +50 mV
no load
Standby mode; no load 0.2 - +0.2 V
VO(rec) recessive output voltage Normal mode; VTXD = VIO[3]; no load 2 0.5VCC 3 V
Standby mode; no load 0.1 - +0.1 V
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[1] Only TJA1044x/3 variants have a VIO pin; all circuitry is connected to VCC in the other variants.
[2] Factory testing uses correlated test conditions to cover the specified temperature and power supply voltage range.
[3] VIO = VCC in non-VIO product variants..
[4] Not tested in production; guaranteed by design.
[5] The test circuit used to measure the bus output voltage symmetry (which includes CSPLIT) is shown in Figure 9.
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[1] Only TJA1044x/3 variants have a VIO pin; all circuitry is connected to VCC in the other variants.
[2] Factory testing uses correlated test conditions to cover the specified temperature and power supply voltage range.
[3] See Figure 5.
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TJA1044 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
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TJA1044 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
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(1) The VIO pin is internally connected to pin VCC in the non-VIO product variants TJA1044(G)T(K).
Fig 8. CAN transceiver timing test circuit
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Fig 9. Test circuit for measuring transceiver transmitter driver symmetry
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TJA1044 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
• Through-hole components
• Leaded or leadless SMDs, which are glued to the surface of the printed circuit board
Not all SMDs can be wave soldered. Packages with solder balls, and some leadless
packages which have solder lands underneath the body, cannot be wave soldered. Also,
leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,
due to an increased probability of bridging.
The reflow soldering process involves applying solder paste to a board, followed by
component placement and exposure to a temperature profile. Leaded packages,
packages with solder balls, and leadless packages are all reflow solderable.
• Board specifications, including the board finish, solder masks and vias
• Package footprints, including solder thieves and orientation
• The moisture sensitivity level of the packages
• Package placement
• Inspection and repair
• Lead-free soldering versus SnPb soldering
• Process issues, such as application of adhesive and flux, clinching of leads, board
transport, the solder wave parameters, and the time during which components are
exposed to the wave
• Solder bath specifications, including temperature and impurities
• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to
higher minimum peak temperatures (see Figure 12) than a SnPb process, thus
reducing the process window
• Solder paste printing issues including smearing, release, and adjusting the process
window for a mix of large and small components on one board
• Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature) and cooling down. It is imperative that the peak
temperature is high enough for the solder to make reliable solder joints (a solder paste
characteristic). In addition, the peak temperature must be low enough that the
packages and/or boards are not damaged. The peak temperature of the package
depends on package thickness and volume and is classified in accordance with
Table 9 and 10
Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 12.
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peak
temperature
time
001aac844
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[1] tfltr(wake)bus - bus wake-up filter time, in devices with basic wake-up functionality
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[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
19.3 Disclaimers NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
Limited warranty and liability — Information in this document is believed to
third party customer(s). Customer is responsible for doing all necessary
be accurate and reliable. However, NXP Semiconductors does not give any
testing for the customer’s applications and products using NXP
representations or warranties, expressed or implied, as to the accuracy or
Semiconductors products in order to avoid a default of the applications and
completeness of such information and shall have no liability for the
the products or of the application or use by customer’s third party
consequences of use of such information. NXP Semiconductors takes no
customer(s). NXP does not accept any liability in this respect.
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors. Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
In no event shall NXP Semiconductors be liable for any indirect, incidental,
damage to the device. Limiting values are stress ratings only and (proper)
punitive, special or consequential damages (including - without limitation - lost
operation of the device at these or any other conditions above those given in
profits, lost savings, business interruption, costs related to the removal or
the Recommended operating conditions section (if present) or the
replacement of any products or rework charges) whether or not such
Characteristics sections of this document is not warranted. Constant or
damages are based on tort (including negligence), warranty, breach of
repeated exposure to limiting values will permanently and irreversibly affect
contract or any other legal theory.
the quality and reliability of the device.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards Terms and conditions of commercial sale — NXP Semiconductors
customer for the products described herein shall be limited in accordance products are sold subject to the general terms and conditions of commercial
with the Terms and conditions of commercial sale of NXP Semiconductors. sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
Right to make changes — NXP Semiconductors reserves the right to make agreement is concluded only the terms and conditions of the respective
changes to information published in this document, including without agreement shall apply. NXP Semiconductors hereby expressly objects to
limitation specifications and product descriptions, at any time and without applying the customer’s general terms and conditions with regard to the
notice. This document supersedes and replaces all information supplied prior purchase of NXP Semiconductors products by customer.
to the publication hereof.
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No offer to sell or license — Nothing in this document may be interpreted or Translations — A non-English (translated) version of a document is for
construed as an offer to sell products that is open for acceptance or the grant, reference only. The English version shall prevail in case of any discrepancy
conveyance or implication of any license under any copyrights, patents or between the translated and English versions.
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
19.4 Trademarks
authorization from competent authorities. Notice: All referenced brands, product names, service names and trademarks
Quick reference data — The Quick reference data is an extract of the are the property of their respective owners.
product data given in the Limiting values and Characteristics sections of this Mantis — is a trademark of NXP B.V.
document, and as such is not complete, exhaustive or legally binding.
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21. Contents
1 General description . . . . . . . . . . . . . . . . . . . . . . 1 19.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 25
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 19.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
2.1 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 19.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 25
2.2 Predictable and fail-safe behavior . . . . . . . . . . 2 19.4 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 26
2.3 Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 20 Contact information . . . . . . . . . . . . . . . . . . . . 26
2.4 TJA1044 CAN FD (applicable to all product 21 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
variants except TJA1044T). . . . . . . . . . . . . . . . 2
3 Quick reference data . . . . . . . . . . . . . . . . . . . . . 3
4 Ordering information . . . . . . . . . . . . . . . . . . . . . 3
5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4
6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 5
6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5
7 Functional description . . . . . . . . . . . . . . . . . . . 6
7.1 Operating modes . . . . . . . . . . . . . . . . . . . . . . . 6
7.1.1 Normal mode . . . . . . . . . . . . . . . . . . . . . . . . . . 6
7.1.2 Standby mode. . . . . . . . . . . . . . . . . . . . . . . . . . 6
7.2 Remote wake-up (via the CAN bus) . . . . . . . . . 6
7.3 Fail-safe features . . . . . . . . . . . . . . . . . . . . . . . 7
7.3.1 TXD dominant time-out function . . . . . . . . . . . . 7
7.3.2 Internal biasing of TXD and STB input pins . . . 8
7.3.3 Undervoltage detection on pins VCC and VIO . . 8
7.3.4 Overtemperature protection . . . . . . . . . . . . . . . 8
7.4 VIO supply pin (TJA1044x/3 variants) . . . . . . . . 8
8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 9
9 Thermal characteristics . . . . . . . . . . . . . . . . . 10
10 Static characteristics. . . . . . . . . . . . . . . . . . . . 10
11 Dynamic characteristics . . . . . . . . . . . . . . . . . 13
12 Application information. . . . . . . . . . . . . . . . . . 15
12.1 Application diagram . . . . . . . . . . . . . . . . . . . . 15
12.2 Application hints . . . . . . . . . . . . . . . . . . . . . . . 15
13 Test information . . . . . . . . . . . . . . . . . . . . . . . . 16
13.1 Quality information . . . . . . . . . . . . . . . . . . . . . 16
14 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 17
15 Handling information. . . . . . . . . . . . . . . . . . . . 19
16 Soldering of SMD packages . . . . . . . . . . . . . . 19
16.1 Introduction to soldering . . . . . . . . . . . . . . . . . 19
16.2 Wave and reflow soldering . . . . . . . . . . . . . . . 19
16.3 Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 19
16.4 Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 20
17 Appendix: ISO 11898-2:2016 parameter
cross-reference list . . . . . . . . . . . . . . . . . . . . . 22
18 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 24
19 Legal information. . . . . . . . . . . . . . . . . . . . . . . 25
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.