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General Description: High-Speed CAN Transceiver With Standby Mode

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General Description: High-Speed CAN Transceiver With Standby Mode

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AT VS
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© © All Rights Reserved
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TJA1044

High-speed CAN transceiver with Standby mode


Rev. 6 — 24 August 2017 Product data sheet

1. General description
The TJA1044 is part of the Mantis family of high-speed CAN transceivers. It provides an
interface between a Controller Area Network (CAN) protocol controller and the physical
two-wire CAN bus. The transceiver is designed for high-speed CAN applications in the
automotive industry, providing the differential transmit and receive capability to (a
microcontroller with) a CAN protocol controller.

The TJA1044 offers a feature set optimized for 12 V automotive applications, with
significant improvements over NXP's first- and second-generation CAN transceivers, such
as the TJA1040 and TJA1042, and excellent ElectroMagnetic Compatibility (EMC)
performance. Additionally, the TJA1044 features:

• Ideal passive behavior to the CAN bus when the supply voltage is off
• A very low-current Standby mode with bus wake-up capability
• Excellent EMC performance at speeds up to 500 kbit/s, even without a common mode
choke
• TJA1044GT/3 and TJA1044GTK/3 can be interfaced directly to microcontrollers with
supply voltages from 3 V to 5 V

These features make the TJA1044 an excellent choice for all types of HS-CAN networks,
in nodes that require a low-power mode with wake-up capability via the CAN bus.

The TJA1044 implements the CAN physical layer as defined in ISO 11898-2:2016 and
SAE J2284-1 to SAE J2284-5. The TJA1044T is specified for data rates up to 1 Mbit/s.
Additional timing parameters defining loop delay symmetry are specified for the other
variants. This implementation enables reliable communication in the CAN FD fast phase
at data rates up to 5 Mbit/s.

2. Features and benefits

2.1 General
 Fully ISO 11898-2:2016 and SAE J2284-1 to SAE J2284-5 compliant
 Very low-current Standby mode with host and bus wake-up capability
 Optimized for use in 12 V automotive systems
 EMC performance satisfies 'Hardware Requirements for LIN, CAN and FlexRay
Interfaces in Automotive Applications’, Version 1.3, May 2012.
 AEC-Q100 qualified
 Dark green product (halogen free and Restriction of Hazardous Substances (RoHS)
compliant)
NXP Semiconductors TJA1044
High-speed CAN transceiver with Standby mode

 VIO input on TJA1044x/3 variants allows for direct interfacing with 3 V to 5 V


microcontrollers. Variants without a VIO pin can interface with 3.3 V and 5 V-supplied
microcontrollers, provided the microcontroller I/Os are 5 V tolerant.
 Both VIO and non-VIO variants are available in SO8 and leadless HVSON8 (3.0
mm  3.0 mm) packages; HVSON8 with improved Automated Optical Inspection (AOI)
capability.

2.2 Predictable and fail-safe behavior


 Functional behavior predictable under all supply conditions
 Transceiver disengages from bus when not powered (zero load)
 Transmit Data (TXD) and bus dominant time-out functions
 Internal biasing of TXD and STB input pins

2.3 Protection
 High ESD handling capability on the bus pins (8 kV IEC and HBM)
 Bus pins protected against transients in automotive environments
 Undervoltage detection on pins VCC and VIO
 Thermally protected

2.4 TJA1044 CAN FD (applicable to all product variants except TJA1044T)


 Timing guaranteed for CAN FD data rates up to 5 Mbit/s
 Improved TXD to RXD propagation delay of 210 ns

TJA1044 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.

Product data sheet Rev. 6 — 24 August 2017 2 of 27


NXP Semiconductors TJA1044
High-speed CAN transceiver with Standby mode

3. Quick reference data


Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
VCC supply voltage 4.75 - 5.25 V
ICC supply current Standby mode; variants without a VIO pin - 10 15 A
Standby mode; variants with a VIO pin - - 5 A
Normal mode; bus recessive 2 5 10 mA
Normal mode; bus dominant 20 45 70 mA
Vuvd(stb)(VCC) standby undervoltage detection 3.5 4 4.3 V
voltage on pin VCC
Vuvd(swoff)(VCC) switch-off undervoltage valid for variants without a VIO pin 1.3 2.4 3.4 V
detection voltage on pin VCC
VIO supply voltage on pin VIO 2.95 - 5.25 V
IIO supply current on pin VIO Standby mode - 10 16.5 A
Normal mode; bus recessive 10 80 200 A
Normal mode; bus dominant - 350 1000 A
Vuvd(swoff)(VIO) switch-off undervoltage 2.4 2.6 2.8 V
detection voltage on pin VIO
VESD electrostatic discharge voltage IEC 61000-4-2 at pins CANH and CANL 8 - +8 kV
VCANH voltage on pin CANH limiting value according to IEC60134 42 - +42 V
VCANL voltage on pin CANL limiting value according to IEC60134 42 - +42 V
Tvj virtual junction temperature 40 - +150 C

4. Ordering information
Table 2. Ordering information
Type number[1] Package
Name Description Version
TJA1044T SO8 plastic small outline package; 8 leads; body width 3.9 mm SOT96-1
TJA1044GT
TJA1044GT/3
TJA1044GTK HVSON8 plastic thermal enhanced very thin small outline package; no leads; SOT782-1
TJA1044GTK/3 8 terminals; body 3  3  0.85 mm

[1] TJA1044GT/3 and TJA1044GTK/3 with VIO pin; all variants other than TJA1044T support CAN FD.

TJA1044 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.

Product data sheet Rev. 6 — 24 August 2017 3 of 27


NXP Semiconductors TJA1044
High-speed CAN transceiver with Standby mode

5. Block diagram

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(1) VIO = VCC in non-VIO product variants.


Fig 1. Block diagram

TJA1044 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.

Product data sheet Rev. 6 — 24 August 2017 4 of 27


NXP Semiconductors TJA1044
High-speed CAN transceiver with Standby mode

6. Pinning information

6.1 Pinning

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Fig 2. Pin configuration diagrams

6.2 Pin description


Table 3. Pin description
Symbol Pin Description
TXD 1 transmit data input
GND[1] 2 ground supply
VCC 3 supply voltage
RXD 4 receive data output; reads out data from the bus lines
n.c. 5 not connected; TJA1044T, TJA1044GT and TJA1044GTK only
VIO 5 supply voltage for I/O level adapter; TJA1044x/3 variants only
CANL 6 LOW-level CAN bus line
CANH 7 HIGH-level CAN bus line
STB 8 Standby mode control input

[1] HVSON8 package die supply ground is connected to both the GND pin and the exposed center pad. The
GND pin must be soldered to board ground. For enhanced thermal and electrical performance, it is
recommended that the exposed center pad also be soldered to board ground.

TJA1044 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.

Product data sheet Rev. 6 — 24 August 2017 5 of 27


NXP Semiconductors TJA1044
High-speed CAN transceiver with Standby mode

7. Functional description

7.1 Operating modes


The TJA1044 supports two operating modes, Normal and Standby. The operating mode is
selected via pin STB. See Table 4 for a description of the operating modes under normal
supply conditions.

Table 4. Operating modes


Mode Inputs Outputs
Pin STB Pin TXD CAN driver Pin RXD
Normal LOW LOW dominant LOW
HIGH recessive LOW when bus dominant
HIGH when bus recessive
Standby HIGH x[1] biased to ground follows BUS when wake-up
detected
HIGH when no wake-up detected

[1] ‘x’ = don’t care.

7.1.1 Normal mode


A LOW level on pin STB selects Normal mode. In this mode, the transceiver can transmit
and receive data via the bus lines CANH and CANL (see Figure 1 for the block diagram).
The differential receiver converts the analog data on the bus lines into digital data which is
output on pin RXD. The slopes of the output signals on the bus lines are controlled
internally and are optimized in a way that guarantees the lowest possible EME.

7.1.2 Standby mode


A HIGH level on pin STB selects Standby mode. In Standby mode, the transceiver is not
able to transmit or correctly receive data via the bus lines. The transmitter and
Normal-mode receiver blocks are switched off to reduce supply current, and only a
low-power differential receiver monitors the bus lines for activity.

In Standby mode, the bus lines are biased to ground to minimize system supply current.
The low-power receiver is supplied from VIO (VCC in non-VIO variants) and can detect CAN
bus activity even if VIO is the only available supply voltage. Pin RXD follows the bus after
a wake-up request has been detected. A transition to Normal mode is triggered when STB
is forced LOW.

7.2 Remote wake-up (via the CAN bus)


The TJA1044 wakes up from Standby mode when a dedicated wake-up pattern (specified
in ISO 11898-2:2016) is detected on the bus. This filtering helps avoid spurious wake-up
events. A spurious wake-up sequence could be triggered by, for example, a dominant
clamped bus or by dominant phases due to noise or spikes on the bus.

The wake-up pattern consists of:

• a dominant phase of at least twake(busdom) followed by


• a recessive phase of at least twake(busrec) followed by
• a dominant phase of at least twake(busdom)
TJA1044 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.

Product data sheet Rev. 6 — 24 August 2017 6 of 27


NXP Semiconductors TJA1044
High-speed CAN transceiver with Standby mode

Dominant or recessive bits between the above mentioned phases that are shorter than
twake(busdom) and twake(busrec) respectively are ignored.

The complete dominant-recessive-dominant pattern must be received within tto(wake)bus to


be recognized as a valid wake-up pattern (see Figure 3). Otherwise, the internal wake-up
logic is reset. The complete wake-up pattern will then need to be retransmitted to trigger a
wake-up event. Pin RXD remains HIGH until the wake-up event has been triggered.

After a wake-up sequence has been detected, the TJA1044 will remain in Standby mode
with the bus signals reflected on RXD. Note that dominant or recessive phases lasting
less than tfltr(wake)bus will not be detected by the low-power differential receiver and will not
be reflected on RXD in Standby mode.

A wake-up event is not flagged on RXD if any of the following events occurs while a valid
wake-up pattern is being received:

• The TJA1044 switches to Normal mode


• The complete wake-up pattern was not received within tto(wake)bus
• A VCC or VIO undervoltage is detected (VCC < Vuvd(swoff)(VCC) or VIO < Vuvd(swoff)(VIO);
see Section 7.3.3)

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Fig 3. Wake-up timing

7.3 Fail-safe features

7.3.1 TXD dominant time-out function


A 'TXD dominant time-out' timer is started when pin TXD is set LOW. If the LOW state on
this pin persists for longer than tto(dom)TXD, the transmitter is disabled, releasing the bus
lines to recessive state. This function prevents a hardware and/or software application
failure from driving the bus lines to a permanent dominant state (blocking all network
communications). The TXD dominant time-out timer is reset when pin TXD is set HIGH.
The TXD dominant time-out time also defines the minimum possible bit rate of
approximately 25 kbit/s.

TJA1044 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.

Product data sheet Rev. 6 — 24 August 2017 7 of 27


NXP Semiconductors TJA1044
High-speed CAN transceiver with Standby mode

7.3.2 Internal biasing of TXD and STB input pins


Pins TXD and STB have internal pull-ups to VCC (VIO for variants with a VIO pin) to ensure
a safe, defined state in case one or both of these pins are left floating. Pull-up currents
flow in these pins in all states; both pins should be held HIGH in Standby mode to
minimize supply current.

7.3.3 Undervoltage detection on pins VCC and VIO


If VCC drops below the standby undervoltage detection level, Vuvd(stb)(VCC), the transceiver
switches to Standby mode. The logic state of pin STB is ignored until VCC has recovered.

In versions with a VIO pin, if VIO drops below the switch-off undervoltage detection level
(Vuvd(swoff)(VIO)), the transceiver switches off and disengages from the bus (zero load) until
VIO has recovered.

In versions without a VIO pin, if VCC drops below the switch-off undervoltage detection
level (Vuvd(swoff)(VCC)), the transceiver switches off and disengages from the bus (zero
load) until VCC has recovered.

7.3.4 Overtemperature protection


The output drivers are protected against overtemperature conditions. If the virtual junction
temperature exceeds the shutdown junction temperature, Tj(sd), both output drivers are
disabled. When the virtual junction temperature drops below Tj(sd) again, the output
drivers recover once TXD has been reset to HIGH. Including the TXD condition prevents
output driver oscillation due to small variations in temperature.

7.4 VIO supply pin (TJA1044x/3 variants)


Pin VIO should be connected to the microcontroller supply voltage (see Figure 7). This will
adjust the signal levels of pins TXD, RXD and STB to the I/O levels of the microcontroller.
Pin VIO also provides the internal supply voltage for the low-power differential receiver in
the transceiver. For applications running in low-power mode, this allows the bus lines to
be monitored for activity even if there is no supply voltage on pin VCC.

For variants of the TJA1044 without a VIO pin, all circuitry is connected to VCC (pin 5 is not
bonded). The signal levels of pins TXD, RXD and STB are then compatible with 5 V
microcontrollers. This allows the device to interface with both 3.3 V and 5 V-supplied
microcontrollers, provided the microcontroller I/Os are 5 V tolerant.

TJA1044 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.

Product data sheet Rev. 6 — 24 August 2017 8 of 27


NXP Semiconductors TJA1044
High-speed CAN transceiver with Standby mode

8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). All voltages are referenced to GND.
Symbol Parameter Conditions Min Max Unit
Vx voltage on pin x[1] on pins CANH, CANL 42 +42 V
on pin VCC, VIO 0.3 +7 V
on any other pin [2] 0.3 VIO + 0.3[3] V
V(CANH-CANL) voltage between pin CANH and 27 +27 V
pin CANL
Vtrt transient voltage on pins CANH and CANL [4]

pulse 1 100 - V
pulse 2a - 75 V
pulse 3a 150 - V
pulse 3b - 100 V
VESD electrostatic discharge voltage IEC 61000-4-2 (150 pF, 330 ) [5]

on pins CANH and CANL 8 +8 kV


Human Body Model (HBM); 100 pF, 1.5 k [6]

on pins CANH and CANL 8 +8 kV


on any other pin 4 +4 kV
Machine Model (MM); 200 pF, 0.75 H, 10  [7]

on any pin 200 +200 V


Charged Device Model (CDM); field Induced [8]

charge; 4 pF
on corner pins 750 +750 V
on any other pin 500 +500 V
Tvj virtual junction temperature [9] 40 +150 C
Tstg storage temperature 55 +150 C

[1] The device can sustain voltages up to the specified values over the product lifetime, provided applied voltages (including transients)
never exceed these values.
[2] Maximum voltage should never exceed 7 V.
[3] VCC + 0.3 in the non-VIO product variants TJA1044T/TJA1044GT/TJA1044GTK.
[4] According to IEC TS 62228 (2007), Section 4.2.4; parameters for standard pulses defined in ISO7637 part 2: 2004-06.
[5] According to IEC TS 62228 (2007), Section 4.3; DIN EN 61000-4-2.
[6] According to AEC-Q100-002.
[7] According to AEC-Q100-003.
[8] According to AEC-Q100-011 Rev-C1. The classification level is C4B.
[9] In accordance with IEC 60747-1. An alternative definition of virtual junction temperature is: Tvj = Tamb + P  Rth(vj-a), where Rth(vj-a) is a
fixed value to be used for the calculation of Tvj. The rating for Tvj limits the allowable combinations of power dissipation (P) and ambient
temperature (Tamb).

TJA1044 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.

Product data sheet Rev. 6 — 24 August 2017 9 of 27


NXP Semiconductors TJA1044
High-speed CAN transceiver with Standby mode

9. Thermal characteristics
Table 6. Thermal characteristics
According to IEC 60747-1.
Symbol Parameter Conditions Value Unit
Rth(vj-a) thermal resistance from virtual junction SO8 package; in free air 97 K/W
to ambient HVSON8 package; in free air
dual-layer board [1] 91 K/W
four-layer board [2] 52 K/W

[1] According to JEDEC JESD51-2, JESD51-3 and JESD51-5 at natural convection on 1s board with thermal via array under the exposed
pad connected to the second copper layer.
[2] According to JEDEC JESD51-2, JESD51-5 and JESD51-7 at natural convection on 2s2p board. Board with two inner copper layers
(thickness: 35 m) and thermal via array under the exposed pad connected to the first inner copper layer.

10. Static characteristics


Table 7. Static characteristics
Tvj = 40 C to +150 C; VCC = 4.75 V to 5.25 V; VIO = 2.95 V to 5.25 V[1]; RL = 60 ; CL = 100 pF unless specified otherwise;
All voltages are defined with respect to ground. Positive currents flow into the IC.[2]
Symbol Parameter Conditions Min Typ Max Unit
Supply; pin VCC
VCC supply voltage 4.75 - 5.25 V
Vuvd(stb)(VCC) standby undervoltage 3.5 4 4.3 V
detection voltage on pin
VCC
Vuvd(swoff)(VCC) switch-off undervoltage for variants without a VIO pin 1.3 2.4 3.4 V
detection voltage on pin
VCC
ICC supply current Standby mode
variants without a VIO pin; - 10 15 A
VTXD = VCC
variants with a VIO pin; - - 5 A
VTXD = VIO
Normal mode
recessive; VTXD = VIO [3] 2 5 10 mA
dominant; VTXD = 0 V 20 45 70 mA
dominant; VTXD = 0 V; 2 80 110 mA
short circuit on bus lines;
3 V VCANH = VCANL)  +18 V
I/O level adapter supply; pin VIO[1]
VIO supply voltage on pin VIO 2.95 - 5.25 V
IIO supply current on pin VIO Standby mode; VTXD = VIO [3] - 10 16.5 A
Normal mode
recessive; VTXD = VIO[3] 10 80 200 A
dominant; VTXD = 0 V - 350 1000 A
Vuvd(swoff)(VIO) switch-off undervoltage for variants with a VIO pin 2.4 2.6 2.8 V
detection voltage on pin VIO
TJA1044 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.

Product data sheet Rev. 6 — 24 August 2017 10 of 27


NXP Semiconductors TJA1044
High-speed CAN transceiver with Standby mode

Table 7. Static characteristics …continued


Tvj = 40 C to +150 C; VCC = 4.75 V to 5.25 V; VIO = 2.95 V to 5.25 V[1]; RL = 60 ; CL = 100 pF unless specified otherwise;
All voltages are defined with respect to ground. Positive currents flow into the IC.[2]
Symbol Parameter Conditions Min Typ Max Unit
Standby mode control input; pin STB
VIH HIGH-level input voltage variants with a VIO pin 0.7VIO - VIO+ 0.3 V
variants without a VIO pin 2 - VCC+ 0.3 V
VIL LOW-level input voltage variants with a VIO pin 0.3VIO - +0.3VIO V
variants without a VIO pin 0.3 - +0.8 V
IIH HIGH-level input current VSTB = VIO[3] 1 - +1 A
IIL LOW-level input current VSTB = 0 V 15 - 1 A
CAN transmit data input; pin TXD
VIH HIGH-level input voltage variants with a VIO pin 0.7VIO - VIO+ 0.3 V
variants without a VIO pin 2 - VCC+ 0.3 V
VIL LOW-level input voltage variants with a VIO pin 0.3VIO - +0.3VIO V
variants without a VIO pin 0.3 - +0.8 V
IIH HIGH-level input current VTXD = VIO [3] 5 - +5 A
IIL LOW-level input current VTXD = 0 V; variants with a VIO pin 260 150 60 A
VTXD = 0 V; 260 150 70 A
variants without a VIO pin
Ci input capacitance [4] - 5 10 pF
CAN receive data output; pin RXD
IOH HIGH-level output current VRXD = VIO[3]  0.4 V 8 3 1 mA
IOL LOW-level output current VRXD = 0.4 V; bus dominant 1 - 12 mA
Bus lines; pins CANH and CANL
VO(dom) dominant output voltage VTXD = 0 V; t < tto(dom)TXD
pin CANH; RL = 50  to 65  2.75 3.5 4.5 V
pin CANL; RL = 50  to 65  0.5 1.5 2.25 V
Vdom(TX)sym transmitter dominant Vdom(TX)sym = VCC  VCANH  VCANL 400 - +400 mV
voltage symmetry
VTXsym transmitter voltage VTXsym = VCANH + VCANL; [4] 0.9VCC - 1.1VCC V
symmetry fTXD = 250 kHz, 1 MHz and 2.5 MHz; [5]

CSPLIT = 4.7 nF
VO(dif) differential output voltage dominant; Normal mode;
VTXD = 0 V; t < tto(dom)TXD;
RL = 50 to 65  1.5 - 3 V
RL = 45 to 70  1.4 - 3.3 V
RL = 2240  1.5 - 5 V
recessive
Normal mode: VTXD = VIO[3]; 50 - +50 mV
no load
Standby mode; no load 0.2 - +0.2 V
VO(rec) recessive output voltage Normal mode; VTXD = VIO[3]; no load 2 0.5VCC 3 V
Standby mode; no load 0.1 - +0.1 V

TJA1044 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.

Product data sheet Rev. 6 — 24 August 2017 11 of 27


NXP Semiconductors TJA1044
High-speed CAN transceiver with Standby mode

Table 7. Static characteristics …continued


Tvj = 40 C to +150 C; VCC = 4.75 V to 5.25 V; VIO = 2.95 V to 5.25 V[1]; RL = 60 ; CL = 100 pF unless specified otherwise;
All voltages are defined with respect to ground. Positive currents flow into the IC.[2]
Symbol Parameter Conditions Min Typ Max Unit
Vth(RX)dif differential receiver 12 V  VCANL  +12 V;
threshold voltage 12 V  VCANH  +12 V
Normal mode 0.5 - 0.9 V
Standby mode 0.4 - 1.15 V
Vrec(RX) receiver recessive voltage 12 V  VCANL  +12 V;
12 V  VCANH  +12 V
Normal mode 4 - 0.5 V
Standby mode 4 - 0.4 V
Vdom(RX) receiver dominant voltage 12 V  VCANL  +12 V;
12 V  VCANH  +12 V
Normal mode 0.9 - 9.0 V
Standby mode 1.15 - 9.0 V
Vhys(RX)dif differential receiver 12 V  VCANL  +12 V; 50 - 300 mV
hysteresis voltage 12 V  VCANH  +12 V; Normal mode
IO(sc)dom dominant short-circuit VTXD = 0 V; t < tto(dom)TXD; VCC = 5 V
output current pin CANH; VCANH = 15 V to +40 V 100 70 40 mA
pin CANL; VCANL = 15 V to +40 V 40 70 100 mA
IO(sc)rec recessive short-circuit Normal mode; VTXD = VIO[3]; 5 - +5 mA
output current VCANH = VCANL = 27 V to +32 V
IL leakage current VCC = VIO = 0 V or 5 - +5 A
VCC = VIO = shorted to GND via
47 k; VCANH = VCANL = 5 V
Ri input resistance 2 V  VCANL  +7 V; [4] 9 15 28 k
2 V  VCANH  +7 V
Ri input resistance deviation 0 V  VCANL  +5 V; [4] 3 - +3 %
0 V  VCANH  +5 V
Ri(dif) differential input resistance 2 V  VCANL  +7 V; [4] 19 30 52 k
2 V  VCANH  +7 V
Ci(cm) common-mode input [4] - - 20 pF
capacitance
Ci(dif) differential input [4] - - 10 pF
capacitance
Temperature detection
Tj(sd) shutdown junction [4] - 185 - C
temperature

[1] Only TJA1044x/3 variants have a VIO pin; all circuitry is connected to VCC in the other variants.
[2] Factory testing uses correlated test conditions to cover the specified temperature and power supply voltage range.
[3] VIO = VCC in non-VIO product variants..
[4] Not tested in production; guaranteed by design.
[5] The test circuit used to measure the bus output voltage symmetry (which includes CSPLIT) is shown in Figure 9.

TJA1044 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.

Product data sheet Rev. 6 — 24 August 2017 12 of 27


NXP Semiconductors TJA1044
High-speed CAN transceiver with Standby mode

11. Dynamic characteristics


Table 8. Dynamic characteristics
Tvj = 40 C to +150 C; VCC = 4.75 V to 5.25 V; VIO = 2.95 V to 5.25 V[1]; RL = 60 ; CL = 100 pF unless specified otherwise.
All voltages are defined with respect to ground.[2]
Symbol Parameter Conditions Min Typ Max Unit
Transceiver timing; pins CANH, CANL, TXD and RXD; see Figure 8 and Figure 4
td(TXD-busdom) delay time from TXD to bus dominant Normal mode - 65 - ns
td(TXD-busrec) delay time from TXD to bus recessive Normal mode - 90 - ns
td(busdom-RXD) delay time from bus dominant to RXD Normal mode - 60 - ns
td(busrec-RXD) delay time from bus recessive to RXD Normal mode - 65 - ns
td(TXDL-RXDL) delay time from TXD LOW to RXD LOW TJA1044T; Normal mode 50 - 230 ns
all other variants; Normal mode 50 - 210 ns
td(TXDH-RXDH) delay time from TXD HIGH to RXD HIGH TJA1044T; Normal mode 50 - 230 ns
all other variants; Normal mode 50 - 210 ns
tbit(bus) transmitted recessive bit width TJA1044Gx
tbit(TXD) = 500 ns [3] 435 - 530 ns
tbit(TXD) = 200 ns [3] 155 - 210 ns
tbit(RXD) bit time on pin RXD TJA1044Gx
tbit(TXD) = 500 ns [3] 400 - 550 ns
tbit(TXD) = 200 ns [3] 120 - 220 ns
trec receiver timing symmetry TJA1044Gx
tbit(TXD) = 500 ns 65 - +40 ns
tbit(TXD) = 200 ns 45 - +15 ns
tto(dom)TXD TXD dominant time-out time VTXD = 0 V; Normal mode 0.8 3 6.5 ms
td(stb-norm) standby to normal mode delay time 7 25 47 s
twake(busdom) bus dominant wake-up time Standby mode; 0.5 - 1.8 s
variants with a VIO pin
Standby mode; 0.5 - 3.0 s
variants without a VIO pin
twake(busrec) bus recessive wake-up time Standby mode; 0.5 - 1.8 s
variants with a VIO pin
Standby mode; 0.5 - 3.0 s
variants without a VIO pin
tto(wake)bus bus wake-up time-out time Standby mode 0.8 3 6.5 ms
tfltr(wake)bus bus wake-up filter time Standby mode
variants without a VIO pin 0.5 1 3 s
variants with a VIO pin 0.5 - 1.8 s

[1] Only TJA1044x/3 variants have a VIO pin; all circuitry is connected to VCC in the other variants.
[2] Factory testing uses correlated test conditions to cover the specified temperature and power supply voltage range.
[3] See Figure 5.

TJA1044 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.

Product data sheet Rev. 6 — 24 August 2017 13 of 27


NXP Semiconductors TJA1044
High-speed CAN transceiver with Standby mode

+,*+

7;'

/2:

&$1+

&$1/

GRPLQDQW

9

92 GLI

9

UHFHVVLYH

+,*+

5;'

/2:

WG 7;'EXVGRP WG 7;'EXVUHF

WG EXVGRP5;' WG EXVUHF5;'

WG 7;'/5;'/ WG 7;'+5;'+
DDD

Fig 4. CAN transceiver timing diagram


7;'
 

[WELW 7;'
WELW 7;'

92 GLI 9

9

WELW EXV


5;'


WELW 5;'
DDD

Fig 5. CAN FD timing definitions according to ISO 11898-2:2016

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Product data sheet Rev. 6 — 24 August 2017 14 of 27


NXP Semiconductors TJA1044
High-speed CAN transceiver with Standby mode

12. Application information

12.1 Application diagram

%$7 9


9&&

&$1+ 9''
&$1+ 3[[
67%
7-$ 3\\ 0,&52
7;' &21752//(5
7;
&$1/ 5;'
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*1'
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(1) Optional, depends on regulator.


Fig 6. Typical TJA1044 application with a 5 V microcontroller (non-VIO variants)

%$7 9


RQRIIFRQWURO

9


9&& 9,2
&$1+ 9''
&$1+ 3[[
67%
3\\
7-$[ 0,&52
7;' &21752//(5
7;
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DDD

(1) Optional, depends on regulator.


Fig 7. Typical application with a 3 V microcontroller for TJA1044x/3 VIO variants

12.2 Application hints


Further information on the application of the TJA1044 can be found in NXP application
hints AH1308 Application Hints - Standalone high-speed CAN transceivers Mantis
TJA1044/TJA1057 and Dual-Mantis TJA1046.

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Product data sheet Rev. 6 — 24 August 2017 15 of 27


NXP Semiconductors TJA1044
High-speed CAN transceiver with Standby mode

13. Test information

9
—) Q)

9,2  9&&

7;' &$1+

5/ &/
7-$ ȍ S)

5;' &$1/

S) *1' 67%

DDD

(1) The VIO pin is internally connected to pin VCC in the non-VIO product variants TJA1044(G)T(K).
Fig 8. CAN transceiver timing test circuit

9
Q)
9&& 9,2 
 
7;' &$1+
 

ȍ
I N+]
0+]RU
0+] 7-$
&63/,7
Q)
ȍ
5;' &$1/
 

*1'
DDD

(1) The VIO pin is internally connected to pin VCC in the non-VIO product variants TJA1044(G)T(K).
Fig 9. Test circuit for measuring transceiver transmitter driver symmetry

13.1 Quality information


This product has been qualified in accordance with the Automotive Electronics Council
(AEC) standard Q100 Rev-G - Failure mechanism based stress test qualification for
integrated circuits, and is suitable for use in automotive applications.

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Product data sheet Rev. 6 — 24 August 2017 16 of 27


NXP Semiconductors TJA1044
High-speed CAN transceiver with Standby mode

14. Package outline

62SODVWLFVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP 627

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9(56,21 ,(& -('(& -(,7$ 352-(&7,21


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Fig 10. Package outline SOT96-1 (SO8)

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Product data sheet Rev. 6 — 24 August 2017 17 of 27


NXP Semiconductors TJA1044
High-speed CAN transceiver with Standby mode

+9621SODVWLFWKHUPDOHQKDQFHGYHU\WKLQVPDOORXWOLQHSDFNDJHQROHDGV
WHUPLQDOVERG\[[PP 627

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Fig 11. Package outline SOT782-1 (HVSON8)

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Product data sheet Rev. 6 — 24 August 2017 18 of 27


NXP Semiconductors TJA1044
High-speed CAN transceiver with Standby mode

15. Handling information


All input and output pins are protected against ElectroStatic Discharge (ESD) under
normal handling. When handling ensure that the appropriate precautions are taken as
described in JESD625-A or equivalent standards.

16. Soldering of SMD packages


This text provides a very brief insight into a complex technology. A more in-depth account
of soldering ICs can be found in Application Note AN10365 “Surface mount reflow
soldering description”.

16.1 Introduction to soldering


Soldering is one of the most common methods through which packages are attached to
Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both
the mechanical and the electrical connection. There is no single soldering method that is
ideal for all IC packages. Wave soldering is often preferred when through-hole and
Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not
suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high
densities that come with increased miniaturization.

16.2 Wave and reflow soldering


Wave soldering is a joining technology in which the joints are made by solder coming from
a standing wave of liquid solder. The wave soldering process is suitable for the following:

• Through-hole components
• Leaded or leadless SMDs, which are glued to the surface of the printed circuit board
Not all SMDs can be wave soldered. Packages with solder balls, and some leadless
packages which have solder lands underneath the body, cannot be wave soldered. Also,
leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,
due to an increased probability of bridging.

The reflow soldering process involves applying solder paste to a board, followed by
component placement and exposure to a temperature profile. Leaded packages,
packages with solder balls, and leadless packages are all reflow solderable.

Key characteristics in both wave and reflow soldering are:

• Board specifications, including the board finish, solder masks and vias
• Package footprints, including solder thieves and orientation
• The moisture sensitivity level of the packages
• Package placement
• Inspection and repair
• Lead-free soldering versus SnPb soldering

16.3 Wave soldering


Key characteristics in wave soldering are:
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Product data sheet Rev. 6 — 24 August 2017 19 of 27


NXP Semiconductors TJA1044
High-speed CAN transceiver with Standby mode

• Process issues, such as application of adhesive and flux, clinching of leads, board
transport, the solder wave parameters, and the time during which components are
exposed to the wave
• Solder bath specifications, including temperature and impurities

16.4 Reflow soldering


Key characteristics in reflow soldering are:

• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to
higher minimum peak temperatures (see Figure 12) than a SnPb process, thus
reducing the process window
• Solder paste printing issues including smearing, release, and adjusting the process
window for a mix of large and small components on one board
• Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature) and cooling down. It is imperative that the peak
temperature is high enough for the solder to make reliable solder joints (a solder paste
characteristic). In addition, the peak temperature must be low enough that the
packages and/or boards are not damaged. The peak temperature of the package
depends on package thickness and volume and is classified in accordance with
Table 9 and 10

Table 9. SnPb eutectic process (from J-STD-020D)


Package thickness (mm) Package reflow temperature (C)
Volume (mm3)
< 350  350
< 2.5 235 220
 2.5 220 220

Table 10. Lead-free process (from J-STD-020D)


Package thickness (mm) Package reflow temperature (C)
Volume (mm3)
< 350 350 to 2000 > 2000
< 1.6 260 260 260
1.6 to 2.5 260 250 245
> 2.5 250 245 245

Moisture sensitivity precautions, as indicated on the packing, must be respected at all


times.

Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 12.

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Product data sheet Rev. 6 — 24 August 2017 20 of 27


NXP Semiconductors TJA1044
High-speed CAN transceiver with Standby mode

maximum peak temperature


temperature = MSL limit, damage level

minimum peak temperature


= minimum soldering temperature

peak
temperature

time
001aac844

MSL: Moisture Sensitivity Level


Fig 12. Temperature profiles for large and small components

For further information on temperature profiles, refer to Application Note AN10365


“Surface mount reflow soldering description”.

TJA1044 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.

Product data sheet Rev. 6 — 24 August 2017 21 of 27


NXP Semiconductors TJA1044
High-speed CAN transceiver with Standby mode

17. Appendix: ISO 11898-2:2016 parameter cross-reference list


Table 11. ISO 11898-2:2016 to NXP data sheet parameter conversion
ISO 11898-2:2016 NXP data sheet
Parameter Notation Symbol Parameter
HS-PMA dominant output characteristics
Single ended voltage on CAN_H VCAN_H VO(dom) dominant output voltage
Single ended voltage on CAN_L VCAN_L
Differential voltage on normal bus load VDiff VO(dif) differential output voltage
Differential voltage on effective resistance during arbitration
Optional: Differential voltage on extended bus load range
HS-PMA driver symmetry
Driver symmetry VSYM VTXsym transmitter voltage symmetry
Maximum HS-PMA driver output current
Absolute current on CAN_H ICAN_H IO(sc)dom dominant short-circuit output
Absolute current on CAN_L ICAN_L current

HS-PMA recessive output characteristics, bus biasing active/inactive


Single ended output voltage on CAN_H VCAN_H VO(rec) recessive output voltage
Single ended output voltage on CAN_L VCAN_L
Differential output voltage VDiff VO(dif) differential output voltage
Optional HS-PMA transmit dominant timeout
Transmit dominant timeout, long tdom tto(dom)TXD TXD dominant time-out time
Transmit dominant timeout, short
HS-PMA static receiver input characteristics, bus biasing active/inactive
Recessive state differential input voltage range VDiff Vth(RX)dif differential receiver threshold
Dominant state differential input voltage range voltage
Vrec(RX) receiver recessive voltage
Vdom(RX) receiver dominant voltage
HS-PMA receiver input resistance (matching)
Differential internal resistance RDiff Ri(dif) differential input resistance
Single ended internal resistance RCAN_H Ri input resistance
RCAN_L
Matching of internal resistance MR Ri input resistance deviation
HS-PMA implementation loop delay requirement
Loop delay tLoop td(TXDH-RXDH) delay time from TXD HIGH to
RXD HIGH
td(TXDL-RXDL) delay time from TXD LOW to RXD
LOW
Optional HS-PMA implementation data signal timing requirements for use with bit rates above 1 Mbit/s up to
2 Mbit/s and above 2 Mbit/s up to 5 Mbit/s
Transmitted recessive bit width @ 2 Mbit/s / @ 5 Mbit/s, tBit(Bus) tbit(bus) transmitted recessive bit width
intended
Received recessive bit width @ 2 Mbit/s / @ 5 Mbit/s tBit(RXD) tbit(RXD) bit time on pin RXD
Receiver timing symmetry @ 2 Mbit/s / @ 5 Mbit/s tRec trec receiver timing symmetry

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NXP Semiconductors TJA1044
High-speed CAN transceiver with Standby mode

Table 11. ISO 11898-2:2016 to NXP data sheet parameter conversion


ISO 11898-2:2016 NXP data sheet
Parameter Notation Symbol Parameter
HS-PMA maximum ratings of VCAN_H, VCAN_L and VDiff
Maximum rating VDiff VDiff V(CANH-CANL) voltage between pin CANH and
pin CANL
General maximum rating VCAN_H and VCAN_L VCAN_H Vx voltage on pin x
Optional: Extended maximum rating VCAN_H and VCAN_L VCAN_L
HS-PMA maximum leakage currents on CAN_H and CAN_L, unpowered
Leakage current on CAN_H, CAN_L ICAN_H IL leakage current
ICAN_L
HS-PMA bus biasing control timings
CAN activity filter time, long tFilter twake(busdom)[1] bus dominant wake-up time
CAN activity filter time, short twake(busrec)[1] bus recessive wake-up time
Wake-up timeout, short tWake tto(wake)bus bus wake-up time-out time
Wake-up timeout, long
Timeout for bus inactivity tSilence tto(silence) bus silence time-out time
Bus Bias reaction time tBias td(busact-bias) delay time from bus active to bias

[1] tfltr(wake)bus - bus wake-up filter time, in devices with basic wake-up functionality

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High-speed CAN transceiver with Standby mode

18. Revision history


Table 12. Revision history
Document ID Release date Data sheet status Change notice Supersedes
TJA1044 v.6.1 20170824 Product data sheet - TJA1044 v.5.1
Modifications: • Added variants TJA1044GT/3 and TJA1044GTK/3 with VIO pin that interface directly with 3 V and
5 V microcontrollers.
– Table 2: added parameters Vuvd(swoff)(VCC), VIO, IIO, Vuvd(swoff)(VIO); amended ICC
– Amended Figure 8 and Figure 9; added Figure 7
• No changes to product specifications of existing non-VIO variants
• Updated to comply with ISO 11898-2:2016 and SAE J22884-1 through SAE J2284-5 specifications:
– Table 7: conditions added to parameters Ri, Ri and Ri(dif); values/conditions changed for
parameters ICC, Vrec(RX), Vdom(RX), IO(sc)dom
– Additional measurement taken at fTXD = 1 MHz and 2.5 MHz for parameter VTXsym; see Table 7
and Figure 9
– Table 8: values/conditions changed for parameter tfltr(wake)bus
– Figure 4: thresholds clarified
– Figure 5: title changed
• Section 2.1: text of last entry amended
• Table 5, Table note 2 added
• Amended Figure 4 and Figure 6
• Section 12.2: reference updated
TJA1044 v.5.1 20160523 Product data sheet - TJA1044 v.4
TJA1044 v.4 20150710 Product data sheet - TJA1044 v.3
TJA1044 v.3 20141119 Product data sheet - TJA1044 v.2
TJA1044 v.2 20131030 Product data sheet - TJA1044 v.1
TJA1044 v.1 20130530 Preliminary data sheet - -

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Product data sheet Rev. 6 — 24 August 2017 24 of 27


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High-speed CAN transceiver with Standby mode

19. Legal information

19.1 Data sheet status


Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.

[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.

19.2 Definitions Suitability for use in automotive applications — This NXP


Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
Draft — The document is a draft version only. The content is still under
authorized or warranted to be suitable for use in life support, life-critical or
internal review and subject to formal approval, which may result in
safety-critical systems or equipment, nor in applications where failure or
modifications or additions. NXP Semiconductors does not give any
malfunction of an NXP Semiconductors product can reasonably be expected
representations or warranties as to the accuracy or completeness of
to result in personal injury, death or severe property or environmental
information included herein and shall have no liability for the consequences of
damage. NXP Semiconductors and its suppliers accept no liability for
use of such information.
inclusion and/or use of NXP Semiconductors products in such equipment or
Short data sheet — A short data sheet is an extract from a full data sheet applications and therefore such inclusion and/or use is at the customer's own
with the same product type number(s) and title. A short data sheet is intended risk.
for quick reference only and should not be relied upon to contain detailed and
Applications — Applications that are described herein for any of these
full information. For detailed and full information see the relevant full data
products are for illustrative purposes only. NXP Semiconductors makes no
sheet, which is available on request via the local NXP Semiconductors sales
representation or warranty that such applications will be suitable for the
office. In case of any inconsistency or conflict with the short data sheet, the
specified use without further testing or modification.
full data sheet shall prevail.
Customers are responsible for the design and operation of their applications
Product specification — The information and data provided in a Product and products using NXP Semiconductors products, and NXP Semiconductors
data sheet shall define the specification of the product as agreed between accepts no liability for any assistance with applications or customer product
NXP Semiconductors and its customer, unless NXP Semiconductors and design. It is customer’s sole responsibility to determine whether the NXP
customer have explicitly agreed otherwise in writing. In no event however, Semiconductors product is suitable and fit for the customer’s applications and
shall an agreement be valid in which the NXP Semiconductors product is products planned, as well as for the planned application and use of
deemed to offer functions and qualities beyond those described in the customer’s third party customer(s). Customers should provide appropriate
Product data sheet. design and operating safeguards to minimize the risks associated with their
applications and products.

19.3 Disclaimers NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
Limited warranty and liability — Information in this document is believed to
third party customer(s). Customer is responsible for doing all necessary
be accurate and reliable. However, NXP Semiconductors does not give any
testing for the customer’s applications and products using NXP
representations or warranties, expressed or implied, as to the accuracy or
Semiconductors products in order to avoid a default of the applications and
completeness of such information and shall have no liability for the
the products or of the application or use by customer’s third party
consequences of use of such information. NXP Semiconductors takes no
customer(s). NXP does not accept any liability in this respect.
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors. Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
In no event shall NXP Semiconductors be liable for any indirect, incidental,
damage to the device. Limiting values are stress ratings only and (proper)
punitive, special or consequential damages (including - without limitation - lost
operation of the device at these or any other conditions above those given in
profits, lost savings, business interruption, costs related to the removal or
the Recommended operating conditions section (if present) or the
replacement of any products or rework charges) whether or not such
Characteristics sections of this document is not warranted. Constant or
damages are based on tort (including negligence), warranty, breach of
repeated exposure to limiting values will permanently and irreversibly affect
contract or any other legal theory.
the quality and reliability of the device.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards Terms and conditions of commercial sale — NXP Semiconductors
customer for the products described herein shall be limited in accordance products are sold subject to the general terms and conditions of commercial
with the Terms and conditions of commercial sale of NXP Semiconductors. sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
Right to make changes — NXP Semiconductors reserves the right to make agreement is concluded only the terms and conditions of the respective
changes to information published in this document, including without agreement shall apply. NXP Semiconductors hereby expressly objects to
limitation specifications and product descriptions, at any time and without applying the customer’s general terms and conditions with regard to the
notice. This document supersedes and replaces all information supplied prior purchase of NXP Semiconductors products by customer.
to the publication hereof.

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Product data sheet Rev. 6 — 24 August 2017 25 of 27


NXP Semiconductors TJA1044
High-speed CAN transceiver with Standby mode

No offer to sell or license — Nothing in this document may be interpreted or Translations — A non-English (translated) version of a document is for
construed as an offer to sell products that is open for acceptance or the grant, reference only. The English version shall prevail in case of any discrepancy
conveyance or implication of any license under any copyrights, patents or between the translated and English versions.
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
19.4 Trademarks
authorization from competent authorities. Notice: All referenced brands, product names, service names and trademarks
Quick reference data — The Quick reference data is an extract of the are the property of their respective owners.
product data given in the Limiting values and Characteristics sections of this Mantis — is a trademark of NXP B.V.
document, and as such is not complete, exhaustive or legally binding.

20. Contact information


For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]

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Product data sheet Rev. 6 — 24 August 2017 26 of 27


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High-speed CAN transceiver with Standby mode

21. Contents
1 General description . . . . . . . . . . . . . . . . . . . . . . 1 19.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 25
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 19.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
2.1 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 19.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 25
2.2 Predictable and fail-safe behavior . . . . . . . . . . 2 19.4 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 26
2.3 Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 20 Contact information . . . . . . . . . . . . . . . . . . . . 26
2.4 TJA1044 CAN FD (applicable to all product 21 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
variants except TJA1044T). . . . . . . . . . . . . . . . 2
3 Quick reference data . . . . . . . . . . . . . . . . . . . . . 3
4 Ordering information . . . . . . . . . . . . . . . . . . . . . 3
5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4
6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 5
6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5
7 Functional description . . . . . . . . . . . . . . . . . . . 6
7.1 Operating modes . . . . . . . . . . . . . . . . . . . . . . . 6
7.1.1 Normal mode . . . . . . . . . . . . . . . . . . . . . . . . . . 6
7.1.2 Standby mode. . . . . . . . . . . . . . . . . . . . . . . . . . 6
7.2 Remote wake-up (via the CAN bus) . . . . . . . . . 6
7.3 Fail-safe features . . . . . . . . . . . . . . . . . . . . . . . 7
7.3.1 TXD dominant time-out function . . . . . . . . . . . . 7
7.3.2 Internal biasing of TXD and STB input pins . . . 8
7.3.3 Undervoltage detection on pins VCC and VIO . . 8
7.3.4 Overtemperature protection . . . . . . . . . . . . . . . 8
7.4 VIO supply pin (TJA1044x/3 variants) . . . . . . . . 8
8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 9
9 Thermal characteristics . . . . . . . . . . . . . . . . . 10
10 Static characteristics. . . . . . . . . . . . . . . . . . . . 10
11 Dynamic characteristics . . . . . . . . . . . . . . . . . 13
12 Application information. . . . . . . . . . . . . . . . . . 15
12.1 Application diagram . . . . . . . . . . . . . . . . . . . . 15
12.2 Application hints . . . . . . . . . . . . . . . . . . . . . . . 15
13 Test information . . . . . . . . . . . . . . . . . . . . . . . . 16
13.1 Quality information . . . . . . . . . . . . . . . . . . . . . 16
14 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 17
15 Handling information. . . . . . . . . . . . . . . . . . . . 19
16 Soldering of SMD packages . . . . . . . . . . . . . . 19
16.1 Introduction to soldering . . . . . . . . . . . . . . . . . 19
16.2 Wave and reflow soldering . . . . . . . . . . . . . . . 19
16.3 Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 19
16.4 Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 20
17 Appendix: ISO 11898-2:2016 parameter
cross-reference list . . . . . . . . . . . . . . . . . . . . . 22
18 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 24
19 Legal information. . . . . . . . . . . . . . . . . . . . . . . 25

Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.

© NXP Semiconductors N.V. 2017. All rights reserved.


For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 24 August 2017
Document identifier: TJA1044

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