LTC1046

“Inductorless”
5V to –5V Converter

FEATURES DESCRIPTION
nn 50mA Output Current The LTC®1046 is a 50mA monolithic CMOS switched
nn Plug-In Compatible with ICL7660/LTC1044 capacitor voltage converter. It plugs in for the ICL7660/
nn R
OUT = 35Ω Maximum LTC1044 in 5V applications where more output current
nn 300μA Maximum No Load Supply Current at 5V is needed. The device is optimized to provide high cur-
nn Boost Pin (Pin 1) for Higher Switching Frequency rent capability for input voltages of 6V or less. It trades
nn 97% Minimum Open-Circuit Voltage Conversion off operating voltage to get higher output current. The
Efficiency LTC1046 provides several voltage conversion functions:
nn 95% Minimum Power Conversion Efficiency the input voltage can be inverted (VOUT = – VIN), divided
nn Wide Operating Supply Voltage Range: 1.5V to 6V (VOUT = VIN/2) or multiplied (VOUT = ±nVIN).
nn Easy to Use
Designed to be pin-for-pin and functionally compatible
nn Low Cost
with the ICL7660 and LTC1044, the LTC1046 provides
2.5 times the output drive capability.
APPLICATIONS All registered trademarks and trademarks are the property of their respective owners.

nn Conversion of 5V to ± 5V Supplies
nn Precise Voltage Division, VOUT = VIN /2
nn Supply Splitter, V
OUT = ± VS /2

TYPICAL APPLICATION
Output Voltage vs Load Current for V + = 5V
Generating – 5V from 5V
–5
TA = 25°C
LTC1046
1 8 –4
BOOST V+ 5V INPUT
ICL7660/LTC1044,
OUTPUT VOLTAGE (V)

2 7
CAP + OSC ROUT = 55Ω
+ 3 6 –3
10µF GND LV
LTC1046,
4 5 ROUT = 27Ω
CAP – VOUT –5V OUTPUT
–2
10µF
+
–1
1046 TA01

0
0 10 20 30 40 50
LOAD CURRENT, IL (mA)
1046 TA02

Rev. C

Document Feedback For more information www.analog.com 1

LTC1046
ABSOLUTE MAXIMUM RATINGS
(Note 1)
Supply Voltage..........................................................6.5V Operating Temperature Range
Input Voltage on Pins 1, 6 and 7 LTC1046C.........................................0°C ≤ TA ≤ 70°C
(Note 2)..................................– 0.3 < VIN < (V+) +0.3V LTC1046I......................................–40°C ≤ TA ≤ 85°C
Current into Pin 6.....................................................20µA LTC1046M (OBSOLETE).................. –55°C to 125°C
Output Short Circuit Duration Storage Temperature Range.................... –65°C to 150°C
(V+ ≤ 6V).................................................... Continuous Lead Temperature (Soldering, 10 sec.).................. 300°C

PIN CONFIGURATION

TOP VIEW

BOOST 1 8 V+ TOP VIEW TOP VIEW

CAP + 2 7 OSC BOOST 1 8 V+ BOOST 1 8 V+

GND 3 6 LV CAP + 2 7 OSC CAP + 2 7 OSC

CAP – 4 5 VOUT GND 3 6 LV GND 3 6 LV

CAP – 4 5 VOUT CAP – 4 5 VOUT
J8 PACKAGE
8-LEAD CERDIP
N8 PACKAGE S8 PACKAGE
TJMAX = 160°C, θJA = 100°C 8-LEAD PDIP 8-LEAD PLASTIC SO
TJMAX = 110°C, θJA = 130°C (N8) TJMAX = 150°C, θJA = 150°C
OBSOLETE PACKAGE
Consider the N8 or S8 for Alternate Source

ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC1046CN8#PBF LTC1046CN8#TRPBF 8-Lead PDIP 0°C to 70°C
LTC1046IN8#PBF LTC1046IN8#TRPBF 8-Lead PDIP –40°C to 85°C
OBSOLETE PACKAGE
LTC1046MJ8#PBF LTC1046MJ8#TRPBF 8-Lead CERDIP –55°C to 125°C
LTC1046CS8#PBF LTC1046CS8#TRPBF 1046 8-Lead Plastic SO 0°C to 70°C
LTC1046IS8#PBF LTC1046IS8#TRPBF 1046I 8-Lead Plastic SO –40°C to 85°C
Contact the factory for parts specified with wider operating temperature ranges.
Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.

Rev. C

2 For more information www.analog.com

 LTC1046
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V+ = 5V, COSC = 0pF, unless otherwise noted.

LTC1046C LTC1046I/M
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
IS Supply Current RL = ∞, Pins 1 and 7 No Connection 165 300 165 300 µA
RL = ∞, Pins 1 and 7 No Connection, 35 35 µA
V+ = 3V
V+L Minimum Supply Voltage RL = 5kΩ l 1.5 1.5 V
V+ H Maximum Supply Voltage RL = 5kΩ l 6 6 V
ROUT Output Resistance V+ = 5V, I L = 50mA (Note 3) 27 35 27 35 Ω
l 27 45 27 50 Ω
V+ = 2V, IL = 10mA l 60 85 60 90 Ω
fOSC Oscillator Frequency V+ = 5V (Note 4) 20 30 20 30 kHz
V+ = 2V 4 5.5 4 5.5 kHz
PEFF Power Efficiency RL = 2.4kΩ 95 97 95 97 %
VOUTEFF Voltage Conversion Efficiency RL = ∞ 97 99.9 97 99.9 %
IOSC Oscillator Sink or Source VOSC = 0V or V+
Current Pin 1 = 0V l 4.2 35 4.2 40 µA
Pin 1 = V+ l 15 45 15 50 µA

Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 3: ROUT is measured at TJ = 25°C immediately after power-on.
may cause permanent damage to the device. Exposure to any Absolute Note 4: fOSC is tested with COSC = 100pF to minimize the effects of test
Maximum Rating condition for extended periods may affect device fixture capacitance loading. The 0pF frequency is correlated to this 100pF
reliability and lifetime. test point, and is intended to simulate the capacitance at pin 7 when the
Note 2: Connecting any input terminal to voltages greater than V+ or less device is plugged into a test socket and no external capacitor is used.
than ground may cause destructive latch-up. It is recommended that no
inputs from sources operating from external supplies be applied prior to
power-up of the LTC1046.

Rev. C

For more information www.analog.com 3

LTC1046
TYPICAL PERFORMANCE CHARACTERISTICS (Using Test Circuit in Figure 1)

Output Resistance vs Output Resistance vs Output Resistance vs

Oscillator Frequency Supply Voltage Temperature
500 1000 80
TA = 25°C TA = 25°C C1 = C2 = 10µF
V + = 5V IL = 3mA
70
400 IL = 10mA
OUTPUT RESISTANCE, RO (Ω)

OUTPUT RESISTANCE, RO (Ω)

OUTPUT RESISTANCE (Ω)

60

300 V + = 2V, COSC = 0pF

C1 = C2 COSC = 100pF 50
= 1µF 100
200 C1 = C2 40
C1 = C2 = 10µF
= 100µF V + = 5V, COSC = 0pF
30
COSC = 0pF
100
20

0 10 10
100 1k 10k 100k 0 1 2 3 4 5 6 7 –55 –25 0 25 50 75 100 125
OSCILLATOR FREQUENCY, fOSC (Hz) SUPPLY VOLTAGE, V + (V) AMBIENT TEMPERATURE (°C)
1046 G01 1046 G02 1046 G03

Power Conversion Efficiency vs Power Conversion Efficiency vs Power Conversion Efficiency vs

Load Current for V+ = 2V Load Current for V+ = 5V Oscillator Frequency
100 10 100 100 100
A = 100µF, 1mA
POWER CONVERSION EFFICIENCY, PEFF (%)

POWER CONVERSION EFFICIENCY, PEFF (%)

POWER CONVERSION EFFICIENCY, PEFF (%)

90 PEFF 9 90 90 98 B = 100µF, 15mA
PEFF A
8 80 C = 10µF, 1mA
80 80 96 D = 10µF, 15mA
SUPPLY CURRENT (mA)

70 7 70 70 SUPPLY CURRENT (mA) 94 E = 1µF, 1mA

IS C F = 1µF, 15mA
60 6 60 60 92
B V + = 5V
50 5 50 50 90 TA = 25°C
IS E C1 = C2
40 4 40 40 88
30 3 30 30 86
TA = 25°C TA = 25°C D
20 V + = 2V 2 20 V + = 5V 20 84
C1 = C2 = 10µF C1 = C2 = 10µF F
10 1 10 10 82
fOSC = 8kHz fOSC = 30kHz
0 0 0 0 80
0 1 2 3 4 5 6 7 8 9 10 0 10 20 30 40 50 60 70 100 1k 10k 100k 1M
LOAD CURRENT, IL (mA) LOAD CURRENT, IL (mA) OSCILLATOR FREQUENCY, fOSC (Hz)
1046 G04 1046 G05 1046 G06

Output Voltage vs Load Current Output Voltage vs Load Current Oscillator Frequency as a
for V+ = 2V for V+ = 5V Function of COSC
2.5 5 100
TA = 25°C TA = 25°C V + = 5V
2.0 V + = 2V 4 V + = 5V TA = 25°C
OSCILLATOR FREQUENCY, fOSC (kHz)

fOSC = 8kHz fOSC = 30kHz

1.5 C1 = C2 = 10µF 3 C1 = C2 = 10µF
PIN 1 = V +
OUTPUT VOLTAGE (V)

1.0
OUTPUT VOLTAGE (V)

2
10
0.5 1
0.0 0
–0.5 –1 PIN 1 = OPEN
–1.0 1
–2
–1.5 –3
SLOPE = 52Ω
–2.0 –4
SLOPE = 27Ω
–2.5 –5 0.1
0 2 4 6 8 10 12 14 16 18 20 0 10 20 30 40 50 60 70 80 90 100 1 10 100 1000 10000
LOAD CURRENT, IL (mA) LOAD CURRENT, IL (mA) EXTERNAL CAPACITOR (PIN 7 TO GND), COSC (pF)
1046 G07 1046 G08 1046 G09

Rev. C

4 For more information www.analog.com

 LTC1046
TYPICAL PERFORMANCE CHARACTERISTICS (Using Test Circuit in Figure 1)

Oscillator Frequency as a Oscillator Frequency vs

Function of Supply Voltage Temperature
100 40
TA = 25°C V + = 5V
COSC = 0pF COSC = 0pF
OSCILLATOR FREQUENCY, fOSC (kHz)

OSCILLATOR FREQUENCY, fOSC (kHz)

38

36

34
10
32

30

28

1 26
0 1 2 3 4 5 6 7 –55 –25 0 25 50 75 100 125
AMBIENT TEMPERATURE (°C) AMBIENT TEMPERATURE (°C)
1046 G10 1046 G11

TEST CIRCUIT

V + (5V)
LTC1046 IS
1 8
BOOST V+
2 7 EXTERNAL
CAP + OSC
C1
+ 3 6
OSCILLATOR RL IL
GND LV
10µF
4 5
CAP – VOUT VOUT
COSC C2
+ 10µF

1046 F01

Figure 1

Rev. C

For more information www.analog.com 5

LTC1046
APPLICATIONS INFORMATION
Theory of Operation Examination of Figure 4 shows that the LTC1046 has
To understand the theory of operation of the LTC1046, the same switching action as the basic switched capaci-
a review of a basic switched capacitor building block is tor building block. With the addition of finite switch ON
helpful. resistance and output voltage ripple, the simple theory,
although not exact, provides an intuitive feel for how the
In Figure 2, when the switch is in the left position, capaci- device works.
tor C1 will charge to voltage V1. The total charge on C1
will be q1 = C1V1. The switch then moves to the right, For example, if you examine power conversion efficiency
discharging C1 to voltage V2. After this discharge time, as a function of frequency (see typical curve), this simple
the charge on C1 is q2 = C1V2. Note that charge has been theory will explain how the LTC1046 behaves. The loss,
transferred from the source, V1, to the output, V2. The and hence the efficiency, is set by the output impedance.
amount of charge transferred is: As frequency is decreased, the output impedance will
eventually be dominated by the 1/fC1 term and power effi-
Δq = q1 – q2 = C1(V1 – V2). ciency will drop. The typical curves for power efficiency
If the switch is cycled “f” times per second, the charge versus frequency show this effect for various capacitor
transfer per unit time (i.e., current) is: values.
I = f • Δq = f • C1(V1 – V2). Note also that power efficiency decreases as frequency
goes up. This is caused by internal switching losses which
V1 V2 occur due to some finite charge being lost on each switch-
f ing cycle. This charge loss per unit cycle, when multiplied
C1 C2
RL by the switching frequency, becomes a current loss. At
high frequency this loss becomes significant and the
power efficiency starts to decrease.
1046 F02

Figure 2. Switched Capacitor Building Block

Rewriting in terms of voltage and impedance equivalence,

V+
V1 – V 2 V1 – V 2 (8)
I= = . SW1 SW2

(1 / fC1) REQUIV BOOST
CAP +
(2)
3x φ +
(1) C1
A new variable, REQUIV, has been defined such that OSC +2
REQUIV = 1/fC1. Thus, the equivalent circuit for the OSC φ CAP – VOUT
(7) (4) (5)
switched capacitor network is as shown in Figure 3.
C2
+
REQUIV LV GND 1046 F04

V1 V2 (6) CLOSED WHEN (3)

V + > 3.0V

C2 RL
REQUIV = 1 Figure 4. LTC1046 Switched Capacitor Voltage Converter
fC1
Block Diagram
1046 F03

Figure 3. Switched Capacitor Equivalent Circuit

Rev. C

6 For more information www.analog.com

 LTC1046
APPLICATIONS INFORMATION
LV (Pin 6) CMOS logic gate is best because it can operate over a
wide supply voltage range (3V to 15V) and has enough
The internal logic of the LTC1046 runs between V+ and
voltage swing to drive the internal Schmitt trigger shown
LV (Pin 6). For V+ greater than or equal to 3V, an internal
in Figure 5. For 5V applications, a TTL logic gate can be
switch shorts LV to GND (Pin 3). For V+ less than 3V,
used by simply adding an external pull-up resistor (see
the LV pin should be tied to ground. For V+ greater than
Figure 6).
or equal to 3V, the LV pin can be tied to ground or left
floating. Capacitor Selection
OSC (Pin 7) and BOOST (Pin 1) While the exact values of CIN and COUT are noncritical,
good quality, low ESR capacitors such as solid tantalum
The switching frequency can be raised, lowered or driven
are necessary to minimize voltage losses at high cur-
from an external source. Figure 5 shows a functional dia-
rents. For CIN the effect of the ESR of the capacitor will
gram of the oscillator circuit.
be multiplied by four, due to the fact that switch currents
By connecting the BOOST (Pin 1) to V+, the charge and are approximately two times higher than output current,
discharge current is increased and, hence, the frequency and losses will occur on both the charge and discharge
is increased by approximately three times. Increasing the cycle. This means that using a capacitor with 1Ω of ESR
frequency will decrease output impedance and ripple for for CIN will have the same effect as increasing the output
higher load currents. impedance of the LTC1046 by 4Ω. This represents a sig-
Loading Pin 7 with more capacitance will lower the fre- nificant increase in the voltage losses. For COUT the effect
quency. Using the BOOST pin in conjunction with exter- of ESR is less dramatic. COUT is alternately charged and
nal capacitance on Pin 7 allows user selection of the fre- discharged at a current approximately equal to the output
quency over a wide range. current, and the ESR of the capacitor will cause a step
function to occur, in the output ripple, at the switch transi-
Driving the LTC1046 from an external frequency source tions. This step function will degrade the output regula-
can be easily achieved by driving Pin 7 and leaving the tion for changes in output load current, and should be
BOOST pin open, as shown in Figure 6. The output cur- avoided. Realizing that large value tantalum capacitors
rent from Pin 7 is small, typically 15μA, so a logic gate can be expensive, a technique that can be used is to par-
is capable of driving this current. The choice of using a allel a smaller tantalum capacitor with a large aluminum
electrolytic capacitor to gain both low ESR and reasonable
V+ cost. Where physical size is a concern some of the newer
chip type surface mount tantalum capacitors can be used.
2I I
These capacitors are normally rated at working voltages
in the 10V to 20V range and exhibit very low ESR (in the
BOOST range of 0.1Ω).
(1)
REQUIRED FOR TTL LOGIC V+
LTC1046
1 8
NC BOOST V+ 100k
OSC SCHMITT
2 7
(7) TRIGGER CAP + OSC OSC INPUT
+ 3 6
~14pF C1 GND LV
4 5
CAP – VOUT –(V +)
2I I C2
+
LV 1046 F05
(6)
1046 F06

Figure 5. Oscillator Figure 6. External Clocking

Rev. C

For more information www.analog.com 7

LTC1046
TYPICAL APPLICATIONS
Negative Voltage Converter on the typical curves of output impedance and power ef-
ficiency versus frequency. For C1 = C2 = 10μF, the output
Figure 7 shows a typical connection which will provide
impedance goes from 27Ω at fOSC = 30kHz to 225Ω at
a negative supply from an available positive supply. This
fOSC = 1kHz. As the 1/fC term becomes large compared
circuit operates over full temperature and power supply to switch ON resistance term, the output resistance is
ranges without the need of any external diodes. The LV determined by 1/fC only.
pin (Pin 6) is shown grounded, but for V+ ≥ 3V, it may
be floated, since LV is internally switched to GND (Pin 3) Voltage Doubling
for V+ ≥ 3V.
Figure 8 shows a two diode, capacitive voltage doubler.
The output voltage (Pin 5) characteristics of the circuit With a 5V input, the output is 9.1V with no load and 8.2V
are those of a nearly ideal voltage source in series with an with a 10mA load.
27Ω resistor. The 27Ω output impedance is composed of
two terms: 1) the equivalent switched capacitor resistance LTC1046
(see Theory of Operation), and 2) a term related to the ON 1
BOOST V+
8 V+
+ 1.5V TO 6V
resistance of the MOS switches. 2
CAP + OSC
7
VD
VD
3 6 + VOUT = 2
At an oscillator frequency of 30kHz and C1 = 10μF, the 4
GND LV REQUIRED
FOR (VIN – 1)
5
first term is: CAP – VOUT V + < 3V + +
10µF 10µF
1
REQUIV = =
( fOSC / 2 • C1) Figure 8. Voltage Doubler
1046 F08

1
= 6.7Ω.
15 • 103 • 10 • 10 –6

Notice that the equation for REQUIV is not a capacitive Ultraprecision Voltage Divider
reactance equation (XC = 1/ωC) and does not contain a An ultraprecision voltage divider is shown in Figure 9. To
2π term. achieve the 0.0002% accuracy indicated, the load current
The exact expression for output impedance is complex, should be kept below 100nA. However, with a slight loss
but the dominant effect of the capacitor is clearly shown in accuracy, the load current can be increased.

LTC1046
1 8 V+
LTC1046 BOOST V+
3V TO 12V
2 7
1 8 V+ CAP + OSC
BOOST V+ +
1.5V TO 6V C1 3 6
2 7 GND LV
CAP + OSC 10µF
+ 3 6
4
CAP – VOUT
5
10µF GND LV REQUIRED FOR V + < 3V
4 5 V+
CAP – VOUT VOUT = –V + ±0.002% 1046 F09

10µF
2 +
C2 REQUIRED FOR V + < 6V
+ TMIN ≤ TA ≤ TMAX
10µF
IL ≤ 100nA
TMIN ≤ TA ≤ TMAX 1046 F07

Figure 7. Negative Voltage Converter Figure 9. Ultrtaprecision Voltage Divider

Rev. C

8 For more information www.analog.com

 LTC1046
TYPICAL APPLICATIONS
Battery Splitter Paralleling for Lower Output Resistance
A common need in many systems is to obtain positive Additional flexibility of the LTC1046 is shown in Figures
and negative supplies from a single battery or single Figure 11 and Figure 12. Figure 11 shows two LTC1046s
power supply system. Where current requirements are connected in parallel to provide a lower effective output
small, the circuit shown in Figure 10 is a simple solution. resistance. If, however, the output resistance is dominated
It provides symmetrical positive or negative output volt- by 1/fC1, increasing the capacitor size (C1) or increasing
ages, both equal to one half the input voltage. The output the frequency will be of more benefit than the paralleling
voltages are both referenced to Pin 3 (output common). If circuit shown.
the input voltage between Pin 8 and Pin 5 is less than 6V, Figure 12 makes use of “stacking” two LTC1046s to pro-
Pin 6 should also be connected to Pin 3, as shown by the vide even higher voltages. In Figure 12, a negative voltage
dashed line. doubler or tripler can be achieved depending upon how
Pin 8 of the second LTC1046 is connected, as shown
LTC1046
1 8 +VB /2 schematically by the switch.
BOOST V+
VB 4.5V
2 7
9V CAP + OSC
C1
+ 3 6 REQUIRED FOR VB < 6V
GND LV
10µF
4 5 –VB /2
CAP – VOUT
–4.5V

C2
+ 10µF
OUTPUT COMM0N
3V ≤ VB ≤ 12V 1046 F10

Figure 10. Battery Splitter

V+
LTC1046 LTC1046
1 8 1 8
BOOST V+ BOOST V+
2 7 2 7
CAP + OSC CAP + OSC
C1
+ 3 6 C1
+ 3 6
GND LV GND LV
10µF 10µF
4 5 4 5
CAP – VOUT CAP – VOUT VOUT = –(V +)

C2
1/4 CD4077
+ 20µF

OPTIONAL SYNCHRONIZATION
CIRCUIT TO MINIMIZE RIPPLE 1046 F11

Figure 11. Paralleling for 100mA Load Current

FOR VOUT = –3V + FOR VOUT = –2V +

V+
LTC1046 LTC1046
C1
1 + 8 1 8
BOOST V 10µF BOOST V+
2 7 2 7
+

CAP + OSC CAP + OSC

+ 3 6 3 6
10µF GND LV GND LV
4 5 4 5
CAP – VOUT –(V +) CAP – VOUT VOUT
10µF 10µF
+ +
1046 F12

Figure 12. Stacking for Higher Voltage

Rev. C

For more information www.analog.com 9

LTC1046
PACKAGE DESCRIPTION

J8 Package
8-Lead CERDIP (Narrow .300 Inch, Hermetic)
(Reference LTC DWG # 05-08-1110)

CORNER LEADS OPTION .405

(4 PLCS) (10.287)
.005 MAX
(0.127)
MIN
8 7 6 5
.023 – .045
(0.584 – 1.143)
HALF LEAD
OPTION .025 .220 – .310
.045 – .068 (0.635) (5.588 – 7.874)
(1.143 – 1.650) RAD TYP
FULL LEAD
OPTION
1 2 3 4 .200
.300 BSC
(5.080)
(7.62 BSC) MAX

.015 – .060
(0.381 – 1.524)

.008 – .018
0° – 15°
(0.203 – 0.457)

.045 – .065
.125
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE (1.143 – 1.651)
OR TIN PLATE LEADS 3.175
.014 – .026 MIN
.100
(0.360 – 0.660) (2.54)
BSC J8 0801

OBSOLETE PACKAGE

Rev. C

10 For more information www.analog.com

 LTC1046
PACKAGE DESCRIPTION

N Package
8-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510 Rev I)

.300 – .325 .045 – .065 .130 ±.005

(7.620 – 8.255) (1.143 – 1.651) (3.302 ±0.127)

.065
(1.651)
.008 – .015 TYP
(0.203 – 0.381) .120
(3.048) .020
+.035 MIN (0.508)
.325 –.015
.100 .018 ±.003 MIN

( 8.255
+0.889
–0.381 ) (2.54)
BSC
(0.457 ±0.076) N8 REV I 0711

.400*
(10.160)
MAX

8 7 6 5

.255 ±.015*
(6.477 ±0.381)

1 2 3 4

NOTE:
INCHES
1. DIMENSIONS ARE
MILLIMETERS
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)

Rev. C

For more information www.analog.com 11

LTC1046
PACKAGE DESCRIPTION

S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610 Rev G)

.189 – .197
.045 ±.005 (4.801 – 5.004)
.050 BSC NOTE 3
8 7 6 5

.245
MIN .160 ±.005
.150 – .157
.228 – .244
(3.810 – 3.988)
(5.791 – 6.197)
NOTE 3

.030 ±.005
TYP
1 2 3 4
RECOMMENDED SOLDER PAD LAYOUT

.010 – .020
× 45° .053 – .069
(0.254 – 0.508)
(1.346 – 1.752)
.004 – .010
.008 – .010
0°– 8° TYP (0.101 – 0.254)
(0.203 – 0.254)

.016 – .050
.014 – .019 .050
(0.406 – 1.270)
(0.355 – 0.483) (1.270)
NOTE: TYP BSC
INCHES
1. DIMENSIONS IN
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) SO8 REV G 0212

4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE

Rev. C

12 For more information www.analog.com

 LTC1046
REVISION HISTORY (Revision history begins at Rev C)

REV DATE DESCRIPTION PAGE NUMBER

C 05/19 Obsolete CERDIP package 2, 10

Rev. C

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
subject to change without notice. No license For moreby
is granted information www.analog.com
implication or otherwise under any patent or patent rights of Analog Devices. 13
LTC1046
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Rev. C

14
05/19
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