Flip chip

This article is about the semiconductor mounting tech-

nique. For the DEC PDP module, see Flip Chip (PDP
module). For the CPU format, see Flip-chip pin grid
array.

Flip chip, also known as controlled collapse chip con-

nection or its abbreviation, C4,[1] is a method for inter- •
connecting semiconductor devices, such as IC chips and
microelectromechanical systems (MEMS), to external
circuitry with solder bumps that have been deposited onto
the chip pads. The technique was developed by General
Electric's Light Military Electronics Dept., Utica, N.Y.[2]
The solder bumps are deposited on the chip pads on the
top side of the wafer during the final wafer processing
step. In order to mount the chip to external circuitry
(e.g., a circuit board or another chip or wafer), it is flipped •
over so that its top side faces down, and aligned so that its
pads align with matching pads on the external circuit, and
then the solder is reflowed to complete the interconnect.
This is in contrast to wire bonding, in which the chip is
mounted upright and wires are used to interconnect the
chip pads to external circuitry.[3] •

1 Process steps
1. Integrated circuits are created on the wafer •
2. Pads are metalized on the surface of the chips
3. Solder dots are deposited on each of the pads
4. Chips are cut •

5. Chips are flipped and positioned so that the solder

balls are facing the connectors on the external cir-
cuitry
6. Solder balls are then remelted (typically using hot
•
air reflow)
7. Mounted chip is “underfilled” using an electrically-
insulating adhesive

2 Comparison of mounting tech-

nologies
•

1
2 4 ALTERNATIVES

Aluminium wires the rest of the system. The underfill distributes the ther-
mal expansion mismatch between the chip and the board,
Copper
Silicon die
Source tab
connection
preventing stress concentration in the solder joints which
would lead to premature failure.[5]
Recently, high-speed mounting methods evolved through
a cooperation between Reel Service Ltd. and Siemens
AG in the development of a high speed mounting tape
known as 'MicroTape.'. By adding a tape-and-reel pro-
Gate connection
cess into the assembly methodology, placement at high
speed is possible, achieving a 99.90% pick rate and a
The interconnections in a power package are made using thick placement rate of 21,000 cph (components per hour), us-
aluminium wires (250 to 400 µm) wedge-bonded ing standard PCB assembly equipment.

2.1 Wire bonding/thermosonic bonding

2.3 Advantages
In typical semiconductor fabrication systems chips are
built up in large numbers on a single large wafer of The resulting completed flip chip assembly is much
semiconductor material, typically silicon. The individual smaller than a traditional carrier-based system; the chip
chips are patterned with small pads of metal near their sits directly on the circuit board, and is much smaller
edges that serve as the connections to an eventual me- than the carrier both in area and height. The short wires
chanical carrier. The chips are then cut out of the wafer greatly reduce inductance, allowing higher-speed signals,
and attached to their carriers, typically via wire bonding and also conduct heat better.
such as Thermosonic Bonding. These wires eventually
lead to pins on the outside of the carriers, which are at-
tached to the rest of the circuitry making up the electronic 2.4 Disadvantages
system.
Flip chips have several disadvantages. The lack of a car-
rier means they are not suitable for easy replacement, or
2.2 Flip chip manual installation. They also require very flat surfaces to
mount to, which is not always easy to arrange, or some-
times difficult to maintain as the boards heat and cool.
Chip Also, the short connections are very stiff, so the thermal
Metalized pads
Underfill
expansion of the chip must be matched to the supporting
Solder balls board or the connections can crack.[6] The underfill ma-
Connectors terial acts as an intermediate between the difference in
Underlying electronics CTE of the chip and board.

Side-view schematic of a typical flip chip mounting

3 History
Processing a flip chip is similar to conventional IC fab-
rication, with a few additional steps.[4] Near the end of
The process was originally introduced commercially by
the manufacturing process, the attachment pads are met-
IBM in the 1960s for individual transistors and diodes
alized to make them more receptive to solder. This typi-
packaged for use in their mainframe systems.[7] DEC fol-
cally consists of several treatments. A small dot of solder
lowed IBM’s lead, but was unable to achieve the quality
is then deposited on each metalized pad. The chips are
they demanded, and eventually gave up on the concept. It
then cut out of the wafer as normal.
was pursued once again in the mid-90s for the DEC Al-
To attach the flip chip into a circuit, the chip is inverted pha product line, but then abandoned due to the fragmen-
to bring the solder dots down onto connectors on the un- tation of the company and subsequent sale to Compaq. In
derlying electronics or circuit board. The solder is then the 1970s it was taken up by Delco Electronics, and has
re-melted to produce an electrical connection, typically since become very common in automotive applications.
using a Thermosonic bonding or alternatively reflow sol-
der process. This also leaves a small space between the
chip’s circuitry and the underlying mounting. In most
cases an electrically-insulating adhesive is then “under- 4 Alternatives
filled” to provide a stronger mechanical connection, pro-
vide a heat bridge, and to ensure the solder joints are Since the flip chip’s introduction a number of alterna-
not stressed due to differential heating of the chip and tives to the solder bumps have been introduced, including
 3

Digital Equipment Corp. R107 Flip Chip module from 1967; this
board holds 8 hybrid integrated circuits built using flip-chip tech-
nology. These, plus 7 discrete transistors and 14 discrete diodes
combine to make 7 inverters.

gold balls or molded studs, electrically conductive poly-

mer and the “plated bump” process that removes an insu-
lating plating by chemical means. Flip chips have recently
gained popularity among manufacturers of cell phones,
pagers and other small electronics where the size savings
are valuable.

5 See also
• Solid Logic Technology
• IBM 3081

6 References
[1] E. J. Rymaszewski, J. L. Walsh, and G. W. Leehan,
“Semiconductor Logic Technology in IBM” IBM Jour-
nal of Research and Development, 25, no. 5 (September
1981): 605.

[2] Filter Center, Aviation Week & Space Technology,

September 23, 1963, v. 79, no. 13, p. 96.

[3] Peter Elenius and Lee Levine, Chip Scale Review.

“Comparing Flip-Chip and Wire-Bond Interconnection
Technologies.” July/August 2000. Retrieved July 30,
2015.

[4] George Riley, Flipchips.com. “Solder Bump Flip Chip.”

November 2000. Retrieved July 30, 2015.

[5] Venkat Nandivada. “Enhance Electronic Performance

with Epoxy Compounds”. Design World. 2013.

[6] Demerjian, Charlie (2008-12-17), Nvidia chips show un-

derfill problems, The Inquirer, retrieved 2009-01-30

[7] George Riley, Introduction to Flip Chip: What, Why,

How, Flipchips.com October 2000.
4 7 TEXT AND IMAGE SOURCES, CONTRIBUTORS, AND LICENSES

7 Text and image sources, contributors, and licenses

7.1 Text
• Flip chip Source: https://en.wikipedia.org/wiki/Flip_chip?oldid=769020315 Contributors: Rmhermen, Maury Markowitz, RTC, Julesd,
Dysprosia, Jnc, Omegatron, Khym Chanur, Secretlondon, Ckape, DavidCary, ElectraFlarefire, Rchandra, CryptoDerk, YUL89YYZ,
Hooperbloob, Twisp, RJFJR, Voxadam, Woohookitty, Josh Parris, Jehochman, Pseudomoi~enwiki, Toresbe, Okto8, Hellbus, Drag-
onHawk, Nikkimaria, SmackBot, Eskimbot, Bluebot, ZyMOS, Glloq, Parikshit Narkhede, Dancter, SiobhanHansa, Wabernat, JaGa,
Danield101, Brianonn, Spinningspark, Adrger, AlleborgoBot, EoGuy, Addbot, Luckas-bot, Materialscientist, Gnuish, Douglas W. Jones,
Jc3s5h, Edgarrabbit, Scotteaton92, Zestee, Staszek Lem, Anonimski, Privatechef, BG19bot, Junkyardsparkle, Alathya, Verskaya, Inter-
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