8 7 6 5 4 3 2 1

VGA IN1
D
CN EDID D

VGA IN 2 24LC21
CN FLASH
Video Buffer S29GL032N90
EDID THS7327
24LC21 16
VGA OUT ADC
CN AFE1000
S-VIDEO DMD
CN EEPROM
VIDEO 30bit 24C32
CN

Port1
16 pairs DMD
CAM
CN DMD Board
Driver & Reset
C
HDMI IN
CN
HDMI Reciver
MST3363CMK
DDP2430 DAD2000 C

Temperator
EDID Sensor Color Wheel

GPIO
24LC22 TMP75
PCM1754 MOTOR
Audio IN 1
CN
Audio IN 2 BD3888FS Power Motor Driver Color Wheel
CN SENSOR
Line Out PMD1000
5Wx2 USB UART IR GPIO SENSOR
AUDIO AMP Board
TPA3005D2
1Wx1 AUDIO AMP
TPA2005D1 SPEAKER
SPEAKER
B
USB IR reciver B

CN Board FANx3

LAN
PIC18F97J60 PIC16F690 KEYPAD
CN Board
ADM3202
Lamp Cover Thermal
MAIN Board 12V 5V Switch Break

Line Out RS232

CN CN 12V 5V
BALLAST
I/O Board Control
100~240VAC LAMP
AC line PFC +380VDC
BALLAST
A POWER Board Board A

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

D23

C A
P1_C[9..0]
D24 AFE_RV0 R57 P1_C0 P1_C[9..0] P.3,4,8
U7B
C A 65 R54 P1_C1
R0 AFE_RV1
64
R1 AFE_RV2 PR8 P1_C2
63 8 7
R2 AFE_RV3 P1_C3
62 6 5
R3 AFE_RV4 P1_C4
61 4 3
C447 L9 R4 AFE_RV5 P1_C5
D 59 2 1 D
SVID_CHR_CONN SVID_CHR_FLTR C71 SVID_CHR_AFE 9 R5 AFE_RV6 P1_C6
58 8 7
J1 RIN_3 R6 AFE_RV7 P1_C7
57 6 5
R7 AFE_RV8 P1_C8
56 4 3
L10 R8 AFE_RV9 P1_C9
55 2 1
SVID_LUM_CONN SVID_LUM_FLTR C69 SVID_LUM_AFE 98 R9 PR9
3 4
GIN_3
1 2 C449 P1_B[9..0]
AFE_GY0 R56 P1_B0 P1_B[9..0] P.3,4,8

52 R59 P1_B1
G0 AFE_GY1
51
G1
7

R58 C72 R55 C70 50 AFE_GY2 PR10 1 2 P1_B2

G2 AFE_GY3 P1_B3
49 3 4
G3 AFE_GY4 P1_B4
48 5 6
G4 AFE_GY5 P1_B5
47 7 8
modify G5 AFE_GY6 P1_B6
46 1 2
G6 AFE_GY7 P1_B7
45 3 4
D25 G7 AFE_GY8 P1_B8
44 5 6
G8 AFE_GY9 P1_B9
C A 43 7 8
G9 PR11
P1_A[9..0]
P1_A[9..0] P.3,4,8
L11 R62 P1_A0
CMP_CONN CMP_FLTR C73 CMP_AFE 16
CMP BIN_3 AFE_BU0 R63 P1_A1
38
B0 AFE_BU1
37
C448 R61 SCART_FLTR C75 SCART_AFE B1 AFE_BU2 PR12 1 P1_A2
97 36 2
SOGIN_3 B2 AFE_BU3 P1_A3
35 3 4
C C76 B3 AFE_BU4 P1_A4 C
34 5 6
R60 C74 C77 GIN4 B4 AFE_BU5 P1_A5 C78
96 33 7 8
GIN_4 B5 AFE_BU6 P1_A6
32 1 2
B6 AFE_BU7 P1_A7
31 3 4
B7 AFE_BU8 P1_A8
30 5 6
L67 B8 AFE_BU9 P1_A9
29 7 8
AFE_EXT_CLK B9 PR13
CMPI 80
EXT_CLK
C? C? P.3,4,9,12 AFE_RSTZ AFE_RSTZ 71
R64 RESETZ AFE_DATACLK R65 P1_CLK
28
EXT_CLK DATACLK P1_CLK P.3,4
P.3,4 EXT_CLK
24 AFE_HSOUT R66 P1_HSYNC
HSOUT_DCLAMP P1_HSYNC P.3,4,8
23 AFE_VSOUT R67 P1_VSYNC
VSOUT_DUPDT P1_VSYNC P.3,4,8
22 AFE_TESTOUT R68 TESTOUT_HDR
TESTOUT TESTOUT_HDR P.3

P.3,4 ADC_COAST R?

P.3,4 ADC_CLAMP ADC_CLAMP R69 AFE_CLAMP_CSPDAT 77

ADC_COAST R70 AFE_COAST_CSPCLK CLAMP_CSPDAT
P.3,4 ADC_COAST 76
COAST_CSPCLK
P.3,4 ADC_CLAMP R?

B B

70 GPIO0_HSBUF R71 ALF_HSYNC

GPIO0_HSBUF ALF_HSYNC P.3,4,12
73 GPIO1_VSBUF R72 ALF_VSYNC
SCL1 74 GPIO1_VSBUF ALF_VSYNC P.3,4,12
P.3,4,9,11,12 SCL1 SCL
P.3,4,9,11,12 SDA1 SDA1 75 25 SOGOUT_I2CA ALF_CSYNC
SDA SOGOUT_I2CA ALF_CSYNC P.3,4

R73

A A

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

D D

P5V U7C
L12
P3P3V_AFE A3P3V_AFE
13
P3P3V_AFE A3P3VDD_13
14
U10 A3P3VDD_14
93
C422 C81 C82 C83 C84 C85 C86 C87 C88 A3P3VDD_93
1 94
P1P9V_AFE R493 VIN A3P3VDD_94
5
VOUT
2
GND C423
4
BP
3 12
EN A3P3GND_12
15
R492 C424 A3P3GND_15
92
A3P3GND_92
95
R630 A3P3GND_95

L13
P1P9V_AFE A1P9V_AFE
4
A1P8VDD_4
6
A1P8VDD_6
7
C93 C94 C95 C96 C97 C98 C99 C100 A1P8VDD_7
19
A1P8VDD_19

C C
3
A1P8GND_3
5
A1P8GND_5
8
A1P8GND_8
20
A1P8GND_20

A1P9V_AFE A1P9V_PLL_AFE
L14 84
P5V P1P9V_AFE PLL_A1P8VDD_84
85
U605 C101 C102 C103 C104 C105 C106 C107 PLL_A1P8VDD_85

1 2
IN OUT
83
R635 PLL_A1P8GND_83
86
C685 C686 PLL_A1P8GND_86
90
GND_3
GND_6

PLL_A1P8GND_90
C684 5 4
EN FB
R636 PLLF_AFE_S R76 PLLF_AFE 89
PLL_F
3
6

C108 C109

PLL_AFE_F2 88
PLL_AFE_F1 PLL_FILTR2
87
PLL_FILTR1

P1P9V_AFE
B B
39
D1P8VDD_39
69
C110 C111 C112 C113 C114 C115 C116 D1P8VDD_69

40
DGND_40
68
DGND_68
L15
A3P3V_AFE P3P3V_SYNC
P3P3V_AFE
26
IO_3P3VDD_26
41
C117 C118 C119 IO_3P3VDD_41
53
C120 C121 C122 C123 C124 C125 C126 IO_3P3VDD_53
66
IO_3P3VDD_66

27
IOGND_27
42
IOGND_42
54
IOGND_54
60
IOGND_60
67
IOGND_67
21
NSUB_21
91
NSUB_91
72
TMS
A G1 A
PWR_PAD

8 7 6 5 4 3 2 1
 5 4 3 2 1

AVDD33 VDDP33 VMPLL VDDC18 AVDD18

C127 C128 C129 C130 C131 C132 C133 C134 C135 C136 C137 C138 C139 C140 C141 C145
C142 C143 C144

AVDD33 VDDP33 VMPLL VDDC18 AVDD18

101
114
126

103
116
U11

10
21
27
30
33
39
57

67
81
93

60

95
4

3
D D

AVDD_MPLL
AVDD_33
AVDD_33
AVDD_33
AVDD_33
AVDD_33
AVDD_33
AVDD_33
AVDD_33

AVDD_18
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP

VDDC
VDDC
VDDC
P1_A[9..0]
5V_HDMI AVDD33 P1_A[9..0] P.3,4,6
113 HDMI_RV0 R77 P1_A0
DATA0 HDMI_RV1 R78 P1_A1
112
DATA1 HDMI_RV2 P1_A2
111 8 7
DATA2
+ C148 C146 C149 C150 C151 3V3 3V3 3V3 1V8 1V8 DATA3
110 HDMI_RV3 PR1 6 5 P1_A3
109 HDMI_RV4 4 3 P1_A4
U12A DATA4 HDMI_RV5 P1_A5
108 2 1
DATA5 HDMI_RV6 P1_A6
107 8 7

38

37
DATA6

2
106 HDMI_RV7 6 5 P1_A7
DATA7

TMDS_BYP
105 HDMI_RV8 4 3 P1_A8

3.3V

NC
5V
DATA8 HDMI_RV9 P1_A9
104 2 1
C152 DATA9 PR2

TMDS_CK_N1
TMDS_CK_N2
TMDS_CK_P1
TMDS_CK_P2
TMDS_D2_N1
TMDS_D2_N2

TMDS_D1_N1
TMDS_D1_N2

TMDS_D0_N1
TMDS_D0_N2
TMDS_D2_P1
TMDS_D2_P2

TMDS_D1_P1
TMDS_D1_P2

TMDS_D0_P1
TMDS_D0_P2
P1_B[9..0]

TMDS_GND
TMDS_GND
TMDS_GND
TMDS_GND
TMDS_GND
TMDS_GND
TMDS_GND
TMDS_GND
HDMI_GY0 R87 P1_B0 P1_B[9..0] P.3,4,6
92
DATA10 HDMI_GY1 R89 P1_B1
91
DATA11 HDMI_GY2 P1_B2
90 1 2

GND
GND
DATA12 HDMI_GY3 PR3 P1_B3
89 3 4
DATA13 HDMI_GY4 P1_B4
88 5 6
DATA14 HDMI_GY5 P1_B5
87 7 8
DATA15
35

33

32

30
10
29
12
27
13
26
15
24

34

31
11
28
14
25

36
4

3
86 HDMI_GY6 1 2 P1_B6
DATA16 HDMI_GY7 P1_B7
85 3 4
DATA17 HDMI_GY8 P1_B8
84 5 6
DATA18 HDMI_GY9 P1_B9
83 7 8
DATA19 PR4
P1_C[9..0]
R97 P1_C[9..0] P.3,4,6
1 D2P D2P 80 HDMI_BU0 P1_C0
TMDS_D2P D2N AVDD33 DATA20 HDMI_BU1 R98 P1_C1
2 3 D2N HDMI_DDC_CLK 31 79
GND TMDS_D2N DDCD_SCL DATA21 HDMI_BU2 P1_C2
78 1 2
D1P DATA22 HDMI_BU3 PR5 P1_C3
4 D1P HDMI_DDC_DATA 32 77 3 4
TMDS_D1P D1N R99 R100 R101 R102 DDCD_SDA DATA23 HDMI_BU4 P1_C4
5 6 D1N 76 5 6
GND TMDS_D1N DATA24 HDMI_BU5 P1_C5
75 7 8
D0P DATA25 HDMI_BU6 P1_C6
7 D0P 74 1 2
TMDS_D0P D0N DATA26 HDMI_BU7 P1_C7
8 9 D0N 73 3 4
GND TMDS_D0N DATA27 HDMI_BU8 P1_C8
72 5 6
CLKP DATA28 HDMI_BU9 P1_C9
C 10 CLKP 71 7 8 C
TMDS_CLKP CLKN
DATA29 PR6
11 12 CLKN
GNDTMDS_CLKN
D0N 16
R494 RX0N
13 23 16 D0P 17
CEC CEC_OUT CEC_IN HDMI_CEC RX0P C644
15 22 17 D1N 19
SCL SCL_OUT SCL_IN HDMI_DDC_CLK RX1N
16 21 18 D1P 20
SDA SDA_OUT SDA_IN HDMI_DDC_DATA RX1P
17 19 20 19 D2N 22
GND HPD HPDET_OUT HPDET_IN RX2N HDMI_ODCLK R119 P2_CLK
D2P 23 96 P2_CLK P.3,4
RX2P DATACK
C

R116/NC P5V U12B Q1 25 97 HDMI_DE R122 P1_DATAEN

CLKP RXCKP DE P1_DATAEN P.3,4
18 B R120 26 98 HDMI_HSYNC R124 P1_HSYNC
+5V HDMI_HPD CLKN RXCKN HSOUT P1_HSYNC P.3,4,6
2

99 HDMI_VSYNC R123 P1_VSYNC

D26 VSOUT HDMI_FIELD R125 P1_FIELD P1_VSYNC P.3,4,6
100
E

FIELD/CEC P1_FIELD P.3,4

14
C5
C4
C3
C2
C1
D5
D4
D3
D2
D1
A1
A7
A6
A5
A4
A3
A2
B7
B6
B5
B4
B3
B2
B1

NC
5V_HDMI
VDDP33 120 2 1 I2S_SD_CONN
AUSD I2S_SD_CONN
3

CON1 121 4 3 I2S_SCK_CONN

C153 AUSCK I2S_WS_CONN
I2S_SCK_CONN
122 6 5 I2S_WS_CONN
R127 R128 R132 R135 AUWS HDMI_MCLK_CONN
123 8 7 HDMI_MCLK_CONN
R131 AUMUTE PR7
AVDD33 28 124
REXT MCKO
8

U13 125
VCC SPDIFO/CEC HDMI_MUTE
VCC

HDMI_MUTE
6 7 HDMI_INT 68
SCL VCLK HDMI_INT INT
5 R134 2 4 SCL1 65 R621
SDA EDIDWP SCL1 SCL HDMI_CEC
R130 3 2 SDA1 66 64
GND

WP 2 SDA1 SDA A0
1 63
R137/NC 1 R139 R140 R141 GND HWRESET
61
R138 U14 XOUT R142
4

62 3 C154

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND
XIN

Y1

102

115

127

129
13

18

24

29

34

40

58

59

82

94
2

7
C155

5V_HDMI

B B
R?
U?

O I HOLD_BOOT_LOADER
P5V

U16
G

VDDP33
R526 C162 1 L17
VIN
5
VOUT
2
GND C158 C163
4
BP +
3
EN C157

R631 VDDP33

R143
5

P5V
VCC
U17
R144 2 4
AFE_RSTZ
AVDD33
R525 C165 1 L19 R145
VIN GND
5
VOUT C168 U18
2
GND
3

4 C167 +
BP VMPLL
3
EN L20
C166

R632 C169
+

A P5V U15 VDDC18 A

L16
I O
VI VO C161
4
C156 VI C160 +
GND

AVDD18
A

L18

C164
+

5 4 3 2 1
 8 7 6 5 4 3 2 1

U19A
D D
P1_A[9..0]
P.3 P1_A[9..0]
P1_A9 AF13
P1_A8 P1_A_9
AF12
P1_A7 P1_A_8
AE12
P1_A6 P1_A_7
AD12
P1_A5 P1_A_6
AC12
P1_A4 P1_A_5
AF11
P1_A3 P1_A_4
AE11
P1_A2 P1_A_3
AD11
P1_A1 P1_A_2
AC11
P1_A0 P1_A_1
AF10
P1_A_0
P1_B[9..0]
P.3 P1_B[9..0]
P1_B9 AF15
P1_B8 P1_B_9
AD15
P1_B7 P1_B_8
AE15
P1_B6 P1_B_7
AC14
P1_B5 P1_B_6
AD14
P1_B4 P1_B_5
AE14
P1_B3 P1_B_4
AF14
P1_B2 P1_B_3
AC13
P1_B1 P1_B_2
AD13
P1_B0 P1_B_1
AE13
P1_B_0
P1_C[9..0]
P.3 P1_C[9..0]
C P1_C9 AD18 C
P1_C8 P1_C_9
AC17
P1_C7 P1_C_8
AD17
P1_C6 P1_C_7
AE17
P1_C5 P1_C_6
AF17
P1_C4 P1_C_5
AC16
P1_C3 P1_C_4
AD16
P1_C2 P1_C_3
AE16
P1_C1 P1_C_2
AF16
P1_C0 P1_C_1
AC15
P1_C_0

P1_FIELD AC9
P.3 P1_FIELD P1_FIELD
P1_VSYNC AC10
P.3 P1_VSYNC P1_VSYNC
P1_HSYNC AD9
P.3 P1_HSYNC P1_HSYNC
P1_DATEN AF8
P.3 P1_DATAEN P1_DATEN
P1_CLK AE10
P.3 P1_CLK P1A_CLK
P2_CLK AD10
P.3 P2_CLK P1B_CLK

ALF_VSYNC AD19
P.3 ALF_VSYNC ALF_VSYNC
ALF_HSYNC AC18
P.3 ALF_HSYNC ALF_HSYNC
ALF_CSYNC AF19
P.3 ALF_CSYNC ALF_CSYNC

B B

BT656_D0 AE20
EDID-I2C BT656_D1 GPIO_40
AD20
GPIO_41

BT656 PORT
BT656_D2 AF21
C452 R146 BT656_D3 GPIO_42
AC20
BT656_D4 GPIO_43
AE21
BT656_D5 GPIO_44
AD21
BT656_D6 GPIO_45
AF22
BT656_D7 GPIO_46
AE22
BT656_D8 GPIO_47
AC21
BT656_D9 GPIO_48
AF23
BT656_CLK GPIO_49
AD22
GPIO_50
C450
ASEL
R147
C453 HDMI_INT AE19 AF20 R149 EXT_CLK EXT_CLK P.3
P.3 HDMI_INT AFE_IRQ AFE_CLK
AC19 AFE_RSTZ AFE_RSTZ P.3,4
AFE_ARSTZ
2
4
6
8

2
4
6
8

R148
1
3
5
7

1
3
5
7

A PR14 PR15 A

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

U19B P3P3V

SSP0_CLK_DMD 119 120 L21

A10 DDBP1 SSP0_CLK_DMD
DDB_P_7 SSP0_TXD_DMD 117 118 DMD_P3P3V_A
B10 DDBN1 SSP0_TXD_DMD
DDB_N_7 115 116
C11 DDBP3
DDB_P_6 SSP0_RXD SSP0_CSZ1_DMD 113 114 + C170 C171
D11 DDBN3 SSP0_CSZ1_DMD
DDB_N_6 111 112
A11 DDBP5
DDB_P_5 DDAP11 109 110
B11 DDBN5 DDAP11
DDB_N_5 DDAN11 107 108 DDBP5
D12 DDBP7 DDAN11 DDBP5
DDB_P_4 105 106 DDBN5
E12 DDBN7 DDBN5
DDB_N_4 103 104
D B13 DDBP9 D
DDB_P_3 DDAP15 101 102
C13 DDBN9 DDAP15
DDB_N_3 DDAN15 99 100 DDBP1
C14 DDBP11 DDAN15 DDBP1
DDB_P_2 97 98 DDBN1
D14 DDBN11 DDBN1
DDB_N_2 95 96
A14 DDBP13
DDB_P_1 DDAP13 93 94
B14 DDBN13 DDAP13
DDB_N_1 DDAN13 91 92 DDBP3
B15 DDBP15 DDAN13 DDBP3
DDB_P_0 89 90 DDBN3
C15 DDBN15 DDBN3
DDB_N_0 87 88
DDAP9 85 86
DDAP9 83 84
DDAN9 SCTRLBP
DDAN9 81 82 SCTRLBP
C9 DDAP1 SCTRLBN
DDA_P_7 79 80 SCTRLBN
D9 DDAN1
DDA_N_7 DCLKAP 77 78
A8 DDAP3 DCLKAP
DDA_P_6 DCLKAN 75 76 DCLKBP
B8 DDAN3 DCLKAN DCLKBP
DDA_N_6 73 74 DCLKBN
C8 DDAP5 DCLKBN
DDA_P_5 71 72
D8 DDAN5
DDA_N_5 SCTRLAP 69 70
A7 DDAP7 SCTRLAP
DDA_P_4 SCTRLAN 67 68 DDBP9
B7 DDAN7 SCTRLAN DDBP9
DDA_N_4 65 66 DDBN9
C6 DDAP9 DDBN9
DDA_P_3 63 64
D6 DDAN9
DDA_N_3 DDAP1 61 62
A5 DDAP11 DDAP1
DDA_P_2 DDAN1 59 60 DDBP13
B5 DDAN11 DDAN1 DDBP13
DDA_N_2 57 58 DDBN13
C5 DDAP13 DDBN13
DDA_P_1 55 56
D5 DDAN13
DDA_N_1 DDAP3 53 54
A4 DDAP15 DDAP3
DDA_P_0 DDAN3 51 52 DDBP7
B4 DDAN15 DDAN3 DDBP7
DDA_N_0 49 50 DDBN7
47 48 DDBN7
C DDBP15 45 46 C
DDBP15 43 44
B12 DCLKBP DDBN15 MBRST9
DCKB_P DDBN15 41 42 MBRST9
C12 DCLKBN MBRST11
DCKB_N 39 40 MBRST11
MBRST15
37 38 MBRST15
C7 DCLKAP DDAP7 MBRST12
DCKA_P DDAP7 35 36 MBRST12
D7 DCLKAN DDAN7 MBRST14
DCKA_N DDAN7 33 34 MBRST14
MBRST8
31 32 MBRST8
D13 SCTRLBP MBRST10
SCB_P 29 30 MBRST10
E13 SCTRLBN DDBP11 MBRST13
SCB_N DDBP11 27 28 MBRST13
DDBN11 MBRST0
DDBN11 25 26 MBRST0
A6 SCTRLAP MBRST7
SCA_P 23 24 MBRST7
B6 SCTRLAN MBRST5
SCA_N 21 22 MBRST5
DDAP5 MBRST6
DDAP5 19 20 MBRST6
DDAN5 MBRST1
DDAN5 17 18 MBRST1
MBRST3
P3P3V 15 16 MBRST3
MBRST4
13 14 MBRST4
EXT_ARSTZ MBRST2
EXT_ARSTZ 11 12 MBRST2
L22 9 10 VCC2
DMD_P3P3V_B 7 8
5 6 C174
3 4
DMD Interconnect Options
C172 C173 +
1 2
J3

The DDP243x to DMD LVDS interconnection can be configured in 1 of 8 different ways to accomadate routing:
B B
DDP243x DMD

A to A, LSB to LSB DDA_(0,1,2,3,4,5,6,7) to D_A_(1,3,5,7,9,11,13,15)

B to B, LSB to LSB DDB_(0,1,2,3,4,5,6,7) to D_B_(1,3,5,7,9,11,13,15)

A to A, LSB to LSB DDA_(0,1,2,3,4,5,6,7) to D_A_(1,3,5,7,9,11,13,15) The following signals are

B to B, MSB to LSB DDB_(7,6,5,4,3,2,1,0) to D_B_(1,3,5,7,9,11,13,15) DMD_DAD_INTZ connected for future
DMD_DAD_INTZ P.7
DMD support:
DMD_DAD_STRB
A to A, MSB to LSB DDA_(7,6,5,4,3,2,1,0) to D_A_(1,3,5,7,9,11,13,15) DMD_DAD_STRB P.7 DMD_DAD_INTZ
B to B, LSB to LSB DDB_(0,1,2,3,4,5,6,7) to D_B_(1,3,5,7,9,11,13,15) DMD_DAD_MODE_1 DMD_DAD_STRB
DMD_DAD_MODE_1 DMD_DAD_MODE_1
DMD_DAD_MODE_0
DMD_DAD_MODE_0 DMD_DAD_MODE_0
A to A, MSB to LSB DDA_(7,6,5,4,3,2,1,0) to D_A_(1,3,5,7,9,11,13,15) DMD_DAD_SEL_1
B to B, MSB to LSB DDB_(7,6,5,4,3,2,1,0) to D_B_(1,3,5,7,9,11,13,15) DMD_DAD_SEL_1 DMD_DAD_SEL_0
DMD_DAD_SEL_1 DMD_DAD_ADDR_3
DMD_DAD_SEL_0
DMD_DAD_SEL_0 DMD_DAD_ADDR_2
B to A, LSB to LSB DDB_(0,1,2,3,4,5,6,7) to D_A_(1,3,5,7,9,11,13,15) DMD_DAD_ADDR_1
DMD_DAD_ADDR_3
A to B, LSB to LSB DDA_(0,1,2,3,4,5,6,7) to D_B_(1,3,5,7,9,11,13,15) DMD_DAD_ADDR_3 DMD_DAD_ADDR_0
DMD_DAD_ADDR_2 DMD_DAD_OEZ
DMD_DAD_ADDR_2
DMD_DAD_ADDR_1 DMD_FUS_EN
DMD_DAD_ADDR_1
DMD_DAD_ADDR_0
B to A, LSB to LSB DDB_(0,1,2,3,4,5,6,7) to D_A_(1,3,5,7,9,11,13,15) DMD_DAD_ADDR_0
A to B, MSB to LSB DDA_(7,6,5,4,3,2,1,0) to D_B_(1,3,5,7,9,11,13,15) DMD_DAD_OEZ
DMD_DAD_OEZ
SSP0_CSZ3_PB The following signals are
B to A, MSB to LSB DDB_(7,6,5,4,3,2,1,0) to D_A_(1,3,5,7,9,11,13,15) SSP0_CSZ3_PB connected for future
A to B, LSB to LSB DDA_(0,1,2,3,4,5,6,7) to D_B_(1,3,5,7,9,11,13,15) TP7_PB development:
A TP7_PB A

SSP0_CSZ3_PB
B to A, MSB to LSB DDB_(7,6,5,4,3,2,1,0) to D_A_(1,3,5,7,9,11,13,15) TP7_PB
A to B, MSB to LSB DDA_(7,6,5,4,3,2,1,0) to D_B_(1,3,5,7,9,11,13,15)

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

P3P3V
U20

R150 R151

P.8,15 SSP0_CLK SSP0_CLK 56 79 MBRST15

SSP0_TXD SCPCK OUT15 MBRST14 MBRST15 P.6
P.8,15 SSP0_TXD 57 77
SSP0_RXD SCPDI OUT14 MBRST13 MBRST14 P.6
P.6,8,15 SSP0_RXD 42 74
SSP0_CSZ0 SCPDO OUT13 MBRST12 MBRST13 P.6
P.15 SSP0_CSZ0 58 72
SCPEN/ OUT12 MBRST11 MBRST12 P.6
D 69 D
OUT11 MBRST10 MBRST11 P.6
67
U19C DAD_INTZ OUT10 MBRST9 MBRST10 P.6
43 64
DAD_INTZ IRQZ OUT09 MBRST8 MBRST9 P.6
62
DAD_STRB OUT08 MBRST7 MBRST8 P.6
DAD_STRB 15 39
DAD_INTZ STROBE OUT07 MBRST6 MBRST7 P.6
N4 DAD_INTZ 37
DADINTZ OUT06 MBRST5 MBRST6 P.6
34
DAD_STRB DAD_MODE_1 OUT05 MBRST4 MBRST5 P.6
M4 DAD_STRB DAD_MODE_1 2 32
DADSTRB DAD_MODE_0 MODE1 OUT04 MBRST3 MBRST4 P.6
DAD_MODE_0 3 29
MODE0 OUT03 MBRST2 MBRST3 P.6
27
DAD_MODE_1 OUT02 MBRST1 MBRST2 P.6
M3 DAD_MODE_1 24
DADMODE_1 DAD_MODE_0 DAD_SEL_1 OUT01 MBRST0 MBRST1 P.6
M2 DAD_MODE_0 DAD_SEL_1 4 22
DADMODE_0 DAD_SEL_0 SEL1 OUT00 MBRST0 P.6
DAD_SEL_0 5
SEL0
K3 DAD_SEL_1 DAD_SEL_1
DADSEL_1 DAD_SEL_0 DAD_ADDR_3
K2 DAD_SEL_0 DAD_ADDR_3 16
DADSEL_0 DAD_ADDR_2 A3
DAD_ADDR_2 17
DAD_ADDR_1 A2
DAD_ADDR_1 18
DAD_ADDR_3 DAD_ADDR_0 A1 VCC2
L4 DAD_ADDR_3 DAD_ADDR_0 19
DADADDR_3 DAD_ADDR_2 A0
L3 DAD_ADDR_2
DADADDR_2 DAD_ADDR_1 VCC2
L2 DAD_ADDR_1 49
DADADDR_1 DAD_ADDR_0 DAD_OEZ VOFFSET
L1 DAD_ADDR_0 DAD_OEZ 6 78
DADADDR_0 OEZ VOFFSET_RAIL7

C
73 C175 C176 C177 C178 D27
VOFFSET_RAIL6
68
DAD_OEZ VOFFSET_RAIL5
M1 DAD_OEZ 45 63
DADOEZ DEV_ID1 VOFFSET_RAIL4
44 38
DEV_ID0 VOFFSET_RAIL3
33
VOFFSET_RAIL2

A
P.4,6,8 EXT_ARSTZ EXT_ARSTZ 59 28
RESETZ VOFFSET_RAIL1
23
C VOFFSET_RAIL0 VCC2 C
54
VCC/NC

47 V5REG
V5REG
52
P12V V12_SWL-NC C179 C180
51
V12_SWL-NC1
81
VRESET_RAIL7 VRST
76 VRST
VRESET_RAIL7
50 75
V12_3 VRESET_RAIL6
48 66
C181 C182 V12_2 VRESET_RAIL5
11 65
V12_1 VRESET_RAIL4
36
VRESET_RAIL3
35
VBIAS VRESET_RAIL2
VBIAS 80 26
VBIAS_RAIL7 VRESET_RAIL1
71 25
VBIAS_RAIL6 VRESET_RAIL0 VRST
70 13 VRST
VBIAS_RAIL5 VRESET
61
VBIAS_RAIL4

A
40 D28 C183 C184 C185 C186
VBIAS_RAIL3
31
VBIAS_RAIL2
30
VBIAS_RAIL1
21
VBIAS VBIAS_RAIL0
9
VBIAS VBIAS

C
12 VRST_SWL
VRESET_SWL

C
C187 C188 C189 C190
D29
L23

1
GND_1

A
B B
DAD_VBIAS_SWL 8 7
VBIAS_SWL GND_7
14
L24 GND_14
20
GND_20
41
GND_41
46
GND_46
10 53
VBIAS_LHI GND_53
55
GND_55
60
GND_60
VBIAS_LHI

C191 C192

A A

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

D D

U19D

C193 XTAL_IN A16

MOSC R153 OCLKA
N1
X1 R152 OCLKA C451 OCLKA P.10
3

P3P3V

C194 R154 XTAL_OUT A17

MOSCN
PMDGOOD1
U21C
R155 R156 R157 R158

R?

R?
SSP0_CSZ2 4 35 PMDGOOD
P.15 SSP0_CSZ2 CSZ PWRGOOD PWRGOOD P.14,16 PMD_INTZ AB25 N3 CW_PWM CW_PWM P.10,11
PMD_INTZ PMD_INTZ CW_PWM
SSP0_CLK 2 34 POSENSE
P.7,15 SSP0_CLK CLK POSENSE POSENSE P.16
SSP0_RXD 1 48 MTR_ARSTZ
P.6,7,15 SSP0_RXD DOUT RESETZ MTR_ARSTZ
C SSP0_TXD 3 36 PMD_INTZ C
P.7,15 SSP0_TXD DIN PMDINTZ PMD_INTZ
P.11 CWINDEX CWINDEX N2 P3P3V
CW_INDEX

R159

40 FAN1_SW
F1SW FAN1_SW P.11
7 39 FAN2_SW
GND F2SW FAN2_SW P.11 PWRGOOD EXT_ARSTZ
19 P.14,16 PWRGOOD AA23 AC25 EXT_ARSTZ P.4,6,7
GND FAN3_SW POSENSE R160 PWRGOOD EXT_ARSTZ MTR_ARSTZ
44 38 P.16 POSENSE AA24 AB24 MTR_ARSTZ
GND F3SW FAN3_SW P.11 POSENSE MTR_ARSTZ
C195

B B

A A

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

U21B

P12V P12V

D 22 27 D
VBB1 ISENK
37
VBB2 R162
42 28
VBB4 ISEN

D
D
C196 C197 C198 C199 PMD1K_VCP 21 P1P2V
VCP

ADJUSTABLE SW REGULATOR
Q2
C200 PMD1K_CP1 18 26 PMD1K_GD_CORE G
CP1 GDC
PMD1K_CP2 17 25 SWNODE_CORE L25 A C
CP2 LXC

S
C
D30
C201 PMD1K_VREG 20 D31 C202
VREG
47
TRIM

A
A1P8V R164

30
R165 PMD1K_FB_LIN1 /FBC
31
FB1

LINEAR REG
ADJUSTABLE
A1P8V_SENSE 29
VLIN1

C203

R167
C C

R161

P2P5V
D
D

Q3

P1P8V

CONTROL
LINEAR REG
G 33
GD2
32
FB2
S

C204
B B
R169

P2P5V

46 PMD1K_FB_P2P5V
V2P5

2.5V SW REG
R170 41 SWNODE_P2P5V L26
LX25

C
C205
D32

A
P5V P3P3V
5V SW REG

PMD1K_FB_P5V 24 45 PMD1K_FB_P3P3V
V5 V3P3
3.3V SW REG

L27 SWNODE_P5V 23 43 SWNODE_P3P3V L28

LX5 LX33
C

C
C206
D33 D34 C207

A A
A

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

P12V P12V
D DN1 DN2 D

1 2 1 2

3
P12V P12V
DN3 DN4
P3P3V
1 2 1 2

3
R174

U21A

OCLKA 6 12 OUTA R175 CWY1

P.8 OCLKA OSC OUTA
C J4 C
P12V
15 OUTB R176 CWY2 4
OUTB
9 3
VBB3
2
PMD1K_FB_MOT 11 16 OUTC R177 CWY3 1
VM OUTC
L29 SWNODE_MOT 10
VMSW CWCTR
13
CTAP
C

C208 D35

5 REAL_CWTACH
TACH
8
GMIN PMD1K_SENSE_MOT
14
SENSE
A

R179 R180 R181

R178

P.8,11 CW_PWM CW_PWM R182 PMD1K_GM_IN OUTC_SNUB OUTB_SNUB OUTA_SNUB

C209
C210 C211 C212

B B

P3P3V

P3P3V
C394
R422 R423 R424

J27
8

U57A
3
1 +
1 CWINDEX
2
2
3 -
4 C395
4

C396 R425

R426

A A

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

L?

D 1 C A C A FAN1_SW D
FAN1_SW P.8
2 P3P3V

C
3 L43 D? L30
L44 P3P3V
J5 L48 D39
FAN 1

A
SDA1 1 8
C213 SDA VDD
SCL1 2 7
D36 SCL A0
3 6
INT A1 C430
4 5
FAN1_LOCKD GND A2
FAN1_LOCKD P.12
C

U74
R183
A

D48
L?
1 C A C A FAN2_SW
FAN2_SW P.8
2

C
3 L46 D? L31
L49 P3P3V
J6 L45 D?
FAN 2

A
C C214 C
D37

FAN2_LOCKD FAN2_LOCKD P.12

C

R184
L68
A

D46 L?

1 2 1 2 1 2 1 FAN3_SW
FAN3_SW P.8
2

C
3 FB51 L32
3

L50 P3P3V
D13 D21 D22
J7 L42
FAN 3 R186

A
C215
D38

FAN3_LOCKD FAN3_LOCKD P.12

C

R185
B B
A

D45

P3P3V

P12V

C?
<IREF>
FAN4_LOCKD
2

R? R?
L?
VIN

1 1 4 FAN4_PWM_IN
L? VO VSET
2
3 5 3 R?
P3P3V
NC/G VEN
C

L? 7
NC/G
J8 8 R?
GND

NC/G
PAD

FAN4 +
C

G1
A

注意元件散熱的設計
D? C? C?
A A
A

U?
D?

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

P3P3V P3P3V P3P3V

HOLD IN BOOT LOADER
U19E R201 Installed Hold in Boot Loader Projector Settings Memory
R197 R200 Un-Installed Normal Operation I2C Address set to 0xA8
C431

IR0 V24 F2 BOOT_LOADER

IR0 IR1 GPIO_28 GPIO_39 BOOT_LOADER
V23 U23
IR1 GPIO_29
P3P3V 1 8
SCL0 F3 AC26 USB_ENZ 2 A0 VCC 7
D USB_ENZ P.15 D
SCL0 SDA0 F4 IIC0_SCL GPIO_38 3 A1 WP 6 SCL0
SDA0 IIC0_SDA A2 SCL SDA0 SCL0 P.4,9,12,13
N25 R202 4 5
GPIO_4 GND SDA SDA0 P.4,9,12,13
R198 R203 R498 GPIO_02 M24
R523 GPIO_03 M23 GPIO_02
BF/OE GPIO_03
N22 R205
GPIO_7

SCL1 R24
SCL1 SDA1 R23 GPIO_14
SDA1 GPIO_15 N24 R207 P3P3V
HDMI_HPD R206 GPIO_16 GPIO_5
T26
P.3 HDMI_HPD GPIO_16

R499
ENTER
N23 R208
PIC_TX R501 GPIO_6
T24
P.21 PIC_TX GPIO_18 SOURCE P.13
U75
1 8
KEYPD_PWR_DDP 2 NC VDD 7 SDA1
KEYPD_PWR_DDP P.13 COM SDA SCL1 SDA1 P.4,9,12,13
T23 R210 3 6
LED_SENSE_PULSE GPIO_20 GPIO_19 KEYPD_DOWN GND SCL SCL1 P.4,9,12,13
R209 D2 4 5
P.13 LED_SENSE_PULSE GPIO_20 KEYPD_DOWN P.13 TEST VDD2
DO NOT INSTALL KEYPD_LEFT
KEYPD_LEFT P.13
C223 C432
U26 R211 KEYPD_RIGHT
LAMP_UART_TXD GPIO_21 KEYPD_RIGHT P.13
M26
LAMP_UART_TXD LAMP_UART_RXD M25 GPIO_0 KEYPD_MENU_DDP
LAMP_UART_RXD GPIO_1 KEYPD_MENU_DDP
KEYPD_UP
ADC_COAST KEYPD_UP P.13
AE8 U25 R212
P.3 ADC_COAST ADC_CLAMP GPIO_51 GPIO_22
AD8
P.3 ADC_CLAMP GPIO_52

PIC_RX R? T25 U24 R215

PIC_RX GPIO17 GPIO_23

C C
U23 R218
GPIO_24

V26 R220 KEYPD_LED_LAMP

GPIO_25 KEYPD_LED_LAMP P.13
D3
LMPSTAT LMPSTAT
V25 R221 KEYPD_LED_HOT
GPIO_26 KEYPD_LED_HOT P.13

P24 R224
GPIO_10 SCART/CMP

D1 P23 R227
LMPCTRL LMPCTRL GPIO_11 SCARTB/A
R?
STB_LED2
P2
auto已用在LED處
GPIO_27

R26 R502
GPIO_12 R25 R503 EDID_SEL
R? GPIO_13 PWR_CTRL P.18

P25 PWR_OFF_RDY R235

GPIO_09 PWR_OFF_RDY P.8
W25 PWR_ON_RDY
GPIO_31 PWR_ON_RDY P.8
P3P3V P3P3V P3P3V
AA25 R504
GPIO_37 MUTE
C? R214 W26 FAN4_LOCKD
GPIO_30 FAN4_LOCKD
R213
W24 FAN3_LOCKD
GPIO_32 FAN2_LOCKD FAN3_LOCKD P.11
5 W23 FAN2_LOCKD P.11
B R219 GPIO_33 FAN1_LOCKD B
R? Y26 FAN1_LOCKD P.11
FLAG GPIO_34
1 6
C? LAMP_UART_RXD R505
U?A P26
GPIO_08 FAN4_PWM_IN
2

<Part Reference>

P3P3V

C224
U26
5

J10
R222
P3P3V 2 4
1 GND LMPSTAT
2 POWER C226 P3P3V P3P3V
3 SCI C225
4
3
1

UART_LAMP
5 R223 C433
5

U76
VCC
R226
4 2
LMPCTRL

GND
P3P3V P3P3V
1

C227

R230
5

U29
A A
R232 R234
4 2
LAMP_UART_TXD

R233
1
3

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

P3P3V

P3P3V NOTE:
TRSTZ should be pulled down
R237
for production designs.
MANUAL RESET JUMPER
U30

5
P3P3V INSTALLED HOLD IN RESET
NOT INSTALLED NORMAL OPERATION (DEFAULT)
2 4 TRSTZ TRSTZ

D D

3
1
MULTI-ICE P3P3V
JTAG I/F R239 R240 R241 R242 R243 R244 R245

P3P3V R246 C229

J12 U?

5
TRSTZ_IN
R?
2 1 TRSTZ_IN TDI TDI 1 PMDGOOD1
TDI 4 3 TMS2 TMS2 TMS2 4
TCK 6 5 RTCK TCK TCK 2 SOURCE1
TDO2 8 7 ICE_RSTZ RTCK RTCK
10 9 TDO2
TDO2

3
ICE_RSTZ P3P3V

ICE_RSTZ 5 U32
P3P3V

2 4 PWRGOOD PWRGOOD P.8,16

C230
R730

3 1

JTAG BOUNDARY SCAN P3P3V

C C
J13
1 TRSTZ TRSTZ
2 TDI TDI
3 TMS1 TMS1
4 TDO1 DO NOT INSTALL
TDO1 (5 PLACES)
5 TCK TCK R248 R249 R250
6

R251 R253 R254

U19F

RN5
TDO2 AC24 H4 TRACEPKT7R TRACEPKT7R 1 16 TRACEPKT7
TDO2 TDO1 TDO2 TSTPT_7 TRACEPKT6R TRACEPKT6R TRACEPKT6
AD25 H3 2 15
TMS2TDO1 TDO1 TSTPT_6 TRACEPKT5R TRACEPKT5R TRACEPKT5
TMS2 AF24 H2 3 14
TMS1 TMS2 TSTPT_5 TRACEPKT4R TRACEPKT4R TRACEPKT4
TMS1 AE23 H1 4 13
TDI TMS1 TSTPT_4 TRACEPKT3R TRACEPKT3R TRACEPKT3
TDI AC22 J4 5 12
TCK TDI TSTPT_3 TRACEPKT2R TRACEPKT1R TRACEPKT1
TCK AD23 J3 6 11
TRSTZ TCK TSTPT_2 TRACEPKT1R TRACEPKT2R TRACEPKT2
TRSTZ AE24 J2 7 10
TRSTZ TSTPT_1 TRACEPKT0R TRACEPKT0R TRACEPKT0
K4 8 9
TSTPT_0

R519 16 1
B B
15 2
14 3
G4 PIPESTAT2R PIPESTAT2R 13 4 PIPESTAT2 PIPESTAT2
ETM_PIPESTAT_2 PIPESTAT1R PIPESTAT1R PIPESTAT1
G3 12 5 PIPESTAT1
ETM_PIPESTAT_1 PIPESTAT0R TRACESYNCR TRACESYNC
G2 11 6 TRACESYNC
P3P3V P1P8V ETM_PIPESTAT_0 TRACESYNCR PIPESTAT0R PIPESTAT0
F1 10 7 PIPESTAT0
ETM_TRACESYNC TRACECLKR TRACECLKR TRACECLK
G1 9 8 TRACECLK
ETM_TRACECLK RTCKR
AB26
RTCK RN6
R? R257

R258 RTCK RTCK

ICTSENZ_PU B3 P1 SEQ_SYNC
ICTSENZ SEQ_SYNC

R259

C2 AB14
HW_TEST_EN VPGM

A A

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

D D

C C

P3P3V

SSP0_CLK P.7,8

SSP0_TXD P.7,8
U19G R260 R261 R262 R263

R3 SSP0_CLK R264 SSP0_CLK_DMD SSP0_CLK_DMD P.6

SSP0_CLK
R2 SSP0_TXD R265 SSP0_TXD_DMD SSP0_TXD_DMD P.6
SSP0_TXD
R4 SSP0_RXD
SSP0_RXD SSP0_RXD P.6,7,8

P3 SSP0_CSZ2 SSP0_CSZ2 P.8

SSP0_CSZ_2 SSP0_CSZ1 R266 SSP0_CSZ1_DMD
P4 SSP0_CSZ1_DMD P.6
B
P3P3V SSP0_CSZ_1 SSP0_CSZ0 B
R1 SSP0_CSZ0 P.7
P3P3V SSP0_CSZ_0

C232
5

U34

R268 2 4 Synchronous Serial Port

R267 Chip Select Assignments
3
1

R269 DAD CS0

USB_ENZ UART0_TXD Y25
USB_ENZ P.12 UART0_TXD UART0_TXD
UART0_RXD UART0_RXD AA26 DMD CS1
UART0_RXD
Y23
R270 UART0_CTSZ PMD CS2
Y24
J16 UART0_RTSZ

1 R271
2 USB_DAT_N USB_DAT_NS E3
USB_DAT_P USB_DAT_PS USB_DAT_N
3 E2
USB_DAT_P
4
R272
U35

1 6
NC1 A
2 5
GND1 GND2
A 3 4 A
NC3 B

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

PM_DAT_[15..0]
PM_DAT_[15..0] P.3
U19H PM_ADR_[22..0]
PM_ADR_[20..0] P.3

R273 PM_ADR_22
T1 PM_DAT_15 R274 PM_ADR_21
PM_DATA_15 T2 PM_DAT_14
PM_DATA_14 PM_DAT_13
T3
PM_DATA_13 PM_DAT_12 P3P3V R275 Pin13_U88
T4
PM_DATA_12 PM_DAT_11 P3P3V
U2
PM_DATA_11 U3 PM_DAT_10 L64
D D
PM_DATA_10 U4 PM_DAT_9 1 2
PM_DATA_9 V2 PM_DAT_8 C233 C234
PM_DATA_8

1
V3 PM_DAT_7 C442 C445 C443 C444
PM_DATA_7 W1 PM_DAT_6
PM_DATA_6 V4 PM_DAT_5
PM_DATA_5

2
W2 PM_DAT_4
PM_DATA_4 W4 PM_DAT_3 U88

37
PM_DATA_3 PM_DAT_2
Y1
PM_DATA_2 Y2 PM_DAT_1 PM_ADR_[20..0]
PM_ADR_[20..0] P.3

VCC
PM_DATA_1 W3 PM_DAT_0
PM_DATA_0 P3P3V 25 PM_ADR_0
U? P3P3V A0 24 PM_ADR_1
PM_DAT_15 A1 PM_ADR_2
45 23
PM_DAT_14 43 DQ15/A-1 A2 22 PM_ADR_3
D6 R? PM_DAT_13 41 DQ14 A3 21 PM_ADR_4
AB2 PM_ADR_22 E1 VCC PM_DAT_12 39 DQ13 A4 20 PM_ADR_5
GPIO_36 AA3 PM_ADR_21 VCC PM_DAT_11 36 DQ12 A5 19 PM_ADR_6
GPIO_35 PM_ADR_20 PM_ADR_20 PM_DAT_10 DQ11 A6 PM_ADR_7
AB3 H6 34 18
PM_ADDR_20 AC1 PM_ADR_19 PM_ADR_19 G2 A20 A6 0402 PM_DAT_9 32 DQ10 A7 8 PM_ADR_8
PM_ADDR_19 AC3 PM_ADR_18 PM_ADR_18 H1 A19 ZZ# PM_DAT_8 30 DQ9 A8 7 PM_ADR_9

PM_DAT_[15..0]
PM_ADDR_18 AC2 PM_ADR_17 PM_ADR_17 D3 A18 PM_DAT_7 44 DQ8 A9 6 PM_ADR_10
PM_ADDR_17 AD2 PM_ADR_16 PM_ADR_16 E4 A17 PM_DAT_6 42 DQ7 A10 5 PM_ADR_11
PM_ADDR_16 PM_ADR_15 PM_ADR_15 A16 PM_DAT_15 PM_DAT_5 DQ6 A11 PM_ADR_12
AF3 F4 G1 40 4
PM_ADDR_15 AE3 PM_ADR_14 PM_ADR_14 F3 A15 DQ_15 F1 PM_DAT_14 PM_DAT_4 38 DQ5 A12 3 PM_ADR_13
PM_ADDR_14 AF4 PM_ADR_13 PM_ADR_13 G4 A14 DQ_14 F2 PM_DAT_13 PM_DAT_3 35 DQ4 A13 2 PM_ADR_14
PM_ADDR_13 AE4 PM_ADR_12 PM_ADR_12 G3 A13 DQ_13 E2 PM_DAT_12 PM_DAT_2 33 DQ3 A14 1 PM_ADR_15
PM_ADDR_12 AD4 PM_ADR_11 PM_ADR_11 H5 A12 DQ_12 D2 PM_DAT_11 PM_DAT_1 31 DQ2 A15 48 PM_ADR_16
PM_ADDR_11 PM_ADR_10 PM_ADR_10 A11 DQ_11 PM_DAT_10 PM_DAT_0 DQ1 A16 PM_ADR_17
AC5 H4 C2 29 17
PM_ADDR_10 AD5 PM_ADR_9 PM_ADR_9 H3 A10 DQ_10 C1 PM_DAT_9 DQ0 A17 16 PM_ADR_18
PM_ADDR_9 A9 DQ_9 P.3 PM_DAT_[15..0] A18
AE5 PM_ADR_8 PM_ADR_8 H2 B1 PM_DAT_8 Pin13_U88
R276 9 PM_ADR_19
PM_ADDR_8 AF5 PM_ADR_7 PM_ADR_7 D4 A8 DQ_8 G6 PM_DAT_7 A19 10 PM_ADR_20
PM_ADDR_7 AC6 PM_ADR_6 PM_ADR_6 C4 A7 DQ_7 F6 PM_DAT_6 1 2 13 A20 26 FLASH_CSSZ
PM_ADDR_6 PM_ADR_5 PM_ADR_5 A6 DQ_6 PM_DAT_5 NC /CE PM_OESZ FLASH_CSSZ
AD6 C3 F5 R524
P3P3V 28
PM_ADDR_5 PM_ADR_4 PM_ADR_4 A5 DQ_5 PM_DAT_4 /OE PM_WESZ PM_OESZ
AE6 B4 E5 1 2 14 11
PM_ADDR_4 PM_ADR_3 PM_ADR_3 A4 DQ_4 PM_DAT_3 /WP/ACC /WE PM_WESZ
AF6 B3 D5 R529
PM_ADDR_3 AC7 PM_ADR_2 PM_ADR_2 A5 A3 DQ_3 C6 PM_DAT_2 P3P3V
PM_ADDR_2 AD7 PM_ADR_1 PM_ADR_1 A4 A2 DQ_2 C5 PM_DAT_1 P3P3V R527
PM_ADDR_1 PM_ADR_0 PM_ADR_0 A1 DQ_1 PM_DAT_0
AE7 A3 B6 47 1 2
PM_ADDR_0 A0 DQ_0 1 2 15 /BYTE
R528 /BUSY 12 FLASH_RSTZ
/RESET FLASH_RSTZ
C B2 C

VSS

VSS
UB#

1
AF7 PM_BLS1 R279 PM_BLS1S A1 C441
PM_BLSZ_1 LB#
E3
AC8 PM_BLS0 PM_BLS0S NC
PM_BLSZ_0

46

27
R282
G5 E6
A2 WE# VSS D1
PM_WEZ R283 PM_WESZ OE# VSS
AB1 B5
PM_WEZ CE#
Y3 PM_OEZ PM_OESZ
PM_OEZ R284 FBGA-48

PM_WESZ
AA2 PM_SRAM_CSZ R286 PM_SRAM_CSSZ
PM_CSZ_0 PM_OESZ
AA1 FLASH_CSZ FLASH_CSSZ
PM_CSZ_1 FLASH_CSSZ
R288
Y4 FLASH_CSZ_2 PMCSZ2
PM_CSZ_2 PMCSZ2 P.3
R290

R295
POSENSE FLASH_RSTZ
P.8 POSENSE FLASH_RSTZ

B B

A A

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

DDR2_DQ_[15:0]

U19I P1P8V
Note:
Route DDR2 signals directly
J24 DDR2_DQ_15 between ASIC and DDR2.
DDR2_DQ_15 DDR2_DQ_14 Termination resistors should be Note: C238 C239 C240 C241 C242
L23
DDR2_DQ_14 DDR2_DQ_13 routed from the DDR2 package. Place near DDR2
D H25 D
DDR2_DQ_13 DDR2_DQ_12 Place termination resistors as termination resistors.
J23
DDR2_DQ_12 DDR2_DQ_11 close to DDR2 pins as possible.
J25
DDR2_DQ_11 DDR2_DQ_10
H26
DDR2_DQ_10 DDR2_DQ_9
K23
DDR2_DQ_9 DDR2_DQ_8
J26
DDR2_DQ_8 DDR2_DQ_7 P1P8V
F25
DDR2_DQ_7 DDR2_DQ_6
H24
DDR2_DQ_6 DDR2_DQ_5
D25
DDR2_DQ_5 DDR2_DQ_4
E26
DDR2_DQ_4 DDR2_DQ_3
E25
DDR2_DQ_3 DDR2_DQ_2 R302 R303 R304 R305 R306 R307 R308
D26
DDR2_DQ_2 DDR2_DQ_1
F24
DDR2_DQ_1 DDR2_DQ_0
E24
DDR2_DQ_0 R297 R298 R299 R300 R301 R309
DDR2_ADDR_[12:0] U40A

B18 DDR2_ADDR_12 DDR2_ADDR_12 R2 B9 DDR2_DQ_15

DDR2_ADDRS_12 DDR2_ADDR_11 DDR2_ADDR_11 A12 DQ15 DDR2_DQ_14 P1P8V
B19 P7 B1
DDR2_ADDRS_11 DDR2_ADDR_10 DDR2_ADDR_10 A11 DQ14 DDR2_DQ_13
D18 M2 D9
DDR2_ADDRS_10 DDR2_ADDR_9 DDR2_ADDR_9 A10 DQ13 DDR2_DQ_12 U40B
C18 P3 D1
DDR2_ADDRS_9 DDR2_ADDR_8 DDR2_ADDR_8 A9 DQ12 DDR2_DQ_11
C19 P8 D3
DDR2_ADDRS_8 DDR2_ADDR_7 DDR2_ADDR_7 A8 DQ11 DDR2_DQ_10
D19 P2 D7 G9
DDR2_ADDRS_7 DDR2_ADDR_6 DDR2_ADDR_6 A7 DQ10 DDR2_DQ_9 VDDQ_G9
E19 N7 C2 G7
DDR2_ADDRS_6 DDR2_ADDR_5 DDR2_ADDR_5 A6 DQ9 DDR2_DQ_8 VDDQ_G7
B20 N3 C8 G3
DDR2_ADDRS_5 DDR2_ADDR_4 DDR2_ADDR_4 A5 DQ8 DDR2_DQ_7 VDDQ_G3
C20 N8 F9 G1
DDR2_ADDRS_4 DDR2_ADDR_3 DDR2_ADDR_3 A4 DQ7 DDR2_DQ_6 VDDQ_G1
D20 N2 F1 E9
DDR2_ADDRS_3 DDR2_ADDR_2 DDR2_ADDR_2 A3 DQ6 DDR2_DQ_5 VDDQ_E9
E20 M7 H9 C9
C DDR2_ADDRS_2 DDR2_ADDR_1 DDR2_ADDR_1 A2 DQ5 DDR2_DQ_4 VDDQ_C9 C
A21 M3 H1 C7
DDR2_ADDRS_1 DDR2_ADDR_0 DDR2_ADDR_0 A1 DQ4 DDR2_DQ_3 VDDQ_C7
B21 M8 H3 C3
DDR2_ADDRS_0 A0 DQ3 DDR2_DQ_2 VDDQ_C3
H7 C1
DQ2 DDR2_DQ_1 VDDQ_C1
G2 A9
P1P8V R320 R311 R314 R321 R328 R315 DQ1 DDR2_DQ_0 VDDQ_A9
G8
DQ0
R1
VDD_R1
M9
R312 R324 R310 R325 R313 R326 R327 VDD_M9
J9
VDD_J9
E1
R322 R318 R323 R319 VDD_E1
A1
VDD_A1

R329 R316 DDR2_VREF R317

C21 DDR2_BA_1 L3 J2
DDR2_BA_1 DDR2_BA_0 BA1 VREF
D21 L2
DDR2_BA_0 BA0
B23 DDR2_RASZ K7 R330 C243
DDR2_RASZ DDR2_CASZ RAS
D22 L7
DDR2_CASZ DDR2_CSZ CAS
A22 L8
DDR2_CSZ DDR2_WEZ CS
A24 K3
DDR2_WEZ WE
H8
VSSQ_H8
H2
R334 R336 P1P8V VSSQ_H2
F8
VSSQ_F8
F2
VSSQ_F2
E7
R331 R332 R333 R335 VSSQ_E7
D8
B VSSQ_D8 B
L24 D2
DDR2_OCDRES_R R338 R339 VSSQ_D2
B8
R340 VSSQ_B8
B2
R337 VSSQ_B2
A7
VSSQ_A7
N1
DDR2_CKE VSS_N1
C23 K2 P9
DDR2_CKE DDR2_CK_P CKE VSS_P9
C22 J8 J3
DDR2_CK_P DDR2_CK_N CK_P VSS_J3
B22 K8 E3
DDR2_CK_N CK_N VSS_E3
A3
P1P8V VSS_A3
A2
NC_A2
E2
DDR2_UDQS_P FB6 NC_E2
K26 B7 L1
DDR2_UDQS_P DDR2_UDQS_N UDQS_P NC_L1
K25 A8 J1 R3
DDR2_UDQS_N DDR2_LDQS_P UDQS_N VDDL NC_R3
A18 G25 F7 R7
DDR2_OCDRES_T DDR2_LDQS_P DDR2_LDQS_N LDQS_P NC_R7
G24 E8 J7 R8
DDR2_LDQS_N LDQS_N C244 VSSDL NC_R8
R341

K24 DDR2_UDM B3
DDR2_UDM DDR2_LDM UDM
H23 F3
DDR2_LDM LDM

A23 DDR2_ODT K9
DDR2_ODT ODT

R342 R343
These components are used for DDP2431.
A A
Do not populate components on this page
for DDP2430.

8 7 6 5 4 3 2 1
 A
B
C
D
A1
GND_A1
A9

8
8

GND_A9

P1P2V
P3P3V
P1P8V
P1P8V
P1P2V
A12 E11
GND_A12 VDD12_E11

C321
C299
C283
C268
C245
A20 E17
GND_A20 VDD12_E17
P1P2V

FB8
A26 H5
GND_A26 VDD12_H5

U19J
B1 H22
GND_B1 VDD12_H22
B2 N5
GND_B2 VDD12_N5
B25 P5
GND_B25 VDD12_P5

C300
C284
C269
C246
B26 T22
GND_B26 VDD12_T22
C3 AB7
GND_C3 VDD12_AB7
C4 AB13
GND_C4 VDD12_AB13
C24 AB20
GND_C24 VDD12_AB20
C25
GND_C25

C301
C285
C270
C247
D4
GND_D4
D23
GND_D23
D24
GND_D24
E1 C16
GND_E1 VDD12_PLLD
E4
GND_E4

C302
C286
C271
C248
E5
P1P2V_PLLD

GND_E5
E6
GND_E6
E7
GND_E7
E9
GND_E9

7
7

E15
GND_E15

C303
C287
C272
C249
E18 C17
GND_E18 VDD12_PLLM
E22
GND_E22
E23
P1P2V_PLLM

GND_E23
F5
GND_F5

C322
F22
GND_F22

C304
C288
C273
C250
F23
GND_F23
G5 L5
GND_G5 VDD12_EDRAM_L5
G22 L22
GND_G22 VDD12_EDRAM_L22
G23 M5
GND_G23 VDD12_EDRAM_M5
G26 M22

P1P2V_PLLD
GND_G26 VDD12_EDRAM_M22

C323
C305
C289
C274
C251
J1 U5
GND_J1 VDD12_EDRAM_U5
P1P2V_eDRAM

L11 U22
GND_L11 VDD12_EDRAM_U22
L12 V5
GND_L12 VDD12_EDRAM_V5
L13 V22
GND_L13 VDD12_EDRAM_V22
L14
GND_L14

C306
C290
C275
C252 L15
GND_L15
L16
GND_L16
L26
GND_L26
M11
GND_M11

P1P2V
M12

6
6

GND_M12

C307
C291
C276
C253

M13 A2
GND_M13 VDD18_A2

FB9
M14 A3
GND_M14 VDD18_A3
P1P8V

M15 A13
GND_M15 VDD18_A13
M16 A19
GND_M16 VDD18_A19
N11 A25
GND_N11 VDD18_A25

C308
C292
C277
C254

N12 B9
GND_N12 VDD18_B9
N13 E8
GND_N13 VDD18_E8
N14 E14
GND_N14 VDD18_E14
N15 E21
GND_N15 VDD18_E21
N16 F26
GND_N16 VDD18_F26

C309
C293
C278
C255

P11 J22
GND_P11 VDD18_J22
P12 K22
GND_P12 VDD18_K22
P13 L25
GND_P13 VDD18_L25
P14
GND_P14
P15
GND_P15

C310
C294
C279
C256

P16
GND_P16
R5 B16
GND_R5 VDD18_PLLD
R11
GND_R11
R12
A1P8V_PLLD

GND_R12
R13
GND_R13

5
5

C311
C295
C280

R14
GND_R14
R15
GND_R15
R16
GND_R16
R22 B17
GND_R22 VDD18_PLLM
P1P2V

C324
T5
GND_T5

C312
C296
C281
C257

T11
A1P8V_PLLM

GND_T11
T12
GND_T12
T13
GND_T13
T14
GND_T14
T15 C1

P1P2V_PLLM
GND_T15 VDD33_C1

C325
C313
C297

T16 E16
GND_T16 VDD33_E16
P3P3V

U1 J5
GND_U1 VDD33_J5
AA4 K1
GND_AA4 VDD33_K1
AA5 K5
GND_AA5 VDD33_K5
P1P8V

AA22 N26
GND_AA22 VDD33_N26
C314
C298
C282
C258

AB4 P22
GND_AB4 VDD33_P22
DDR2_VREF

AB5 V1
GND_AB5 VDD33_V1
AB6 W5
GND_AB6 VDD33_W5
AB11 W22
GND_AB11 VDD33_W22
AB12 Y5
GND_AB12 VDD33_Y5
C315

AB17 Y22

4
4

GND_AB17 VDD33_Y22
AB21 AB8
GND_AB21 VDD33_AB8
R?

AB22 AB9
GND_AB22 VDD33_AB9
AB23 AB10
GND_AB23 VDD33_AB10
AC4 AB15
GND_AC4 VDD33_AB15
C316

AC23 AB16
GND_AC23 VDD33_AB16
AD3 AB18
GND_AD3 VDD33_AB18
AD24 AB19
GND_AD24 VDD33_AB19
AE1 AD1
GND_AE1 VDD33_AD1
AE2 AD26
GND_AE2 VDD33_AD26
C317

AE25 AE9
GND_AE25 VDD33_AE9
AE26 AE18
GND_AE26 VDD33_AE18
AF1
GND_AF1
AF2
GND_AF2
AF9
P.12

GND_AF9
AF18
GND_AF18
AF25
GND_AF25
AF26
GND_AF26
P1P2V_eDRAM

C259

C26
DDR2_VREF_C26
A1P8V

D16 B24
GND_D16 DDR2_VREF_B24
C318

D17
PWR_CTRL

GND_D17

3
3

DDR2_VREF

D10
GND_D10
C260

E10
GND_E10
C319

A15 C10
VSS_PLL_A15 VMDIA
D15
VSS_PLL_D15
PWR_CTRL
C261

P12V

FB7
R347

FB10
R345
C262

P1P2V

D
D
R344

B
C263

E C G
2
2

Q8
S
C264

Q7

C326
C320
C265

A1P8V_PLLD

A1P8V_PLLM
R346
P1P2V_eDRAM
C266
C267

1
1

A
B
C
D
 5 4 3 2 1

P3P3V P3P3V

P3P3V_LP
C776
PWR_ON_RDY DDP_STATUS
J36 R531 R? U96
5
VDD R? R350 R351 R352 R353 R530
1 VPP
P3P3V 2 GND PIC_VPP
2 4
3 ICSPDAT SOURCE1
CN3
P3P3V_LP 4 ICSPCLK PROGRAM_DAT
1
R464 5 PROGRAM_CLK 1 L61 KEYPD_PWR
2 POWER_KEY P.12
2 L55 KEYPD_MENU 3 1
3 MEMU_KEY P.12 EDIDWP
C645 3 L58 KEYPD_LEFT
4 KEYPD_LEFT P.12
4 L60 KEYPD_RIGHT
PWR_OFF_RDY 5 KEYPD_RIGHT P.12
STB_CMD 5 L54 KEYPD_UP
6 KEYPD_UP P.12
U41 6 L56 KEYPD_DOWN
7 KEYPD_DOWN P.12
7 L65
1 20 8 SOURCE
D
PIC_IR_1 VDD VSS 8 L66
D
PIC_IR_1 2 9
PIC_IR_0 RA5 9 L33 ENTER
PIC_IR_0 3 19 PROGRAM_DAT 10
THERMAL_STATUS RA4 RA0/ICSPDAT 10 TEMP-LED STB_LED2
THERMAL_STATUS 9 18 PROGRAM_CLK 11
MEMU_KEY
RC7 RA1/ICSPCLK 11 R532 R?
MEMU_KEY 14 4 12 TEMP-LED2
STB_CMD RC2 RA3/-MCLR/VPP 12 LAMP-LED
STB_CMD 15 PIC_VPP 13
DDP_STATUS RC1 13 R533
DDP_STATUS 16 14 LAMP_LED2
RC0 14
pin9与pin17對調 2/10 POWER_KEY POWER_KEY 17
RA2 RB7/TX
10
15
15 STB_LED
12 16 R360
RB5/RX UART1_RXD 16 LED_STB
PS_RELAY 5 R? 17
PS_RELAY RC5 17
HOLD_BOOT_LOADER 6 11 R? 18
HOLD_BOOT_LOADER RC4 RB6/SCL SCL1 18
LED_STB 7 13 19
LED_STB RC3 RB4/SDA SDA1 19
EXT_PSAVE 8 20
EXT_PSAVE RC6 20

P3P3V_LP STBY5 P3P3V_LP STBY5

P3P3V_LP
P3P3V

C? R465 R466 R467 R468

C646 P3P3V_LP P3P3V_LP

R458 5 U43
C649 C650
C? U42 R354 C? U62

5
2 4 KEYPD_PWR_DDP P.12 U? U? R453
POWER_KEY

5
1 4 2 1 4 2
TEMP-LED R? 4 LAMP-LED R? 4
3 1 2 2
KEYPD_LED_HOT P.12 KEYPD_LED_LAMP P.12
BF/OE THERMAL_STATUS DOOR_STATUS

1
3

1
3
3

3
R454 R455

P3P3V_LP R?
P3P3V
C R? R358 R457 C

C793 C647
R459
5 U63 P3P3V_LP

R733需拿掉 P12V
2 4 KEYPD_MENU_DDP P.12 R?
MEMU_KEY

R367 10 STBY12
3 1 RELAY-ON PS_RELAY
BF/OE
R368
9 STBY12 Thermal Protect Door Switch

1
J19
P3P3V C329 C330 C331 + C332 J20
R371 8 GND
PS_ON

A
2
C648
GND THERMAL_STATUS DOOR_STATUS
7

2
R462 5 U64 D43

2
VVCC

C
6 R361
2 4 BOOT_LOADER P.12 C334 C333 R?
HOLD_BOOT_LOADER
5 FAN-ON R363 PS_ON
PS_ON 8 STBY5
P3P3V
3 1 D41
4 LSTBY5 A C STBY5

1
R463

C
+ C336
3 RELAY-ON R365 RELAY-ON D44
RELAY-ON 8

2
2 此處加1電阻

A
1 GND
B B
R?/NC BOOT_LOADER P.12
HOLD_BOOT_LOADER

J17

C337
P3P3V_LP
STBY5 STBY5P STBY5
L62
PIC_IR_0
R374 L40
P3P3V_LP C410 U65
1 P3P3V 1
R375 2 R469 VIN C411
5
C338 C339 3 VOUT
2
4 GND
+ 4
L59 C651 Q9 BP
3
J21 U44 EN
5 S D
R507 C434 R470 C412
THERMAL_STATUS
2 4 IR0 IR0 P.12 R634
G

C407
3 1 STBY5
P3P3V_LP2
BF/OE
L57
PIC_IR_1
R461 C413 U66
1
P3P3V_LP 1 U78 VIN C414
5
R378 2 VOUT
2
C408 C409 3 P3P3V GND
EXT_PSAVE I O 4
4 BP
+ 3
L63 EN
J35 C652 R471 C415
EXT_PSAVE
G

5 U45
A R633 A

2 4 IR1 IR1 P.12

3 1

BF/OE
1

H1 H2 H3 H4 H5 H6 H7

5 4 3 2 1
 5 4 3 2 1

CRYSTAL FOR SCHEDULER P3P3V_LP

VCC_P3P3
VCC_33
P3P3V_LP2 VPHY
R766
VCC_P3P3
AD? C FB607
P 金電容 TPIN-
0603 C?
AD79 C R615
RTC_CLKI M

Y3 RTC_CLKI R? EXT_RTC_CLKI
RTC_CLKO RTC_CLKO R? EXT_RTC_CLKO CN6
4 1
RTC_CLKI R? MCU_RTC_CLKI VCC_33 1.此處增加VCC_33(由P3P3V_LP)和R622 2.增加接地 R623 16 12
CGND LG+ LEDA
RTC_CLKO R? MCU_RTC_CLKO C653 VPHY C? 15 11
CGND LG-
R616 8
FGND
GREEN LED_L
C? C? 7
D
R622 VCC_33 R? TPIN NC D
4
TPIN+ RD-
6
TPIP RCT
3
C663 C662 TPOUT- TPON
RD+
2
TD-
VPHY 5 14 LEDB
VCC_33 R617 TPOP TCT LY+
1 13
TD+ LY-
TPOUT+ YELLOW LED_R
VPHY C386 C387
TPOUT-
R614

100 Mem_AD17
Mem_AD16
Mem_AD10
Mem_AD11
Mem_AD12
Mem_AD13
Mem_AD14
Mem_AD15
VCC_33

Mem_DT0
Mem_DT1
Mem_DT2
Mem_DT3
Mem_DT4
Mem_DT5

Mem_DT6
Mem_DT7
R613 C654

TPOUT+
TPOUT-
/MCLR C661
R618

80 R620
C666
TPOUT+

99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81

79
78
77
76
U604

RD6/AD6/PSP6/SCK2/SCL2
RD5/AD5/PSP5/SDI2/SDA2
RE7/AD15/ECCP2/P2A

RD4/AD4/PSP4/SDO2

RD7/AD7/PSP7/SS2
RE2/AD10/CS/P2B

RD0/AD0/PSP0
RD1/AD1/PSP1
RD2/AD2/PSP2
RD3/AD3/PSP3
RE4/AD12/P3B

RE6/AD14/P1B
RE3/AD11/P3C

RE5/AD13/P1C

TPOUT+
VSSTX

TPOUT-
VDDTX
VSSPLL
VDDPLL
RBIAS
RH1/A17
RH0/A16

VSS
VDD
VCC_33 OSCO

Mem_AD18 1 75 C660
RH2/A18 VDDRX TPIN+ OSCI R619
2 74
Mem_AD9 RH3/A19 TPIN+ TPIN-
3 73
Mem_AD8 RE1/AD9/WR/P2C TPIN- VSS_RX
4 72
Ext_Int_00 RE0/AD8/RD/P2D VSSRX Y2
5 71
Ext_Int_01 RB0/INT0/FLT0 RG0/ECCP3/P3A UART_TX1
6 70
PIC_IR_0 RB1/INT1 RG1/TX2/CK2 PIC_TX
PIC_IR_0 7 69
PIC_IR_1 RB2/INT2 RB4/KBI0
PIC_IR_1 8 68
R? RB3/INT3/ECCP2/P2A RB5/KBI1 PGC C657 C656
9 67 PROGRAM_CLK
PS_RELAY NC RB6/KBI2/PGC Mem_/WR
PS_RELAY
10 66
EXT_PSAVE RG6 RJ2/WRL
11 65
POWER_KEY 0603 EXT_PSAVER? RG5 VSS OSCO VCC_33
POWER_KEY 12 64
/MCLR RF0/AN5 OSC2/CLKO OSCI U602
PIC_VPP 13 63
LED_STB
MCLR OSC1/CLKI VCC_33 C659 Mem_AD11 Mem_/OE
LED_STB
14 62 1 32
VCC_33 RG4/CCP5/P1D VDD VCC_33 Mem_AD9 A11 OE Mem_AD10
15 61 2 31
VDD_CORE VSS RJ3/WRH Mem_AD8 A9 A10 Mem_/CE
16 60 3 30
C664 VCC_33 VDDCORE/VCAP VSS VCC_33 C658 Mem_AD13 A8 CE Mem_DT7
17 59 4 29
C665 VDD VDD P3P3V_LP Mem_AD14 A13 DQ7 Mem_DT6
C 18 58 5 28 C
VCC_33 THERMAL_STATUS
RF7/SS1 RJ6/LB PGD Mem_AD17
A14 DQ6 Mem_DT5
19 57 6 27

RC1/T1OSI/ECCP2/P2A
THERMAL_STATUS RF6/AN11 RB7/KBI3/PGD PROGRAM_DAT A17 DQ5
20 56 Mem_/WR 7 26 Mem_DT4
RF5/AN10/CVREF RC5/SDO1 WE DQ4

RC0/T1OSO/T13CKI
STB_CMD 21 55 I2C_DATA R? 8 25 Mem_DT3
STB_CMD RF4/AN9 RC4/SDI1/SDA1 SDA1 VDD DQ3
MEMU_KEY 22 54 I2C_CLK R? Mem_AD18 9 24
RF1/AN6/C2OUT

RA3/AN3/VREF+

MEMU_KEY RF3/AN8 RC3/SCK1/SCL1 SCL1 A18 VSS

RA2/AN2/VREF
RA1/LEDB/AN1
RA0/LEDA/AN0
R612 DDP_STATUS C655 Mem_AD16 Mem_DT2
RH4/AN12/P3C

23 53 10 23
RH5/AN13/P3B

DDP_STATUS RF2/AN7/C1OUT RC2/ECCP1/P1A A16 DQ2

RC7/RX1/DT1
RC6/TX1/CK1
24 52 UART_RX1 Mem_AD15 11 22 Mem_DT1
RH7/AN15/P1B RG2/RX2/DT2 PIC_RX A15 DQ1

RA4/T0CKI
25 51 Mem_AD12 12 21 Mem_DT0
RH6/AN14/P1C RG3/CCP4/P3D A12 DQ0
ENVREG

RA5/AN4

RJ4/BA0

RJ0/ALE
VDD_CORE Mem_AD7 13 20 Mem_AD0

RJ1/OE
RJ7/UB

RJ5/CE
A7 A0
AVDD

Mem_AD6 Mem_AD1
AVSS

14 19
VDD

A6 A1
RG7
VSS

VSS
C667 C668 Mem_AD5 15 18 Mem_AD2
Mem_AD4 A5 A2 Mem_AD3
16 17
A4 A3
STB_LED2
26
SCHE_SCL 27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
MCU_RTC_CLKI 43
MCU_RTC_CLKO 44
45
UART1_RXD 46
47
48
Mem_ALE 49
Mem_/OE 50
R? P3P3V_LP
VCC_33 P3P3V_LP

Mem_/CE
SCHE_SDA

增加 R767,NET :STB_LED2 C683

R764 R765 U603

20
增加 R764,R765 Mem_DT0 3 2 Mem_AD0

VCC
HOLD_BOOT_LOADER D1 Q1
VCC_33 VCC_33 Mem_DT1 4 5 Mem_AD1
Mem_DT2 D2 Q2 Mem_AD2
7 6
R? R? C670 C680 Mem_DT3 D3 Q3 Mem_AD3
8 9
Mem_DT4 D4 Q4 Mem_AD4
13 12
SCHE_SCL Mem_DT5
D5 Q5 Mem_AD5
14 15
SCHE_SDA Mem_DT6 D6 Q6 Mem_AD6
17 16
Mem_DT7 D7 Q7 Mem_AD7
18 19
D8 Q8
Real Time Clock(Option) R608
Mem_ALE 11

GND
LEDA LE
1
R609 OE
LEDB
U?

10
EXT_RTC_CLKI 1 5 SCHE_SDA R610
EXT_RTC_CLKO
X1 SDA LEDB
2
X2
7
B
SCHE_SCL SQW/OUT R611
B
6
VCC_P3P3 SCL LEDA
C? 3
GND

VBAT
P3P3V_LP 8
VCC
C?
4

P3P3V

P3P3V_LP
C?

U84 5
L?

4 2 UART0_TXD

C707 C706 C708 C? C?

BF/OE 1 3

<PART NO.> U50 P3P3V

C709 1 16
C1+ VCC
2 15
V+ GND C439
3 14
C1- T1OUT
4 13
C704 C2+ R1IN U83
5 12 5
C2- R1OUT
6 11
V- T1IN
7 10
T2OUT T2IN
8 9 2 4
R2IN R2OUT UART0_RXD
3 UART0_TXD_CON R649
2 R648 P3P3V
1
UART0_RXD_CON
3 1 此處由BF/OE改為P3P3V pull high
J50 R?

A A

R?
UART1_RXD
UART1_RXD

5 4 3 2 1
 5 4 3 2 1

P12V 9V 9V
U52

12V 3 2 9V C725
VI VO
4 C758 C726
TAB

ADJ
C745 + R643

12
U51 SCL1
C727 R690
C700 1 20 R644 SDA1

VCC
HF1 SCL

1
C720 2 21
R686 LF1 SDA C755
C701 32 9
HF2 LS R669
D D
C717 31 11
LF2 FIL C750
C702 3 30
TNF1 BNF1 C721 R688
C703 4
TNF2 R670
5 29 C713
C729 VIN2 BOUT1
6
SEL2
28
BNF2 C722 R687
7
J52 C728 VIN1 R671
8 P3P3V_LP
C736 C737 C734 C735 SEL1 C712
27
P1

P2

BOUT2
1 C715 13 19 C731 R?
AUIN1_R A1 CAP2
5 AUIN1_R
AUIN1_R C718 C730 SW
4 AUIN1_L 14 10
A2 CAP1 SW
3
2 AUIN1_L C719 15 26 C753 Rout-
AUIN1_L AUIN2_R B1 OUT1
C723 16 25 C757 Lout- R?
AUIN2_L B2 OUT2
25 AUIN2_R
AUIN2_R C714 C754 5
24 SW AUIN3_R 18 24
R? C1 LINE1 4
23

GND
R? AUIN2_L C716 C756 3
22 AUIN3_L 17 23
AUIN2_L C2 LINE2 2
R? 1
P3

P5
P4

22
J51
R642 R646
2

R640 R645 R641 R647

N1

N1

N1

N1

AUIN2_R
N2

N2

N2

N2

AUIN2_L
ESD2 ESD3 ESD1 ESD4
1

C P3P3V_LP C
P3P3V_LP

U?

5
U?
R? R?

5
P5V 2 4 1
SW
4 SHUTDOWN
2
U53

3
I2S_SCK_CONN 1 6 + C744 C724
I2S_SCK_CONN BCK VCC
I2S_SD_CONN 2 TP1
I2S_SD_CONN DATA
I2S_WS_CONN 3
I2S_WS_CONN LRCK
HDMI_MCLK_CONN 16 R680
HDMI_MCLK_CONN SCK HDMI_AR
HDMI_MUTE 14
HDMI_MUTE MUTE MUTE
11 C751
ZEROA R663
P5V 8 C741
+

VOUT_R

R689 7 C743
+

VOUT_L
13
DEMP R681
C742 HDMI_AL
5 10
+

NC VCOM R664 C752

15 9
FMT AGND
12 4
R699 TEST DGND
P5V

R? R?

C?
U115
B B
WIFI_AR C? 1 5
NO VCC
C? 3 4
HDMI_AR NC COM AUIN3_R
2 6 ASEL
R? R? GND IN

J53
P5V
1
2
3
4 R? R?

C?
U?

WIFI_AL C? 1 5
NO VCC
C? 3 4
HDMI_AL NC COM AUIN3_L
2 6 ASEL
GND IN
R? R?

A A

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Title
<Title>

Size Document Number Rev

A <Doc> <RevCode>

Date: Monday, October 19, 2009 Sheet 1 of 1

5 4 3 2 1
 5 4 3 2 1

VVCC
U? VVCC VVCC

I O R?
EDID_SEL

5
U?
C1 R? VVCC
2 4 U77

G
R3
R2 3 R4 O I P3P3V
HOLD_BOOT_LOADER

8
VVCC U3 R? R?

1
R5

VCC
U?
D53 7 6
U2 VCLK SCL

G
R477 C2 5
VSCL SDA
C A 1 14 3 1 8

GND
OE1 VCC WP GND EN EDID-I2C
2 7
2 13 SCL_A 3 VREF1 VREF2 6
1A OE4 SCL1 SCL2 SCL1
SDA_A 4 5
SDA1 SDA2 SDA1

4
3 12 SCL_A R6
R478 1Y 4A SCL_A
VSDA 4 11
OE2 4Y
D59 5 10 C3 C4 C5 C6 C7 C8 D? D? D?

C
2A OE3
C A 6 9 SDA_A
D STBY 5P VVCC 2Y 3A SDA_A D
7 8
GND 3Y
D5

A
1
3
2 R7
C9

16
STBY 5P
R8 CN7

+
C10 R10 DSUB_GOUT FB1 DSUBOUT _G DSUBOUT_R 1
11
2

R480 R9 6
5V_BUF STBY 5P
C11 FB2 DSUBOUT _R DSUBOUT_G 2
R481 L1 12

+
3 3 1 2 C12 7
P3P3V_LP2
2

FB3 DSUBOUT _B DSUBOUT_B 3

FB4 13
D7 D8 5V_BUF 8
D51 3 C13 4
C
1

2
C19 FB5 14

+
C14 C15 C16 C17 C21 C22 L2 C18 C23 C24 C25 C26 C20 R15 DSUB_ROUT 9
R11 R12 R13 D10 D11 5
D9 +

C
R14 15
1

1
C27 C28 C30 C31 C32 10
A

+
C29

22

48
38
33
29

17
U4
16

A
CN2

+VA
+VA
+VA
+VA
VDD
1 VRED L3 A_RED A_GRN C33 1
11 A_RED C34 2 INA.1 C42
6 A_BLU C35 3 INA.2

+
2 VGREEN L4 A_GRN AO_HSY NC 4 INA.3 46 C36 R16 DSUB_BOUT
VSDA AO_VSYNC INA.Hsync CH1_M onitorOUT
12 5 45
7 INA.Vsync CH1_SAG 44 R17
VBLUE L5 A_BLU B_GRN C38 CH2_M onitorOUT C39
3 7 43
13 HSY NC D12 A_HSY NC B_RED C37 8 INB.1 CH2_SAG 42

+
C

8 B_BLU C40 9 INB.2 CH3_M onitorOUT 41 C43

INB.3 CH3_SAG U7A
4 R19 C41 BO_HSY NC 10 40 R23 DSUB_HOUT
14 VSYNC BO_VSYNC 11 INB.Hsync Hsync_M onitorOUT 39 R24 DSUB_VOUT
INB.Vsync Vsync_M onitorOUT
9 HSY NCA_AFE
81
5 19 78 HSINA
SDA1 I2C_SDA VSYNCA_AFE VSINA
A

15 VSCL 20 36
SCL1 I2C_SCL CH1_OUT
10 R22 18 35 C44 R26 C56 BIN1_AFE 18
I2C_A0 CH1_OUT DSUB_G DSUB_B BIN_1
D14 A_VSYNC R21 17 32
C

I2C_A1 CH2_OUT 31 C46 R27

17

R25 C45 R29 15 CH2_OUT 28 DSUB_R C48 RIN1_AFE 11

5V_BUF M ode CH3_OUT DSUB_R RIN_1
R28 16 27 C47 R30
Select CH3_OUT DSUB_B
14 25 R37
Schm _T rig_Adj Hsync_OUT HSY NCA_AFE GIN1_AFE
24 R36 C57 2
Vsync_OUT VSYNCA_AFE DSUB_G GIN_1
A

5V_BUF G1
G1

DGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
C VRED C52 SOG1_IN 1 C

PUC
C

R31 R41 SOGIN_1

VGREEN
C

STBY 5P
D55

12
13
26
30
34
37
47

23

21
6
VBLUE R38 C49 R32 C50 R39 C58 R40 C51
C

D57 R33
5V_BUF
D52
A
2

R42
3 3 3
A

D15 D16 D17

D50
C
1

P3P3V_SYNC

C53 C54 C55 C59 C60 C61 R34 R35 R43

VRED2
C

C640
A

VGREEN2
16

CN1 D56
1 VRED2 L6 B_RED VBLUE2
C

11 D58 5
6 R483
2 VGREEN2 L7 B_GRN D54 1 6
CAM_HSY NC
A

12 U5A
7
A

3 VBLUE2 L8 B_BLU R482 U5B 2

13 HSY NC2 D18 3 4
CAM_VSYNC
C

8 B_HSY NC
4 R46 C62
14 VSYNC2
9
5 U69 U68 H=B1/L=B0
A

15 H=B1/L=B0 R484
10 BS_SYNC
1 6 SCARTB/A
1 6 SCART/CMP
D19 B_VSYNC B1 S B1 S
C

2 5 2 5 R485 82
17

R49 C63 GND VCC GND VCC 79 GPIO3_HSINB

GPIO2_VSINB
AS_SYNC 3 4 CMP 3 4 CMPI
B0 A B0 A CAM _BLU C64 17
BIN_2
A

STBY 5P C419 C420

STBY5P STBY5P CAM _RED C65 10
RIN_2
D20
1 R50 R51 TEMP1
3 C66 1 CAM_GRN C67 100
2 R52 1 GIN_2
B U8 2 CAM _GRN B
2
8

C68 99
VSDA2 3 SOGIN_2
VCC

3
5 7
VSCL2 6 SDA VCLK 4 CAM _RED
3 SCL 4
GND

WP 5
5 CAM _BLU
R53 6
6
4

D60
C

D61 7 C641 R521 C642 R522 C643

C

7 R520
8
8 P5V
9
9
A
A

10 CAM_HSY NC
10
11
11
R? 12
12 CAM_VSYNC
U?

O I HOLD_BOOT_LOADER
G

STBY 5P
STBY 5P

STBY 5P STBY 5P
5

R652 C? U?
VCC STBY 5P
C733 R668 STBY 5P R683
C738
C

1 2 2 1 2 4 AO_HSY NC Q25
A_HSY NC 1 2 B
C

R655
5

A_HSYNC 2 1 B Q21 GND R653 C? U? R679

E

R677 C770 VCC 2 1 AS_SYNC

3

C732 R667 R685

E

1 2 2 1 2 4 BO_HSY NC C749
R660
C

R657 R673
B_HSY NC 2 1 B Q22 C769 GND
R672
3

1
E

STBY 5P STBY 5P
R658 STBY 5P STBY 5P
A A
R650
5

C? U?
VCC R682
C

STBY 5P STBY 5P C739

R666 Q24
2 1 2 4 AO_VSYNC B_HSY NC 1 2 B
C

R654 R674 R651 R678

E
5

A_VSYNC 2 1 B Q23 C747 GND C? U? 2 1 BS_SYNC

VCC R684
3

R665 C748
E

R661 2 1 2 4 BO_VSYNC
R676
C

B_VSYNC
R656
Q20
R675 C746 HON HAI Precision Ind. Co., Ltd. Nei-Hu
2 1 B GND
3

PROJECT: Date:
E

R659
Size Rev
DOC NO.:
D MODE: 0.1

DSGN. CHKD. APPD.

Sheet of

5 4 3 2 1
 3 2 1

P5V

C711
U56 C629
2
NC VDD
6
+ J602
2
Rout-
C761 R695 4
IN- Vo+
5 C763 C602 C603
1 SPK_R
4 C767 R696 3 8 C764 C630 - 4
Lout- IN+ Vo-
1 7 PVCC C604 C605 PVCC
SHUTDOW N GND

PAD
R698

9
C759 L601 L602
C606 C607
SHUTDOWN

C608 C609

G1

48
47
46
45
44
43
42
41
40
39
38
37
ROUTN1
ROUTP1

ROUTN
ROUTP
PGNDR
PGNDR
PVCCR
PVCCR

PVCCR
PVCCR
BSRN
PAD

BSRP
C614
3
P12V Rout- 3
AVCC 1 36 C615
SHUTDOWN /Shutdown VCLAMPR
FB605 2 35
C616 RINN NC7 AVCC
2 1 3 34
C611 RINP NC6
4 33
C610 V2P5 AVCC C612 C617
5 32
PVCC LINP U601 NC5
6 31
C601 L606 LINN NC4
7 30
C613 AVDDREF AGND C618
2 1 8 29
R604 R603 NC1 AVDD C619
Lout- 9 28
GAIN0 COSC
10 27
GAIN1 ROSC R605
11 26
NC2 AGND
12 25
NC3 VCLAMPL

LOUTN1
LOUTP1
C620

PGNDL
PGNDL
LOUTN
PVCCL
PVCCL
LOUTP

PVCCL
PVCCL
BSLN
BSLP
R606 R607

13
14
15
16
17
18
19
20
21
22
23
24
C621 C622

2 2

C623 C624
P5V
L603 L604

C710 C625 C626

U55
2 6
NC VDD PVCC PVCC
C760 R693 4 5 C765 C631
Rout- IN- Vo+
C768 R697 3 8 C762 C627 C628 - J605
Lout- IN+ Vo- 1
1 7
2 SPK_L
PAD

SHUTDOW N GND
R694 C632
+
9

C766

1
SHUTDOWN 1

PROJECT : 5W_AMPLIFIER MODE : PD-X5500s Rev : A

DOC NO : Date :
DSGN. CHKD. APPD.
1
1
3 2 1