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Assignment 2 PDF

This document contains two questions regarding the design of digital controllers. The first question asks to design a controller to achieve a damping ratio of 0.5 and samples per cycle of 8, given a sampling period of 0.1 seconds. It also asks to determine the static velocity error constant and response to a unit step input. The second question asks to design a controller using Bode diagram approach to achieve a phase margin of 50 degrees, gain margin of at least 10 dB, and static velocity error constant of 20 sec-1, given a sampling period of 0.1 seconds and then calculate the resulting samples per cycle.

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Souvik Ganguli
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0% found this document useful (0 votes)
58 views

Assignment 2 PDF

This document contains two questions regarding the design of digital controllers. The first question asks to design a controller to achieve a damping ratio of 0.5 and samples per cycle of 8, given a sampling period of 0.1 seconds. It also asks to determine the static velocity error constant and response to a unit step input. The second question asks to design a controller using Bode diagram approach to achieve a phase margin of 50 degrees, gain margin of at least 10 dB, and static velocity error constant of 20 sec-1, given a sampling period of 0.1 seconds and then calculate the resulting samples per cycle.

Uploaded by

Souvik Ganguli
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Thapar Institute of Engineering and Technology, Patiala

Assignment-2
Course: Digital Control Systems (PEE216)
Date of Submission: 10/05/2020
Q1. Design a digital controller GD(z) such that the damping ratio of the dominant
closed loop poles is 0.5 and the number of samples per cycle of damped sinusoidal
oscillations is 8. Assume a sampling period of 0.1 secs. Determine also the static
velocity error constant and the response of the designed system subject to a unit
step input.

Fig. 1
Q2. Using the Bode diagram approach in the w-plane, design a digital controller
for the system shown in Fig. 2. The design specifications are that the phase margin
be 50°, the gain margin be at least 10 dB, and the static velocity error constant KV
be 20 sec-1. The sampling period is assumed to be 0.1 secs. After the controller is
designed, calculate the number of samples per cycle of damped sinusoidal
oscillations.

Fig. 2

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