H

Optically Coupled 20 mA
Current Loop Receiver

Technical Data

HCPL-4200

Features Description guaranteed thresholds for logic

• Data Output Compatible The HCPL-4200 optocoupler is high state and logic low state for
with LSTTL, TTL and CMOS designed to operate as a receiver the current loop, providing an
• 20 K Baud Data Rate at 1400 in equipment using the 20 mA LSTTL, TTL, or CMOS compatible
Metres Line Length Current Loop. 20 mA current logic interface, and providing
loop systems conventionally sig- guaranteed common mode
• Guaranteed Performance
nal a logic high state by transmit- rejection. The buffer circuit on
over Temperature (0°C to
ting 20 mA of loop current the current loop side of the
70°C)
(MARK), and signal a logic low HCPL-4200 provides typically 0.8
• Guaranteed On and Off mA of hysteresis which increases
state by allowing no more than a
Thresholds the immunity to common mode
few milliamperes of loop current
• LED is Protected from (SPACE). Optical coupling of the and differential mode noise. The
Excess Current signal from the 20 mA current buffer also provides a controlled
• Input Threshold Hysteresis loop to the logic output breaks amount of LED drive current
• Three-State Output Compat- ground loops and provides for a which takes into account any
ible with Data Buses very high common mode LED light output degradation.
• Internal Shield for High rejection. The HCPL-4200 aids in The internal shield allows a
Common Mode Rejection the design process by providing guaranteed 1000 V/µs common
mode transient immunity.
• Safety Approval
UL Recognized -2500 V rms, Functional Diagram
for 1 Minute
CSA Approved
• Optically Coupled 20 mA
Current Loop Transmitter,
HCPL-4100, Also Available

Applications
• Isolated 20 mA Current
• Loop Receiver in:
Computer Peripherals
Industrial Control Equipment
Data Communications
Equipment

A 0.1 µF bypass capacitor connected between pins 8 and 5 is recommended.

CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to
prevent damage and/or degradation which may be induced by ESD.

5965-3580E 1-373
Ordering Information
Specify part number followed by Option Number (if desired).
HCPL-4200# XXX

300 = Gull Wing Surface Mount Lead Option

500 = Tape/Reel Package Option (1 K min)

Option data sheets available. Contact your Hewlett-Packard sales representative or authorized distributor for
information.

Package Outline Drawings – 8 Pin DIP Package (HCPL-4200)

9.65 ± 0.25 7.62 ± 0.25
(0.380 ± 0.010) (0.300 ± 0.010)

8 7 6 5 6.35 ± 0.25
TYPE NUMBER (0.250 ± 0.010)
HP XXXX DATE CODE

YYWW RU
UL
1 2 3 4 RECOGNITION

1.78 (0.070) MAX.

1.19 (0.047) MAX.

+ 0.076
5° TYP. 0.254 - 0.051
+ 0.003)
(0.010 - 0.002)
4.70 (0.185) MAX.

0.51 (0.020) MIN.

2.92 (0.115) MIN.

1.080 ± 0.320 0.65 (0.025) MAX.

(0.043 ± 0.013)
2.54 ± 0.25 DIMENSIONS IN MILLIMETERS AND (INCHES).
(0.100 ± 0.010)

8 Pin DIP Package with Gull Wing Surface Mount Option 300 (HCPL-4200)
PAD LOCATION (FOR REFERENCE ONLY)
9.65 ± 0.25 1.016 (0.040)
(0.380 ± 0.010) 1.194 (0.047)

8 7 6 5
4.826 TYP.
(0.190)
6.350 ± 0.25
(0.250 ± 0.010) 9.398 (0.370)
9.906 (0.390)

1 2 3 4

0.381 (0.015)
1.194 (0.047) 0.635 (0.025)
1.778 (0.070)

1.780 9.65 ± 0.25

(0.070) (0.380 ± 0.010)
1.19 MAX.
(0.047) 7.62 ± 0.25
MAX. (0.300 ± 0.010)
+ 0.076
0.254 - 0.051
4.19 MAX. + 0.003)
(0.165) (0.010 - 0.002)

1.080 ± 0.320
(0.043 ± 0.013) 0.635 ± 0.25
(0.025 ± 0.010)
0.635 ± 0.130 12° NOM.
2.54
(0.100) (0.025 ± 0.005)
BSC
DIMENSIONS IN MILLIMETERS (INCHES).
LEAD COPLANARITY = 0.10 mm (0.004 INCHES).

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 Thermal Profile (Option #300)
260
240
∆T = 145°C, 1°C/SEC
220
∆T = 115°C, 0.3°C/SEC
200
TEMPERATURE – °C

180
160
140
120
100
80
∆T = 100°C, 1.5°C/SEC
60
40
20
0
0 1 2 3 4 5 6 7 8 9 10 11 12
TIME – MINUTES

Figure 1. Maximum Solder Reflow Thermal Profile.

(Note: Use of non-chlorine activated fluxes is recommended.)

Regulatory Information UL CSA

The HCPL-4200 has been Recognized under UL 1577, Approved under CSA Component
approved by the following Component Recognition Acceptance Notice #5, File CA
organizations: Program, File E55361. 88324.

Insulation and Safety Related Specifications

Parameter Symbol Value Units Conditions
Min. External Air Gap L(IO1) 7.1 mm Measured from input terminals to output
(External Clearance) terminals, shortest distance through air
Min. External Tracking Path L(IO2) 7.4 mm Measured from input terminals to output
(External Creepage) terminals, shortest distance path along body
Min. Internal Plastic Gap 0.08 mm Through insulation distance, conductor to
(Internal Clearance) conductor, usually the direct distance
between the photoemitter and photodetector
inside the optocoupler cavity
Tracking Resistance CTI 200 volts DIN IEC 112/VDE 0303 PART 1
(Comparative Tracking Index)
Isolation Group IIIa Material Group (DIN VDE 0110, 1/89, Table 1)

Option 300 – surface mount classification is Class A in accordance with CECC 00802.

1-375
Absolute Maximum Ratings
(No Derating Required up to 70°C)
Storage Temperature .................................................. -55°C to +125°C
Operating Temperature ................................................. -40°C to +85°C
Lead Solder Temperature .... 260°C for 10 s (1.6 mm below seating plane)
Supply Voltage – VCC .............................................................. 0 V to 20 V
Average Input Current - II ........................................... -30 mA to 30 mA
Peak Transient Input Current - II ............................................... 0.5 A[1]
Enable Input Voltage – VE ................................................ -0.5 V to 20 V
Output Voltage – VO ........................................................ -0.5 V to 20 V
Average Output Current – IO ....................................................... 25 mA
Input Power Dissipation – PI ................................................... 90 mW[2]
Output Power Dissipation – PO ............................................. 210 mW[3]
Total Power Dissipation – P .................................................. 255 mW[4]
Infrared and Vapor Phase Reflow Temperature
(Option #300) .......................................... see Fig. 1, Thermal Profile

Recommended Operating Conditions

Parameter Symbol Min. Max. Units
Power Supply Voltage VCC 4.5 20 Volts
Forward Input Current ISI 0 2.0 mA
(SPACE)
Forward Input Current IMI 14 24 mA
(MARK)
Operating Temperature TA 0 70 °C
Fan Out N 0 4 TTL Loads
Logic Low Enable VEL 0 0.8 Volts
Voltage
Logic High Enable VEH 2.0 20 Volts
Voltage

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DC Electrical Specifications
For 0°C ≤ TA ≤ 70°C, 4.5 V ≤ VCC ≤ 20 V, VE = 0.8 V, all typicals at TA = 25°C and VCC = 5 V unless otherwise
noted. See note 13.
Parameter Symbol Min. Typ. Max. Units Test Conditions Fig. Note
Mark State Input IMI 12 mA 2, 3,
Current 4
Mark State Input VMI 2.52 2.75 Volts II = 20 mA VE = Don’t Care 4, 5
Voltage
Space State Input ISI 3 mA 2, 3,
Current 4
Space State Input VSI 1.6 2.2 Volts II = 0.5 to 2.0 mA VE = Don’t 2, 4
Voltage Care
Input Hysteresis IHYS 0.3 0.8 mA 2
Current
Logic Low Output VOL 0.5 Volts IOL = 6.4 mA II = 3 mA 6
Voltage (4 TTL Loads)
Logic High Output VOH 2.4 Volts IOH = -2.6 mA, II = 12 mA 7
Voltage
Output Leakage IOHH 100 µA VO = 5.5 V II = 20 mA
Current (VOUT > VCC) 500 µA VO = 20 V VCC = 4.5 V
Logic High Enable VEH 2.0 Volts
Voltage
Logic Low Enable VEL 0.8 Volts
Voltage
Logic High Enable IEH 20 µA VE = 2.7 V
Current 100 µA VE = 5.5 V
0.004 250 µA VE = 20 V
Logic Low Enable IEL -0.32 mA VE = 0.4 V
Current
Logic Low Supply ICCL 4.5 6.0 mA VCC = 5.5 V II = 0 mA
Current 5.25 7.5 mA VCC = 20 V VE = Don’t Care
Logic High Supply ICCH 2.7 4.5 mA VCC = 5.5 V II = 20 mA
Current 3.1 6.0 mA VCC = 20 V VE = Don’t Care
High Impedance IOZL -20 µA VO = 0.4 V VE = 2 V,
State Output IOZH 20 µA VO = 2.4 V II = 20 mA
Current 100 µA VO = 5.5 V
500 µA VO = 20 V
Logic Low Short IOSL 25 mA VO = VCC = 5.5 V II = 0 mA 5
Circuit Output
Current 40 mA VO = VCC = 20 V
Logic High Short IOSH -10 mA VCC = 5.5 V II = 20 mA 5
Circuit Output VO = GND
Current -25 mA VCC = 20 V
Input Capacitance CIN 120 pF f = 1 MHz, VI = 0 V dc,
Pins 1 and 2

1-377
Switching Specifications
For 0°C ≤ TA ≤ 70°C, 4.5 V ≤ VCC ≤ 20 V, VE = 0.8 V, all typicals at TA = 25°C and VCC = 5 V unless
otherwise noted. See note 13.
Parameter Symbol Min. Typ. Max. Units Test Conditions Fig. Note
Propagation Delay Time tPLH 0.23 1.6 µs VE = 0 V, 8, 9, 7
to Logic High Output Level CL = 15 pF 10
Propagation Delay Time tPHL 0.17 1.0 µs VE = 0 V, 8, 9, 8
to Logic Low Output Level CL = 15 pF 10
Propagation Delay Time tPLH - tPHL 60 ns II = 20 mA, 8, 9,
Skew CL = 15 pF 10
Output Enable Time to tPZL 25 ns II = 0 mA, 12, 13,
Logic Low Level CL = 15 pF 15
Output Enable Time to tPZH 28 ns II = 20 mA, 12, 13,
Logic High Level CL = 15 pF 14
Output Disable Time to tPLZ 60 ns II = 0 mA, 12, 13,
Logic Low Level CL = 15 pF 15
Output Disable Time to tPHZ 105 ns II = 20 mA, 12, 13,
Logic High Level CL = 15 pF 14
Output Rise Time tr 55 ns VCC = 5 V, 8, 9, 9
(10-90%) CL = 15 pF 11
Output Fall Time tf 15 ns VCC = 5 V, 8, 9, 10
(90-10%) CL = 15 pF 11
Common Mode Transient |CMH| 1,000 10,000 V/µs VCM = 50 V (peak) 16 11
Immunity at Logic High II = 12 mA,
Output Level TA = 25°C
Common Mode Transient |CML| 1,000 10,000 V/µs VCM = 50 V (peak) 16 12
Immunity at Logic Low II = 3 mA,
Output Level TA = 25°C

Package Characteristics
For 0°C ≤ TA ≤ 70°C, unless otherwise specified. All typicals at TA = 25°C.
Parameter Symbol Min. Typ. Max. Units Test Conditions Fig. Notes
Input-Output Momentary VISO 2500 V rms RH ≤ 50%, t = 1 min, 6, 14
Withstand Voltage* TA = 25°C
Resistance, Input-Output RI-O 1012 ohms VI-O = 500 V dc 6
Capacitance, Input-Output CI-O 1.0 pF f = 1 MHz, VI-O = 0 V 6
*The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output
continuous voltage rating. For the continuous voltage rating refer to the VDE 0884 Insulation Characteristics Table (if applicable),
your equipment level safety specification, or HP Application Note 1074, “Optocoupler Input-Output Endurance Voltage.”

1-378
Notes: 7. The tPLH propagation delay is VCM , which can be sustained with the
1. ≤ 1 µs pulse width, 300 pps. measured from the 10 mA level on output voltage in the logic high state
2. Derate linearly above 70°C free air the leading edge of the input pulse to (i.e., VO ≥ 2 V).
temperature at a rate of 1.6 mW/ °C. the 1.3 V level on the leading edge of 12. Common mode transient immunity in
Proper application of the derating the output pulse. the logic low level is the maximum
factors will prevent IC junction 8. The tPHL propagation delay is (positive) dVCM /dt on the leading
temperatures from exceeding 125°C measured from the 10 mA level on edge of the common mode pulse,
for ambient temperatures up to 85°C. the trailing edge of the input pulse to VCM, which can be sustained with the
3. Derate linearly above 70°C free air the 1.3 V level on the trailing edge of output voltage in the logic low state
temperature at a rate of 3.8 mW/ °C. the output pulse. (i.e., VO ≤ 0.8 V).
4. Derate linearly above 70°C free air 9. The rise time, tr, is measured from the 13. Use of a 0.1 µF bypass capacitor
temperature at a rate of 4.6 mW/ °C. 10% to the 90% level on the rising connected between pins 5 and 8 is
5. Duration of output short circuit time edge of the output logic pulse. recommended.
shall not exceed 10 ms. 10. The fall time, tf, is measured from the 14. In accordance with UL 1577, each
6. The device is considered a two 90% to the 10% level on the falling optocoupler momentary withstand is
terminal device, pins 1, 2, 3, and 4 edge of the output logic pulse. proof tested by applying an insulation
are connected together and pins 5, 6, 11. Common mode transient immunity in test voltage ≥ 3000 V rms for 1
7, and 8 are connected together. the logic high level is the maximum second (leakage detection current
(negative) dVCM /dt on the trailing limit, Ii-o ≤ 5 µA).
edge of the common mode pulse,

10
II – INPUT SWITCHING THRESHOLD – mA

IHYS
4

0
-50 -25 0 25 50 75 100

TA – AMBIENT TEMPERATURE –°C

Figure 2. Typical Output Voltage vs. Figure 3. Typical Current Switching Figure 4. Typical Input Loop Voltage
Loop Current. Threshold vs. Temperature. vs. Input Current.

2.8 1.0 0
IOH – HIGH LEVEL OUTPUT CURRENT – mA
VOL – LOW LEVEL OUTPUT VOLTAGE – V

0.9
VCC = 4.5 V -1
VCC = 4.5 V
VI – LOOP VOLTAGE – VOLTS

0.8 II = 3 mA II = 12 mA
IO = 6.4 mA -2
0.7
2.6 VO = 2.7 V
II = 20 mA -3
0.6

0.5 -4
II = 12 mA VO = 2.4 V
0.4
-5
2.4
0.3
-6
0.2
-7
0.1

2.2 0 -8
-50 -25 0 25 50 75 100 -60 -40 -20 0 20 40 60 80 100 -60 -40 -20 0 20 40 60 80 100

TA – AMBIENT TEMPERATURE –°C TA – TEMPERATURE –°C TA – TEMPERATURE –°C

Figure 5. Typical Input Voltage vs. Figure 6. Typical Logic Low Output Figure 7. Typical Logic High Output
Temperature. Voltage vs. Temperature. Current vs. Temperature.

1-379
Figure 8. Test Circuit for tPHL, tPLH, tr, and tf. Figure 9. Waveforms for tPHL, tPLH, tr, and tf.

0.5 120
VCC = 5 V VCC = 5 V
CL = 15 pF CL = 15 pF
tp – PROPAGATION DELAY – µs

0.4 100
tr, tf – RISE, FALL TIMES – ns

80
0.3
tr
tPLH 60

0.2
40
tPHL
0.1
20
tf
0 0
-60 -40 -20 0 20 40 60 80 100 -60 -40 -20 0 20 40 60 80 100

TA – TEMPERATURE –°C TA – TEMPERATURE –°C

Figure 10. Typical Propagation Delay vs. Temperature. Figure 11. Typical Rise, Fall Time vs. Temperature.

+5 V

Figure 12. Test Circuit for tPZH, tPZL, tPHZ, and tPLZ. Figure 13. Waveforms for tPZH, tPZL, tPHZ, and tPLZ.

1-380
 200 100
VCC VCC

tp – ENABLE PROPAGATION DELAY – ns

tp – ENABLE PROPAGATION DELAY – ns

CL = 15 pF CL = 15 pF
20 V
20 V
80
150
tPLZ 4.5 V
tPHZ
60
4.5 V
100
20 V
40
tPZL
20 V 4.5 V
50
20
tPZH 4.5 V

0 0
-60 -40 -20 0 20 40 60 80 100 -60 -40 -20 0 20 40 60 80 100

TA – TEMPERATURE –°C TA – TEMPERATURE –°C

Figure 14. Typical Logic High Enable Propagation Delay vs. Figure 15. Typical Logic Low Enable Propagation Delay vs.
Temperature. Temperature.

Figure 16. Test Circuit for Common Mode Transient

Immunity.

Applications configuration for use in long line lower the charged voltage level
Data transfer between equipment length (two wire), for high data the faster the data rate will be. In
which employs current loop rate, and low current source the configurations of Figures 17a
circuits can be accomplished via compliance level applications. and 17b, data rate is independent
one of three configurations: Block diagrams of simplex point- of the current source voltage
simplex, half duplex or full to-point and multidrop compliance level. An adequate
duplex communication. With arrangements are given in compliance level of current
these configurations, point-to- Figures 17a and 17b respectively source must be available for
point and multidrop arrangements for the HCPL-4200 receiver voltage drops across station(s)
are possible. The appropriate optocoupler. during the MARK state in multi-
configuration to use depends drop applications or for long line
upon data rate, number of For the highest data rate per- length. The maximum compliance
stations, number and length of formance in a current loop, the level is determined by the trans-
lines, direction of data flow, configuration of a non-isolated mitter breakdown characteristic.
protocol, current source location active transmitter (containing
and voltage compliance value, current source) transmitting data A recommended non-isolated
etc. to a remote isolated receiver(s) active transmitter circuit which
should be used. When the current can be used with the HCPL-4200
Simplex source is located at the trans- in point-to-point or in multidrop
The simplex configuration, mitter end, the loop is charged 20 mA current loop applications
whether point to point or multi- approximately to VMI (2.5 V). is given in Figure 18. The current
drop, gives unidirectional data Alternatively, when the current source is controlled via a
flow from transmitter to source is located at the receiver standard TTL 7407 buffer to
receiver(s). This is the simplest end, the loop is charged to the provide high output impedance of
full compliance voltage level. The current source in both the ON

1-381
Figure 17. Simplex Current Loop System Configurations for (a) Point-to-Point, (b) Multidrop.

and OFF states. This non-isolated and HCPL-4200 optically coupled Input and output logic supply
active transmitter provides a current loop receiver shown in voltages are 5 V dc.
nominal 20 mA loop current for Figure 18. Curves are shown for
the listed values of VCC, R2 and 10% and 25% distortion data Full Duplex
R3 in Figure 18. rate. 10% (25%) distortion data The full duplex point-to-point
rate is defined as that rate at communication of Figure 21 uses
Length of current loop (one which 10% (25%) distortion a four wire system to provide
direction) versus minimum occurs to output bit interval with simultaneous, bidirectional data
required DC supply voltage, VCC, respect to input bit interval. An communication between local and
of the circuit in Figure 18 is input Non-Return-to-Zero (NRZ) remote equipment. The basic
graphically illustrated in Figure test waveform of 16 bits application uses two simplex
19. Multidrop configurations will (0000001011111101) was used point-to-point loops which have
require larger VCC than Figure 19 for data rate distortion measure- two separate, active, non-isolated
predicts in order to account for ments. Data rate is independent units at one common end of the
additional station terminal of current source supply voltage, loops. The other end of each loop
voltage drops. VCC. is isolated.

Typical data rate performance The cable used contained five As Figure 21 illustrates, the
versus distance is illustrated in pairs of unshielded, twisted, 22 combination of Hewlett-Packard
Figure 20 for the combination of AWG wire (Dearborn #862205). current loop optocouplers, HCPL-
a non-isolated active transmitter Loop current is 20 mA nominal. 4100 transmitter and HCPL-4200

1-382
Figure 18. Recommended Non-Isolated Active Transmitter with HCPL-4200 Isolated Receiver for Simplex Point-to-Point
20 mA Current Loop.

receiver, can be used at the data rate is limited by the non- Half Duplex
isolated end of current loops. isolated active receiver current The half duplex configuration,
Cross talk and common mode loop. Comments mentioned under whether point-to-point or
coupling are greatly reduced simplex configuration apply to multidrop, gives non-
when optical isolation is imple- the full duplex case. Consult the simultaneous bidirectional data
mented at the same end of both HCPL-4100 transmitter opto- flow from transmitters to
loops, as shown. The full duplex coupler data sheet for specified receivers shown in Figures 22a
device performance. and 22b. This configuration
allows the use of two wires to
carry data back and forth
between local and remote units.
However, protocol must be used
to determine which specific
TA = 25 °C transmitter can operate at any
given time. Maximum data rate
for a half duplex system is limited
by the loop current charging
time. These considerations were
explained in the Simplex config-
uration section.

Figures 22a and 22b illustrate

half duplex application for the
Figure 19. Minimum Required Supply Figure 20. Typical Data Rate vs.
Voltage, VCC, vs. Loop Length for Distance. combination of HCPL-4100/-4200
Current Loop Circuit of Figure 19. optocouplers. The unique and
complementary designs of the
HCPL-4100 transmitter and
HCPL-4200 receiver
optocouplers provide many
designed-in benefits. For
example, total optical isolation at
one end of the current loop is
easily accomplished, which
results in substantial removal of
common mode influences,
elimination of ground potential
Figure 21. Full Duplex Point-to-Point Current Loop System
Configuration.

1-383
 differences and reduction of Voltage compliance of the current the HCPL-4100 transmitter
power supply requirements. With source must be of an adequate optocoupler data sheet for
this combination of HCPL-4100/ level for operating all units in the specified device performance.
-4200 optocouplers, specific loop while not exceeding 27 V dc,
current loop noise immunity is the maximum breakdown voltage For more information about the
provided, i.e., minimum SPACE for the HCPL-4100. Note that the HCPL-4100/-4200 optocouplers,
state current noise immunity is 1 HCPL-4100 transmitter will allow consult Application Note 1018.
mA, MARK state noise immunity loop current to conduct when
is 8 mA. input VCC power is off. Consult

Figure 22. Half Duplex Current Loop System Configurations for

(a) Point-to-Point, (b) Multidrop.

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