24 Device Configuration
24 Device Configuration
Device Configuration
HIGHLIGHTS
This section of the manual contains the following topics:
24
Configuration
Device
24.1 Introduction
The device Configuration registers allow each user to customize certain aspects of the device to
fit the needs of the application. Device Configuration registers are nonvolatile memory locations
in the program memory map that hold settings for the dsPIC® DSC device during power-down.
The Configuration registers hold global setup information for the device, such as the oscillator
source, Watchdog Timer mode and code protection settings.
The device Configuration registers are mapped in program memory locations, starting at address
0xF80000 and are accessible during normal device operation. This region is also referred to as
“configuration space”.
The Configuration bits can be programmed (read as ‘0’), or left unprogrammed (read as ‘1’) to
select various device configurations.
Note 1: Not all device Configuration bits shown in the subsequent Configuration register
descriptions may be available on a specific device. Refer to the device data sheet
for more information.
2: dsPIC30F devices in the General Purpose, Sensor and Motor Control families
feature one of three versions of the Oscillator system – Version 1, Version 2 and
Version 3. For information on the Configuration bits of the FOSC device
Configuration register available in each of these versions, please refer to Section
7. “Oscillator”.
Middle Byte:
R/P U U U U U U U
FWDTEN — — — — — — —
bit 15 bit 8
Lower Byte:
U U R/P R/P R/P R/P R/P R/P
— — FWPSA<1:0> FWPSB<3:0>
bit 7 bit 0
Configuration
Legend: P = Programmable bit
Device
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
Middle Byte:
R/P U U U U R/P R/P R/P
MCLREN — — — — PWMPIN HPOL LPOL
bit 15 bit 8
Lower Byte:
R/P U R/P R/P U U R/P R/P
BOREN — BORV<1:0> — — FPWRT<1:0>
bit 7 bit 0
Middle Byte:
U-0 U-0 R/W-0 R/W-0 U-0 U-0 U-0 R/W-0
— — RBS<1:0> — — — EBS
bit 15 bit 8
Lower Byte:
U-0 U-0 U-0 U-0 R/P R/P R/P R/P
— — — — BSS<2:0> BWRP
bit 7 bit 0
Configuration
bit 0 BWRP: Boot Segment Program Flash Write Protection bit
1 = Boot segment can be written
Device
0 = Boot segment is write-protected
Note 1: Not all devices have Boot RAM and Boot Data EEPROM protection. For specific device
information, refer to Section 26. “CodeGuard™ Security” in this reference manual.
2: The exact definitions of Small, Medium, and Large Boot Program Flash and Boot RAM
Segments vary from one device to another. For specific device information, refer to Section 26.
“CodeGuard™ Security” in this reference manual.
Middle Byte:
U-0 U-0 R/P R/P U-0 U-0 R/P R/P
— — RSS<1:0> — — ESS1 ESS0
bit 15 bit 8
Lower Byte:
U-0 U-0 U-0 U-0 R/P R/P R/P R/P
— — — — SSS<2:0> SWRP
bit 7 bit 0
Note 1: Not all devices have Secure RAM and Secure Data EEPROM protection. For specific device
information, refer to Section 26. “CodeGuard™ Security” in this reference manual.
2: The exact definitions of Small, Medium and Large Secure Segment vary from one device to
another. For specific device information, refer to Section 26. “CodeGuard™ Security” in this
reference manual.
Register 24-5: FGS: General Segment Configuration Register for Devices with Advanced Security
Upper Byte:
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
bit 23 bit 16
Middle Byte:
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
bit 15 bit 8
Lower Byte:
U-0 U-0 U-0 U-0 U-0 R/P R/P R/P
— — — — — GSS<1:0> GWRP
bit 7 bit 0
24
Configuration
Device
Register 24-6: FGS: General Segment Configuration Register for Devices with Basic or Intermediate
Security
Upper Byte:
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
bit 23 bit 16
Middle Byte:
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
bit 15 bit 8
Lower Byte:
U-0 U-0 U-0 U-0 U-0 U-0 R/P R/P
— — — — — — GCP GWRP
bit 7 bit 0
Middle Byte:
U U U U U U U U
— — — — — — — —
bit 15 bit 8
Lower Byte:
R/P R/P U U U U R/P R/P
BKBUG COE — — — — ICS<1:0>
bit 7 bit 0
Configuration
Device
24
Configuration
Device
File Name Addr. Bits 23-16 Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Configuration
24
Device
dsPIC30F Family Reference Manual
24
Configuration
Device
NOTES: