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Avionics Lecture Handouts (L-17)

The document provides details about the 8085 microprocessor architecture. It discusses the 8085's bus structure including its address bus, data bus, control signals, and I/O ports. It describes the registers including the program counter, stack pointer, accumulator, and six general purpose registers. The lecture content explains the architecture of the 8085 microprocessor and provides resources for further learning.

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Gowri Shankar
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0% found this document useful (0 votes)
69 views

Avionics Lecture Handouts (L-17)

The document provides details about the 8085 microprocessor architecture. It discusses the 8085's bus structure including its address bus, data bus, control signals, and I/O ports. It describes the registers including the program counter, stack pointer, accumulator, and six general purpose registers. The lecture content explains the architecture of the 8085 microprocessor and provides resources for further learning.

Uploaded by

Gowri Shankar
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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MAHENDRA ENGINEERING COLLEGE

MAHENDHIRAPURI, MALLASAMUDRAM - 637503 L-17


AE

Lecture Handouts
Subject Name: AVIONICS
VII/IV

Staff Name : Mr. J. GOWRI SHANKAR, AP/ECE

Unit : II (PRINCIPLES OF DIGITAL SYSTEMS) Date of Lecture:

Topic of Lecture: 8085 Microprocessor

Introduction:
Microprocessor is a computer Central Processing Unit (CPU) on a single chip.
It contains millions of transistors connected by wires.

Prerequisite knowledge for Complete learning of Topic:


1. Semiconductors.
2. Digital circuits
Detailed content of the Lecture:
ARCHITECTURE OF 8085

BUS STRUCTURE OF 8085


 The 8085 is an 8-bit general purpose microprocessor that can address 64K Byte of memory.
 It has 40 pins and uses +5V for power. It can run at a maximum frequency of 3 MHz.
The pins on the chip can be classified into 6 groups:

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 Address Bus,Data Bus.
 Control and Status Signals.
 Power supply and frequency.
 Externally Initiated Signals.
 Serial I/O ports.
THE ADDRESS AND DATA BUSSES
 AD0-AD7 is multiplexed address-data lines which can be demultiplexed into 8 data lines
D0-D7 and 8 low order address lines A0-A7.
 ALE (Address Latch Enable) signal is used to demultiplex address-data lines
 A8 – A15 are higher order address lines.
 A0-A15 address lines are uni-directional which is used to access memory or external
periferals.
 Total addressing capacity 64K (65536)
 Data lines D0-D7 are bi-directional.
THE CONTROL AND STATUS SIGNALS
There are 4 main control and status signals:
 ALE: Address Latch Enable. This signal is a pulse that become 1 when the
AD0 – AD7 lines have an address on them. It becomes 0 after that. This signal
can be used to enable a latch to save the address bits from the AD lines.
 RD: Read. Active low.
 WR: Write. Active low.
 IO/M: This signal specifies whether the operation is a memory operation
IO/M=0) or an I/O operation (IO/M=1).
S1 and S0: Status signals to specify the kind of operation being performed Usually un-used in
small systems.
REGISTERS
 Six general purpose 8-bit registers: B, C, D, E, H, L
 They can also be combined as register pairs to perform 16-bit operations: BC, DE, HL
 Registers are programmable (data load, move, etc.)
ACCUMULATOR
 Single 8-bit register that is part of the ALU ,
 Used for arithmetic / logic operations – the result is always stored in the accumulator.
FLAG BITS
 Indicate the result of condition tests.
 Carry, Auxiliary carry, Zero, Sign, Parity, etc.
 Conditional operations (IF / THEN) are executed based on the condition of these flag bits.
PROGRAM COUNTER (PC)
 Contains the memory address (16 bits) of the instruction that will be executed in the next
step.
STACK POINTER (SP)
 It points memory location of stack memory.
Video Content / Details of website for further learning (if any):
 https://youtu.be/RVNXZS-HOgw
 https://youtu.be/bucaMw-0GVs
Important Books/Journals for further learning including the page nos.:
 Gaonkar, R.S., “Microprocessors Architecture – Programming and Application”, Wiley
and Sons Ltd., New Delhi, 1990
 A.P.Godse, D.A.Godse Electronics and Microprocessors, Technical publication,Dec-2011

Subject Teacher Verified by HoD/ECE

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