Switch-Mode Power Conversion

P. Sensarma

Module 1

Lecture 1

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Dr. P. Sensarma, Department of Electrical Engg, IIT-Kanpur, India. 1
 This course is about efficient techniques to convert electrical power into various different forms. Such
conversions are of the following basic nature.
• AC to DC (rectification)
• DC to AC (inversion)
• AC to AC (voltage regulation)
• AC to AC (frequency variation)
• DC to DC (voltage variation)
and all combinations of the above. Two common examples of such combinations are as follows.
• DC to DC to AC
• AC to DC to AC

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Dr. P. Sensarma, Department of Electrical Engg, IIT-Kanpur, India. 2
 • Efficient conversion requires minimum losses during conversion of electrical power. In the ideal conver-
sion process, this loss should be zero.
• This requires only “lossless” elements to be used in the conversion process. These elements, under ideal
conditions, never dissipate energy when operating within any electrical circuit.
• One obvious class of such elements are the “storage” elements. Since energy cannot be created nor
destroyed and these elements do not dissipate the absorbed energy, it must be internally stored.Electrical
storage elements are the inductor and capacitor.
• Another such lossless element is the ideal electrical switch.

So a switch mode power converter comprises a meaningful electrical interconnection of inductors, capacitors
and switches (and nothing else), as shown in fig.1.

Figure 1: Inside an SMPC.

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 The Inductor (L)
The symbol of an inductor is shown with its reference
voltage polarity and current direction. In this course,
iL
the load convention is adopted throughout. This ap- _
proach of denoting reference voltages and currents for + vL
any element in a circuit implies that positive power
corresponds to power absorbed by the element. Figure 2: Inductor with reference variables.

The voltage and current of an inductor are related as (Lenz’s law)

diL 1
Z
vL = L or iL = vl dt. (1)
dt L

The ideal inductor has no associated resistive component and the energy stored in it over an interval [0, t] is
t iL (t) iL (t)
1
Z Z Z
EL (t) = vL iL dt = LiL diL = Ld(i2L ). (2)
0 0 2 0

For the simple case of constant inductance,

1 2
E(t) = Li (t) (3)
2 L
In (3), note that there is no explicit term involving time. This agrees with its lossless property.

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 The Capacitance (C)
iC
The symbol and reference quantities for a capacitance _
are shown alongside. Capacitance is defined in physics + v
C
as a constant of proportionality relating terminal volt-
age, vC , and stored charge, q. Figure 3: A capacitor with reference variables.

So,
q = CvC . (4)
From the definition of current as flow-rate of electric charge,
dq d
iC = = (CvC ). (5)
dt dt
Similar to an inductor, the expression for stored energy over an interval [0, t] is
1 2
EC (t) = Cv . (6)
2 C
Here, too, note the absence of any explicit appearance of time.

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 The Switch (S)
The symbol and reference polarities are shown in iS
the figure. A switch is an electrical element which _
is bi-stable. It exists in two stable states: ON and + v
OFF. In these states, the ideal switch satisfies these S
properties.
Figure 4: Switch with reference variables.

Clearly,

ON state OFF state

vS = 0 iS = 0
−∞ < iS < ∞ −∞ < vS < ∞
(It can carry any current without (It can block any voltage without
producing any voltage drop allowing any current through it
in the ON state.) in the OFF state).

Ideal short-circuit Ideal open-circuit

Z Z
vS iS dt = vS iS dt = 0 (7)
ON OF F

since either the voltage or current is zero in each of these states.

The switch has little utility if it remains continuously in any one of these states. So it needs to be able
to toggle or transit between these states and these transitions are called turn-on (OFF to ON) and turn-
off (ON to OFF). In terms of the time taken for these transitions, the ideal switch also has the following
properties.
ton = tof f = 0 (8)
where, ton and tof f are the turn-on and turn-off times, respectively.

The ideal switch transits between its stable states instantaneously.

Both (7) and (8) are necessary to ensure a lossless (ideal) switch.

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 A few points to note

• Characteristic equations of the inductor, in (1) and capacitor, in (6), have similar forms. Between these,
there is an interesting property. Consider the differential forms.
diL dvC
vL = L iC = C (9)
dt dt
Note that the voltage and current terms are just interchanged. A similar feature exists in the integral
forms.
• Characteristic equations are expressed in both differential and integral forms. Mathematically these
forms are interchangeable, but the circuit designer treats these differently.

For the inductor, the differential form defines the voltage as the output and the current as the in-
put. That is, the voltage is decided by the time derivative of current. With the integral form, the
definition of input and output are reversed.
• Behaviour of the circuit is solely controlled by switching action.

A switch connects two parts of a iA iB

circuit, as shown in fig. 5, where
each part is shown as a two-port vA + +
vB
network. When it is OFF, oper- A B
ation of sub-circuits A and B are
mutually independent. But when − −
ON, it equates iA with iB and vA
with vB . Figure 5: Switch connecting two sub-circuits.

While operating independently, it is not expected that the two port voltages and currents will be
identical just before the switch is turned on. Thus, in general, there is a discontinuity in the port
voltages and currents. The circuit must be correctly designed so that these discontinuities do not create
problems in its operation. This procedure is laid down by the following rules of interconnection.

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Dr. P. Sensarma, Department of Electrical Engg, IIT-Kanpur, India. 7
 Interconnection of elements
Before actually deriving these rules, the following terms are introduced.

A current stiff element does not allow the current through it to change abruptly i.e. current through
it is always continuous in time.

A voltage stiff element does not allow the voltage across its terminals to change abruptly, i.e. its ter-
minal voltage is always continuous in time.

For a SMP Converter to work without failure, a basic requirement is that the voltages and currents (states)
in each circuit element must not exceed tolerable values. A definite conclusion is that the states must always
be finite.

Rules for the Inductor

Differential form of the inductor characteristic (1) is recalled.

diL
vL = L
dt
If the inductor is fed with a current discontinuity, it theoretically results in infinite voltage output. So this
is always avoided and the inductor must be fed with continuous current. The inductor is thus a current-stiff
element. However, the integral form,
1
Z
iL = vL dt,
L
shows that the input in this case could be discontinuous without causing any uncontrolled output. An exam-
ple is shown in fig. 6.

7 Current waveform
Voltage 85 of a 1 H inductor,
axis with discontinuous
Current
3 axis voltage input.

15
5 10 time axis

Figure 6: Discontinuous voltage input to an inductor and its output current.

So the inductor could be fed with a discontinuous voltage without any problem. In fact, any current stiff
element can be fed with a discontinuous voltage without difficulty.

Rules for the Capacitor

The capacitor characteristic (6) would similarly show that the capacitor is a voltage stiff element. It cannot
accept a discontinuous voltage input but it can operate normally with discontinuous current inputs.

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 Having defined these rules, fig. 5 is revisited. Examples of a current-stiff and voltage-stiff ports are shown
in fig. 7.

iA iB

+ +
A vA vB B
− −

+
_

Voltage stiff
Current−stiff port
port
Figure 7: Examples of voltage and current stiff ports.

Placement of a switch in any SMP circuit becomes critical. A feasible location of a switch must satisfy the
following rule. We shall call this the “Rule of Interconnection” (ROI).

ROI: A switch connecting two sub-circuits A & B ensures reliable operation only if the port of sub-circuit

A is current stiff and the port of sub-circuit B is voltage-stiff or vice-versa.

An additional difficulty appears when the switch connected to a current-stiff port is turned off, which results

in current discontinuity. This leads to the concept of a Single-pole Double-throw (SPDT) switch, shown in
fig. 8. The stable states of this switch are throw 1 and throw 2. In fig. 8, port A is current-stiff and ports B

iC
SPDT
switch +
vC C throw 2
iA
−
+ pole
A vA iB
− throw 1
+
vB B

Figure 8: The SPDT switch.

& C voltage-stiff. The switch pole is always connected to the current-stiff port.

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Dr. P. Sensarma, Department of Electrical Engg, IIT-Kanpur, India. 9
Lecture 2

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 The Basic Converter Cell
The basic converter is a combination of the basic switch cell and the basic converter primitive. The ba-
sic switch cell has two alternate forms - a current stiff and a voltage stiff configuration.

The current-stiff switch cell is shown in fig. 9.

1
P

Figure 9: The basic current-stiff switch cell. Throws marked arbitrarily.

The simplest switch mode converter couples an input dc voltage to another dc voltage (voltage variation).
There are no complications of phase angle (frequency) when one of these voltages is AC. The basic current–stiff
converter is non-isolated i.e. the input and output ports have identical reference potential. The non-isolated
dc-dc converter therefore has the primitive structure of fig. 10. The control element is the switch-cell of fig.
9, which is also shown.

S L 1
+ +
_ Vin _ Vout P
G
0

Figure 10: The non-isolated dc-dc converter primitive. Terminals are marked. Basic switch-cell shown.

To form a closed circuit topology, the three-terminal switch-cell must be connected to the three-terminal
converter primitive. This means that the set of nodes {S, L, G} have to be connected to the set {P, 1, 0},
subject to the following rules.
• No node should be left open (floating).
• No two nodes of any set should be shorted (e.g. S cannot be shorted to G or 1 cannot be shorted to 0).
This can be done in the following 6 different ways.

Table 1: Combinations of basic switch cell and converter primitive.

{L→P S→1 G→0 } {L→P S→0 G→1}

{S→P G→1 L→0} {S→P G→0 L→1}

{G→P S→1 L→0} {G→P S→0 L→1}

Fig. 11 shows the complete schematic with both combinations in the first row of Table 1. Note that these
two are topologically identical.

So that leaves three distinct topologies, one corresponding to each row of Table 1. These could be ob-
tained as shown in fig. 12.
Fig. 12(a) shows the same configuration as in fig. 11, with the alignment of the switch cell shown to the left.
Fig. 12(b) shows the configuration obtained after rotating the switch-cell by 120◦. This corresponds to the
third row of Table 1. Fig. 12(c) shows the configuration after a further rotation of 120◦ .

We shall see in later lectures that each of these configurations has unique input-output characteristics and
very different dynamic models.

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Dr. P. Sensarma, Department of Electrical Engg, IIT-Kanpur, India. 11
 1 0
P P
S L S L
+ + + +
_ Vin 0 _ Vout _ Vin 1 _ Vout
G G

Figure 11: One set of combinations.

(a)

1
P + +
_ Vin _ Vout
0

(b)
0 1

+ +
_ Vin _ Vout

0 (c)
P + +
_ Vin _ Vout

Figure 12: The complete set of combinations.

The voltage-stiff basic switch cell is shown in fig. 13. The throws of the SPDT switch are connected
by a capacitor to render voltage stiffness. To adhere to ROI, the pole is always connected to a current-stiff
element.

P
0
Figure 13: The basic voltage stiff switch cell.

Using the same approach of matching the terminals of the basic switch and the converter primitive, three
distinct combinations are obtainable. Out of these, two are identical with the configurations shown in fig.
13(a) and fig. 13(c). The third configuration obtained is shown in fig. 14, which is different from those
derived previously. The converter of fig. 14 has a slight disadvantage in terms of the discontinuous input

and output currents, causing high ripple. Some sources, like lead-acid batteries, are unable to tolerate large
current ripples. A method to solve this is to arrive at a topological equivalent, which is shown in fig. 15

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 + +
_ _
Vin Vout

Figure 14: A distinct converter configuration with the voltage-stiff switch cell.

below. This is obtained by “pushing” the inductor through the pole of the switch into the two throws. Note
that BRI is not violated.

+ + + +
_ _ _ _
Vin Vout Vin Vout

(a) (b)

Figure 15: (a) Original converter of fig. 14, showing pushing of inductor. (b) Resultant configuration.

So, in all, we have been able to derive 4 basic converter configurations, each with its distinct set of charac-
teristics. Table ?? summarizes these results and the popular names for each of these configurations.

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 Table 2: Summary of basic converters.

+ +
_ Vin Vout _ Buck converter

Step-down converter

+ +
_ Vin Vout _ Boost Converter

Step-up Converter

+ +
_ Vin Vout _ Buck-Boost Converter

Step-up-down Converter

+
_
+
_
Ćuk∗ Converter
Vin Vout

∗
pronounced “Chook”

Now, we shall find out the steady-state behaviour of these converters.

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Dr. P. Sensarma, Department of Electrical Engg, IIT-Kanpur, India. 14
 Steady-state Analysis
The meaning of steady-state in relation to SMP converters is first explained. Intuitively, a system in steady-
state is understood as one which does not change with time. In this context, the “states” of a system is
a useful concept and could be understood as the smallest set of variables, the values of which completely
describe the condition of that system. It turns out that in any physical system, these state variables have
certain properties.
• The state variables are invariably associated with energy storage elements in the system.
• Square of a state variable associated with an energy storage element is indicative of the energy contained
in that element.
• Time variation of a state variable is dependent on its previous values (and of course the input). This
property is sometimes described by saying that state variables have “memory”.
Search for energy storage elements in a physical system can sometimes be very laborious. But in electrical
systems, it is a little easier since these elements are either inductors or capacitors. The natural choice of state
variables are inductor currents and capacitor voltages but this choice is not unique.

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 x1
A system is intuitively understood to be in steady state
when the inductor currents and capacitor voltages do
not change with time. Graphically, in a system with x2 t
state variables {x1 , x2 , x3 }, the steady condition is de- Steady
scribed by fig. 16. Prior to instant t1 , indicated by state
the dotted line, the system was not in steady-state but t
x3
attains steady-state after t1 . Mathematically stated,

lim x(t + ∆t) − x(t) = 0, t ≥ t1 . (10) t1 t

∆t→0

Figure 16: A system in steady-state.

However, due to switching action, the elements in a switch mode circuit are subject to discontinuous inputs.
This will definitely cause the state variables to vary with time. So, we have to relax our concept of steady-
state when dealing with SM circuits. A SMP circuit will be treated as a steady-state system when there is
no net change in the state variables.

An example of this relaxed concept is shown in

x1
fig. 17. It shows the time variation of the state
variables {x1 , x2 , x3 } of an arbitrary three-state
doubt system. Each of these variables reaches a defi- t
nite value (finite) at each of the individual time
instants t1 , t2 , t3 , t4 . In between these time in- x2
stants, the variables are free to vary within finite
limits. In our new understanding we will treat t
this system to be in steady-state. We shall con-
fidently use this new understanding if the varia- x3
tions within the time instants are not very large. t
Note that if a different set of time instants are t1 t2 t3 t4
chosen then the same system may not appear to
be in steady-state. Figure 17: Steady-state in a switch mode system.

To get some sort of uniqueness in the definition, these time instants are synchronized with the operation
of the switch in the converter circuit. We define the time interval between successive switch turn-on (or
turn-off) instants as the switching period, TS . Mathematically, our new concept of steady-state condition is
then stated as
x(t + TS ) − x(t) = 0 (11)
which means that the net change in the state variable x over one switching period is zero. Note that (11) is
exactly same as the definition of a periodic variable. Therefore, in steady-state, the state variables of a SMP
converter are periodic with a period equal to TS . This implies that mean value of the state variable over one
switching period
1 t+TS
Z
< x >= xdt (12)
TS t
is exactly equal to the mean over the subsequent switching periods under steady-state condition.

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 Lecture 3

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 Steady-state Voltage Gain of Basic Converters
For a power electronic converter, (11) leads to these two well-known steady-state conditions.
Z t+TS
Flux-balance condition vL dt = L{iL (t + TS ) − iL (t)} = 0. (13)
t
Z t+TS
Charge-balance condition iC dt = C{vC (t + TS ) − vC (t)} = 0. (14)
t

We shall apply these two conditions (13) and (14) to derive steady-state voltage gains. Initially, we shall
consider only ideal (lossless) elements.

We shall quickly introduce some useful definitions before proceeding further.

TON : the on-time of a switch or the time duration for which the switch is on.
TOF F : the off-time of a switch which is the time duration for which the switch is off.
Note that the switching period TS is the sum of on-time and off-time, i.e.

TS = TON + TOF F . (15)

D: the duty-ratio defined as the ratio of the on-time and the switching period. So,
TON TOF F
D= . D′ = (1 − D) = . (16)
TS TS
The steady-state conditions (13) and (14) are usually interpreted as follows.
Z t+TS Z t+TON Z t+TS
vL dt = vL dt + vL dt = 0 (17)
t t t+TON

and Z t+TS Z t+TON Z t+TS

iC dt = iC dt + iC dt = 0. (18)
t t t+TON

Small Ripple Approximation (SRA)

A simplified analysis of the steady-state behaviour of SMP converters is possible with a realistic approx-
imation, known as the small-ripple or linear-ripple approximation. This requires the ripple (high-frequency
variations) of the selected state variable to be insignificant for consideration in steady-state analysis. Cor-
responding results obtained are realistically accurate for a proper understanding of the converter, without
resorting to complicated mathematics. We use simple mathematics and do not get the exact results. But
with the low-frequency behaviour that we do get, the error is so small that it just does not justify an exact
(laborious) analysis. Since in a well-designed converter the ripple on its internal states is sufficiently low, this
approximation is quite realistic.

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Dr. P. Sensarma, Department of Electrical Engg, IIT-Kanpur, India. 18
 Buck Converter
The Buck converter circuit is shown in fig.18a, which shows the generalized schematic. The voltage source Vi
supplies energy while Vo consumes it. The load needs to be voltage stiff, so another circuit schematic with a
passive load is shown in fig.18b.

iL

+ _
1 1 +
+ 0 + + 0 L
_ Vi Vo _ _ Vi C Vo
R
_

(a) Schematic 1: Active load. (b) Schematic 2: Passive load.

Figure 18: Buck Converter circuit.

The inductor voltage is noted for the two different positions of the switch with SRA applied to the output
voltage.

Switch position: 1 Switch position: 0

Inductor voltage vL = Vi − Vo vL = −Vo

R R
Inductor voltage integral vL dt = (Vi − Vo )TON vL dt = −Vo TOF F

Application of the flux balance condition yields

(Vi − Vo )TON − Vo TOF F = 0 (19)
Vi TON = Vo (TON + TOF F ) = Vo TS
∆ Vo TON ∆
AV = = = D.
Vi TS

1.0

0.9

0.8

0.7
Gain (A_v)

0.6

0.5

Voltage gain (AV ) is a linear function of its duty 0.4

0.3

ratio, D, as shown in fig. 19. 0.2

0.1

0.0
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0

Duty ratio (D)

Figure 19: Voltage gain of ideal buck converter.

NOTE Applying the charge balance condition,

Z t+TON Z t+TS
(iL − i0 )dt + (iL − i0 )dt = 0
t t+TON

leading to
Z t+TS Z t+TS
iL dt = i0 dt. (20)
t t
Dividing both sides of (20) by the switching period TS , we get
Z t+TS Z t+TS
1 1
iL dt = i0 dt. (21)
TS t TS t

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Dr. P. Sensarma, Department of Electrical Engg, IIT-Kanpur, India. 19
 WE can also say that average value of capacitor current will be 0.

implying that over a switching period, the average values of the inductor current and output currents are
equal. This average is known as the duty cycle average and is denoted as
t+TS t+TS
1 1
Z Z
∆ ∆
< iL >= iL dt = i0 dt =< io > . (22)
TS t TS t

Total energy supplied from the source in one switching cycle Vavg *Iavg*Ts
Z TS Z DTS
Ei = Vi TS ii dt = Vi TS iL dt (23)
0 0

where, ii is the input (source) current.

Now is a good time to look at the waveforms of some of the variables. Using SRA on the output volt-
age, the inductor variables are shown in fig. 20. These do not surprise us now, we have derived the voltage

S(t)

t
vL
(Vi − Vo )

−Vo t

iL
<i L>
I2
(Vi− Vo )/L −Vo /L I1

DTS TS (1+D)T S 2TS t

Figure 20: Buck converter: inductor voltage and current waveforms in steady-state.

gain in (20) using the same inductor voltage waveform. Making use of the piecewise linear nature of the
inductor current waveform, the duty cycle average of the inductor current is derived geometrically.
 
1 DTS D ′ TS (I1 + I2 )
Simple < iL >= (I1 + I2 ) + (I1 + I2 ) = . (24)
TS 2 2 2

So,
I1 + I2 I1 + I2
I1 − = − I2 = ∆I. (25)
2 2
Thus, in each switching cycle, the current waveform reaches the average value < iL > at instants DTS /2 and
DTS + D′ TS /2. Hence,
Z TS
1
iL dt =< iL > . (26)
DTS 0
Using (20), (22) and (26), (23) is simplified as

Ei = Vi (D < iL >) TS = (Vi D) < iL > TS = Vo < io > TS = Eo (27)

which shows that the energy supplied from the source (Ei ) in one switching cycle is completely delivered to
the output (Eo ). This implies that no energy is retained or lost in the converter, over a switching cycle, which
do proving
confirms its lossless property. Just to complete this study, both sides of (27) are divided by the switching
period to obtain that the average power delivered from the source is equal to the average power delivered to
the load.
Ei Eo
< Pi >= = =< Po > . (28)
TS TS

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Dr. P. Sensarma, Department of Electrical Engg, IIT-Kanpur, India. 20
In all the discussion so far, we have always considered that the inductor current does not become zero. This
was possible because the SPDT switch was considered ideal. In practice, most of these switches are capable
of conducting current in only one direction. Thus in many practical buck converters, the inductor current
can become zero when the load is light i.e. the energy stored in the inductor during the ON interval is
completely transferred to the load before the switching period gets over. In such situations, the inductor
current remains zero for a finite interval of time. This situation is called the Discontinuous Mode (DCM) of
the circuit operation. In DCM, thus the average inductor current is less than the ripple current amplitude.
Mathematically, this condition is expressed as Draw and visualize

< iL >Ts < ∆iL (29)

and the converse condition, called Continuous Conduction Mode (CCM), when iL does not remain zero over
any finite time interval, is ensured when

DOUBT < iL >Ts ≤ ∆iL . (30)

reverse the inequality
So, to ensure CCM,
Vg − Vo Vo
DTs ≤ .
2L R
2L ∆
(1 − D) ≤ =K (31)
RTs
This inequality can be expressed in multiple forms like
2L
Rcrit ≤ (32)
(1 − D)Ts
or
Dcrit ≥ (1 − K). (33)

These forms are useful during converter design and, in each, the right hand side of the inequality is treated
as a constant.

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Dr. P. Sensarma, Department of Electrical Engg, IIT-Kanpur, India. 21
 Boost Converter
Fig. 21 shows the boost converter in passive load configuration. Steady-state analysis proceeds as fol-
lows.
iL
+ L _ 0 +
+
_ Vi 1 C Vo
R
_

Figure 21: Passive load schematic of a boost converter.

Switch position: 1 Switch position: 0

Inductor voltage vL = Vi vL = Vi − Vo
R R
Inductor voltage integral vL dt = (Vi )TON vL dt = (Vi − Vo )TOF F

Using flux-balance condition on the inductor,

Vi TS = Vo TOF F
Vo
∆ 1
⇒ Av = = (34)
Vi D′

12

10
Voltage gain (A v )

Variation of voltage gain with duty ratio is shown 6

in fig. 22. Note that gain at zero duty ratio 4

is unity. This corresponds to the switch being
2
permanently off.
0
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
Duty Ratio (D)

Figure 22: Voltage gain of ideal boost converter.

Applying charge balance condition on the output capacitor,

 
DELTA I is the deviation from the mean Vo Vo
TON + IL − TOF F = 0
R R
 
Vo 1
⇒ IL = . (35)
R D′
Using (34) and (35), energy supplied from the source in one switching cycle,

Vo Vo2
Ei = Vi IL TS = Vi T S = = Eo . (36)
RD′ R
Again, lossless property of the converter is confirmed.
For CCM operation, the defining condition is obtained as
Vo 1 Vg
≥ DTs NOTE THE 2
R D′ 2L
2 2L
⇒ DD′ ≤ =K (37)
RTs

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Dr. P. Sensarma, Department of Electrical Engg, IIT-Kanpur, India. 22
 Buck-boost converter
The passive load circuit schematic of the buck-boost converter is shown in fig. 23. Analysis of the steady-state

1 0 +
+ +
_ Vi iL C Vo
_ R
L _

Figure 23: Passive load schematic of a buck-boost converter.

behaviour of the converter proceeds as follows.

Switch position: 1 Switch position: 0

Inductor voltage vL = Vi vL = Vo
R R
Inductor voltage integral vL dt = (Vi )TON vL dt = (Vo )TOF F

Applying flux-balance to the inductor, with SRA applied to the output voltage,
Vo TON D
(Vi )TON + (Vo )TOF F = 0 ⇒ = = − ′. (38)
Vi TOF F D

12

10
Voltage gain (A_v)

Variation of voltage gain with duty ratio is shown 6

in fig. 24. Note that gain at zero duty ratio is 4

zero, while it attains large values at duty ratio 2

increases.
0
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
Duty ratio (D)

Figure 24: Voltage gain of ideal buck-boost converter.

Applying charge balance on the output capacitor, with SRA applied to the inductor current
     
Vo Vo Vo 1
− TON − IL + TOF F = 0 ⇒ IL = − (39)
R R R D′

Using (35) and (38), it is obvious that, Ei = Eo , confirming again the lossless feature of the converter.

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Dr. P. Sensarma, Department of Electrical Engg, IIT-Kanpur, India. 23
The figure beside shows the current waveforms through
the inductor, source and load. The source current here is
S(t)
discontinuous, as with the buck converter. Additionally,
the load current is also discontinuous here. Using the same t
reasoning, energy drawn from the source in one switching iL
cycle is <i L>
I2
(Vi /L) Vo /L I1
Ei = Vi < ii > TS
t
= Vi D < iL > TS . (40) ii

Similarly, energy delivered to the load in one switching t

cycle is io

Vo2
Eo = TS DTS TS (1+D)T S 2TS t
R
= Vo < io > TS Figure 25: Inductor, source and load currents in a
= Vo D′ < iL > TS . (41) buck-boost converter.

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Dr. P. Sensarma, Department of Electrical Engg, IIT-Kanpur, India. 24
 Lecture 4

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Dr. P. Sensarma, Department of Electrical Engg, IIT-Kanpur, India. 25
 Non-idealities in power electronic circuits
Till now we have considered that all elements of the power electronic circuits viz. inductor, capacitor and
switch are ideal lossless electrical elements. But that’s an idealized approximation to give us a start and get
a first idea of what can be done with these circuits in terms of their steady-state properties. We now take
a step ahead and see what happens if real elements are used to build real circuits. We wish to see whether
those wonderful properties of the converters are retained or whether some limitations are brought in. We will
begin this lecture with a brief look at the electrical model of these real elements.

Model of a real capacitor at low to moderate frequencies is depicted in +

C
the figure alongside. This comprises a resistor (RESR ) in series with
the ideal capacitor. This resistance appears due to the finite resistivity
of the material which forms the leads of the capacitor. Its dynamic vC iC
property is now completely specified by the following relationship.
RESR
1
Z
vC = RESR iC + iC dt. (42) _
C
Figure 26: Real capacitor model.

The figure beside shows the model of the real inductor at low to moder- +
ate frequencies. This comprises a resistor (RL ) in series with the ideal
L
inductor, which is still assumed to be linear i.e. its core is assumed to
be unsaturated during its entire range of operation. This resistance ap- v
L iL
pears due to the finite resistivity of the wire material used to make the
coil. Its dynamic property is now completely specified by the following RL
relationship. _
diL
vL = RL iL + L (43)
dt Figure 27: Real inductor model.

The ON state model of the real switch is represented by the general

model in the ON state shown in this figure. This model is applicable +
for all minority carrier devices. This comprises a resistor (RD ) in series
Vγ
with an ideal voltage sink (Vγ ), which represents the cut-in voltage of +
_
the switch. The resistance appears due to the finite effective resistivity
of the semiconductor material. Its dynamic property is now completely vs is
specified by the following relationship.
RD
vs = Rs is + Vγ . (44) _

For majority carrier devices, the model includes only the ON-state Figure 28: Real switch model.
resistance term (RD ) and the cut-in voltage is absent.

We shall now look at a method to analyze the effect of these non-idealities.

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Dr. P. Sensarma, Department of Electrical Engg, IIT-Kanpur, India. 26
 DC-Transformer equivalent circuit
The name may raise a few concerns: “dc” and “transformer” do not appear together in electrical engi-
neering. However, it can be shown that if the transformer core is made from an ideal material which does
not saturate, then this ideal transformer would scale unidirectional voltages and currents just the same way
as it handles alternating quantities. Using this ideal transformer construct, convenient equivalent circuits
for the basic converters can be derived as will be shown subsequently. These equivalent circuits are useful
for evaluating voltage gain and regulation of real converters using models of real elements which were stated
earlier. However, circuit efficiency cannot be evaluated since switching losses of the semiconductor switches
are not included in these equivalent circuits.

The circuit symbol of the dc transformer is shown alongside. The 1:N

lines indicating coupling of the two coils are as shown, which dis-
tinguishes it from the real transformer. The dot polarities are I1 + +I
2
indicated. Voltage and current relationships are as mentioned
V1 V2
below.
V2 I1
= = N. (45)
V1 I2
So, essentially, this is a lossless amplifier.
Figure 29: DC Transformer model.

Using this ideal transformer, converter equivalent circuits are developed based on certain rules or steps. We
shall first state these steps and then apply these to the three basic converters. This will enable the reader to
derive equivalent circuits for other converters using the same procedure.

Rules for deriving converter dc equivalent circuits

1. Note the gain of the ideal converter.
2. Represent the switches with SPDT switches. At this stage consider all elements to be ideal.
3. Identify the pole(s) of the switch(es) in the schematic. These are the focal points on which the equivalent
circuit is developed. If the scheme does not have the pole connected to an inductor, redraw the schematic
with inductor connected to the pole.
4. Note the duty-ratio with each throw. Denote the inductor current as a current source ((I) connected
to primary windings of two dc-transformers, one on each side as shown in fig. 30. Under continuous

1:D D’:1

Figure 30: Inductor current coupled to both throws of SPDT switch.

conduction, turns-ratios of these transformers will be D and D′ as shown.

5. Complete the circuit of each of the two remaining windings. For example, with a buck converter, the
model with ideal elements would look like as shown in fig. 31. SRA is applied on the output capacitor,
which therefore does not appear in the steady-state equivalent.
6. Include the steady-state models of the elements connected to each pole and throw, in series with the
appropriate windings. For example, including just the internal resistance (RL ) of the inductor, the
equivalent circuit looks like as shown in fig. 32.
7. This completes the equivalent circuit. All the rules of conventional ac transformer equivalent circuits
are applicable here. There is one special rule for resistances to be included in the outer circuits. If you

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Dr. P. Sensarma, Department of Electrical Engg, IIT-Kanpur, India. 27
 1:D R D’:1
+ _
Vo
I
Vg +
_

Figure 31: Equivalent circuit of the ideal buck converter.

1:D R RL D’:1
+ _
Vo
I
Vg +_

Figure 32: Buck converter equivalent circuit with real inductor.

have to include the source resistance (RS ) in fig. 32 and you want to include it in the input loop, then
instead of RS , you have to enter it as RS /D. Fig. 33 shows the complete equivalent circuit including
the source resistance and the ON-state model (Vγ2 , RD2 ) of the complementary switch.
But do not scale the load resistance. (Why?)

R S /D 1:D R RL D’:1
+
_

+ _
Vo
Vγ2
Vg +_ RD2 /D’
I

Figure 33: Buck converter equivalent circuit with real inductor, complementary switch and source.

This circuit can now be used for analyzing steady-state behaviour of the converter.
Using these rules the exact output voltage of the three basic converters will now be evaluated.

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Dr. P. Sensarma, Department of Electrical Engg, IIT-Kanpur, India. 28
 Buck Converter
Using standard manipulations with a transformer circuit,
 
D (Vg − Vγ1 ) − D′ Vγ2
Vo = R . (46)
R + RL + D(RS + RD1 ) + D′ RD2

Boost Converter
Going through the motions of developing the equivalent circuit for the boost converter, fig. 34 is obtained.

RD1 /D R RL
1:D D’:1
+

+
_
_

_
+ Vo
_
Vg Vγ2
Vγ1 RD2 /D’
+ I

Figure 34: DC equivalent circuit of boost converter.

Using the same steps to find the output voltage,

Vg − D′ Vγ2 − DVγ1
Vo = (RS +RL +D′ RD2 +DRD2 )
. (47)
D′ + RD′

Buck-boost converter
The corresponding dc equivalent circuit for the buck-boost converter is shown in fig. 35.

RD1 /D
1:D D’:1
+
_

_ RL RD2 /D’ +
Vγ1 Vγ2
+ R Vo
+ Vg I
_ _

Figure 35: DC equivalent circuit of buck-boost converter.

The output voltage,in the presence of all non–idealities is as follows.

 
D(Vg − Vγ1 ) − D′ Vγ2
Vo = − R. (48)
D′ (R + DRD1 + RL + D′ RD2 )

Note that the dc transformer equivalent circuit cannot be used to estimate efficiency of the
converter. This is because switching losses are not modeled here.

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Dr. P. Sensarma, Department of Electrical Engg, IIT-Kanpur, India. 29