Tuto 8
Tuto 8
[1]. Consider 15-stage pipeline CPU having delay of 3ns per stage. (a) Calculate total time to execute 75
instructions by this pipeline CPU. Calculate Speed up factor, Efficiency and Instruction throughput
(inst./ns and inst./clock) neglect latch delay.
[2]. Write an efficient ARM assembly code to compute following where x,y and z are signed numbers.
Assume that x and y are available in registers R0 and R1 and z is to be stored in R2.
if (x < 11 ) z = x + (y/64);
else if (x= =11) z = z – (y*4);
else z = (32* y) – x ;
Ans 1:
No. of stages k=15
Number of instructions n=75
Pipe line clock period tc=3 ns
(a) It will require (15+74) clock cycle to execute 75 instructions in pipeline CPU
Total time in pipeline CPU is Tk= 89 tc => Tk= 267 ns
(b) Speed up factor Sk= Total time in Non-pipeline / Total time in pipeline
= n k tc / [k+(n-1) tc] = 3375/267 = 12.64
- Efficiency Ek = Sk /k => Ek = 0.84
- Instruction throughput of pipeline Hk = n/ Tk => Hk=0.28 inst/ns
Hk= 0.28 inst./ns = 0.84 inst./3ns = 0.84 inst./clock
Ans 2: