Project Report

EE615: Mixed Signal IC Design

Band Pass Filter ADC .

Rahul Mhatre
Table of Contents
1 Introduction............................................................................................................................. 3

2 Single Stage Band Pass Filter................................................................................................ 3

2.1 Signal to Noise Ratio Estimation and Effective Number of bits...................................5

3 Three Stage Band Pass Filter................................................................................................. 6

3.1 Signal to Noise Ratio Estimation and Effective Number of bits...................................7

4 Single Stage Band Pass Filter Implementation and Simulations.............................................8

4.1 Comb Filter Implementation for K=16..........................................................................8

4.2 Resonator R(f) implementation....................................................................................8

4.3 Band Pass Filter Implementation.................................................................................9

4.4 Sign Bit Extension from Binary to Two’s Complement conversion............................10

4.5 Simulations and Verification of the theory for a single stage Band Pass filter...........11

5 Three Stage Band Pass Filter Implementation and Simulations...........................................12

5.1 Simulations and Verification of the theory for a three stage ADC Band Pass filter with
K=16. 14

5.2 Requirement on the Antialiasing Filter.......................................................................15

6 IQ Demodulation for a sigle stage ADC Band Pass Filter.....................................................15

6.1 Simulations and Verification for the IQ Demodulator using the Band Pass Filter with
K=16. 17

6.2 Decimation at the output of the IQ Demodulator........................................................18

1 Introduction
The objective is to design a BPF ADC for communications chip. The specifications are as given below.

1. The ADC is a 4-bit Flash type with Vref+ = 1.5 V (VDD) and Vref- = 0V
2. The ADC and bandpass filter are clocked at 100 MHz
3. The bandpass response is centered on 25 MHz so a comb filter(s) and fs/4 resonator(s) are used
4. The bandwidth of the main lobe should be fs/8 so K=16 in the comb filters
5. At least 30 dB attenuation between the main lobe and the first side lobe

2 Single Stage Band Pass Filter

For K = 16, the transfer function of the comb filter is given as

K
C( f )  1  z
(2.1)
1
R( f ) 
( z  j )( z  j )
1
R( f )  2
z 1 Z-2 in the numerator is a phase shift and has no effect on the magnitude.
2

R( f )  z 2
Therefore we will use

1 z
R( f )  1 2
1 z
(2.2)

The band pass filter is formed by cascading the comb filter and the resonator. The transfer function for the
band pass filter is given by

H ( f )  C ( f ).R ( f )

K
1 z
H( f )  2
1 z
For K = 16, we get:
 16
1 z
H( f )  2
1 z
(2.3)
j2∏f/fs
The frequency response is given by substituting z = e . After the substitution and simplification we get,
the following magnitude response.

21  cos 1K 2 f 
 fs 
H( f ) 
21  cos 4 f 
 fs 

sin K f
fs
H( f ) 
cos 2 f
fs

For K = 16, we get

sin 16 f
fs
H( f )  (2.4)
cos 2 f
fs

The main lobe to side lobe attenuation for this function is given by the equation:

Mainlobe K 3
 sin
Sidelobe 2 K
(2.5)

For K = 16, we get

Mainlobe 16 3
 sin = 4.44 = 13dB (2.6)
Sidelobe 2 16

For this particular stage of the filter we get an attenuation of 13db as shown below using the MATLAB
utility.

4
 Magnitude Response (dB) Magnitude Response (dB)
20

Frequency (Hz): 0.2498779 Frequency (Hz): 0.2498779

15 Magnitude (dB): 18.06175 Magnitude (dB): 18.06175
15

10
Magnitude (dB)

10

Magnitude (dB)
Frequency (Hz): 0.3387451
Magnitude (dB): 5.250566 Frequency (Hz): 0.3392334
5 Magnitude (dB): 5.259994
5

0
0

-5
-5
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
Frequency (Hz) 0.22 0.24 0.26 0.28 0.3 0.32 0.34 0.36 0.38
Frequency (Hz)
Figure 1a: Main lobe to Side lobe attenuation for a
Figure 1b: Main lobe to Side lobe attenuation for a
single stage Band Pass filter with K = 16.
single stage Band Pass filter with K = 16.

Phase Response Pole/Zero Plot

3
1

0.8
2
0.6

0.4
1

Imaginary Part
0.2
Phase (radians)

14
0
0
-0.2

-0.4
-1
-0.6

-0.8
-2
-1

-1.5 -1 -0.5 0 0.5 1 1.5

-3 Real Part
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
Frequency (Hz)
Figure 1d: Pole Zero Plot for a Band pass filter with
Figure 1c: Phase response for a Band pass filter K=16
with K=16

2.1 Signal to Noise Ratio Estimation and Effective Number of bits

fs/K fs/K

fs/4 3fs/4

Figure 1.e: Estimation of the SNR

5
As can be seen from the figure, there is noise shaping in the pass band. We assume that all the noise lies in
the base band from 0 to fs. Averaging K inputs at the f s/4 pass band, assuming Bennett’s criteria hold true,
is as given below. Because of the symmetry we will integrate from 0 to fs/2 and multiply by two.

2 2 2 1.5
V fs / 2
V fs VLSB fs 1 VLSB 1
VQe, RMS  2.  LSB
H ( f ).df  2. LSB
.  2.  .  . 16  9.56mV
0 12 fs 12 fs K 12 fs K K 12 8 12
2
The SNR for the single stage band pass filter, is given by

 Vp 
 2 
SNRideal  6.02 N  1.76  10 log( K / 2)  20 log   34.88dB
 VQe, RMS 
 

N is the ADC output bits. The Effective Number of bits is N+Ninc, Ninc can be found as

10 log K / 2 
Ninc   1.5 Bits
6.02

The effective number of bits is ENOB= 4+1.5=5.5 bits.

3 Three Stage Band Pass Filter.

Since we need total 30 dB attenuation between main and the side lobes, we have to cascade 3 such stages of
the band pass filter.

For the three stage BPF filter, the transfer function is as given below.

3
 1 z 16 
H( f )  
 1  2 
 z 
(2.7)

Substituting z= e j2∏f/fs

6
  1  e j 2f 16 fs 
H( f )   
3

 j e j 2f (16) fs e j 2f 16 fs  e j 2f 16 fs 
   3

 1  e j 2f 
 fs 
 e j 2f (2) e j 2f  e j 2f
 fs fs  fs 
 
 j e j 2f (14) fs sin 16f
   

3

 
fs
H( f ) 
 cos
2  f 
 fs 
   16f 3
sin (2.8)
3 42f 
 
 
  
fs
H( f )  e j 2 

fs  
 2f
cos
  fs

 sin 16f
 fs    3

H( f ) 
 cos 2f
 fs
  
Angle[ H ( f )]  3  42f
2 fs

The MATLAB simulation for the magnitude response and the pole-zero plot is as shown below

Magnitude Response (dB) Magnitude Response (dB)

50 Frequency (Hz): 0.2498779 50 Frequency (Hz): 0.2496338

Magnitude (dB): 54.18524 Magnitude (dB): 54.18395
40 40
Magnitude (dB)

30 30
Magnitude (dB)

Frequency (Hz): 0.3371582 Frequency (Hz): 0.3398438

20 Magnitude (dB): 15.54908 20 Magnitude (dB): 15.79333

10 10

0 0

-10
-10

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9

0.18 0.2 0.22 0.24 0.26 0.28 0.3 0.32 0.34 0.36 0.38
Frequency (Hz)
Frequency (Hz)

Figure 2a: Main lobe to Side lobe attenuation for a Figure 2b: Main lobe to Side lobe attenuation for a
three stage Band Pass filter with K = 16. three stage Band Pass filter with K = 16.

7
 Phase Response Pole/Zero Plot
0 3
1 3 3
-10 0.8 3 3
-20 0.6

0.4 3 3
-30

Imaginary Part
0.2
-40
Phase (radians)

3 42 3
0
-50
-0.2
-60 3 3
-0.4
-70
-0.6
3 3
-80 -0.8
3 3
3
-90 -1

-1.5 -1 -0.5 0 0.5 1 1.5

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
Real Part
Frequency (Hz)

Figure 2c: Phase response for a Band pass filter Figure 2d: Pole Zero Plot for a 3 stage Band pass
with K=16 filter with K=16

3.1 Signal to Noise Ratio Estimation and Effective Number of bits

For a cascade of 3 Band Pass filters, the increase in the number of bits, N inc is

Ninc 

10 log  K / 2 
3
  4.5Bits
6.02

The Effective number of bits is ENOB = 4 + 4.5 bits = 8.5 bits

The SNR ratio is given as

SNRideal  6.02ENOB  1.76  52.93dB

The RMS value of Quantization Noise is given as

2 1.5
2 2
V V f LSB fs
fs / 2
V 1 VLSB 1
 . 16  9.56mV
LSB LSB s
VQe, RMS  2.  H ( f ).df  2. .  2.  .
0 12 fs 12 fs K 12 fs K K 12 8 12
2

4 Single Stage Band Pass Filter Implementation and Simulations.

4.1 Comb Filter Implementation for K=16.

The transfer function of the resonator is as given in Equation (2.2). The implementation is as given in the
block diagram below.

8
Figure 4.1a: Comb filter implementation Block
diagram

Figure 4.1b: Lspice Implementation of the comb

filter.

The MATLAB simulation is as shown below.

Magnitude Response (dB) Pole/Zero Plot

7 1

6.5 0.8

6 0.6

5.5 0.4
Imaginary Part
Magnitude (dB)

5 0.2

4.5
16
0

4 -0.2
3.5 -0.4
3 -0.6
2.5
-0.8
2
-1

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 -1.5 -1 -0.5 0 0.5 1 1.5
Frequency (Hz) Real Part

Figure 4.1c: Comb filter Magnitude response for Figure 4.1d: Pole Zero plot for the Comb filter with
K=16 K = 16.

As can be seen from Figure 4.2b, the gain through the comb filter stage is 6dB (a gain of 2). Therefore
there is an increase of bit from the input of the comb filter to the output of Comb filter.

4.2 Resonator R(f) implementation

The transfer function of the resonator is as given in Equation (2.2). The implementation is as given in the
block diagram below.

9
Figure 4.2a: Resonator implementation Block
diagram
Figure 4.2b: Lspice Implementation of the
Resonator

The MATLAB simulation for a cascade of comb filter and a resonator is as shown below is as shown
below.

Magnitude Response (dB) Pole/Zero Plot

Frequency (Hz): 0.248291 0.8

15 Magnitude (dB): 18.05128
0.6

0.4
10
Imaginary Part
Magnitude (dB)

0.2
16
2
0
5 -0.2

-0.4

0 -0.6

-0.8

-5 -1

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 -1.5 -1 -0.5 0 0.5 1 1.5
Frequency (Hz) Real Part

Figure 4.3a: Comb filter and resonator Magnitude Figure 4.3b: Pole Zero plot for the Comb filter with
response for K=16 K = 16.

From Figure 4.3b we see that the gain of the Band pass filter is 18dB (8). Therefore the gain of the
resonator stage is 4. This gives a gain of 4 for the resonator stage, which is an increase of 2 bits.

4.3 Band Pass Filter Implementation.

The transfer function for the single stage Band Pass Filter is given in Equation (2.3). The Single Stage
Band Pass filter is a cascade of a resonator and a comb filter for K=16. The ADC implementation is as
shown below for 4 bits. We connect the comb filter at the input before the resonator because comb filter
has 16 4 bit registers. If we use resonators before the comb filter, the size of the input word of the comb
filter becomes six and we need 16 six bit registers. Therefore to save the hardware we use the comb filter
before the resonator.

5bits 7bits
4bits
Sample- Comb filter Resonator
Vin Hold DAC Vout

VQe( f )

10
Figure 4.4: ADC Band Pass Filter implementation.

4.4 Sign Bit Extension from Binary to Two’s Complement conversion.

Decimal Number 5 Bit Binary offset at 7 Bit Binary Offset at
Comb Filter output Resonators Input

1 10001 1000001

0 10000 1000000

-1 01111 0111111

Table 4.1 Sign extension for the Binary Offset to Two’s complement conversion.

As can be seen from Fig 4.3 going from the Comb filter output to Resonator output, there is an increment
of 2 bits. The output of Comb filter is 5 bits. To handle the seven bits at the resonator in 2’s complement
format, the MSB of the output of the Comb filter is inverted and fed to the incremental new bits at the
resonator input, which lie between the MSB and the lower significant bits of the comb filter output (to
handle the scaling). The 2’s complementing is handled inside the blocks of the resonators and the comb
filter. The MSB of the comb filter output is connected to the MSB input of the resonator to handle the
common mode voltage.

4.5 Simulations and Verification of the theory for a single stage Band Pass filter.
Shown below are the simulations for different frequencies. The inputs and outputs are as below.

11
Figure 4.5a: 25MHz Input and corresponding Figure 4.5b: Frequency Response of the input and
output. Signal in the pass band. output. Input is at -6dB and output is at -7.5dB.

Figure 4.5c: 15.625 MHz Input and corresponding Figure 4.5d: Frequency Response of the input and
output. Signal in the first side lobe. Attenuation output. Input signal is at -9dB and the output is at
should be around 13 dB as per Equation (2.6). -22.8dB. Attenuation is 12.8dB.

Figure 4.5e: Verification of a zero frequency.18.75 MHz Input and corresponding output. Output is
common mode voltage.

12
Figure 4.5f: Verification of the side lobe around Figure 4.5g: Input tone is at -10dB and the output is
34.375 MHz. at -23dB. Attenuation is -13dB.

The attenuation is more because of Sample and Hold.

5 Three Stage Band Pass Filter Implementation and Simulations.

5bits 6bits
4bits
Comb filter Comb filter
Sample- Comb filter
Vin Hold

VQe( f ) 7bits

Resonator Resonator Resonator

Vout DAC

13bits 9bits
11bits

13
 Figure 5.1a: Block Diagram for the 3 Stage ADC Band Pass Filter for K=16

The block diagrams are as shown below

Figure 5.2a: Implementation of a 5 Bit Comb Filter Figure 5.2b: Implementation of a 11 bit Resonator
for the second stage for the second stage

14
Figure 5.2c: Implementation of a 6 Bit Comb Filter Figure 5.2d: Implementation of a 11 bit Resonator
for the third stage for the third stage

5.1 Simulations and Verification of the theory for a three stage ADC Band Pass
filter with K=16.

Figure 5.3a: 25MHz Input and corresponding Figure 5.3b: Frequency Response of the input and
output. Signal in the pass band. output. Input is at -9dB and output is at -10.5dB.

Figure 5.3c: 15.625 MHz Input and corresponding Figure 5.4d: Frequency Response of the input and
output. Signal in the first side lobe. Attenuation output. Input signal is at -9dB and the output is at-
should be around 39 dB as per Equation (2.6). 51dB. Attenuation is 42dB.

15
5.2 Requirement on the Ant aliasing Filter.
As can be seen in the Figure 5.4, the requirement on the antialiasing filter is now relaxed. The filter need
not have an abrupt cut-off at fs/4 + fs/16. The AAF filter can now linearly transition from fs/4 + fs/16 to 3fs/4
- fs/16. In our case for 100 MHz this linear range is from 31.25 MHz to 68.75MHz.

fs/4 + fs/16 3fs/4 - fs/16

fs/4 3fs/4

Figure 5.4 Requirements on the Antialiasing Filter.

6 IQ Demodulation for a single stage ADC Band Pass Filter.

The block diagram for the IQ Demodulation is as shown below

16
 Figure 6.1: I-Q Modulator Block Diagram and SPICE Implementation

The individual block diagrams within the I-Q Demodulator that are unique to the demodulator are the two’s
complement for the 1 bit sin and cos IF multiplier as shown below and the 12 bit selectors.

Figure 6.2a: COS_SIN block in the IQ

Demodulation. Two’s complement Implementation Figure 6.3b: DEMOD_MUX block in the IQ
for the COS and SIN IF multiplier implementation. Demodulation. This is a 3 input, 12 bit selector.

The multiplication operation of the Band pass signal and Cos IF Multiplier signal is explained as below.
The DEMOS_MUX is our 3 input, 12 bit Multiplexer/Selector whose select bits S1 and S0 are the outputs
of the COS_SIN Block. So basically our multiplication is a multiplexing process, which is explained
below.

17
 Binary Cos IF 2’s complement representation of the COS IF Multiplier. These Output Code of the
Multiplier are the select Bits of DEMOD_MUX (Outputs of COS_SIN selector
block)

1 01 X

0 00 0

-1 11 Complemented
Code X

0 00 0

The mapping between the 2 bit counter in the COS_SIN block and the select bits for the 3 input, 12 bit
Selector block (outputs of the COS_SIN block) is as given below.

2 Bit Counter output Select bits (COS1,COS0) of the Selector DEMOD_MUX(output of the
(X1,X0) COS_SIN block)

00 00

01 01

10 00

11 11

For this mapping we generate the combinational logic. The mapping equations are as below

COS1  X 1. X 0
COS 0  X 0

The SIN IF Multiplier is generated by delaying the COS IF multiplier by one clock cycle.

6.1 Simulations and Verification for the IQ Demodulator using the Band Pass
Filter with K=16.
To verify the demodulator we send an AM modulated signal with the signal frequency of 3Meg, which lies
within the band of fs/2K (in case we want to use the decimation). We make the Quadrature component zero
and use the Inphase component and try to recover the Inphase component with a Low pass Filter.

18
Figure 6.4a: 3 Meg AM Modulated input modulated Figure 6.4b: Frequency Response of the
with a 25MHz Input. Figure also shows Inphase demodulated Inphase Component and output of the
(VoutIn) and Quadrature (VoutQuad) components Low Pass Filter. Input Signal is effectively
and output of Low Pass filter(Vout_LowPassF). recovered.

6.2 Decimation at the output of the IQ Demodulator.

As can be seen in Figure 6.4b above, the signal gets demodulated in the baseband from 0 to fs/2K. We
assume that the signal lies in this bandwidth. Therefore we can decimate down to f s/K. To avoid the
restrictions, we will decimate till 2fs/K. The simulation waveforms for 2fs decimation is as given below. As
can be seen the decimated spectrum is repeated every 12.5 MHZ (our decimation frequency).

Figure 6.5a: 3 Meg AM Modulated input modulated Figure 6.5b: The Inphase component (VoutIn) when
with a 25MHz Input. Figure also shows Inphase decimated is repeated every 12.5 MHz
(VoutIn) components and output of Low Pass (Vout_LOWPassF).
filter(Vout_LowPassF) which is decimated by 2fs/K
(12.5 MHz in our case).

19
20