RCS-985BT

Generator-Transformer Unit Protection

Instruction Manual

Nanjing Nari-Relays Electric Co., Ltd.

 RCS-985BT Gnerator-Transformer Unit Protection

Preface

Introduction

This guide and the relevant operating or service manual documentation for the equipment provide
full information on safe handling, commissioning and testing of this equipment.

Documentation for equipment ordered from NARI-RELAYS is dispatched separately from

manufactured goods and may not be received at the same time. Therefore, this guide is provided
to ensure that printed information normally present on equipment is fully understood by the
recipient.

Before carrying out any work on the equipment, the user should be familiar with the contents of
this manual, and read relevant chapter carefully.

This chapter describes the safety precautions recommended when using the equipment. Before
installing and using the equipment, this chapter must be thoroughly read and understood.

Health and Safety

The information in this chapter of the equipment documentation is intended to ensure that
equipment is properly installed and handled in order to maintain it in a safe condition.

When electrical equipment is in operation, dangerous voltages will be present in certain parts of
the equipment. Failure to observe warning notices, incorrect use, or improper use may endanger
personnel and equipment and cause personal injury or physical damage.

Before working in the terminal strip area, the equipment must be isolated.

Proper and safe operation of the equipment depends on appropriate shipping and handling,
proper storage, installation and commissioning, and on careful operation, maintenance and
servicing. For this reason, only qualified personnel may work on or operate the equipment.

Qualified personnel are individuals who:

z Are familiar with the installation, commissioning, and operation of the equipment and of the
system to which it is being connected;

z Are able to safely perform switching operations in accordance with accepted safety
engineering practices and are authorized to energize and de-energize equipment and to
isolate, ground, and label it;

z Are trained in the care and use of safety apparatus in accordance with safety engineering
practices;

z Are trained in emergency procedures (first aid).

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RCS-985BT Generator-Transformer Unit Protection

Instructions and Warnings

The following indicators and standard definitions are used:

DANGER!

It means that death, severe personal injury, or considerable equipment damage will occur if safety
precautions are disregarded.

WARNING!

It means that death, severe personal, or considerable equipment damage could occur if safety
precautions are disregarded.

CAUTION!

It means that light personal injury or equipment damage may occur if safety precautions are
disregarded. This particularly applies to damage to the device and to resulting damage of the
protected equipment.

WARNING!

The firmware may be upgraded to add new features or enhance/modify existing features, please
make sure that the version of this manual is compatible with the product in your hand.

WARNING!

During operation of electrical equipment, certain parts of these devices are under high voltage.
Severe personal injury or significant equipment damage could result from improper behavior.

Only qualified personnel should work on this equipment or in the vicinity of this equipment. These
personnel must be familiar with all warnings and service procedures described in this manual, as
well as safety regulations.

In particular, the general facility and safety regulations for work with high-voltage equipment must
be observed. Noncompliance may result in death, injury, or significant equipment damage.

DANGER!

Never allow the current transformer (CT) secondary circuit connected to this equipment to be
opened while the primary system is live. Opening the CT circuit will produce a dangerously high
voltage.

WARNING!

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 RCS-985BT Gnerator-Transformer Unit Protection

z Exposed terminals

Do not touch the exposed terminals of this equipment while the power is on, as the high voltage
generated is dangerous

z Residual voltage

Hazardous voltage can be present in the DC circuit just after switching off the DC power supply. It
takes a few seconds for the voltage to discharge.

CAUTION!

z Earth

The earthing terminal of the equipment must be securely earthed

z Operating environment

The equipment must only be used within the range of ambient environment detailed in the
specification and in an environment free of abnormal vibration.

z Ratings

Before applying AC voltage and current or the DC power supply to the equipment, check that they
conform to the equipment ratings.

z Printed circuit board

Do not attach and remove printed circuit boards when DC power to the equipment is on, as this
may cause the equipment to malfunction.

z External circuit

When connecting the output contacts of the equipment to an external circuit, carefully check the
supply voltage used in order to prevent the connected circuit from overheating.

z Connection cable

Carefully handle the connection cable without applying excessive force.

Copyright
Manual: R1.00 NANJING NARI-RELAYS ELECTRIC CO., LTD.
P/N: EN_YJBH2051.0086.0001 69 SuYuan. Avenue, Nanjing 211102，China
Copyright © NR 2009. All rights reserved
Tel: 86-25-87178185, Fax: 86-25-87178208
We reserve all rights to this document and to the information Website: www.nari-relays.com
contained herein. Improper use in particular reproduction and Email: [email protected]
dissemination to third parties is strictly forbidden except where
expressly authorized.

The information in this manual is carefully checked periodically,

and necessary corrections will be included in future editions. If
nevertheless any errors are detected, suggestions for correction or
improvement are greatly appreciated.
We reserve the rights to make technical improvements without
notice.

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RCS-985BT Generator-Transformer Unit Protection

Table of Contents
Preface ........................................................................................................................................... i 

Introduction ............................................................................................................................ i 

Health and Safety ................................................................................................................... i 

Instructions and Warnings ................................................................................................... ii 

Table of Contents......................................................................................................................... iv 

Chapter 1 Introduction ................................................................................................................. 1 

1.1 Application ....................................................................................................................... 1 

1.2 Function ........................................................................................................................... 1 

1.2.1 Protection Functions for Main Transformer ........................................................ 1 

1.2.2 Protection Functions for Step-down Transformer .............................................. 2 

1.2.3 Mechanical Protection .......................................................................................... 3 

1.2.4 Auxiliary Functions ............................................................................................... 3 

1.3 Typical Applications ........................................................................................................ 3 

1.3.1 Typical Applications .............................................................................................. 3 

1.3.2 Configuration Scheme .......................................................................................... 5 

1.4 Features ........................................................................................................................... 6 

1.4.1 High-performance Hardware ................................................................................ 6 

1.4.2 New Protection Technology ................................................................................. 7 

1.4.3 Intellectuality ......................................................................................................... 8 

Chapter 2 Technical Data ............................................................................................................. 9 

2.1 Electrical Specifications ................................................................................................. 9 

2.1.1 Power Supply......................................................................................................... 9 

2.1.2 Alternating Current Input Ratings ........................................................................ 9 

2.1.3 Alternating Voltage Input Ratings ........................................................................ 9 

2.1.4 Binary Input ......................................................................................................... 10 

2.1.5 Binary Output ...................................................................................................... 10 

2.2 Power Supply Output for Optical Isolators ................................................................. 10 

2.3 Mechanical Specifications ............................................................................................ 10 

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2.4 Ambient Temperature and Humidity Range ................................................................ 11 

2.5 Communication Port ..................................................................................................... 11 

2.6 Type Tests ...................................................................................................................... 12 

2.6.1 Environmental Tests............................................................................................ 12 

2.6.2 Mechanical Tests ................................................................................................. 12 

2.6.3 Electrical Tests .................................................................................................... 12 

2.6.4 Electromagnetic Compatibility ........................................................................... 12 

2.7 Certifications ................................................................................................................. 13 

2.8 Protective Functions ..................................................................................................... 14 

2.8.1 Main Transformer Differential Protection .......................................................... 14 

2.8.2 Step-down Transformer Differential Protection ................................................ 14 

2.8.3 Restricted Earth Fault Protection ...................................................................... 15 

2.8.4 Winding Differential Protection .......................................................................... 15 

2.8.5 Impedance Protection ......................................................................................... 16 

2.8.6 Voltage Controlled Overcurrent Protection ....................................................... 16 

2.8.7 Zero-sequence Overcurrent Protection ............................................................. 16 

2.8.8 Directional Zero-sequence Overcurrent Protection ......................................... 17 

2.8.9 Gap Zero-sequence Protection .......................................................................... 17 

2.8.10 Over-excitation Protection ................................................................................ 17 

2.8.11 Breaker Failure Protection ................................................................................ 17 

2.8.12 Breaker Flashover Protection .......................................................................... 18 

2.8.13 Mechanical Protection ...................................................................................... 18 

Chapter 3 Protection Description .............................................................................................. 19 

3.1 Duplicated Main and Backup Protection ..................................................................... 19 

3.2 Fault Detector (FD) ........................................................................................................ 19 

3.2.1 Main Transformer Differential Protection .......................................................... 20 

3.2.2 Main Transformer Backup Protection ................................................................ 21 

3.2.3 Step-down Transformer Differential Protection ................................................ 22 

3.2.4 Step-down Transformer Backup Protection...................................................... 22 

3.2.5 Over-excitation Protection .................................................................................. 23 

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3.2.6 Mechanical Protection ........................................................................................ 23 

3.3 Protection Principle Description .................................................................................. 23 

3.3.1 Preparation Knowledge of Transformer ............................................................ 23 

3.3.2 Differential Protection of Main Transformer/Step-down Transformer............. 25 

3.3.3 DPFC Differential Protection .............................................................................. 33 

3.3.4 Backup protection of main transformer ............................................................ 36 

3.3.5 Over-excitation Protection .................................................................................. 42 

3.3.6 Breaker Flashover Protection ............................................................................ 43 

3.3.7 Breaker Failure Initiation .................................................................................... 44 

3.3.8 Winding Differential Protection .......................................................................... 45 

3.3.9 Restricted Earth Fault Protection for Main Transformer .................................. 47 

3.3.10 Backup Protection of Step-down Transformer ............................................... 51 

3.3.11 Mechanical protection ....................................................................................... 52 

Chapter 4 Self-supervision, Metering and Records ................................................................. 53 

4.1 Self-supervision............................................................................................................. 53 

4.1.1 Startup Self-check ............................................................................................... 53 

4.1.2 Continuous Self-Check ....................................................................................... 54 

4.1.3 CT Circuit Supervision (CTS) ............................................................................. 55 

4.1.4 VT Circuit Supervision (VTS).............................................................................. 56 

4.1.5 List of Alarm Messages ...................................................................................... 57 

4.2 Metering ......................................................................................................................... 64 

4.2.1 Measured Voltages and Currents ....................................................................... 64 

4.2.2 Sequence Voltages and Currents ....................................................................... 65 

4.2.3 RMS of Voltages and Currents ........................................................................... 65 

4.2.4 Differential Current and Relevant Quantities .................................................... 65 

4.2.5 Phase Angles ....................................................................................................... 65 

4.2.6 Measurement Display Quantities ....................................................................... 65 

4.2.7 All Metering Data Displayed on LCD .................................................................. 65 

4.3 Binary Input Signals ...................................................................................................... 71 

4.3.1 Enabling Binary Inputs of Main Transformer .................................................... 71 

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4.3.2 Enabling Binary Inputs of Step-down Transformer .......................................... 72 

4.3.3 Binary Inputs of Mechanical Protection ............................................................ 73 

4.3.4 Auxiliary Binary Inputs ....................................................................................... 73 

4.3.5 Fault Detector Flag Generated Internal by PROT ............................................. 74 

4.3.6 Other Binary Inputs ............................................................................................. 74 

4.4 Event & Fault Recorder ................................................................................................. 75 

4.4.1 Introduction ......................................................................................................... 75 

4.4.2 Event & Fault Records ........................................................................................ 75 

4.4.3 Type of Event ....................................................................................................... 75 

4.4.4 State Change of Binary Inputs ........................................................................... 75 

4.4.5 Relay Alarm Signals ............................................................................................ 79 

4.4.6 Protection Element .............................................................................................. 82 

4.5 Disturbance Record ...................................................................................................... 86 

4.6 Time Synchronization ................................................................................................... 86 

Chapter 5 Hardware Description ............................................................................................... 87 

5.1 Hardware Overview ....................................................................................................... 87 

5.1.1 Front View ............................................................................................................ 87 

5.1.2 Rear View ............................................................................................................. 88 

5.1.3 Functional Block Diagram of RCS-985BT ......................................................... 90 

5.2 Standard Connectors and Terminals ........................................................................... 91 

5.2.1 General Description ............................................................................................ 91 

5.2.2 Pins Definition of ‘1A’ Connectors ..................................................................... 91 

5.2.3 Pins Definition of ‘1B’ Connectors ..................................................................... 92 

5.2.4 Pins Definition of ‘2A’ Connectors ..................................................................... 93 

5.2.5 Pins Definition of ‘2B’ Connectors ..................................................................... 94 

5.2.6 Pins Definition of ‘3A’ Connectors ..................................................................... 95 

5.2.7 Pins Definition of ‘3B’ Connectors ..................................................................... 97 

5.2.8 Pins Definition of ‘4A’ Connectors ..................................................................... 98 

5.2.9 Pins definition of ‘4B’ connectors .................................................................... 100 

5.2.10 Pins definition of ‘5A’ connectors .................................................................. 101 

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5.2.11 Pins definition of ‘5B’ connectors .................................................................. 102 

5.2.12 Pins definition of ‘6B’ connectors .................................................................. 103 

5.2.13 Pins Definition of ‘7B/8B’ Connectors ........................................................... 105 

5.2.14 Pins Definition of ‘9B’ Connectors ................................................................. 106 

5.2.15 Pins Definition of ‘9C’ Connectors ................................................................. 107 

5.2.16 Pins Definition of ‘10B’ Connectors ............................................................... 107 

5.2.17 Pins Definition of ‘10C’ Connectors ............................................................... 108 

5.2.18 Pins Definition of ‘11B’ Connectors ............................................................... 109 

5.2.19 Pins Definition of ‘11C’ Connectors ............................................................... 110 

5.2.20 Pins Definition of ‘12B’ Connectors ............................................................... 111 

5.2.21 Pins Definition of ‘12C’ Connectors ............................................................... 112 

5.3 Binary Output .............................................................................................................. 112 

5.3.1 Trip Outputs ....................................................................................................... 112 

5.3.2 Signal Outputs ................................................................................................... 114 

5.3.3 Alarm Outputs.................................................................................................... 115 

5.3.4 Other Outputs .................................................................................................... 116 

Chapter 6 Settings .................................................................................................................... 117 

6.1 Overview ...................................................................................................................... 117 

6.2 Equipment Parameters ............................................................................................... 117 

6.3 System Parameters ..................................................................................................... 119 

6.3.1 Logic Settings.................................................................................................... 119 

6.3.2 Main Transformer System Parameters ............................................................ 121 

6.3.3 System Parameters of Step-down Transformer .............................................. 124 

6.3.4 Implicit Configuration Settings ........................................................................ 127 

6.4 Protection Settings...................................................................................................... 132 

6.4.1 Differential Protection of Main Transformer.................................................... 132 

6.4.2 Restricted Earth-fault Protection of Main Transformer .................................. 136 

6.4.3 Winding Differential Protection of Main Transformer .................................... 138 

6.4.4 Phase-to-phase Fault Protection of Main Transformer .................................. 140 

6.4.5 Earth-fault Protection of Main Transformer .................................................... 146 

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6.4.6 Over-excitation Protection of Main Transformer ............................................ 151 

6.4.7 Breaker Flashover Protection of Main Transformer ....................................... 154 

6.4.8 Breaker Failure Protection of Main Transformer ............................................ 154 

6.4.9 Differential Protection of Step-down Transformer.......................................... 156 

6.4.10 Backup Protection at HV Side of Step-down Transformer........................... 157 

6.4.11 Backup Protection of Branch at LV Side of Step-down Transformer .......... 160 

6.4.12 Mechanical Protection .................................................................................... 164 

6.5 Calculated Parameters ................................................................................................ 165 

6.5.1 Calculated Parameters of Primary Rated Current .......................................... 165 

6.5.2 Calculated Parameters of Secondary Rated Current ..................................... 166 

6.5.3 Calculated Parameters of Secondary Rated Voltage ...................................... 167 

6.5.4 Calculated Parameters of Differential Coefficient .......................................... 168 

6.5.5 Implicit Configuration Settings ........................................................................ 170 

Chapter 7 Human Machine Interface ....................................................................................... 173 

7.1 User Interfaces ............................................................................................................ 173 

7.1.1 Front Panel......................................................................................................... 173 

7.1.2 LCD ..................................................................................................................... 174 

7.1.3 Keypad ............................................................................................................... 176 

7.1.4 LED Indications ................................................................................................. 177 

7.2 Menu Structure ............................................................................................................ 178 

7.2.1 Menu Tree........................................................................................................... 178 

7.2.2 Password Protection ......................................................................................... 179 

7.3 Operation Instruction .................................................................................................. 180 

7.3.1 View CPU and MON Metering Values ............................................................... 180 

7.3.2 View Binary Inputs in CPU and MON ............................................................... 180 

7.3.3 View Phase Angle .............................................................................................. 181 

7.3.4 View Report........................................................................................................ 182 

7.3.5 Delete Records .................................................................................................. 182 

7.3.6 Print Records ..................................................................................................... 184 

7.3.7 Modify Settings.................................................................................................. 184 

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7.3.8 Copy Settings .................................................................................................... 186 

7.3.9 Clock Set ............................................................................................................ 188 

7.3.10 Check Version.................................................................................................. 189 

7.3.11 DEBUG Menu ................................................................................................... 190 

Chapter 8 Communication ....................................................................................................... 193 

8.1 General Description .................................................................................................... 193 

8.2 Rear Communication Port Information...................................................................... 193 

8.2.1 RS-485 Interface ................................................................................................ 193 

8.2.2 IEC60870-5-103 Communication ...................................................................... 195 

8.2.3 Modbus Communication................................................................................... 195 

8.3 IEC60870-5-103 Protocol over Serial Port ................................................................. 195 

8.3.1 Physical Connection and Link Layer ............................................................... 196 

8.3.2 Initialization........................................................................................................ 196 

8.3.3 Time Synchronization ....................................................................................... 196 

8.3.4 Setting ................................................................................................................ 196 

8.3.5 Spontaneous Events ......................................................................................... 196 

8.3.6 General Interrogation ........................................................................................ 199 

8.3.7 Disturbance Records ........................................................................................ 199 

8.3.8 Generic Service ................................................................................................. 201 

8.4 Modbus Protocol over Serial Port .............................................................................. 202 

8.4.1 Overview ............................................................................................................ 202 

8.4.2 Fetch real time status (Binary) ......................................................................... 202 

8.4.3 Fetch Metering Values of Equipment ............................................................... 206 

8.4.4 Fetch Settings Value of Equipment ................................................................. 211 

8.4.5 Diagnostics ........................................................................................................ 221 

8.4.6 Exception Responses ....................................................................................... 221 

Chapter 9 Installation ............................................................................................................... 223 

9.1 General Description .................................................................................................... 223 

9.2 Safety Instructions ...................................................................................................... 223 

9.3 Checking the Shipment............................................................................................... 224 

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9.4 Material and Tools Required ....................................................................................... 224 

9.5 Device Location and Ambient Conditions ................................................................. 225 

9.6 Mechanical Installation ............................................................................................... 225 

9.7 Electrical Installation and Wiring ............................................................................... 227 

9.7.1 Grounding Guidelines ....................................................................................... 227 

9.7.2 Cubicle Grounding ............................................................................................ 227 

9.7.3 Ground Connection on the Device .................................................................. 228 

9.7.4 Grounding Strips and their Installation ........................................................... 229 

9.7.5 Making the Electrical Connections .................................................................. 229 

Chapter 10 Commissioning ..................................................................................................... 231 

10.1 General Description .................................................................................................. 231 

10.2 Safety Instructions .................................................................................................... 231 

10.3 Commission Tools..................................................................................................... 232 

10.4 Setting Familiarization .............................................................................................. 233 

10.5 Product Checks ......................................................................................................... 233 

10.5.1 With the Relay De-energized .......................................................................... 234 

10.5.2 With the Relay Energized................................................................................ 236 

10.5.3 Print Fault Report ............................................................................................ 239 

10.5.4 On-load Checks ............................................................................................... 240 

10.5.5 Final Checks .................................................................................................... 240 

Chapter 11 Maintenance........................................................................................................... 241 

11.1 Maintenance Schedule .............................................................................................. 241 

11.2 Regular Testing .......................................................................................................... 241 

11.3 Failure Tracing and Repair ........................................................................................ 241 

11.4 Replace Failed Modules ............................................................................................ 241 

11.5 Replace Button Battery ............................................................................................. 243 

11.6 Cleaning ..................................................................................................................... 244 

11.7 Storage ....................................................................................................................... 244 

Chapter 12 Decommissioning and Disposal .......................................................................... 245 

12.1 Decommissioning...................................................................................................... 245 

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12.2 Disposal ..................................................................................................................... 245 

Chapter 13 Manual Version History ........................................................................................ 247 

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 Chapter 1 Introduction

Chapter 1 Introduction

1.1 Application

RCS-985BT is a kind of microprocessor based generator-transformer unit protection relay

integrated main and backup protection. It provides complete electrical protection for main
transformer and step-down transformer. It also can meet the requirements of power plant
automation.

For a large scale generator-transformer unit, two sets of RCS-985BT can be used and then main
protection, abnormal operation condition protection and backup protection can be duplicated.
Operating circuits and mechanical protection equipment (RCS-974 series) are installed on a
separated panel. Independent CT groups are used by two RCS-985BT while main and backup
protection in a RCS-985BT share one CT group. Outputs of the protection correspond to
independent trip coils. Therefore, the following features can be achieved:

1. Clear design and arrangement of the secondary circuits

2. Convenient, reliable and secure for operation of equipment and requirements of accident
prevention

3. Convenient for configuration, testing and maintenance

1.2 Function

RCS-985BT suits connection of generator-transformer unit with generator with capacity 100MW or
above, one 220kV or 500kV main transformer (two windings) and two step-down transformers
(three windings or one split winding). RCS-985BT can provide completed main and backup
protection functions for generator-transformer unit of large-scale thermal power unit with circuit
breaker in the generator terminal, nuclear power unit and gas turbine unit, main transformer and
step-down transformer.

Detailed protection function configuration are listed in the following tables

1.2.1 Protection Functions for Main Transformer

No. Protection functions IEEE Remark

1 Differential protection for generator-transformer unit 87GT
☆
2 Differential protection for main transformer 87MT
DPFC differential protection for generator-transformer
3 87GT
unit ☆
4 DPFC differential protection for main transformer 87MT
Zero-sequence current differential protection for main
5 87NT(64REF)
transformer (also called restricted earth fault protection)
6 Winding differential protection for main transformer 87WT

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2 zones/2
7 Impedance protection at HV side 21P
time delays
2 stages/2
8 Voltage controlled overcurrent protection 51/27, 67P
time delays
2 stages/4
9 Zero-sequence overcurrent protection at HV side 50N, 51N
time delays
Directional zero-sequence overcurrent protection at HV 2 stages/4
10 67N
side time delays
11 Gap zero-sequence overvoltage protection at HV side
12 Gap zero-sequence overcurrent protection at HV side
13 Zero-sequence overvoltage alarm at LV side
inverse-time/
14 Over-excitation protection 24
definite-time
15 Breaker flashover protection
16 Breaker failure protection 50BF
17 Overload alarm 49
18 Initiating cooling 49
19 Overcurrent alarm output
20 VT circuit supervision 47,60G
21 CT circuit supervision 50/74

☆: It means that the corresponding protection functions are alternative.

1.2.2 Protection Functions for Step-down Transformer

RCS-985BT includes 2 sets of step-down transformer protection.

No. Protection functions IEEE Remark

1 Differential protection 87T
2 stages/2
2 Voltage controlled overcurrent protection 51V
time delays
2 stages/2
3 Voltage controlled overcurrent protection for branch 1 51/27G
time delays
2 stages/2
4 Voltage controlled overcurrent protection for branch 2 51/27G
time delays
2 stages/2
5 Zero-sequence overcurrent protection of branch 1 50P, 51P
time delays
2 stages/2
6 Zero-sequence overcurrent protection of branch 2 50P, 51P
time delays
7 Overload alarm 49
8 Initiating cooling 49
9 Overcurrent alarm output
10 VT circuit supervision 47,60G
11 CT circuit supervision 50/74

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 Chapter 1 Introduction

1.2.3 Mechanical Protection

No. Protection function IEEE Remark

1 Mechanical protection 1
2 Mechanical protection 2
3 Mechanical protection 3
4 Mechanical protection 4

1.2.4 Auxiliary Functions

Other functions
Automatic
relay hardware supervision and secondary circuit supervision
self-supervision
Metering 24 samples per cycle
CPU module 32 latest fault reports, 8 latest fault waveforms
Fault recorder 4 or 8 seconds continuous oscillogram function for latest
MON module
fault
Self-supervision
32 latest abnormality reports
report
Event recorder
Binary input
32 latest binary status input change reports
change report
Present recording One normal operating waveform triggered manually
Local HMI LCD and keypad
RCSPC software or substation automation system
Remote HMI
software
Front communication port
for software RCSPC with local protocol
(RS232)
Rear Ports type 4 RS-485 ports (two can be configured as fiber port)
communication
Protocol type IEC 60870-5-103/Modbus
ports to host
Rear communication port to
one RS-485 or RS-232
printer
Time synchronization port IRIG-B (optional)
Voltage and current drift auto-adjustment

1.3 Typical Applications

Connection shown in the figure is that of panel A. However, connection of panel B including
polarity mark of CT is the same as panel A. Although exciter or excitation transformer is drawn in
these figures, either of them is applicable for any scheme.

1.3.1 Typical Applications

As shown in Figure 1.3-1, this typical protection configuration scheme consists of three protection
panels, in which panels A and B comprises separately one set of electric quantity protection.

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Chapter 1 Introduction

Different groups of CT are used for them. Panel C comprises mechanical protection.

It can be used either for generator-transformer unit with capacity 100MW or above or similar
connection diagram.

500kV

PanelA Panel B Panel C

RCS-974A
RCS-985BT RCS-985BT
RCS-974A
Main Transformer

Step-down Step-down
transformer A transformer B

Generator

Figure 1.3-1 Typical application 1 of RCS-985BT

As shown in Figure 1.3-2, this typical protection configuration scheme consists of three protection
panels, in which panels A and B comprises separately one set of electric quantity protection.
Different groups of CT are used for them. Panel C comprises mechanical protection and control
circuit of 220kV circuit breaker.

It can be used either for generator-transformer unit with capacity 100MW or above or similar
connection diagram.

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 Chapter 1 Introduction

220kV

Busbar VT

Panel A Panel B Panel C

CJX
RCS-985BT RCS-985BT
Main RCS-974A
transformer

Step-down Step-down
transformer A transformer B

Generator

Exciter

Figure 1.3-2 Typical application 2 of RCS-985BT

1.3.2 Configuration Scheme

1.3.2.1 Differential Protection

For differential protection of generator-transformer unit, differential protection of main transformer

and differential protection of step-down transformer, there are two kinds of discrimination principle
for inrush current: second harmonics discrimination and waveform discrimination. It is
recommended that one set of RCS-985BT adopt second harmonics discrimination and the other
set adopt waveform discrimination.

1.3.2.2 Backup Protection

Panel A and B are equipped with complete set of backup protection and different CTs are used for
them.

For zero-sequence current protection, if there is only one group of zero sequence current CT, it
can be connected to panel A. While panel B can adopt calculated zero sequence current from

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Chapter 1 Introduction

bushing CT. Protective ranges of these two kinds of zero sequence current protection are different
to each other. Their setting shall be calculated separately.

1.3.2.3 Current Transformer

1. Panels A and B adopt different CT.

2. Main protection and backup protection share the same group of CT.

3. Current sampled at HV side of step-down transformer is included in differential protection of

main transformer and differential protection of step-down transformer. Since capacities of
these two transformers are different to each other significantly, in order to ensure performance
of differential protection, it is better to adopt two groups of CT for them, one CT with huge ratio
is prepared for differential protection of main transformer, and the other with small ratio for
differential protection of step-down transformer. However, if there is only one group of CT can
be used for them, it is also possible if make related configuration by software.

4. At HV side of main transformer (220kV or 500kV), one group of CT shall be provided

dedicatedly for breaker failure protection.

1.3.2.4 Voltage Transformer

1. Panel A and B shall adopt different VT or its different windings if possible.

2. For zero-sequence voltage, there are two windings adopted by two sets of RCS-985BT
simultaneously in general.

1.3.2.5 Breaker Failure Initiation

Breaker failure initiation is very important to power plant. In general, generator-transformer unit
protection tripping contact is an essential to breaker failure initiation. Considering importance of
such protection, it is recommended to realize it as follows:

1. Only one set of breaker failure initiation shall be equipped.

2. In order to make it more reliable, circuit breaker failure initiation should be independent device
with electric quantity protection device.

1.4 Features

1.4.1 High-performance Hardware

1.4.1.1 DSP Platform

RCS-985BT adopts high-performance digital signal processor DSP chip as its core calculating unit.
It is indeed digital protection device.

1.4.1.2 Duplicated CPU System

RCS-985BT comprises two independent CPU systems where low-pass filter, A/D converter, fault
calculation and logic output are all independent. CPU1 is used for tripping matrix while CPU2 for
fault detector. The equipment will be blocked and issue alarm if any one of CPU fails. Hence,

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unwanted operation due to hardware failure can be avoided.

1.4.1.3 Independent Fault Detector

An independent general fault detector is equipped in management module (MON module). Power
source of output relay can be connected only when the fault detector operates. Besides, various
other fault detectors are provided for various protection functions. Tripping outputs of protective
elements on CPU module can be validated only when corresponding fault detector on MON
module picks up. Any component failures during normal condition will not cause unwanted
operation.

1.4.1.4 High-speed Sampling and Calculation in Parallel

The equipment adopts high-speed sampling and parallel calculation. Sampling rate is 24 points
per cycle. Calculation of all protection elements can be performed during one sampling period.
High security, reliability and speed can be reached then.

1.4.2 New Protection Technology

1.4.2.1 Variable Slope Differential Protection

Variable slope percentage characteristic is adopted for differential protection (refer to Figure 3.3-1).
Slopes Kb11 and Kb12 can be so set that high sensitivity can be got during internal fault and
transient unbalance current can be avoided during external fault. In order to prevent unwanted
operation of differential protection due to CT saturation, measures to discriminate CT saturation
are provided for phase current on each side.

1.4.2.2 DPFC Percentage Differential Protection

DPEC percentage differential protection reflects only deviation components of differential current
and unrestraint current and is not effected by load current. It can detect small fault within
transformer and generator. Besides, it is insensitive to CT saturation since its restraint coefficient is
set comparatively high.

1.4.2.3 Inrush Current Blocking

Inrush current blocking is used for the equipment. Second harmonic and waveform of current can
be used for discrimination of inrush current by option.

1.4.2.4 Discrimination of External against Internal fault by CT Saturation Detector

According to relation between DPFC of restraint current and differential current of differential
protection, external or internal fault can be discriminated correctly. For external fault, criterion of
waveform of current is adopted. Unwanted operation will not occur if the correct transfer time from
primary to secondary side of CT is not less than 5ms. As to internal fault, the equipment will
operate quickly.

1.4.2.5 VT Circuit Supervision

Two groups of VT inputs are equipped for generator end. If one group fails the equipment will issue
alarm and switch to the healthy group automatically. It is not needed to block protective function
relevant to voltage of generator.

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Chapter 1 Introduction

1.4.2.6 CT Circuit Supervision

This function adopts percentage differential principle. Detection ability of CT circuit failure can
enhanced significantly and unwanted operation can be avoided then.

1.4.3 Intellectuality

1.4.3.1 Friendly HMI Interface

The HMI interface with a LCD and a 9-button keypad on the front panel is very friendly to the user.
Real time, connection diagram, phase current, differential current and voltage can be displayed on
LCD during normal condition.

1.4.3.2 Transparency

More than 500 sampled data including differential current and phase angle etc. can be displayed
on LCD and more than 1500 internal data of the equipment can be supervised through dedicated
auxiliary software RCSPC that provides user with great convenience to know about the operation
situation of RCS-985.

1.4.3.3 Perfect Fault Recorder Function

CPU module: latest 32 groups of fault data and event sequence, 8 groups of fault oscillogram, 32
status changes of binary inputs and 32 self-supervision reports can be recorded.

MON module: when the equipment picks up, oscillogram of all analog sampling quantity,
differential current and operation of the protection equipment can be recorded with duration up to 4
seconds or 8 seconds (depend on sample rate configured).

The format of event or fault report is compatible with international COMTRADE format.

1.4.3.4 Communication Ports

One front RS232 port (For RCSPC software)

Two rear RS-485 ports with IEC 60870-5-103 protocol or MODBUS protocol which can be
re-configured as optical fiber ports

One rear RS-485 with clock synchronization

One rear RS-232 or RS-485 with printer

1.4.3.5 Various Clock Synchronizations

Various GPS clock synchronizations: second/minute pulse via binary input or RS-485, message
via communication ports and IRIG-B synchronization.

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Chapter 2 Technical Data

2.1 Electrical Specifications

2.1.1 Power Supply

Standard IEC 61000-4-11:1979

Rated Voltage 110VDC, 125VDC, 220VDC, 250VDC
Variation (80%~120%)Un
Ripple in the auxiliary
Max 15% of the rated value.
voltage
Voltage dips and voltage 20ms for interruption without de-energizing, dips 60% of Un
short interruptions without reset up to 100ms
Quiescent condition <50W
Burden
Operating condition <70W
Backup battery type 1/2AA, 3.6V, 60mAh

2.1.2 Alternating Current Input Ratings

Nominal frequency 50Hz/60Hz, ±10%

Phase rotation ABC
Rate Current (In) 1A 5A
40In (Transformer related) 40In (Transformer related)
Linear to
2In (Metering CT) 2In (Metering CT)
Thermal withstand
-continuously 3In 3In
-for 10s 30In 30In
-for 1s 100In 100In
-for half a cycle 250In 250In
Burden <0.2VA/phase @In <0.5VA/phase @In

2.1.3 Alternating Voltage Input Ratings

Standard IEC 60255-6:1988

Rated Voltage (Un) 100V/√3、110V/√3 100V、110V 200V
Linear to 100V 173V 230V
Thermal withstand
-continuously 120V 120V 200V
-10s 200V 200V 350V
-1s 250V 250V 400V
Burden <0.2VA/phase @Un <0.5VA/phase @Un <2.5VA/phase @Un

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2.1.4 Binary Input

Rated Voltage 110VDC 125VDC 220VDC 250VDC

Pickup voltage 77.0VDC 87.5VDC 154VDC 175.0VDC
Dropout voltage 60.5VDC 68.8VDC 121VDC 137.5VDC
Maximum permitted
150VDC 150VDC 300VDC 300VDC
voltage
Withstand 2000VAC
Resolving time for logic
1ms
input

2.1.5 Binary Output

Contact Type Tripping contact Signal contact

Output mode Potential free contact
Rated Voltage 250VAC/DC 250VAC/DC
Test voltage across
1000VAC RMS for 1min
open contact
Continuous carry 8A 5A
Short duration current 50A for 200ms
Making capacity 30A
Pickup time (Typ/Max) 5ms/10ms 10ms/15ms
Dropout time (Typ/Max) 8ms/10ms 8ms/10ms
Bounce time < 1ms < 1ms
Breaking capacity at 0.4A resistance 0.2A resistance
250Vdc 0.2A inductive (L/R=40ms) 0.05A inductive (L/R=40ms)
Durability
Loaded contact 100,000 operations minimum
Unloaded contact 10,000,000 operations minimum

2.2 Power Supply Output for Optical Isolators

Rated Voltage 24V

Rated current 200mA
Max current 500mA

2.3 Mechanical Specifications

Enclosure dimensions
482.6mm×532.6mm×285mm, 12U
(W×H×D)
Trepanning dimensions
450mm×534mm, M6 screw
(W×H)
Mounting Way Flush mounted
Weight per device Approx. 30kg

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Housing material Aluminum

Housing color Silver grey
Location of terminal Rear panel of the device
Protection class
Standard IEC60529:1989
Front side IP40, up to IP51 (Flush mounted)
Other sides IP30
Rear side, connection
IP20
terminals

2.4 Ambient Temperature and Humidity Range

Standard IEC 60255-6:1988

Operating temperature -25°C~+60°C
Transport and storage
-40°C~+70°C
temperature range
Permissible humidity 5%~95%, condensation not permissible

2.5 Communication Port

Interface for communicating with RTU/SCADA

Port number 2
Baud rate 4800~38400bps
Transmission distance < 1000m@4800bps
Electrical Maximal capacity 32
Twisted Pair Screened twisted pair cable
Protocol IEC60870-5-103:1997
Safety level Isolation to ELV level
Port number 2
Connector type ST
Baud rate 4800~38400bps
RS-485
Transmission standard 100Base-FX,
(EIA)
Transmission distance <1500m
Optical Fiber Type Multi-mode Fiber
Optical Wavelength 850/820nm
(Optional) Fiber size 62.5/125μm (core DIA/cladding DIA)
Protocol IEC60870-5-103:1997
Safety level Isolation to ELV level
Transmission distance < 1500m
Optical Fiber Type Multi-mode or single-mode
Wavelength 853/1310nm for multi-mode
1310/1550nm for single-mode

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Chapter 2 Technical Data

Fiber size 62.5/125μm (core DIA/cladding DIA)

Protocol IEC60870-5-103:1997 or IEC61850
Safety level Isolation to ELV level
Interface for local HMI with personal computer via RCSPC software
Port number 1
Application Local human-machine communication
Download program of protection relay
RS-232 (EIA)
Baud rate 4800 ~ 9600bps
Connector type 9 pin D-type female connector
Safety level Isolation to ELV level
Interfaces for communicating with a printer
Port number 1
Baud rate 4800 ~ 38400bps
RS-232 (EIA)
Printer type EPSON® LQ-300K
Safety level Isolation to ELV level

2.6 Type Tests

2.6.1 Environmental Tests

Dry cold test IEC 60068-2-1:1974 Test Ad for 16 h at -25°C

Dry heat test IEC 60068-2-2:1990 Test Bd for 16 h at +55°C
IEC 60068-2-30:1980 Test Db Two (12+12) hour cycles 95%RH,
Damp heat test, cyclic
low temperature +25°C, high temperature +55°C

2.6.2 Mechanical Tests

Vibration IEC60255-21-1:1988 Class I

Shock and bump IEC 60255-21-2:1988 Class I

2.6.3 Electrical Tests

Dielectric tests IEC 60255-5:2000 Test voltage 2kV, 50Hz, 1min

IEC 60255-5:2000 Test voltage 5kV, unipolar impulses waveform
Impulse voltage tests
1.2/50μs,source energy 0.5J
Insulation resistance
IEC 60255-5:2000 Isolation resistance >100MΩ, 500Vdc
measurements

2.6.4 Electromagnetic Compatibility

Per IEC 60255-22-1:1988

1MHz burst disturbance
Common mode: class III 2.5KV
test
Differential mode: class III 1.0KV
Electrostatic discharge Per IEC60255-22-2:1996 class IV
test For contact discharge: 8kV

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For air discharge: 15kV

Per IEC 60255-22-3:2000 class III
Frequency sweep
Radiated amplitude-modulated
10V/m (rms), f=80…1000MHz
Radio frequency
Spot frequency
interference tests
Radiated amplitude-modulated
10V/m (rms), f=80MHz/160MHz/450MHz/900MHz
Radiated pulse-modulated
10V/m (rms), f=900MHz
Per IEC 60255-22-4:2002
Fast transient
Power supply, I/O, Earth: Class IV, 4kV, 2.5 kHz, 5/50ns
disturbance tests
Communication terminals: Class IV, 2kV, 5 kHz, 5/50ns
Per IEC 60255-22-5:2002 class III
Surge immunity test Power supply, AC input, I/O port: 2kV, line to earth; 1kV line to
line, 1.2/50us
Conducted RF Per IEC 60255-22-6:2001
Electromagnetic Power supply, AC, I/O, Comm. Terminal: Class III, 10Vrms, 150
Disturbance kHz~80MHz
Power Frequency Per IEC 61000-4-8:1993
Magnetic Field Immunity Class V: 100A/m for 1min, 1000A/m for 3s
Pulse Magnetic Field Per IEC 61000-4-9: 1993
Immunity Class V: 6.4/16μs, 1000A/m for 3s
Damped oscillatory IEC 61000-4-10: 1993
magnetic field immunity Class V: 100kHz & 1MHz–100A/m

2.7 Certifications

1. ISO9001:2000

2. ISO14001:2004

3. OHSAS18001:1999

4. ISO10012:2003

5. CMMI L3

6. EMC: 89/336/EEC, EN50263:2000

7. Products safety(PS): 73/23/EEC, EN61010-1:2001, EN60950:2002

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Chapter 2 Technical Data

2.8 Protective Functions

2.8.1 Main Transformer Differential Protection

Pickup setting of percentage differential protection

Range: 0.1Ie~1.5Ie

Accuracy: ±5% or ±0.01In whichever is greater

Unrestrained instantaneous setting of differential protection

Range: 2Ie~14Ie

Accuracy: ±2.5%

The first slope of percentage differential protection

Range: 0.10~0.50

The maximum slope of percentage differential protection

Range: 0.50~0.80

Restraint coefficient of 2nd harmonic

Range: 0.10~0.35

Operation time of percentage differential protection

≤30ms (Id≥2×[I_Pkp_PcntDiff_Tr])

Operation time of unrestrained instantaneous differential protection

≤25ms (Id≥1.5×[I_InstDiff_Tr])

Where:

In: rated secondary current of CT

Ie: rated secondary current of generator or transformer

Id: differential current

2.8.2 Step-down Transformer Differential Protection

Pickup setting of percentage differential protection

Range: 0.1Ie~1.5Ie

Accuracy: ±5% or ±0.01In whichever is greater

Unrestrained instantaneous setting of differential protection

Range: 2Ie~14Ie

Accuracy: ±2.5%

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The first slope of percentage differential protection

Range: 0.10~0.50

The maximum slope of percentage differential protection

Range: 0.50~0.80

Restraint coefficient of 2nd harmonic

Range: 0.10~0.35

Operation time of percentage differential protection

≤35ms (Id≥2×[I_Pkp_PcntDiff_Tr])

Operation time of unrestrained instantaneous differential protection

≤25ms (Id≥1.5×[I_InstDiff_Tr])

2.8.3 Restricted Earth Fault Protection

Pickup setting of percentage zero-sequence differential protection

Range: 0.1In~1.5In

Accuracy: 5%Setting or 0.01In whichever is greater

Unrestrained instantaneous setting of zero-sequence differential protection

Scope: 2In~14In

Setting accuracy: ≤2.5%

Slope of zero-sequence differential current protection

Scope: 0.00~0.80

Setting accuracy: ±2.5%

Operating time of percentage zero-sequence differential protection

≤30ms (I0d≥2×[I_Pkp_PcntREF_Tr])

Operating time of unrestrained instantaneous zero-sequence differential protection

≤25ms (I0d≥1.5×[I_InstREF_Tr])

Where:

I0d: zero-sequence differential current

2.8.4 Winding Differential Protection

Pickup setting of percentage differential protection

Range: 0.1In~1.5In

Accuracy: 5%Setting or 0.01In whichever is greater

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Chapter 2 Technical Data

Unrestrained instantaneous setting of differential protection

Scope: 2In~14In

Setting accuracy: ≤2.5%

Slope of differential current protection

Scope: 0.00~0.80

Setting accuracy: ±2.5%

Operating time of percentage differential protection

≤30ms (Id≥2×[I_Pkp_PcntWdgDiff_Tr])

Operating time of unrestrained instantaneous differential protection

≤25ms (Id≥1.5×[I_InstWdgDiff_Tr])

2.8.5 Impedance Protection

Forward impedance setting 0.1Ω~100Ω

Reverse impedance setting 0.1Ω~100Ω

Time delay 0.1S~10.00S

Accuracy of impedance setting ±2.5% or ±0.1Ω whichever is greater

Accuracy of time delay setting ±1%setting+40 ms

2.8.6 Voltage Controlled Overcurrent Protection

Negative-sequence voltage setting 1V~20V

Under voltage setting 10V~100V

Current setting 0.1A~100A

Time delay 0.1S~10.00S

Accuracy of voltage setting ±2.5% or ±0.05V whichever is greater

Accuracy of current setting ±2.5% or ±0.01In whichever is greater

Accuracy of time delay ±1%setting+40ms

2.8.7 Zero-sequence Overcurrent Protection

Zero sequence overcurrent setting 0.1A~100A

Zero sequence overvoltage setting 2V~100V

Time delay 0.1S~10S

Accuracy of zero-sequence voltage setting ±2.5% or ±0.05V whichever is greater

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Accuracy of zero-sequence current setting ±2.5% or ±0.01In whichever is greater

Accuracy of time delay ±1%setting+40ms

2.8.8 Directional Zero-sequence Overcurrent Protection

Zero sequence overcurrent setting 0.1A~100A

Zero sequence overvoltage setting 2V~100V

Time delay 0.1S~10S

Accuracy of zero-sequence voltage setting ±2.5% or ±0.05V whichever is greater

Accuracy of zero-sequence current setting ±2.5% or ±0.01In whichever is greater

Accuracy of time delay ±1%setting+40ms

Directional definition always points to system

2.8.9 Gap Zero-sequence Protection

Gap zero-sequence overcurrent setting 0.1A~100A

Gap zero-sequence overvoltage setting 10V~220V

Time delay 0.1S~10S

Accuracy of zero-sequence voltage setting ±2.5% or ±0.05V whichever is greater

Accuracy of zero-sequence current setting ±2.5% or ±0.01In whichever is greater

Accuracy of time delay ±1%setting+40ms

2.8.10 Over-excitation Protection

Definite time V/F setting 1.0~2.0pu

Time delay 0.1S~600S

Inverse time V/F setting 1.0~2.0

Time delay 0.1S~3000S

Accuracy of V/F measurement ±2.5% or ±0.01 whichever is greater

Accuracy of definite time delay setting ±1%setting+40ms

2.8.11 Breaker Failure Protection

Current setting 0.1A~20A

Time delay 0.1S~10S

Accuracy of current setting ±2.5% or ±0.01 whichever is greater

Accuracy of time delay ±1%setting+40ms

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2.8.12 Breaker Flashover Protection

Current setting 0.1A~20A

Time delay 0.1S~10S

Accuracy of current setting ±2.5% or ±0.01 whichever is greater

Accuracy of time delay ±1%setting+40ms

2.8.13 Mechanical Protection

Time delay 0S~6000.00S

Accuracy of time delay ±1%setting+40ms

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Chapter 3 Protection Description

3.1 Duplicated Main and Backup Protection

Dual protection schemes are necessary for a large-scale generator-transformer unit to be safe in
operation. There are three principles for duplicating the complete set of protection schemes.

1. All protective functions of a generator-transformer unit are integrated in one relay

2. Main protection, backup protection and fail condition protection share the data sampled from
the same CT

3. A generator-transformer unit is protected by dual relays, each of which includes a complete

set of transformer protection

With the fast development of electronic technology, especially the extensive application of DSP
(Digital Signal Processor), CPLD (Complex Programmable Logic Device) and FPGA (Field
Programmable Gate Array), it is possible to integrate main and backup protection of a
generator-transformer unit into one set of protection equipment.

Because main protection of generator-transformer unit don’t need communication channel as

used in line pilot protection, the backup protection can be configured simply based on enhanced
main protection by adopting above duplicate protection principle.

For important 220kV or above voltage level substation and large-scale generator-transformer
group, duplicate independent groups of DC storage batteries for protection are provided. For
some substations and generator-transformer not quite important, although only one group of DC
storage batteries is provided considering economic factor, duplicate DC source for protection
equipments can be obtained by dividing the DC source into different DC bus bar by DC breaker. In
the same way, duplicate protection for transformer can share the same output circuit and get
voltage from different AC voltage bus bar whose voltages origin are same VT distributed by AC
breaker. Of course, it is better that independent sets of CTs are provided for the duplicated
protection, one for each. Duplicate protection configuration principle for transformer doesn’t
enlarge the investment of secondary circuit. In fact, on the contrary, the investment in protection
equipment is reduced. At least one protection will clear transformer’s inner fault, which eliminates
the possibility of delay clearance that exists before if only backup protection left when differential
protection fails to operate due to any causes.

3.2 Fault Detector (FD)

The additional output blocking circuit controlled by general fault detectors calculated in MON
module makes the output circuit more secure, because not only the relationship between tripping
command sending and additional output blocking circuit is logic “AND” in software, but also they
keeps the logic “AND” relationship in hardware. It is displayed in below figure.

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Chapter 3 Protection Description

+24V FD

Controlled by fault detectors in MON module

+24V

Trip
Relay
R

G1

Tripping commands from

≥1
CPU module

Tripping Transistor

Figure 3.2-1 Logic relationship of CPU module and MON module

FD contact is controlled by general fault detectors calculated independently in MON module.

When the contact closes, the DC power source of tripping relay is provided. The function of gate
G1 is to receive tripping commands sent from CPU module. When a tripping command arrives at
the gate G1, the driving transistor will be activated, and the trip relay’s contact will close to trip the
breaker.

The general fault detectors calculated in MON module and operation elements calculated in CPU
module use their independent data sampled by themselves, so the equipment will not operate by
mistake due to any of module’s data channel’s failure.

3.2.1 Main Transformer Differential Protection

3.2.1.1 Fault Detector of Percentage Differential Protection

When the maximal value of three-phase differential currents of main transformer is greater than
the pickup setting of percentage differential protection of main transformer ([I_Pkp_PcntDiff_Tr]),
the percentage differential protection of main transformer will be released.

3.2.1.2 Fault Detector of DPFC Differential Protection

ΔI d > 1.25ΔI dt + I dth

• • •
(Equation 3.2-1)
ΔI d = Δ I 1 + Δ I 2 + ... + Δ I m

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Where:

ΔI dt is the floating threshold value which will rise automatically and gradually according to

increasing of the output of deviation component. In order to ensure that the threshold value of
current is slightly higher than the unbalance output, multiple 1.25 of the deviation component is
reasonable.

• •
Δ I 1 …. Δ I m are the DPFC current of each side of transformer respectively

ΔI d is the half-cycle integral value of differential current

I dth is the fixed threshold

This fault detector is not influenced by the direction of power flow and so it is very sensitive. The
setting is fixed and need not to be set. When the above condition is met, DPFC differential
protection will be released.

3.2.2 Main Transformer Backup Protection

3.2.2.1 Fault detector of Phase Current

When the maximum value of three-phase current is greater than its setting value [I_OCx_Tr], the
overcurrent protection at relevant side will be released. (x can be 1 or 2)

3.2.2.2 Fault detector of DPFC Phase Current

ΔI > 1.25ΔI t + I th (Equation 3.2-2)

Where:

ΔI t is the floating threshold which will rise automatically and gradually according to increasing of

the output of deviation component. In order to ensure that the threshold current is slightly higher
than the imbalance value, multiple 1.25 of the deviation component is reasonable.

ΔI is the half-wave integral of phase-to-phase current.

I th is the fixed threshold of 0.2In and need not to be set case to case.

When the above condition is met, impedance protection at relevant side will be released.

3.2.2.3 Fault detector of Zero-sequence Current

When the zero-sequence current is greater than its setting value [I_ROCx_Tr], the stage 1 or 2 of
zero-sequence overcurrent protection at relevant side will be released. (x can be 1 or 2)

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3.2.2.4 Fault detector of Gap Zero-sequence Current

When the gap zero-sequence current is greater than its setting value [I_ROC_Gap_HVS_Tr], the
gap zero-sequence overcurrent protection will be released.

3.2.2.5 Fault detector of Gap Zero-sequence Voltage

When the gap zero-sequence voltage is greater than its setting value [V_ROV_Gap_HVS_Tr], the
gap zero-sequence overvoltage protection will be released.

3.2.3 Step-down Transformer Differential Protection

When the maximal value of three-phase differential currents of step-down transformer is greater
than the pickup setting of percentage differential protection of step-down transformer, the
percentage differential protection of step-down transformer will be released.

The pickup setting can be [I_Pkp_PcntDiff_ST1] or [I_Pkp_PcntDiff_ST2].

3.2.4 Step-down Transformer Backup Protection

3.2.4.1 Fault Detector of HV Side Phase Current

When the maximal value of three-phase current is greater than its setting value, the overcurrent
protection at HV side of step-down transformer will be released.

The setting value can be [I_OC1_HVS_ST1], [I_OC2_HVS_ST1] or [I_OC1_HVS_ST1],

[I_OC2_HVS_ST1].

3.2.4.2 Fault Detector of Overcurrent Protection

When the maximal value of three-phase current is greater than its setting value, the overcurrent
protection at branch 1 of LV side of step-down transformer will be released.

The setting value can be [I_OC1_Br1_ST1], [I_OC2_Br1_ST1] or [I_OC1_Br1_ST2],

[I_OC2_Br1_ST2].

When the maximal value of three-phase current is greater than its setting value, the overcurrent
protection at branch 2 of LV side of step-down transformer will be released.

The setting value can be [I_OC1_Br2_ST1], [I_OC2_Br2_ST1] or [I_OC1_Br2_ST2],

[I_OC2_Br2_ST2].

3.2.4.3 Fault Detector of Zero-sequence Overcurrent

When the zero-sequence current is greater than its setting value, the zero-sequence overcurrent
protection at branch 1 of LV side of step-down transformer will be released.

The setting value can be [I_ROC1_Br1_ST1], [I_ROC2_Br1_ST1] or [I_ROC1_Br1_ST2],

[I_ROC2_Br1_ST2].

When the zero-sequence current is greater than its setting value, the zero-sequence overcurrent
protection at branch 2 of LV side of step-down transformer will be released.

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 Chapter 3 Protection Description

The setting value can be [I_ROC1_Br2_ST1], [I_ROC2_Br2_ST1] or [I_ROC1_Br2_ST2],

[I_ROC2_Br2_ST2].

3.2.5 Over-excitation Protection

3.2.5.1 Fault Detector of Definite-time Over-excitation Protection

The fault detector operates when measured U/F is greater than definite time setting.

3.2.5.2 Fault Detector of Inverse-time Over-excitation Protection

The fault detector operates when over excitation inverse time accumulated value is greater than
inverse time setting.

3.2.6 Mechanical Protection

The fault detector operates when duration of operation of mechanical protection is greater than its
delay setting.

3.3 Protection Principle Description

In following logic diagrams, all logic inputs starting with “En_xx” represent enabling logic settings
which will be explained in later section, all logic inputs starting with “EBI_xx” represent enabling
binary inputs from panel, those starting with “Flg_xx” represent internally generated flags
indicating whether or not a certain element is met, those words begin with “Alm_xx” and “Op_xx”
represent output for alarming and operation of protective element respectively.

3.3.1 Preparation Knowledge of Transformer

By applying the Ampere-turn balance on different transformer connections, RCS-985BT forms the
current differential equations.

During the normal operation, the magnitude and angle of secondary currents at each side of
transformer are different due to different CT ratios, different voltage levels and different
transformer connection groups. This kind of current differentiations shall be eliminated under
normal operation and compensated in fact by a built-in compensation method.

3.3.1.1 Calculate Rated Primary Current at Each Side of Transformer

Sn
I b1n = (Equation 3.3-1)
3U b1n

Where:

S n is the maximum rated capacity of all windings (i.e. [Sn_Tr])

U b1n is the rated phase-to-phase voltage at the calculated side of the transformer (i.e.

[U1n_HVS_Tr] or [U1n_LVS_Tr])

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Chapter 3 Protection Description

3.3.1.2 Calculate Rated Secondary Current at Each Side of Transformer

I b1n
Ib2n = (Equation 3.3-2)
nbLH

Where:

I b1n is the rated primary current at the calculated side of transformer

nbLH is the ratio of CT at the calculated side of transformer

3.3.1.3 Calculate Correction Coefficient at Each Side of Transformer

I b 2 n −b
K ph = (Equation 3.3-3)
I b 2n

Where:

I b 2 n is the rated secondary current at the calculated side

I b 2 n−b is the rated secondary current of base side

The currents used in the following analysis have been corrected, that means the currents are the
products of the original secondary current of each side multiplying its own correction coefficient

( K ph ).

3.3.1.4 Phase shift compensation

By defining which particular connection group the protected transformer belongs to, the proper
calculation routine will be applied.

The following transforming method is based on the assumptions listed here:

1. CTs at each side of transformer are connected in star type.

2. Secondary currents of each CT are connected to the equipment directly.

3. The positive polarity of CT at HV and MV side is at busbar side and that at LV side is at
branch side or generator side.

4. Polarity of each secondary winding of CT is as same as shown in Figure 1.3-1 and Figure
1.3-2.

The secondary current phase shift compensation for all CTs are achieved by software, Y→Δ
transform method is used for this purpose. For connection Y/Δ-11, the correction equations are as
follows:

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 Chapter 3 Protection Description

At side Y0:

⎧ •' • •

⎪I A = (I A − I B ) / 3
⎪ •' • •
⎨ I B = ( I B − I C)/ 3 (Equation 3.3-4)
⎪ '
• • •
⎪I C = ( I C − I A ) / 3
⎩

At side Δ:

⎧•' •
⎪ I• a = I a
⎪' •
⎨I• b = I b (Equation 3.3-5)
⎪ ' •
I c = Ic
⎪
⎩

Where:

• • •
I A , I B , I C are the secondary currents of CT at side Y

• • •
I A , I B , I ' C are the corrected current of each phase at side Y
' '

• • •
I a , I b , I c are the secondary currents of CT at side Δ

• • •
I ' a , I ' b , I ' c are the corrected currents of each phase at side Δ

For other connection type，the current can be calculated according to the equations listed above.
The connection type can be selected by following logic settings [Yd11_Conn] and [Yyd11_Conn]
(refer to system parameters in section 6.3).

Note!

If your actual transformer connection group is not included in above two groups, please let
us know before you make the order.

3.3.2 Differential Protection of Main Transformer/Step-down Transformer

3.3.2.1 Percentage Differential Protection (SPDP)

Figure 3.3-1 shows operation characteristic of the percentage differential protection.

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Chapter 3 Protection Description

Id

Operation area Kbl2

Restraint area

Icdqd Kbl1
0
Ie nIe Ir

Figure 3.3-1 Operation characteristic of percentage differential protection

Operation criterion of this percentage differential protection is

⎧ I d > K bl × I r + I cdqd ( I r < nI e )

⎪
⎪ K bl = K bl1 + K blr × ( I r / I e )
⎪
⎨ I d > K bl 2 × ( I r − nI e ) + b + I cdqd ( I r ≥ nI e )
⎪
⎪ K blr = ( K bl 2 − K bl1 ) /(2 × n)
⎪⎩b = ( K bl1 + K blr × n) × nI e
(Equation 3.3-6)

⎧ I1 + I 2 + I 3 + I 4 + I 5
⎪⎪ I r =
2
⎨ • • • • •
⎪I = I 1 + I 2 + I 3 + I 4 + I 5
⎪⎩ d
Where:

I d is differential current

I r is restraint current

I cdqd is pickup value of differential current fault detector

I e is rated current

K bl is percentage differential restraint factor and K blr is its increment

K bl1 is the first slope of percentage differential with setting range 0.05~0.15. 0.10 is applicable

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 Chapter 3 Protection Description

usually

K bl 2 is the second slope of percentage differential with setting range 0.50~0.80. 0.70 is applicable

usually

n is the multiple of restraint current at the second slope and is fixed at 6

Note!

For differential current of generator-transformer unit and main transformer, redefinition of

each current in (Equation 3.3-6) is different for different program versions and can be
found on individual project-specific document.

Usually, for generator-transformer unit differential protection, I1 represent currents of HVS

of main transformer, I2 represents current of HVS of step-down transformer, I3 represents
current of neutral point of generator, I4 and I5 is not defined; for differential protection of
main transformer, I1 represents current of HVS1 of main transformer for, I2 represents the
current of HVS of step-down transformer, I3 represents the current of LVS of main
transformer, I4 and I5 is not defined.

For differential current of step-down transformer, I1, I2 and I3 are currents of HV side,
branches 1 or branch 2 at LV side of step-down transformer respectively. I4 has no
definition yet.

For differential current of excitation transformer, I1 and I2 are currents of HV side and LV
side respectively. I3 and I4 have no definition yet.

3.3.2.2 High-setting Percentage Differential Protection (HSDP)

A percentage differential protection with high percentage and high setting is equipped with the
equipment to prevent delayed operation of percentage differential protection caused by CT
saturation and other factors during serious internal fault. This protection is blocked only by inrush
current criterion i.e. second harmonic of differential current or waveform discrimination. It can
prevent influence of steady state and transient CT saturation during external fault and can operate
correctly and quickly during internal fault even if CT is in saturation condition. Operation criterion
of this high setting percentage differential protection is:

⎧I d > 1.2 × I e
⎨ (Equation 3.3-7)
⎩I d > 1.0 × I r

Where:

I d is differential current as mentioned above

I r is restraint current as mentioned above

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Chapter 3 Protection Description

Figure 3.3-2 Operation characteristic of high-setting percentage differential protection

When fault occurs, the operation criterion will be discriminated phase by phase and percentage
differential protection will operate if the criterion is met. For more detailed operation characteristic
please see Figure 3.3-3.

Note!

Parameters of this protection have been fixed in program and do not need to be
configured by user.

3.3.2.3 Unrestrained Instantaneous Differential Protection (UIDP)

The aim of unrestrained instantaneous differential protection for transformer is to accelerate the
trip speed for transformer’s inner fault. So the element does not need any block element, but the
setting should be greater than maximum inrush current.

Its operation criterion is:

I dφ max > [I_InstDiff _ Tr ] (Equation 3.3-8)

Where:

I dφ max is the maximum value of three-phase differential currents

[I_InstDiff_Tr] is the setting of the unrestrained instantaneous differential protection of transformer

Note!

All the settings mentioned below are from main transformer for example. Figure 3.3-3
shows operation characteristic of unrestrained instantaneous differential protection.

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3.3.2.4 Operation Characteristic of Current Differential Protection

Figure 3.3-3 Operation characteristic of current differential protection

The meanings of I cdqd , I d , I r , I e , K bl1 and K bl 2 are described above.

I cdsd is the setting of unrestrained instantaneous differential protection [ I_InstDiff_Tr].

1. Steady state percentage differential protection element (refer to section 3.3.2.1) will not send
tripping signal in case of CT saturation, CT circuit failure (optional), inrush current and
overexcitation condition. It can ensure sensitivity of protection and avoid unwanted operation
when CT is saturated during external fault. Its operation area is tint shadow area.

2. High setting percentage differential protection element (refer to section 3.3.2.2) will not send
tripping signal only due to CT circuit failure (optional) and inrush current. It eliminates
influence of transient and steady saturation of CT during external fault and ensures reliable
operation even if CT is in saturation condition during internal fault by means of its percentage
restraint characteristic. Its operation area is deep shadow area.

3. Unrestrained instantaneous differential protection element (refer to section 3.3.2.3) will send
tripping signal without any blocking if differential current of any phase reaches its setting. Its
operation area is over the above two areas with no shadow.

3.3.2.5 Inrush Current Detection

Second harmonic restraint principle

In the equipment, the second harmonic of differential current can be used to distinguish inrush
current. Its operation criterion is:

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Chapter 3 Protection Description

I 2 nd > K 2 xb ∗ I1st (Equation 3.3-9)

Where:

I 2 nd is the second harmonic of each phase differential current

I1st is the differential fundamental current of corresponding phase

k 2 xb is the setting of restraint coefficient of second harmonic [k_Harm_PcntDiff_Tr]. k 2 xb = 0.15

is recommended

Waveform distortion discrimination principle

During internal fault, differential currents of various sides transferred by CT are basically
fundamental sinusoidal wave. But when the transformer is energized, lots of harmonics occur.
The waveform is intermittent and unsymmetrical. A special algorithm can be used for
discrimination of the inrush current.

During internal fault, following relation exists:

⎧S > kb*S +
⎨ (Equation 3.3-10)
⎩S > St

Where:

S is the full cycle integral of differential current

S + is full cycle integral of the sum of instantaneous value of differential current and that of half
cycle before

kb is a fixed constant

St is a threshold value which can be represented as follows:

St = α * I d + 0.1* I e (Equation 3.3-11)

Where:

I d is the full cycle integral of differential current.

α is a proportional constant.

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 Chapter 3 Protection Description

I e is the secondary rated current of transformer.

If any one of three phases can not meet above equation, the differential current can be considered
as inrush current and percentage differential relay will be blocked.

In this protection equipment, logic setting [Opt_Inrush_Ident_Tr] is provided for user to select the
restraint blocking principle. If the logic setting is set as “0”, discrimination by harmonics is enabled.
Otherwise, discrimination by waveform distortion is enabled.

3.3.2.6 CT Saturation Detection

In order to prevent unwanted operation of steady state percentage differential protection caused
by transient or steady state saturation of CT during external fault, composite harmonics of
secondary differential current is used for the protection equipment to discriminate saturation of CT.
The expression is as following:

I cop > K nxb ∗ I1 (Equation 3.3-12)

Where:

I cop is the composite harmonics of phase differential current.

I1 is the fundamental component of corresponding phase differential current.

k nxb is proportional coefficient.

When fault occurs, if DPFC of restraint current and DPFC of differential current appear
simultaneously, this is an internal fault. If DPFC of restraint current appears before DPFC of
differential current, this maybe an external fault and criterion of CT saturation shall be adopted in
this case. So unwanted operation of percentage differential protection due to CT saturation can be
prevented.

3.3.2.7 Differential Current Abnormality Alarm and CT Circuit Failure Blocking Function

Differential current abnormality alarm with percentage restraint (refer to section 4.1.3.2) and
instant CT circuit failure blocking function are equipped with the equipment.

CT circuit failure blocking function can be configured by logic setting [Opt_CTS_Blk_PcntDiff_Tr].

When such failure occurs and is discriminated, issuing alarm signal only or blocking percentage
differential protection is optional. If the logic setting is set as “1”, percentage differential protection
will be blocked immediately.

3.3.2.8 Over-excitation Detection

When a transformer is overexcited, the exciting current will increase sharply which may result in
unwanted operation of differential protection. Therefore the overexcitation shall be discriminated
to block the current differential protection. The fifth harmonic of differential current is used as

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Chapter 3 Protection Description

criterion of overexcitation discrimination.

I 5th > k5 xb * I1st (Equation 3.3-13)

Where:

I1st is fundamental component of differential current.

I 5th is fifth harmonic of differential current.

k5 xb is the fifth harmonic restraint coefficient, it is fixed at 0.25.

Note!

High setting percentage differential protection is not blocked by fifth harmonic of

differential current.

3.3.2.9 Logic Scheme of Differential Protection

[Flg_UIDP]

[EBI_Diff_Tr] & & [Op_InstDiff_Tr]

[En_InstDiff_Tr]

[FD_Diff_Tr]

[Flg_Inrush_Tr]

[Flg_HSDP_Tr]
&
[EBI_Diff_Tr] & &

[En_PcntDiff_Tr]

[Flg_CTS]

[FD_Diff_Tr]

[Flg_CTsat] ≥1 [Op_PcntDiff_Tr]

[Flg_Inrush]

[Flg_SPDP_Tr]
& & &
[EBI_Diff_Tr]

[En_PcntDiff_Tr]

[Flg_CTS]

[Flg_OvExc_Tr]

[FD_Diff_Tr]

Figure 3.3-4 Logic diagram of differential protection

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 Chapter 3 Protection Description

The above logic diagram is also suit for differential protection of step-down transformer.

Where:

[FD_Diff_Tr]: fault detector of differential protection of main transformer.

[Flg_UIDP _Tr] is the flag indicating whether or not the criterion of UIDP element is met.

[Flg_HSDP _Tr] is the flag indicating whether or not the criterion of HSDP element is met.

[Flg_SPDP _Tr] is the flag indicating whether or not the criterion of SPDP element is met.

[Flg_CTS] is the flag indicating whether or not the CT circuit fails.

[Flg_CTsat] is the flag indicating whether or not the CT is in saturation state.

[Flg_Inrush] is the flag indicating whether or not the criterion of inrush current detection is met.

[Flg_OvExc_Tr] is the flag indicating whether or not the transformer is in overexcitation state.

[EBI_Diff_Tr]: binary input for enabling differential protection of transformer

[En_PcntDiff_Tr]: logic setting for enabling percentage differential protection of transformer

[En_InstDiff_Tr]: logic setting for enabling unrestrained instantaneous differential protection of

transformer

[En_Diff_Tr]: general logic setting for enabling differential protection of transformer.

[Op_InstDiff_Tr]: operation of unrestrained instantaneous differential protection of transformer.

[Op_PcntDiff_Tr]: operation of percentage differential protection of transformer.

3.3.3 DPFC Differential Protection

If slight fault occurs in generator or transformer, steady state differential protection may not
response sensitively due to influence of load current. DPFC percentage differential protection of
generator and transformer is equipped with the equipment for that and it can significantly improve
sensitivity of the protection during small current internal fault of generator and transformer.

3.3.3.1 Operation Characteristic of DPFC Differential Protection

The operation criteria of DPFC percentage differential are as follows:

⎧ΔI d > 1.25ΔI dt + I dth

⎪
⎨ΔI d > 0.6ΔI r ΔI r < 2 I e
⎪ΔI > 0.75 I − 0.3I ΔI r > 2 I e
⎩ d r e
(Equation 3.3-14)
⎧ΔI r = ΔI1 + ΔI 2 + ΔI 3 + ΔI 4
⎪
⎨ • • • •
Δ
⎪ dI = Δ I 1 + Δ I 2 + Δ I 3 + Δ I 4
⎩

Where:

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Chapter 3 Protection Description

ΔI dt is floating threshold which increases progressively along with DPFC increasing. Take its

multiple as 1.25 can ensure threshold voltage always a bit higher than imbalance current. So that
unwanted operation of the equipment can be avoided during power swing and frequency
deviation conditions.

Generally, for differential protection of main transformer, ΔI1 , ΔI 2 , ΔI 3 and ΔI 4 are DPFCs of

currents of sides 1 and 2 at HVS of main transformer, generator terminal and HV side of

step-down transformer respectively. But for some specific design, ΔI1 can represent the HVS

current of transformer derived from backup CT and ΔI 2 has no definition.

For differential protection of generator, ΔI1 and ΔI 2 are currents at the terminal of generator

and neutral point respectively. ΔI 3 and ΔI 4 have not specified.

ΔI d is DPFC of differential current. I dth is fixed threshold. ΔI r is DPFC of restraint current

whose maximum value is taken for actual restraint.

Note!

Calculation of restraint current of DPFC percentage differential protection is different from

the steady state percentage differential protection, it is difficult to test this function on site,
so we recommend only qualitative function test on site.

DPFC differential protection is equipped to each phase of generator, but user should know
that the restraint DPFC quantity for every phase is the same maximum value among the
three phases.

The following figure shows operating characteristic of DPFC percentage differential

protection.

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 Chapter 3 Protection Description

ΔId

0.75

0.6
Icdqd
restraint current
2 Ie ΔIr

Figure 3.3-5 Operating characteristic of DPFC percentage differential protection

When fault occurs, the operation criterion will be discriminated phase by phase and percentage
differential protection will operate if the criterion is met. For DPFC percentage differential
protection of main transformer, second harmonic or waveform inrush current blocking and fifth
harmonic over excitation blocking are adopted. It can prevent influence of steady state and
transient CT saturation during external fault due to its percentage restraint characteristic.

This protective element has high ability to eliminate the effect of transient and steady saturation of
CT during the external fault because the restraint coefficient is set at a higher value.

3.3.3.2 Logic Scheme of DPFC Differential Protection

[Flg_DPFC_Diff_Tr]
0 20
& &
[EBI_Diff_Tr]
& [Op_DPFC_Diff_Tr]
[En_Diff_Tr]

[En_DPFC_Diff_Tr]

[Flg_InstanCTS]

0 500
[FD_DPFC_Diff_Tr]

Figure 3.3-6 Logic diagram of DPFC percentage differential protection

Where:

[Flg_DPFC_Diff_Tr] is the flag indicating whether or not the criterion of DPFC differential element
is met.

[Op_DPFC_Diff_Tr]: operation of DPFC differential protection of generator

[EBI_Diff_Tr]: is enabling binary input for all kinds of differential protection of generator.
[En_Diff_Tr]: general logic setting for enabling differential protection of generator.

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Chapter 3 Protection Description

[Flg_IntanCTS] is the internally generated flag indicating that CT supervision program detects
failure of CT circuit with no delay considered into account.

Settings of DPFC percentage differential protection is are fixed and need not to be set on site.

3.3.4 Backup protection of main transformer

3.3.4.1 Phase-to-phase impedance protection

1. Operation characteristic of impedance protection

Impedance protection is used as backup protection of generator-transformer unit. Three kinds of

impedance characteristic can be selected, i.e., circular impedance, directional circular impedance
and drifted circular impedance characteristics. Circular impedance characteristic suits case of
forward setting of a zone being equal to its reverse setting. Directional circular impedance
characteristic suits case of reverse setting of a zone being set as 0. Drifted circular impedance
characteristic suits case of forward setting of a zone being higher than its reverse setting. Reach
angle of impedance protection is 78°. Positive direction of the impedance protection is
configurable and generally points to transformer.

Figure 3.3-7 shows operation characteristic of impedance element. In this figure, I is phase
current, U is corresponding phase-to-phase voltage, Zn is reverse impedance setting, Zp is
forward impedance setting.

jX
I Zp
U I Zp
m
U
R

U I Zn
I Zn

Figure 3.3-7 Operation characteristic of impedance protection

Operation criterion:
• •
(U − I Z P )
90 < Arg
o
• •
< 270o (Equation 3.3-15)
(U + I Z n )

The fault detector of impedance protection adopts DPFC of phase current and negative sequence
current. Initiation of the fault detector will be lasted for 500 ms and will be kept if impedance relay
operates during this time interval. Operation criterion of the fault detector is

ΔI > 1.25ΔI t + I th (Equation 3.3-16)

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 Chapter 3 Protection Description

Where:

ΔI t is floating threshold which increases progressively along with DPFC increasing. Take its

multiple as 1.25 can ensure threshold current always a bit higher than imbalance current. So that
unwanted operation of the equipment can be avoided during system swing and frequency
deviation conditions.

I th is the fixed threshold. When DPFC of phase-to-phase current is higher than 0.3 Ie, the fault

detector operates.

The impedance protection will be disabled automatically if the VT circuit failure is discriminated.

2. Logic diagram of impedance protection of transformer

[Flg_VTS ]

[Flg_Z1_Tr] &
&
[En_PPF_Tr]
t
& [Op_Z1_Tr]
[EBI_PPF_Tr ]

[FD_PPF_Tr]

Figure 3.3-8 Logic diagram of impedance protection of transformer

Where:

[Flg_Z1_Tr] is internally generated flag indicating whether or not zone 1 of impedance protection
of transformer operates.

[EBI_PPF_Tr] is enabling binary input of phase-to-phase backup protection which includes

phase-to-phase impedance protection and voltage controlled overcurrent protection. “1” means
enabled.

[En_PPF_Tr] is enabling logic setting of phase-to-phase backup protection which includes

phase-to-phase impedance protection and voltage controlled overcurrent protection. “1” means
enabled.

[Flg_VTS] is flag indicating whether or not the VT circuit fails. “1” means failure.

3.3.4.2 Voltage Controlled Overcurrent Protection

Function of overcurrent protection with composite voltage blocking is equipped with RCS-985BT.
This protection, consisting of 2 stages and 2 time delays per stage, is used for phase-to-phase
backup protection of main transformer. Of which, function of composite voltage element can be
enabled or disabled by logic setting.

1. Voltage controlled element

The voltage control element is an element which will operate if phase-to-phase voltage is lower
than the setting [Vpp_UV_VCE_Tr] or negative sequence voltage is greater than its setting
[V_NegOV_VCE_ Tr].

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Chapter 3 Protection Description

Criteria:

Upp< [Vpp_UV_VCE_Tr] or U2> [V_NegOV_VCE_Tr] (Equation 3.3-17)

Where:

Upp is phase-to-phase voltage of local side.

U 2 is negative sequence voltage of local side.

[Vpp_UV_VCE_Tr] is setting of undervoltage control element of local side.

[V_NegOV_VCE_Tr] is setting of negative-sequence overvoltage control element of local side.

All two stages of definite time overcurrent protection can be controlled by voltage element by
configuring related logic settings [En_VCE_Ctrl_OC1_Tr] and [En_VCE_Ctrl_OC2_Tr].

Meanwhile, User can decide by which side voltage overcurrent protection is controlled by
configuring related settings. For example, if the setting [En_LVS.VCE_Ctrl_OC_Tr] is set as “1”,
then the overcurrent protection is controlled not only by HV side voltage element but also by LV
side voltage element.

2. Function of current memory

For self and parallel-excited generator, current will decrease so quick during fault that it may be
lower than overcurrent setting before tripping. So memorizing function for fault current is equipped
with this protection. Logic setting [En_Mem_Curr_Tr] is used for configure of this function.

Note!

When logic setting [En_Mem_Curr_Tr] is enabled, the overcurrent must be controlled by

voltage element.

3. Influence of VT circuit failure on voltage controlled element

When VT on one side is under maintenance or bus-tie breaker is used for the transformer but its
VT has not been switched over to the protection equipment, VT circuit failure is detected. Logic
setting [Opt_VTS_Ctrl_OC_Tr] is used to configure performance of voltage control element during
VT circuit failure. When this logic setting is set as “1”, if VT circuit failure is detected, the voltage
control element cannot pick up and the protection will not operate. When this logic setting is set as
“0”, if VT circuit failure is detected on this side, voltage control element is forced to be satisfied,
then the voltage controlled directional overcurrent protection controlled by voltage will becomes a
pure overcurrent protection.

4. Logic diagram of voltage controlled overcurrent protection of transformer

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Upp< [Vpp_VCE_Tr]
≥1
U2>[V_NegOV_VCE_ Tr] &
[Flg_VCE_Tr]
[Flg_VTS] ≥1
&
[Opt_VTS_Ctrl_OC_Tr]

&
[En_Mem_Curr_Tr]

[Flg_OC _Tr] ≥1
& [Op_OC _Tr]
[Flg_VCE_Tr] & t
≥1
[En_VCE_Ctrl_OCn_Tr]
[t_OC _Gen]
[En_PPF_Tr]
&
[EBI_PPF_Tr]

[FD_OC _Tr]

Figure 3.3-9 Logic diagram of voltage controlled overcurrent protection of transformer

Where:

[Flg_VTS]: is the internally generated flag indicating whether or not the VT circuit fails.

[Opt_VTS_Ctrl_OC_Tr] is the setting to configure the VCE mode under VT circuit failure.

[En_Mem_Curr_Tr] is the setting to enable/disable the function of current memory.

[Flg_OCn_Tr] is flag indicating that stage n of overcurrent element is met (n=1, 2)

[En_VCE_Ctrl_OCn_Tr] is the setting to enable/disable the VCE element in stage n of overcurrent

protection of transformer.

[En_PPF_Tr] is the setting to enable/disable phase to phase fault protection.

[EBI_PPF_Tr] is the binary input to enable/disable phase to phase fault protection.

[Op_OCn_Tr] indicates that whether or not the stage n of overcurrent protection operates.

3.3.4.3 Directional Zero-sequence Overcurrent Protection

Zero-sequence overcurrent relay is mainly used as backup protection of ground fault for
transformer with neutral point earthed. Two stages and four time delays zero-sequence
overcurrent protection is equipped with RCS-985BT. The zero-sequence current is usually
adopted from neutral point CT.

By setting logic settings, following functions of any stages of this protection can be selected:

1) Whether it will be controlled by directional relay

2) Whether it will be controlled by zero sequence voltage

3) Whether it will be enabled or disabled

1. Direction element

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Chapter 3 Protection Description

The direction of zero sequence overcurrent protection points to system definitely with the reach
angle 75º. If the VT failure at HV side occurs, the directional element will be out of service.

The voltage used by directional relay is definitely the calculated voltage. The direction mentioned
above is based on the CT positive polarity for calculated zero sequence current being at the side
of busbar. The details are shown in Figure 1.3-1 and Figure 1.3-2.

Figure 3.3-10 shows operating characteristic of directional protection in which the hatched area is
operation zone.

3U0
φlm = 75°

Io
Point to system

Figure 3.3-10 Operating characteristic of directional zero-sequence overcurrent protection

2. Zero-sequence voltage element

Zero-sequence voltage element uses definitely the open-delta voltage of VT.

3. Logic diagram of zero sequence overcurrent protection

Figure 3.3-11 Logic diagram of zero sequence overcurrent protection of transformer

Where:

[En_VCE.ROV_Ctrl_ROCn_Tr] is used to select whether zero sequence overcurrent relay will be

blocked by zero sequence overvoltage. If the logic setting is set as “1”, it will be blocked by zero
sequence overvoltage.

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 Chapter 3 Protection Description

[En_Dir_Ctrl_ROCn_Tr] is used to select whether stage n of zero sequence overcurrent relay is

control by directional relay. If this logic setting is set as “1”, the stage n of zero sequence
overcurrent protection will be controlled by directional relay.

[Flg_Dir_ROC_Tr] is flag indicating that whether or not the criterion of directional element is met.

[Flg_ROCn_Tr] is flag indicating that the zero sequence current is above the setting.

[En_EF_Tr] is the setting to enable/disable the earth fault protection of transformer.

[EBI_EF_Tr] is the binary input to enable/disable the earth fault protection of transformer.

[Op_ROCn_Tr] indicates that the stage n of zero sequence overcurrent protection operates.

3.3.4.4 Gap Zero-sequence Overcurrent/Overvoltage protection

Gap zero-sequence overcurrent protection is used for backup protection of main transformer with
neutral point grounded through gap or small reactance. Gap zero-sequence overvoltage
protection is used for backup protection of main transformer with neutral point ungrounded or
grounded through gap or small reactance.

RCS-985BT provides one stage definite-time gap zero-sequence overcurrent protection and one
stage definite-time gap zero-sequence overvoltage protection.

During the gap broken down, gap zero-sequence overcurrent and gap zero-sequence overvoltage
will appear alternatively. Once gap zero-sequence overcurrent protection or gap zero-sequence
overvoltage operates, the protection device will keep the operating signal interactively so that the
protection device can operate reliably.

Gap zero-sequence overcurrent and overvoltage protection can be enabled by enabling binary
input from the protection panel as well as external contact input. If the setting
[En_BI_Ctrl_EF_Gap_HVS] is set as “0”, the gap zero-sequence overcurrent and overvoltage
protection are controlled by the enabling binary input [EBI_EF_Gap_Tr] only. If the setting
[En_BI_Ctrl_EF_Gap_HVS] is set as “1”, the gap zero-sequence overcurrent and overvoltage
protection are enabled only when both the enabling binary input [EBI_EF_Gap_Tr] is energized
and binary external input [BI_Ext_Ctrl_EF_Gap_Tr] is “1”.

3.3.4.5 Zero-sequence Voltage Alarm at LV Side

According to the case that circuit breaker is equipped at the terminal of generator, a
zero-sequence voltage alarm can be provided on LV side of main transformer as the supervision
of earthing fault. The voltage setting is usually set as 10V~15V. The alarm can be enabled or
disabled by logic setting [En_Alm_ROV_LVS_Tr]. The function outputs alarm signals.

3.3.4.6 VT Circuit Supervision

VT circuit failure supervision principle refers to section 4.1.4.

3.3.4.7 Protection of Other Failures

Some protection functions, such as overload alarm, initial cooling and overcurrent output, are
equipped with backup protection of HV side of main transformer. Overload alarm, initial cooling

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Chapter 3 Protection Description

and overcurrent output can be enabled or disabled by corresponding logic settings. After the initial
cooling operates, it will output two normally open contacts. After overcurrent output operates, it
will output a normally open contact and a normally closed contact.

3.3.5 Over-excitation Protection

Over-excitation protection is used to prevent generator or transformer from damage due to over
excitation. It represents multiple of over excitation of generator or LV side of transformer. The
protection device provides over-excitation protection of main transformer and the voltage used by
over-excitation protection is from HV side of main transformer.

Besides, over-excitation protection of main transformer comprises definite-time over-excitation

protection and inverse-time over-excitation protection.

3.3.5.1 Definite-time Over-excitation Protection

One stage for trip purpose and one stage for alarm purpose are equipped for definite-time
over-excitation protection. Their time delay can be configured independently.

Multiple of over-excitation n can be expressed as follows:

n = Upu / Fpu (Equation 3.3-18)

Where:

Upu and Fpu are per unit value of voltage and frequency respectively.

Figure 3.3-13 shows logic diagram of definite time over excitation protection.

3.3.5.2 Inverse-time Over-excitation Protection

Inverse-time over-excitation protection realizes inverse-time characteristic by linear processing on

given inverse-time operation characteristic, obtaining multiple of over excitation by calculation,
and getting corresponding operation delay by sectional linear insertion. It reflects heat
accumulation and radiation.

Figure 3.3-12 shows inverse-time operation characteristics of over-excitation protection. It can be

specified by 8 over excitation multiple settings n0~n7.

Figure 3.3-12 Inverse-time operation characteristics of over-excitation protection

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 Chapter 3 Protection Description

The over excitation multiple settings n (= U/F) are within range of 1.0~1.5 in general. Maximum
time delay t is considered as long as 3000s. Relation between various settings of n and t are:

n0 ≥ n1 ≥ n2 ≥ n3 ≥ n4 ≥ n5 ≥ n6 ≥ n7

t0 ≤ t1 ≤ t2 ≤ t3 ≤ t4 ≤ t5 ≤ t6 ≤ t7

Figure 3.3-14 shows logic diagram of inverse-time over-excitation protection.

3.3.5.3 Logic Diagram of Over-excitation Protection

[En_OvExc_Tr]
t Alm_OvExc_Gen
&
U/F > [k_Alm_OvExc_Tr]
[t_Alm_OvExc_Gen]
U/F > [k_OvExc_Gen]
& t Op_OvExc_Gen
[En_OvExc_Tr] &
[t_OvExc_Gen]
[TrpLog_OvExc_Tr].Bit0
&
[EBI_OvExc_Tr]

[FD_OvExc_Tr]

Figure 3.3-13 Logic diagram of definite-time over-excitation protection

Figure 3.3-14 Logic diagram of inverse-time over-excitation protection

3.3.6 Breaker Flashover Protection

During process of synchronization of generator, flashover in circuit breaker is possible when
difference of phase angle between bus voltage and generator voltage is around 180°. Breaker
flashover protection is provided for this fault. One-phase and two-phase flashover is considered
by this protection but three-phase flashover is ignored.

The current used by breaker flashover protection is from breaker CT at HV side of main
transformer. Its criterion is:

1. Position contacts of three phases of circuit breaker are open

2. Negative-sequence current is greater than the setting

3. Excitation has been applied to generator, and generator voltage is greater than the setting

After this protection operates, it will shut off excitation and initiate breaker failure protection.

Figure 3.3-15 shows logic diagram of breaker flashover protection.

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Chapter 3 Protection Description

Take the first time delay of stage 1 of circuit breaker A as an example. The logic diagram of
breaker flashover protection is shown in Figure 3.3-15.

Figure 3.3-15 Logic diagram of breaker flashover protection

Where:

[BI_52b_CB_HVS1_Tr] is normally closed auxiliary contact of circuit breaker A at HV side of main

transformer.

Uset.fix is an internal fixed voltage setting.

3.3.7 Breaker Failure Initiation

When the protection device operates to trip due to a fault inside main transformer, it is necessary
to trip adjacent breakers and initiate breaker failure protection of HV side of main transformer if
the tripped breaker fails. The current used by initiating breaker failure protection is from breaker
CT.

The current criterion of breaker failure initiation (BFI) in RCS-985 can be one of three elements:
phase overcurrent element, zero-sequence current element or negative-sequence current
element.

Figure 3.3-16 shows logic diagram of breaker failure initiation. Take circuit breaker A as an
example.

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[BI_52b_CB_HVS1_Tr]
≥1
En_CB_Ctrl_BFP_CB_HVS_Tr

[BI_ExtTrp_Ctrl_BFP]
≥1
[En_ExtTrp_Ctrl_BFP_CB_HVS_Tr]

I>[I_BFP1_CB_HVS_Tr]

I2>[I_NegOC1_BFP_CB_HVS_Tr] &
[t_BFP11_CB_HVS_Tr]
& ≥1 &
[En_NegOC_Ctrl_BFP_CB_HVS_Tr] & t Op_BFP11_CB1_HVS_Tr

3I0>[I_ROC_BFP1_CB_HVS_Tr]
&
[En_ROC_Ctrl_BFP_CB_HVS_Tr] t Op_BFP12_CB1_HVS_Tr

[t_BFP12_CB_HVS_Tr]
[En_BFP_CB_HVS]
&
[EBI_BFP_CB_HVS_Tr]

[FD_BFP/Flash_CB_HVS_Tr]

Figure 3.3-16 Logic diagram of breaker failure initiation

3.3.8 Winding Differential Protection

3.3.8.1 Percentage Winding Differential Protection (PWDP)

For internal fault of windings at HV side of main transformer, the protection device provides
percentage winding differential protection. The operation characteristic is shown in Figure 3.3-17.
Percentage winding differential protection can clear phase-to-phase fault and earth fault of
winding and outgoing line.

Ifd

Ifcdsd

kfbl

Ifcdqd

0
It Ifr

Figure 3.3-17 Operation characteristic of percentage winding differential protection

Its operation equation is as follows

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Chapter 3 Protection Description

⎧ I >I
⎪ fd fcdqd
⎪ I > K ×I
⎪ fd fbl fr
⎪
⎪ I fh + I fw
⎨I =
⎪ fr 2
⎪
⎪ • • (Equation 3.3-19)
⎪ I fd = I fh + I fw
⎪
⎩

Where:

Ifh and Ifw are the currents of breaker CT at HV side of main transfer and winding CT at HV side
of main transformer respectively

Ifcdqd is the pickup value of percentage winding differential protection, i.e.

[I_Pkp_PcntWdgDiff_Tr]

Ifd is differential current

Ifr is restraint current

Kfbl is percentage restraint coefficient, i.e. [Slope_PcntWdgDiff_Tr], it is recommended to set as

“0.5”

In is secondary rated current of CT

These criteria are checked phase by phase, the winding differential protection will operate if
above equation is met. The polarity mark of breaker CT at HV side of main transformer should be
at busbar side and the polarity mark of winding CT at HV side of main transformer should be at
opposite side of neutral point of main transformer, otherwise, the above description will be
different with practical situation.

3.3.8.2 Unrestrained Instantaneous Winding Differential Protection (UIWDP)

When differential current of any phase is greater than the setting [I_InstWdgDiff_Tr], the
protection device will operate to trip immediately

3.3.8.3 Differential Current Abnormality Alarm and CT Circuit Failure Blocking Function

Differential current abnormality alarm with percentage restraint (refer to section 4.1.3.2) and
instant CT circuit failure blocking function are equipped with the protective device.

CT circuit failure blocking function can be configured by logic setting

[Opt_CTS_Blk_PcntWdgDiff_Tr]. When such failure occurs and is discriminated, issuing alarm
signal only or blocking percentage winding differential protection is optional. If the logic setting is
set as “1”, percentage winding differential protection will be blocked immediately.

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3.3.8.4 Logic Scheme of Winding Differential Protection

[Flg_UIWDP]
&
[En_InstWdgDiff_Tr] & Op_InstWdgDiff_Tr

[Flg_PWDP]
&
[En_PcntWdgDiff_Tr]

&
[Flg_CTsat] & Op_PcntWdgDiff_Tr

[En_WdgDiff_Tr]
&
[EBI_WdgDiff_Tr] &

[FD_WdgDiff_Tr]

Figure 3.3-18 Logic diagram of winding differential protection

Where:

[FD_WdgDiff_Tr]: fault detector of winding differential protection of main transformer.

[Flg_UIWDP] is the flag indicating whether or not the criterion of UIWDP is met.

[Flg_PWDP] is the flag indicating whether or not the criterion of PWDP is met.

[Flg_CTsat] is the flag indicating whether or not the CT is in saturation state.

[EBI_WdgDiff_Tr]: binary input for enabling winding differential protection of main transformer

[En_WdgDiff_Tr]: logic setting for enabling winding differential protection of main transformer

[Op_InstWdgDiff_Tr]: operation of unrestrained instantaneous winding differential protection of

main transformer.

[Op_PcntWdgDiff_Tr]: operation of percentage winding differential protection of main transformer.

3.3.9 Restricted Earth Fault Protection for Main Transformer

Restricted earth fault protection (REF) is also called zero-sequence differential protection in this
manual, which includes zero-sequence percentage differential protection element and
unrestrained instantaneous zero-sequence differential protection element. REF is used to protect
the main transformer with neutral point earthed with/without resistance.

3.3.9.1 Percentage Restricted Earth Fault Protection (PcntREF)

REF is used for earth fault at HV side of main transformer (wye connection). When REF is formed
by the calculated zero-sequence current at HV side and the measured zero-sequence current at
neutral point, its operation criteria are as follows:

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Chapter 3 Protection Description

⎧I 0d > I 0 cdqd
⎪I > K 0b1 × I 0 r
⎪⎪ 0 d
⎨I 0r = max{ I 01 , I 02 , I 0 n } (Equation 3.3-20)
⎪ • • •
⎪I 0d = I 01 + I 02 − I 0 n
⎪⎩

Where:

I01 is the calculated zero-sequence current of branches 1 at HV side of main transformer

I02 is the calculated zero-sequence current of branches 2 at HV side of main transformer

I0n is the measured zero-sequence current at neutral point of main transformer

I0cdqd is the pickup setting of zero-sequence percentage differential protection, i.e.

[I_Pkp_PcntREF_Tr]

I0d is zero-sequence differential current

I0r is zero-sequence restraint current

K0bl is the setting of percentage restraint coefficient of zero-sequence percentage differential

protection, i.e. [Slope_PcntREF_Tr]. For the restraint coefficient, 0.5 is recommended value.

When REF is formed by the calculated zero-sequence current at HV side and the calculated
zero-sequence current at neutral point, its operation criteria are as follows:

⎧ I 0d > I 0cdqd
⎪
⎪ I 0d > K 0b1 × I 0r
⎪⎪ I 0r = max{ I 01 , I 02 , I 0n }
⎨
⎪ • • • (Equation 3.3-21)
⎪ I 0d = I 01 + I 02 + I 0n
⎪
⎪⎩

Where:

I01 is the calculated zero-sequence current of branches 1 at HV side of main transformer

I02 is the calculated zero-sequence current of branches 2 at HV side of main transformer

I0n is the calculated zero-sequence current at neutral point of main transformer

I0cdqd is the pickup setting of zero-sequence percentage differential protection, i.e.

[I_Pkp_PcntREF_Tr]

I0d is zero-sequence differential current

I0r is zero-sequence restraint current

K0bl is the setting of percentage restraint coefficient of zero-sequence percentage differential

protection, i.e. [Slope_PcntREF_Tr]. For the restraint coefficient, 0.5 is recommended value.

For HV side of main transformer, there is only one branch I01 which is the sum of three-phase

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 Chapter 3 Protection Description

currents derived from backup CT at HV side of main transformer, and other branches have no
definition.

The polarity mark of breaker CT at HV side of main transformer should be at busbar side and the
polarity mark of winding CT at HV side of main transformer should be at opposite side of neutral
point of main transformer, otherwise, the above description will be different with practical situation.
The polarity mark of CT at neutral point of main transformer should be at side of neutral point of
main transformer.

When equation above is satisfied, the percentage REF will operate. Figure 3.3-19 shows
operation characteristic of percentage REF.

3.3.9.2 Unrestrained Instantaneous Restricted Earth Fault Protection (UIREF)

The aim of unrestrained instantaneous REF for main transformer is to accelerate clearing the
transformer’s inner earth fault with high fault resistance. So the element does not need any block
element, but the setting should be greater than maximum inrush current.

This protection operates to trip all breakers at all sides of main transformer when any unrestrained
zero-sequence differential current is higher than its setting [I_InstREF_Tr]. Figure 3.3-19 shows
operation characteristic of this unrestrained instantaneous REF.

I0d

Operation area of UIREF

I0Inst

Operation area of PcntREF

K0bl

I0cdqd

I0r
Ith

Figure 3.3-19 Operating characteristic of restricted earth fault protection

Where:

I0Inst: is the setting of the unrestrained instantaneous REF, i.e. [I_InstREF_Tr]

Ith will be automatically changed according to the pickup current [I_Pkp_PcntREF_Tr] and restrict
coefficient [Slope_PcntREF_Tr].

PcntREF: means percentage restricted earth fault protection

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Chapter 3 Protection Description

UIREF: means unrestrained instantaneous restricted earth fault protection

3.3.9.3 Differential Current Abnormality Alarm and CT Circuit Failure Blocking Function

Differential current abnormality alarm with percentage restraint (refer to section 4.1.3.2) and
instant CT circuit failure blocking function are equipped with the protective device.

CT circuit failure blocking function can be configured by logic setting [Opt_CTS_Blk_PcntREF_Tr].

When such failure occurs and is discriminated, issuing alarm signal only or blocking percentage
winding differential protection is optional. If the logic setting is set as “1”, percentage restricted
earth-fault protection will be blocked immediately.

When the bit3 implicit configuration setting [Cfg_REF_Tr] is set as “1”, it means that the
zero-sequence current of neutral point of main transformer is from the measured zero-sequence
current, and instant CT circuit failure will not be distinguished.

3.3.9.4 Logic Scheme of Restricted Earth-fault Protection

The logic scheme of REF for HV side of main transformer is shown in the following figure.

InstREF
&
[En_InstREF_Tr] & Op_InstREF_Tr

PcntREF
&
[En_PcntREF_Tr]

&
[Flg_CTsat] & Op_PcntREF_Tr

[EBI_REF_Tr]
&
[En_REF_Tr] &

[FD_REF_Tr]

Figure 3.3-20 Logic diagram of REF at HV side of main transformer

Where:

InstREF: means unrestrained instantaneous restricted earth fault protection

PcntREF: means percentage restricted earth fault protection

[Op_InstREF_Tr]: means that unrestrained instantaneous restricted earth fault protection

operates

[Op_PcntREF_Tr]: means that percentage restricted earth fault protection operates

[EBI_REF_Tr]: enabling binary input of REF of main transformer through closing the isolator link

[En_REF_Tr]: logic setting of earth fault protection of main transformer

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 Chapter 3 Protection Description

[En_InstREF_Tr]: logic setting of unrestrained instantaneous restricted earth fault protection

[En_PcntREF_Tr]: logic setting of percentage restricted earth fault protection

[FD_REF_Tr]: fault detector element of REF of main transformer

[Flg_CTsat] is the flag indicating whether or not the CT is in saturation state.

3.3.10 Backup Protection of Step-down Transformer

3.3.10.1 Backup Protection of HV Side of Step-down Transformer

Function of voltage controlled overcurrent protection for step-down transformer is equipped with
RCS-985BT. This protection, consisting of 2 stages and 1 time delay per stage, is used for
phase-to-phase backup protection of step-down transformer. Of which, function of composite
voltage element can be enabled or disabled by configuration of logic setting.

1. Voltage control element

It is same to the voltage control element in section 3.3.4.2.

2. Function of current memory

It is same to the function of current memory element in section 3.3.4.2.

3. Influence of VT circuit failure on voltage control element

It is same to the influence of VT circuit failure in section 3.3.4.2.

4. Logic diagram of voltage controlled overcurrent protection of step-down transformer

It is same to the logic diagram in section 3.3.4.2.

3.3.10.2 Backup Protection of LV Side of Step-down Transformer

This protection, consisting of 2 stages and 1 time delay per stage, is used for phase-to-phase
backup protection of step-down transformer. Of which, function of composite voltage element can
be enabled or disabled by configuration of logic setting.

1. Voltage control element

It is same to the voltage control element in section 3.3.4.2.

2. Influence of VT circuit failure on voltage control element

It is same to the influence of VT circuit failure in section 3.3.4.2.

3. Logic diagram of voltage controlled overcurrent protection of step-down transformer

It is same to the logic diagram in section 3.3.4.2

3.3.10.3 Earth-fault Protection of LV Side of Step-down Transformer

Two stages zero sequence current protection with delay used for tripping is equipped for LV side
of step-down transformer.

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3.3.10.4 Other protection of step-down transformer

Overload alarm and initial cooling are equipped for backup protection of step-down transformer.
These functions can be set by logic settings. One normally open contact is used for output of
initial cooling.

Binary output for overcurrent element of step-down transformer is equipped in RCS-985BT.

3.3.11 Mechanical protection

Interfaces of mechanical protection such as thermo-technical protection, interruption of water
protection, excitation system protection and one spare mechanical protection are equipped for the
equipment. External protection equipments send those signals to RCS-985BT to make the event
record and send alarm and maybe tripping command to relevant circuit breaker with delay.
Enabling binary inputs are provided for those protections. Setting ranges of time delay of those
protection are all 0s~6000s.

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 Chapter 4 Self-supervision, Metering and Records

Chapter 4 Self-supervision, Metering and Records

4.1 Self-supervision

If hardware failure of the equipment itself is detected, protection functions of the equipment will be
blocked and equipment blocking alarm will be issued. Hardware failure includes those on RAM,
EPROM, settings, power supply, DSP and tripping coil.

When following abnormal status is detected, abnormal warning will be issued: AC voltage or
current circuit failure, persist pickup, mismatch state of pickup between CPU and DSP and alarm
of protection element.

The relay includes a number of self-monitoring functions to check the operation of its hardware
and software when it is in service. These are included so that if an error or fault occurs within the
relay’s hardware or software, the relay is able to detect and report the problem and attempt to
resolve it by performing a re-boot. This involves the relay being out of service for a short period of
time that is indicated by the “HEALTHY” LED on the faceplate of the relay being extinguished and
the watchdog contact at the rear operating. If the restart fails to resolve the problem, then the relay
will take itself permanently out of service. Again this will be indicated by the “ALARM” LED and
watchdog contact. If a problem is detected by the self-monitoring functions, the relay attempts to
store a maintenance record in battery backed-up SRAM to allow the nature of the problem to be
notified to the user.

The self-monitoring is implemented in two stages: firstly a thorough diagnostic check which is
performed when the relay is booted-up, e.g. at power-on, and secondly a continuous self-checking
operation which checks the operation of the relay’s critical functions whilst it is in service.

4.1.1 Startup Self-check

The self-check which is carried out when the relay is started takes a few seconds to complete,
during which time the relay’s protection is unavailable. This is signaled by the “HEALTHY” LED on
the front of the relay which will illuminate when the relay has passed all of the tests and entered
operation. If the testing detects a problem, the relay will remain out of service until it is manually
restored to working order.

The operations that are performed at startup are as follows:

4.1.1.1 System Boot

The integrity of the flash memory is verified using a checksum before the program code and data
stored in it is copied into SRAM to be used for execution by the processor. When the copy has
been completed the data then held in SRAM is compared to that in the flash to ensure that the two
are the same and that no errors have occurred in the transfer of data from flash to SRAM. The
entry point of the software code in SRAM is then called which is the relay initialization code.

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4.1.1.2 Initialization Software

The initialization process includes the operations of initializing the processor registers and
interrupts, starting the watchdog timers (used by the hardware to determine whether the software
is still running), starting the real-time operating system and creating and starting the supervisor
task. In the course of the initialization process the relay checks:

1. The integrity of the battery backed-up SRAM that is used to store event, fault and disturbance
records

2. The integrity of the flash that is used to store program

3. The correctness of the settings that ensures relay’s proper response to fault

4. The operation of DSP and CPU.

5. The voltage level of the field voltage supply which is used to drive the opto-isolated inputs

6. The operation of the LCD controller

7. The watchdog operation

At the conclusion of the initialization software the supervisor task begins the process of starting the
platform software.

4.1.1.3 Platform software initialization & monitoring

In starting the platform software, the relay checks the integrity of the data held in non-volatile
memory with a checksum. The final test that is made concerns the input and output of data, the
presence and healthy condition of the input board is checked and the analog data acquisition
system is checked through sampling the reference voltage.

At the successful conclusion of all of these tests the relay is entered into service and the protection
started-up.

4.1.2 Continuous Self-Check

When the relay is in service, it continually checks the operation of the critical parts of its hardware
and software. The check is carried out by the system services software and the results reported to
the platform software. The functions that are checked are as follows:

1. The flash containing all program code, setting values and language text is verified by a
checksum

2. The code and constant data held in SRAM is checked against the corresponding data in flash
to check for data corruption

3. The SRAM containing all data other than the code and constant data is verified with a
checksum

4. The level of the field voltage

5. The integrity of the digital signal I/O data from the opto-isolated inputs and the relay contacts
is checked by the data acquisition function every time it is executed. The operation of the

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 Chapter 4 Self-supervision, Metering and Records

analog data acquisition system is continuously checked by the acquisition function every time
it is executed, by means of sampling the reference voltages.

In the unlikely event that one of the checks detects an error within the relay’s subsystems, the
platform software is notified and it will attempt to log a maintenance record in battery backed-up
SRAM. If the problem is of no importance (no possibility of leading to maloperation), the relay will
continue in operation. However, for problems detected in any important area the relay will initiate a
shutdown and re-boot. This will result in a period of up to 5 seconds when the protection is
unavailable, but the complete restart of the relay including all initializations should clear most
problems that could occur. As described above, an integral part of the start-up procedure is a
thorough diagnostic self-check. If this detects the same problem that caused the relay to restart, i.e.
the restart has not cleared the problem, and then the relay will take itself permanently out of
service. This is indicated by the “HEALTHY” LED on the front of the relay, which will extinguish,
and the watchdog contact that will operate.

1. Voltage transformer supervision (VTS)

See section 4.1.4 for detail.

2. Current transformer supervision (CTS)

See section 4.1.3 for detail.

If the alarm is issued, the alarm signal can be reset only when the failure is removed and the
equipment is reset by pressing “RESET” button on panel or re-power it up.

3. Overload alarm

On condition that the relay does not picks up, adding current in excess of the setting of overload
protection, alarm messages are displayed and “ALARM” LED is lit after the timer stage duration
has elapsed.

4. Binary input status supervision

Any status of binary input changing will be monitored.

5. Tripping output circuit supervision

Tripping output relay driving transistor is always monitored in normal program, and blocking
message will be issued when the equipment finds abnormality of the tripping output circuit.

4.1.3 CT Circuit Supervision (CTS)

The measuring current from CT should reflect the real primary system current. The main purpose
of CT circuit supervision is to detect faults in the secondary circuits of CT and confirm whether CT
secondary circuit is in good condition. It can avoid influence on the operation of corresponding
protection functions which are based on current.

4.1.3.1 Three-phase Current Circuit Failure Alarm

The operation criterion is:

3I0>0.04In＋0.25IΦmax (Equation 4.1-1)

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Chapter 4 Self-supervision, Metering and Records

Where:

3I0: The zero-sequence current

In: The rated secondary current of CT (1A or 5A)

IΦmax: The maximum phase current

If the above criterion is met, CT circuit abnormality alarm will be issued with a time delay of 10s.
The abnormality alarm will be reset after 10s if the protective device returns to normal condition.

4.1.3.2 Differential Current Alarm of Differential Protection

This function is enabled only when relevant differential protection logic setting is set as enabled. If
the criterion is met, the alarm will be sent by delay 10 s and corresponding differential protection
will not be blocked. When the differential current eliminates, the alarm will be reset by delay 10s.

In order to increase sensitivity of this alarm, percentage restraint differential current alarm criterion
is adopted as shown as below.

⎧ I d > I dbjzd
⎨ (Equation 4.1-2)
⎩I d > k bj × I res

If the differential current reaches its threshold and reaches differential alarm level of percentage
restraint factor multiplied by restraint current, the differential current alarm will be issued.

4.1.3.3 Alarm or Blocking to Differential Protection by CT Circuit Failure

Function of instantaneous CT circuit failure discrimination is equipped for differential protection.

Only when related logic setting and relevant enabling binary input of protection are set “on”, this
function of alarm or blocking of instantaneous CT circuit failure discrimination will be enabled.

If internal fault occurs, at least one of following four conditions will be present:

1. Negative-sequence voltage at any side is greater than 2V

2. Any phase current of a certain side increases after fault detector operating

3. Maximum phase current is greater than 1.2Ie after fault detector operating

4. At least three-phase currents decreases after fault detector picks up

If none of above four conditions occurs within 40ms after differential protection’s fault detectors
picks up, the protection treats it as CT circuit failure. If the corresponding logic setting is set as “1”,
the relevant differential protection will be blocked and alarm will be issued. If this logic setting is set
as “0”, the relevant differential protection will trip and alarm will be issued simultaneously.

If the alarm is issued, the signal can be removed only when the failure is removed and the
equipment is reset by manual.

4.1.4 VT Circuit Supervision (VTS)

The measuring voltage from VT should reflect the real primary system voltage. The main purpose

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 Chapter 4 Self-supervision, Metering and Records

of VT circuit supervision is to detect faults in the secondary circuits of VT and confirm whether VT
secondary circuit is in good condition. It can avoid influence on the operation of corresponding
protection functions which are based on voltage.

The operation criterion is:

1. U1<18V and any phase current is greater than 0.04In

2. 3U2>8V

For VT at LV side and HV side of main transformer, when any of above conditions is met, VT circuit
abnormality alarm will be issued with a time delay of 10s. The abnormality alarm will be reset
automatically after 10s if the protective device returns to normal condition.

For VT at LV side of step-down transformer, when any of above conditions is met, VT circuit
abnormality alarm will be issued with a time delay of 10s. The abnormality alarm needs to be reset
manually if the protective device returns to normal condition.

4.1.5 List of Alarm Messages

Table 4.1-1 List1 of self-supervision reports

No. Item HEALTHY ALARM CT ALARM VT ALARM

1 Alm_VTS_LVS_Tr ● ● ●
2 Alm_VTS_HVS_Tr ● ● ●
3 Alm_OvLd_Tr ● ●
4 Alm_InitCool1_OvLd_Tr ● ●
5 Alm_InitCool2_OvLd_Tr ● ●
6 Alm_BO_OC_HVS_Tr ● ●
7 Alm_OvExc_Tr ● ●
8 Alm_ROV_LVS_Tr ● ●
9 Alm_Pos_GCB ● ●
10 Alm_Pos_CB_HVS1_Tr ● ●
11 Alm_Pos_CB_HVS2_Tr ● ●
12 Alm_PM_DSP1_CPUBrd ●
13 Alm_CTS_Diff_Tr ● ● ●
14 Alm_CTS_REF_Tr ● ● ●
15 Alm_CTS_WdgDiff_Tr ● ● ●
16 Alm_CTS_Diff_GTU ● ● ●
17 Alm_MechRly1 ● ●
18 Alm_MechRly2 ● ●
19 Alm_MechRly3 ● ●
20 Alm_MechRly4 ● ●
21 Alm_PwrLoss_MechRly ● ●
22 Alm_Inconsist_MechRly ● ●
23 Alm_CTS_HVS1_Tr ● ● ●
24 Alm_CTS_HVS2_Tr ● ● ●

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25 Alm_CTS_LVS_Tr ● ● ●
26 Alm_CTS_Bak_HVS_Tr ● ● ●
27 Alm_CTS_Wdg_HVS_Tr ● ● ●
28 Alm_Diff_Tr ● ●
29 Alm_REF_Tr ● ●
30 Alm_WdgDiff_Tr ● ●
31 Alm_Diff_GTU ● ●
32 Alm_VTS_Br1_ST1 ● ● ●
33 Alm_VTS_Br2_ST1 ● ● ●
34 Alm_VTS_Br1_ST2 ● ● ●
35 Alm_VTS_Br2_ST2 ● ● ●
36 Alm_BO_OC_HVS_ST1 ● ●
37 Alm_BO_OC_HVS_ST2 ● ●
38 Alm_OvLd_ST1 ● ●
39 Alm_InitCool_OvLd_ST1 ● ●
40 Alm_OvLd_ST2 ● ●
41 Alm_InitCool_OvLd_ST2 ● ●
42 Alm_PM_DSP2_CPUBrd ●
43 Alm_CTS_Diff_ST1 ● ● ●
44 Alm_CTS_Diff_ST2 ● ● ●
45 Alm_CTS_HVS_ST1 ● ● ●
46 Alm_CTS_Br1_ST1 ● ● ●
47 Alm_CTS_Br2_ST1 ● ● ●
48 Alm_CTS_HVS_ST2 ● ● ●
49 Alm_CTS_Br1_ST2 ● ● ●
50 Alm_CTS_Br2_ST2 ● ● ●
51 Alm_Diff_ST1 ● ●
52 Alm_Diff_ST2 ● ●
53 Alm_RAM_CPUBrd ●
54 Alm_ROM_CPUBrd ●
55 Alm_EEPROM_CPUBrd ●
56 Alm_InvalidSetting ●
57 Alm_ModifiedSetting ●
58 Alm_PwrLoss_Opto ●
59 Alm_TripOutput ●
60 Alm_InnerComm ● ●
61 Alm_DSP_CPUBrd ●
62 Alm_PersistFD_CPUBrd ● ●
63 Alm_InconsistFD ● ●
64 Alm_Sample_CPUBrd ●
65 Alm_BI_CPUBrd ● ●
66 Alm_Reboot_CPUBrd ●
67 Alm_RAM_MONBrd ●

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68 Alm_ROM_MONBrd ●
69 Alm_EEPROM_MONBrd ●
70 Alm_DSP_MONBrd ●
71 Alm_PersistFD_MONBrd ● ●
72 Alm_MONBrd ● ●
73 Alm_Sample_MONBrd ●
74 Alm_Reboot_MONBrd ●

●: means the corresponding LED indicator is on.

Table 4.1-2 List2 of self-supervision reports

No. Item Description Suggestion

Alarm indicating secondary
1 Alm_VTS_LVS_Tr circuit failure of VT at LV side
of main transformer. Check the metering and
Alarm indicating secondary secondary circuit.
2 Alm_VTS_HVS_Tr circuit failure of VT at HV side
of main transformer.
Treat according to
Alarm indicating overload of
3 Alm_OvLd_Tr specific application
main transformer.
requirement.
Alarm indicating stage 1 of
4 Alm_InitCool1_OvLd_Tr initial cooling of main
transformer.
Alarm indicating stage 2 of
Check the metering and
5 Alm_InitCool2_OvLd_Tr initial cooling of main
secondary circuit.
transformer.
Alarm indicating over current
6 Alm_BO_OC_HVS_Tr at HV side of main
transformer.
Alarm indicating over
7 Alm_OvExc_Tr
excitation of main transformer. Treat according to
Alarm indicating operation of specific application
8 Alm_ROV_LVS_Tr ROV protection of LV side of requirement.
main transformer.
Alarm indicating the position
9 Alm_Pos_GCB of circuit breaker at generator
terminal is abnormal.
Alarm indicating the position Check the
of circuit breaker of branch 1 corresponding binary
10 Alm_Pos_CB_HVS1_Tr
at HV side of step-down input.
transformer is abnormal.
Alarm indicating the position
11 Alm_Pos_CB_HVS2_Tr
of circuit breaker of branch 2

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at HV side of step-down
transformer is abnormal.
The DSP chip in CPU board Inform manufacturer for
12 Alm_PM_DSP1_CPUBrd
damaged. maintenance.
Alarm indicating the
differential current is
13 Alm_CTS_Diff_Tr abnormal in differential
protection of main
transformer.
Alarm indicating the
differential current is
14 Alm_CTS_REF_Tr abnormal in zero-sequence
Disable the link and
differential protection of main
check the secondary
transformer.
circuit. After clear the
Alarm indicating the
error, reset the relay.
differential current is
15 Alm_CTS_WdgDiff_Tr abnormal in winding
differential protection of main
transformer.
Alarm indicating secondary
circuit failure of CT in
16 Alm_CTS_Diff_GTU
differential protection of
generator-transformer unit.
Alarm indicating operation of
17 Alm_MechRly1
mechanical repeater 1.
Alarm indicating operation of
18 Alm_MechRly2 Treat according to
mechanical repeater 2.
specific application
Alarm indicating operation of
19 Alm_MechRly3 requirement.
mechanical repeater 3.
Alarm indicating operation of
20 Alm_MechRly4
mechanical repeater 4.
Alarm indicating power loss of Check if the power
21 Alm_PwrLoss_MechRly
mechanical relay. circuit of BI module is
Alarm indicating circuit of connected correctly with
22 Alm_Inconsist_MechRly
mechanical is abnormal. PWR module.
Alarm indicating secondary
circuit failure of CT at branch
23 Alm_CTS_HVS1_Tr
1 of HV side of main
transformer.
Check the metering and
Alarm indicating secondary
secondary circuit.
circuit failure of CT at branch
24 Alm_CTS_HVS2_Tr
2 of HV side of main
transformer.
25 Alm_CTS_LVS_Tr Alarm indicating secondary

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circuit failure of CT at LV side

of main transformer.
Alarm indicating secondary
circuit failure of CT used by
26 Alm_CTS_Bak_HVS_Tr
backup protection at HV side
of main transformer.
Alarm indicating secondary
circuit failure of CT used by
27 Alm_CTS_Wdg_HVS_Tr winding differential protection
at HV side of main
transformer.
Alarm indicating the
differential current is
28 Alm_Diff_Tr abnormal in differential
protection of main
transformer.
Alarm indicating the
differential current is
29 Alm_REF_Tr abnormal in zero-sequence
differential protection of main
transformer.
Alarm indicating the
differential current is
30 Alm_WdgDiff_Tr abnormal in winding
differential protection of main
transformer.
Alarm indicating the
differential current is
31 Alm_Diff_GTU abnormal in differential
protection of
generator-transformer unit.
Alarm indicating secondary
circuit failure of VT of Branch
32 Alm_VTS_Br1_ST1
1 at LV side of step-down
transformer 1.
Alarm indicating secondary
circuit failure of VT of Branch
33 Alm_VTS_Br2_ST1 Check the metering and
2 at LV side of step-down
secondary circuit.
transformer 1.
Alarm indicating secondary
circuit failure of VT of Branch
34 Alm_VTS_Br1_ST2
1 at LV side of step-down
transformer 2.
35 Alm_VTS_Br2_ST2 Alarm indicating secondary

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circuit failure of VT of Branch

2 at LV side of step-down
transformer 2.
Alarm indicating overcurrent
36 Alm_BO_OC_HVS_ST1 status at HV side of
step-down transformer 1.
Alarm indicating overcurrent
37 Alm_BO_OC_HVS_ST2 status at HV side of
step-down transformer 2.
Alarm indicating overload of
38 Alm_OvLd_ST1
step-down transformer 1.
Alarm indicating overload to
39 Alm_InitCool_OvLd_ST1 initiate cooling of step-down
Treat according to
transformer 1.
specific application
Alarm indicating overload of
40 Alm_OvLd_ST2 requirement.
step-down transformer 2.
Alarm indicating overload to
41 Alm_InitCool_OvLd_ST2 initiate cooling of step-down
transformer 2.
Alarm indicating DSP2 in Inform manufacturer for
42 Alm_PM_DSP2_CPUBrd
CPU module damaged. maintenance.
Alarm indicating secondary
circuit failure of CT in
43 Alm_CTS_Diff_ST1
differential protection of
step-down transformer 1.
Alarm indicating secondary
circuit failure of CT in
44 Alm_CTS_Diff_ST2
differential protection of
step-down transformer 2.
Alarm indicating secondary
45 Alm_CTS_HVS_ST1 circuit failure of HV side of
step-down transformer 1.
Check the metering and
Alarm indicating secondary
secondary circuit.
circuit failure of branch1 at LV
46 Alm_CTS_Br1_ST1
side of step-down transformer
1.
Alarm indicating secondary
circuit failure of branch2 at LV
47 Alm_CTS_Br2_ST1
side of step-down transformer
1.
Alarm indicating secondary
48 Alm_CTS_HVS_ST2 circuit failure of HV side of
step-down transformer 2.
49 Alm_CTS_Br1_ST2 Alarm indicating secondary

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circuit failure of branch1 at LV

side of step-down transformer
2.
Alarm indicating secondary
circuit failure of branch2 at LV
50 Alm_CTS_Br2_ST2
side of step-down transformer
2.
Alarm indicating the
differential current is
51 Alm_Diff_ST1 abnormal in differential
protection of step-down
transformer1.
Alarm indicating the
differential current is
52 Alm_Diff_ST2 abnormal in differential
protection of step-down
transformer2.
53 Alm_RAM_CPUBrd CPU module RAM damaged.
CPU module flash memory
54 Alm_ROM_CPUBrd
damaged.
CPU module EEPROM Inform manufacturer for
damaged judged by the maintenance.
55 Alm_EEPROM_CPUBrd mismatch of summation of all
the settings with the CRC
code.
Without modifying protection
setting after modification of Modify and check
56 Alm_InvalidSetting
rated secondary current of protection setting again.
CT.
Do nothing except
The relay is in the proceeding
57 Alm_ModifiedSetting waiting for completion of
of setting parameters.
the process.
Check if the power
Loss of power supply of the
circuit of OPT module is
58 Alm_PwrLoss_Opto optical couplers for binary
connected correctly with
inputs.
DC module.
Driving transistor of binary Inform manufacturer for
59 Alm_TripOutput
output damaged. maintenance.
Inner communication error Check the connection
60 Alm_InnerComm between CPU and MON between FACE and
modules. CPU modules.
The DSP chip in CPU board Inform manufacturer for
61 Alm_DSP_CPUBrd
damaged. maintenance.
62 Alm_PersistFD_CPUBrd Duration of pickup of any fault Check the secondary

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detector in MON board is in circuit and the

excess of 10s. corresponding settings.
Mismatch of pickup of same Check the metering
63 Alm_InconsistFD type fault detectors in CPU between CPU and MON
and MON. modules.
Failure of sampled data in
64 Alm_Sample_CPUBrd
CPU board.
Any one of binary input
Inform manufacturer for
sampled directly does not
maintenance.
65 Alm_BI_CPUBrd match with that of
reorganization of protection
itself.
Do nothing except
66 Alm_Reboot_CPUBrd CPU module is rebooting. waiting for completion of
the process.
67 Alm_RAM_MONBrd MON module RAM damaged.
MON module flash memory
68 Alm_ROM_MONBrd
damaged.
Inform manufacturer for
MON module EEPROM
69 Alm_EEPROM_MONBrd maintenance.
damaged.
The DSP chip in MON board
70 Alm_DSP_MONBrd
damaged.
Duration of pickup of any fault Check the secondary
71 Alm_PersistFD_MONBrd detector in MON board is in circuit and the
excess of 10s. corresponding settings.
72 Alm_MONBrd MON module damaged
Inform manufacturer for
Failure of sampled data in
73 Alm_Sample_MONBrd maintenance.
MON board.
Do nothing except
74 Alm_Reboot_MONBrd MON module is rebooting. waiting for completion of
the process.

4.2 Metering
The relay produces a variety of both directly and calculated power system quantities. These
measurement values are updated on a per half second basis and can be viewed in the menu
“VALUES” of the relay or via relay communication.

This relay is able to measure and display the following quantities as summarized:

4.2.1 Measured Voltages and Currents

The relay produces both phase-to-ground and phase-to-phase voltage and current values. They
are produced directly from the DFT (Discrete Fourier Transform) used by the relay protection
functions and present both magnitude and phase angle measurement.

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4.2.2 Sequence Voltages and Currents

Sequence quantities are produced by the relay from the measured Fourier values; these are
displayed as magnitude and phase angle values.

4.2.3 RMS of Voltages and Currents

Phase voltage and current values are calculated by the relay using the sum of the samples
squared over a cycle of sampled data.

4.2.4 Differential Current and Relevant Quantities

Differential current and restrained current calculated in differential protection is displayed to user
for monitoring the correctness of operation or testing of the differential protection.

4.2.5 Phase Angles

Calculated phase angles are also displayed on LCD to help user to check the correctness of CT or
VT circuit.

4.2.6 Measurement Display Quantities

Here are “VALUES” available in the relay for viewing of measurement quantities. All the
measurement quantities can be divided into CPU quantities or DSP quantities by their origin where
they are derived. These can also be viewed with RCSPC (see RCSPC User Manual) and are
shown below:

4.2.7 All Metering Data Displayed on LCD

Note!

The quantities listed in following tables are to be displayed on LCD for RCS-985BT, but for
a certain application, some of these quantities may be eliminated due to the scheme user
required, so please look up the devices on site for actual quantities displayed.

4.2.7.1 Main Transformer Metering in CPU and MON

1. Differential currents of main transformer metering in CPU and MON

No. Item Description

Phase A, B and C of per unit value of differential current of main
1 Id_Diff_Tr
transformer differential protection.
Phase A, B and C of per unit value of restraint current of main
2 Ir_Diff_Tr
transformer differential protection.
Corrected current of phase A, B and C of branch1 at HV side of
3 Icr_HVS1_Tr
main transformer.
Corrected current of phase A, B and C of branch2 at HV side of
4 Icr_HVS2_Tr
main transformer.
Corrected current of phase A, B and C at LV side of main
5 Icr_LVS_Tr
transformer.

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Corrected current of phase A, B and C at HV side of step-down

6 Icr_ST1_Tr
transformer 1 for differential protection of main transformer.
Corrected current of phase A, B and C at HV side of step-down
7 Icr_ST2_Tr
transformer 2 for differential protection of main transformer.
Phase A, B and C of per unit value of differential current of
8 Id_WdgDiff_Tr
winding differential protection of main transformer.
Phase A, B and C of per unit value of restraint current of
9 Ir_WdgDiff_Tr
winding differential protection of main transformer.
Corrected current used by winding differential protection of
10 Icr_HVS1_WdgDiff_Tr
phase A, B and C of branch1 at HV side of main transformer.
Corrected current used by winding differential protection of
11 Icr_HVS2_WdgDiff_Tr
phase A, B and C of branch2 at HV side of main transformer.
Corrected current used by winding differential protection of
12 Icr_Wdg_WdgDiff_Tr
phase A, B and C of winding of main transformer.
Differential current of restrict earth fault protection of main
13 Id_REF_Tr
transformer.
Restrained current of restrict earth fault protection of main
14 Ir_REF_Tr
transformer.
Corrected zero-sequence current used by REF of branch 1 at
15 Icr_HVS1_REF_Tr
HV side of main transformer.
Corrected zero-sequence current used by REF of branch 2 at
16 Icr_HVS2_REF_Tr
HV side of main transformer.
Corrected zero-sequence current used by REF at neutral point
17 Icr_NP_REF_Tr
of main transformer.

Access path in menu is “VALUESÆCPU METERINGÆTR METERINGÆDIFF CURR” and

“VALUESÆMON METERINGÆTR METERINGÆ DIFF CURR”.

Note!

The contents inside the first window are the default display seen by user entering this
submenu. User can navigate to the following items by scrolling the arrow keys on the
faceplate of the relay. What user meets similar to this case later can be dealt with in same
way.

2. Currents of main transformer metering in CPU and MON

No. Item Description

Currents of phase A, B and C of branch 1 at HV side of main
1 I_HVS1_Tr
transformer.
Positive-sequence currents of branch 1 at HV side of main
2 I1_HVS1_Tr
transformer.
Negative-sequence currents of branch 1 at HV side of main
3 I2_HVS1_Tr
transformer.
4 I0_HVS1_Tr Zero-sequence currents of branch 1 at HV side of main transformer.

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Currents of phase A, B and C of branch 2 at HV side of main

5 I_HVS2_Tr
transformer.
Positive-sequence currents of branch 2 at HV side of main
6 I1_HVS2_Tr
transformer.
Negative-sequence currents of branch 2 at HV side of main
7 I2_HVS2_Tr
transformer.
8 I0_HVS2_Tr Zero-sequence currents of branch 2 at HV side of main transformer.
Current sum of phase A, B and C of branch 1 and 2 at HV side of
9 I_Bak_HVS_Tr
main transformer.
10 I1_Bak_HVS_Tr Positive-sequence current at HV side of main transformer.
11 I2_Bak_HVS_Tr Negative-sequence current at HV side of main transformer.
12 I0_Bak_HVS_Tr Zero-sequence current at HV side of main transformer.
Current of phase A, B and C of winding at HV side of main
13 I_Wdg_HVS_Tr
transformer.
Positive-sequence current of winding at HV side of main
14 I1_Wdg_HVS_Tr
transformer.
Negative-sequence current of winding at HV side of main
15 I2_Wdg_HVS_Tr
transformer.
16 I0_Wdg_HVS_Tr Zero-sequence current of winding at HV side of main transformer.
Zero-sequence current of neutral point at HV side of main
17 I0_NP_HVS_Tr
transformer.
18 I0_Gap_HVS_Tr Gap zero-sequence current at HV side of main transformer.
19 I_LVS_Tr Currents of phase A, B and C at LV side of main transformer.
20 I1_LVS_Tr Positive-sequence currents of at LV side of main transformer.
21 I2_LVS_Tr Negative-sequence currents of at LV side of main transformer.
22 I0_LVS_Tr Zero-sequence currents of at LV side of main transformer.

Access path in menu is “VALUESÆCPU METERINGÆTR METERINGÆTR CURR” and

“VALUESÆMON METERINGÆTR METERINGÆTR CURR”.

3. Voltages of main transformer metering in CPU and MON

No. Item Description

1 U_HVS_Tr Phase voltages at HV side of main transformer.
2 Upp_HVS_Tr Phase-to-phase voltages at HV side of main transformer.
3 U1_HVS_Tr Positive-sequence voltage at HV side of main transformer.
4 U2_HVS_Tr Negative-sequence voltage at HV side of main transformer.
Calculated zero-sequence voltage at HV side of main
5 U0_Calc_HVS_Tr
transformer.
Zero-sequence voltage of delta VT at HV side of main
6 U0_DeltVT_HVS_Tr
transformer.
7 U/F_OvExc_Tr Calculated ratio between voltage and frequency of transformer.
8 f Calculated frequency
9 U_LVS_Tr Phase voltages at LV side of main transformer.
10 Upp_LVS_Tr Phase-to-phase voltages at LV side of main transformer.

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11 U1_LVS_Tr Positive-sequence voltage at LV side of main transformer.

12 U2_LVS_Tr Negative-sequence voltage at LV side of main transformer.
13 U0_Calc_LVS_Tr Calculated zero-sequence voltage at LV side of main transformer.
14 U0_DeltVT_LVS_Tr Zero-sequence voltage of delta VT at LV side of main transformer.

Access path in menu is “VALUESÆCPU METERINGÆTR METERINGÆALL SIDES VOLT” and

“VALUESÆMON METERINGÆTR METERINGÆALL SIDES VOLT”.

4.2.7.2 Step-down Transformer Metering in CPU and MON

1. Differential currents of step-down transformer metering in CPU and MON

ST1: step-down transformer 1

ST2: step-down transformer 2

No. Item Description

1 Id_Diff_ST1 Phase A, B and C of per unit value of differential current of ST1.
2 Ir_Diff_ST1 Phase A, B and C of per unit value of restraint current of ST1.
3 Icr_HVS_ST1 Corrected current of phase A, B and C at HV side of ST1
4 Icr_Br1_ST1 Corrected current of phase A, B and C at branch 1 of LV side of ST1.
5 Icr_Br2_ST1 Corrected current of phase A, B and C at branch 2 of LV side of ST1.

Access path in menu is “VALUESÆCPU METERINGÆST METERINGÆST1 DIFF CURR” and

“VALUESÆMON METERINGÆST METERINGÆST1 DIFF CURR”.

No. Item Description

1 Id_Diff_ST2 Phase A, B and C of per unit value of differential current of ST2.
2 Ir_Diff_ST2 Phase A, B and C of per unit value of restraint current of ST2.
3 Icr_HVS_ST2 Corrected current of phase A, B and C at HV side of ST2
4 Icr_Br1_ST2 Corrected current of phase A, B and C at branch 1 of LV side of ST2.
5 Icr_Br2_ST2 Corrected current of phase A, B and C at branch 2 of LV side of ST2.

Access path in menu is “VALUESÆCPU METERINGÆST METERINGÆST2 DIFF CURR” and

“VALUESÆMON METERINGÆST METERINGÆST2 DIFF CURR”.

2. Currents and voltages of step-down transformer metering in CPU and MON

No. Item Description

1 I_CT_HVS_ST1 Currents of CT at HV side of ST1.
2 I1_CT_HVS_ST1 Positive-sequence currents of CT at HV side of ST1.
3 I2_CT_HVS_ST1 Negative-sequence currents of CT at HV side of ST1.
4 I0_CT_HVS_ST1 Zero-sequence currents of CT at HV side of ST1.
Currents of CT at HV side of ST1 for main transformer differential
5 I_CT#_HVS_ST1
protection.
Positive-sequence currents of CT at HV side of ST1 for main
6 I1_CT#_HVS_ST1
transformer differential protection.
Negative-sequence currents of CT at HV side of ST1 for main
7 I2_CT#_HVS_ST1
transformer differential protection.

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Zero-sequence currents of CT at HV side of ST1 for main

8 I0_CT#_HVS_ST1
transformer differential protection.
9 I_Br1_ST1 Currents of branch 1 of ST1.
10 I1_Br1_ST1 Positive-sequence current of branch 1 of ST1.
11 I2_Br1_ST1 Negative-sequence current of branch 1 of ST1.
12 I0_Br1_ST1 Zero-sequence current of branch 1 of ST1.
13 I0_NP_Br1_ST1 Zero-sequence current of neutral point of branch 1 of ST1.
14 Upp_Br1_ST1 Voltages at branch 1 of ST1.
15 U1_Br1_ST1 Positive-sequence voltage at branch 1 of ST1.
16 U2_Br1_ST1 Negative-sequence voltage at branch 1 of ST1.
17 I_Br2_ST1 Currents of branch 2 of ST1.
18 I1_Br2_ST1 Positive-sequence current of branch 2 of ST1.
19 I2_Br2_ST1 Negative-sequence current of branch 2 of ST1.
20 I0_Br2_ST1 Zero-sequence current of branch 2 of ST1.
21 I0_NP_Br2_ST1 Zero-sequence current of neutral point of branch 2 of ST1.
22 Upp_Br2_ST1 Voltages at branch 2 of ST1.
23 U1_Br2_ST1 Positive-sequence voltage at branch 2 of ST1.
24 U2_Br2_ST1 Negative-sequence voltage at branch 2 of ST1.

Access path in menu is “VALUESÆCPU METERINGÆST METERINGÆST1 METERING” and

“VALUESÆMON METERINGÆST METERINGÆST1 METERING”.

No. Item Description

1 I_CT_HVS_ST2 Currents of CT at HV side of ST2.
2 I1_CT_HVS_ST2 Positive-sequence currents of CT at HV side of ST2.
3 I2_CT_HVS_ST2 Negative-sequence currents of CT at HV side of ST2.
4 I0_CT_HVS_ST2 Zero-sequence currents of CT at HV side of ST2.
Currents of CT at HV side of ST1 for main transformer differential
5 I_CT#_HVS_ST2
protection.
Positive-sequence currents of CT at HV side of ST2 for main
6 I1_CT#_HVS_ST2
transformer differential protection.
Negative-sequence currents of CT at HV side of ST2 for main
7 I2_CT#_HVS_ST2
transformer differential protection.
Zero-sequence currents of CT at HV side of ST2 for main
8 I0_CT#_HVS_ST2
transformer differential protection.
9 I_Br1_ST2 Currents of branch 1 of ST2.
10 I1_Br1_ST2 Positive-sequence current of branch 1 of ST2.
11 I2_Br1_ST2 Negative-sequence current of branch 1 of ST2.
12 I0_Br1_ST2 Zero-sequence current of branch 1 of ST2.
13 I0_NP_Br1_ST2 Zero-sequence current of neutral point of branch 1 of ST2.
14 Upp_Br1_ST2 Voltages at branch 1 of ST2.
15 U1_Br1_ST2 Positive-sequence voltage at branch 1 of ST2.
16 U2_Br1_ST2 Negative-sequence voltage at branch 1 of ST2.
17 I_Br2_ST2 Currents of branch 2 of ST2.

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18 I1_Br2_ST2 Positive-sequence current of branch 2 of ST2.

19 I2_Br2_ST2 Negative-sequence current of branch 2 of ST2.
20 I0_Br2_ST2 Zero-sequence current of branch 2 of ST2.
21 I0_NP_Br2_ST2 Zero-sequence current of neutral point of branch 2 of ST2.
22 Upp_Br2_ST2 Voltages at branch 2 of ST2.
23 U1_Br2_ST2 Positive-sequence voltage at branch 2 of ST2.
24 U2_Br2_ST2 Negative-sequence voltage at branch 2 of ST2.

Access path in menu is “VALUESÆCPU METERINGÆST METERINGÆST2 METERING” and

“VALUESÆMON METERINGÆST METERINGÆST2 METERING”.

4.2.7.3 Phase Angles of Main Transformer Metering

No. Item Description

Phase angle of same-phase current between branch 1 of HV
1 φi_HVS1_&_LVS_Tr
side of main transformer and LV side of main transformer.
Phase angle of same-phase current between branch 2 of HV
2 φi_HVS2_&_LVS_Tr
side of main transformer and LV side of main transformer.
Phase angle of same-phase current between HV side of
3 φi_ST1_&_LVS_Tr
step-down transformer 1 and LV side of main transformer.
Phase angle of same-phase current between HV side of
4 φi_ST2_&_LVS_Tr
step-down transformer 2 and LV side of main transformer.
Phase angle between A and B, B and C, C and A of currents at
5 φipp_HVS1_Tr
branch 1 of HV side of main transformer.
Phase angle between A and B, B and C, C and A of currents at
6 φipp_HVS2_Tr
branch 2 of HV side of main transformer.
Phase angle between A and B, B and C, C and A of currents at
7 φipp_Bak_HVS_Tr
HV side of main transformer.
Phase angle between A and B, B and C, C and A of currents at
8 φipp_LVS_Tr
LV side of main transformer.
Phase angle between A and B, B and C, C and A of voltages
9 φvpp_HVS_Tr
at HV side of main transformer.
Phase angle between same-phase voltages and currents of
10 φvi_Tr
HV side of main transformer.
Phase angle between zero-sequence voltage and
11 φvi0_Tr
zero-sequence current of main transformer.

Access path in menu is “VALUESÆ PHASE ANGLEÆTR PHASE ANGLE”.

4.2.7.4 Phase Angles of Step-down Transformer Metering

No. Item Description

Phase angle of same-phase current between branch 1 at LV
1 φi_HVS_&_Br1_ST1 side of step-down transformer 2 and HV side of step-down
transformer 1.
Phase angle of same-phase current between branch 2 at LV
2 φi_HVS_&_Br2_ST1
side of step-down transformer 2 and HV side of step-down

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transformer 1.
Phase angle between phase A and B, B and C, C and A of
3 φipp_CT_HVS_ST1 current derived from CT at HV side of step-down transformer
1.
Phase angle between phase A and B, B and C, C and A of
4 φipp_Br1_ST1
currents of Br1 side of step-down transformer 1.
Phase angle between phase A and B, B and C, C and A of
5 φipp_Br2_ST1
currents of Br2 side of step-down transformer 1.
Phase angle between phase A and B, B and C, C and A of
6 φvpp_Br1_ST1
voltages of Br1 side of step-down transformer 1.
Phase angle between phase A and B, B and C, C and A of
7 φvpp_Br2_ST1
voltages of Br2 side of step-down transformer 1.

Access path in menu is “VALUESÆPHASE ANGLEÆST1 PHASE ANGLE”.

No. Item Description

Phase angle of same-phase current between branch 1 at LV
1 φi_HVS_&_Br1_ST2 side of step-down transformer 2 and HV side of step-down
transformer 2.
Phase angle of same-phase current between branch 2 at LV
2 φi_HVS_&_Br2_ST2 side of step-down transformer 2 and HV side of step-down
transformer 2.
Phase angle between phase A and B, B and C, C and A of
3 φipp_CT_HVS_ST2 current derived from CT at HV side of step-down transformer
2.
Phase angle between phase A and B, B and C, C and A of
4 φipp_Br1_ST2
currents of Br1 side of step-down transformer 2.
Phase angle between phase A and B, B and C, C and A of
5 φipp_Br2_ST2
currents of Br2 side of step-down transformer 2.
Phase angle between phase A and B, B and C, C and A of
6 φvpp_Br1_ST2
voltages of Br1 side of step-down transformer 2.
Phase angle between phase A and B, B and C, C and A of
7 φvpp_Br2_ST2
voltages of Br2 side of step-down transformer 2.

Access path in menu is “VALUESÆPHASE ANGLEÆST2 PHASE ANGLE”.

4.3 Binary Input Signals

Signals here mean changes of binary inputs. All these signals can be displayed on LCD, locally
printed or sent to automation system of substation via communication channel.

4.3.1 Enabling Binary Inputs of Main Transformer

No. Item Description

Enable binary input of differential protection of main
1 EBI_Diff_Tr
transformer.
2 EBI_PPF_Tr Enabling binary input of phase-to-phase backup protection of

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main transformer.
Enabling binary input of earth fault protection of main
3 EBI_EF_Tr
transformer.
Enabling binary input of gap zero-sequence protection of main
4 EBI_EF_Gap_Tr
transformer.
Enabling binary input of restricted earth-fault protection of
5 EBI_REF_Tr
main transformer.
Enabling binary input of winding differential protection of main
6 EBI_WdgDiff_Tr
transformer.
Enabling binary input of breaker failure protection at HV side
7 EBI_BFP_CB_HVS_Tr
of main transformer.
Enabling binary input of over-excitation protection of main
8 EBI_OvExc_Tr
transformer.
Enabling binary input of breaker flashover protection at HV
9 EBI_Flash_CB_HVS_Tr
side of main transformer.

Access path in menu is “VALUESÆCPU BI STATEÆTR PROT EBI” and “VALUESÆMON BI

STATE ÆTR PROT EBI”.

4.3.2 Enabling Binary Inputs of Step-down Transformer

No. Item Description

Enabling binary input of differential protection of step-down
1 EBI_Diff_ST1
transformer 1.
Enabling binary input of backup protection at HV side of
2 EBI_Bak_HVS_ST1
step-down transformer 1.
Enabling binary input of phase-to-phase backup protection of
3 EBI_PPF_Br1_ST1
branch 1 at LV side of step-down transformer 1.
Enabling binary input of earth-fault backup protection of
4 EBI_EF_Br1_ST1
branch 1 at LV side of step-down transformer 1.
Enabling binary input of phase-to-phase backup protection of
5 EBI_PPF_Br2_ST1
branch 2 at LV side of step-down transformer 1.
Enabling binary input of earth-fault backup protection of
6 EBI_EF_Br2_ST1
branch 2 at LV side of step-down transformer 1.
Enabling binary input of differential protection of step-down
7 EBI_Diff_ST2
transformer 2.
Enabling binary input of backup protection at HV side of
8 EBI_Bak_HVS_ST2
step-down transformer 2.
Enabling binary input of phase-to-phase backup protection of
9 EBI_PPF_Br1_ST2
branch 1 at LV side of step-down transformer 2.
Enabling binary input of earth-fault backup protection of
10 EBI_EF_Br1_ST2
branch 1 at LV side of step-down transformer 2.
Enabling binary input of phase-to-phase backup protection of
11 EBI_PPF_Br2_ST2
branch 2 at LV side of step-down transformer 2.
12 EBI_EF_Br2_ST2 Enabling binary input of earth-fault backup protection of

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branch 2 at LV side of step-down transformer 2.

13 EBI_Reserved Reserved binary input for protection function enabling

Access path in menu is “VALUESÆCPU BI STATEÆST PROT EBI” and “VALUESÆMON BI

STATEÆST PROT EBI”.

4.3.3 Binary Inputs of Mechanical Protection

No. Item Description

Enabling binary input of mechanical protection to allow
1 EBI_Trp_MechRly1
mechanical repeater 1 to initial tripping.
Enabling binary input of mechanical protection to allow
2 EBI_Trp_MechRly2
mechanical repeater 2 to initial tripping.
Enabling binary input of mechanical protection to allow
3 EBI_Trp_MechRly3
mechanical repeater 3 to initial tripping.
Enabling binary input of mechanical protection to allow
4 EBI_Trp_MechRly4
mechanical repeater 4 to initial tripping.
5 BI_MechRly1 Binary input indicating operation of mechanical repeater 1.
6 BI_MechRly2 Binary input indicating operation of mechanical repeater 2.
7 BI_MechRly3 Binary input indicating operation of mechanical repeater 3.
8 BI_MechRly4 Binary input indicating operation of mechanical repeater 4.

Access path in menu is “VALUESÆCPU BI STATEÆMECH RLY EBI” and “VALUESÆMON BI

STATEÆMECH RLY EBI”.

4.3.4 Auxiliary Binary Inputs

No. Item Description

Binary input of auxiliary contact of close position of circuit
1 BI_52b_GCB
breaker at generator’s terminal.
Binary input of auxiliary contact of close position of circuit
2 BI_52b_CB_HVS1_Tr
breaker at branch 1 of HV side of transformer.
Binary input of auxiliary contact of close position of circuit
3 BI_52b_CB_HVS2_Tr
breaker at branch 2 of HV side of transformer.
4 BI_Reserved1 Reserved binary input
5 BI_Reserved2 Reserved binary input
Binary input of indicating operating of external protection
6 BI_ExtTrp_Ctrl_BFP
device
Binary input of indicating branch protection of step-down
7 BI_Blk_Prot_ST1
transformer 1 blocked
Binary input of indicating branch protection of step-down
8 BI_Blk_Prot_ST2
transformer 2 blocked
Binary input of indicating gap zero-sequence protection of
9 BI_Ext_Ctrl_EF_Gap_Tr
main transformer controlled by external signal
Binary input indicating all binary input circuit is working in
10 BI_Pwr_Superv
good condition.

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Access path in menu is “VALUESÆCPU BI STATEÆAUX BI” and “VALUESÆMON BI

STATEÆAUX BI”.

4.3.5 Fault Detector Flag Generated Internal by PROT

No. Item Description

Internally generated binary input indicating operation of
1 FD_Diff_Tr/GTU fault detector of differential protection of main transformer
or generator-transformer unit.
Internally generated binary input indicating operation of
2 FD_PPF/EF_Tr phase-to-phase fault and earth-fault protection of main
transformer.
Internally generated binary input indicating operation of
3 FD_Diff_ST1
differential protection of step-down transformer 1.
Internally generated binary input indicating operation of
4 FD_PPF/EF_ST1 phase-to-phase fault and earth-fault protection of
step-down transformer 1.
Internally generated binary input indicating operation of
5 FD_Diff_ST2
differential protection of step-down transformer 2.
Internally generated binary input indicating operation of
6 FD_PPF/EF_ST2 phase-to-phase fault and earth-fault protection of
step-down transformer 2.
Internally generated binary input indicating operation of
7 FD_OvExc_Tr fault detector of over-excitation protection of main
transformer.
Internally generated binary input indicating operation of
8 FD_BFP/Flash_CB_HVS_Tr fault detector of breaker failure protection and breaker
flashover protection at HV side of main transformer.
Internally generated binary input indicating operation of
9 FD_MechRly fault detector of mechanical protection of excitation
transformer.

Access path in menu is “VALUESÆCPU BI STATEÆPROT FD” and “VALUESÆMON BI STATE

ÆPROT FD”.

4.3.6 Other Binary Inputs

No. Item Description

Binary input indicating the status of power supply for mechanical
1 BI_Pwr_MechRly
protection
Binary input indicating the status of power supply for optical
2 BI_Pwr_Opto
isolators
3 BI_Print Binary input used to initiate printer
4 BI_Pulse_GPS Binary input of GPS clock synchronous pulse
5 BI_RstTarg Binary input of signal reset

Access path in menu is “VALUESÆCPU BI STATEÆPS SUPERV BI” and “VALUESÆMON BI

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STATEÆPS SUPERV BI”.

4.4 Event & Fault Recorder

4.4.1 Introduction
The RCS-985BT is equipped with integral measurements, event, fault and disturbance recording
facilities suitable for analysis of complex system disturbances. The relay is flexible enough to allow
for the programming of these facilities to specific user application requirements and is discussed
below.

4.4.2 Event & Fault Records

The relay records and time tags up to 32 events and stores them in non-volatile (battery backed up)
memory. This enables the system operator to establish the sequence of events that occurred
within the relay following a particular power system condition, switching sequence etc. When the
available space is exhausted, the oldest event is automatically overwritten by the new one.

The real time clock within the relay provides the time tag to each event, to a resolution of 1ms. The
event records are available for viewing either via the front plate LCD or remotely, via the
communications ports (courier and Modbus versions only).

Local viewing on the LCD is achieved in the menu column entitled “REPORT”. This column allows
viewing of event and fault records and is shown by setting sequence No. of the event or fault
report by user. Refer to Chapter 7 for details of operation method.

4.4.3 Type of Event

An event may be a change of state of a control input or output relay, an alarm condition and
operation reports of protection etc.

4.4.4 State Change of Binary Inputs

If one or more of the opto inputs has changed state since the last time that the protection algorithm
ran, the new status is logged as an event. When this event is selected to be viewed on the LCD,
the applicable cells will become visible as shown below:

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Where “Record No.” means the sequence No. of the record which is generated by RCS-985BT
automatically. “Date: DD-MM-YY” and “Time: HH:MM:SS:MS” commonly comprise the absolute
time tag of the record. “Binary input name” shows the name of the binary input whose state
changes. “Changing manner” shows how to change of the state of the binary input. For instance:

All the binary input that may be shown in the menu can be found in section 4.3, here list them
again.

Table 4.4-1 List of binary inputs of RCS-985BT

No. Item Description

Enable binary input of differential protection of main
1 EBI_Diff_Tr
transformer.
Enabling binary input of phase-to-phase backup
2 EBI_PPF_Tr
protection of main transformer.
Enabling binary input of earth fault protection of main
3 EBI_EF_Tr
transformer.
Enabling binary input of gap zero-sequence protection of
4 EBI_EF_Gap_Tr
main transformer.
Enabling binary input of restricted earth-fault protection of
5 EBI_REF_Tr
main transformer.
Enabling binary input of winding differential protection of
6 EBI_WdgDiff_Tr
main transformer.
Enabling binary input of breaker failure protection at HV
7 EBI_BFP_CB_HVS_Tr
side of main transformer.
Enabling binary input of over-excitation protection of main
8 EBI_OvExc_Tr
transformer.
Enabling binary input of breaker flashover protection at
9 EBI_Flash_CB_HVS_Tr
HV side of main transformer.
Enabling binary input of differential protection of
10 EBI_Diff_ST1
step-down transformer 1.
Enabling binary input of backup protection at HV side of
11 EBI_Bak_HVS_ST1
step-down transformer 1.
12 EBI_PPF_Br1_ST1 Enabling binary input of phase-to-phase backup

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protection of branch 1 at LV side of step-down

transformer 1.
Enabling binary input of earth-fault backup protection of
13 EBI EF_Br1_ST1
branch 1 at LV side of step-down transformer 1.
Enabling binary input of phase-to-phase backup
14 EBI_PPF_Br2_ST1 protection of branch 2 at LV side of step-down
transformer 1.
Enabling binary input of earth-fault backup protection of
15 EBI_EF_Br2_ST1
branch 2 at LV side of step-down transformer 1.
Enabling binary input of differential protection of
16 EBI_Diff_ST2
step-down transformer 2.
Enabling binary input of backup protection at HV side of
17 EBI_Bak_HVS_ST2
step-down transformer 2.
Enabling binary input of phase-to-phase backup
18 EBI_PPF_Br1_ST2 protection of branch 1 at LV side of step-down
transformer 2.
Enabling binary input of earth-fault backup protection of
19 EBI_EF_Br1_ST2
branch 1 at LV side of step-down transformer 2.
Enabling binary input of phase-to-phase backup
20 EBI_PPF_Br2_ST2 protection of branch 2 at LV side of step-down
transformer 2.
Enabling binary input of earth-fault backup protection of
21 EBI_EF_Br2_ST2
branch 2 at LV side of step-down transformer 2.
22 EBI_Reserved Reserved binary input for protection function enabling
Enabling binary input of mechanical protection to allow
23 EBI_Trp_MechRly1
mechanical repeater 1 to initial tripping.
Enabling binary input of mechanical protection to allow
24 EBI_Trp_MechRly2
mechanical repeater 2 to initial tripping.
Enabling binary input of mechanical protection to allow
25 EBI_Trp_MechRly3
mechanical repeater 3 to initial tripping.
Enabling binary input of mechanical protection to allow
26 EBI_Trp_MechRly4
mechanical repeater 4 to initial tripping.
Binary input indicating operation of mechanical repeater
27 BI_MechRly1
1.
Binary input indicating operation of mechanical repeater
28 BI_MechRly2
2.
Binary input indicating operation of mechanical repeater
29 BI_MechRly3
3.
Binary input indicating operation of mechanical repeater
30 BI_MechRly4
4.
Binary input of auxiliary contact of close position of circuit
31 BI_52b_GCB
breaker at generator’s terminal.
Binary input of auxiliary contact of close position of circuit
32 BI_52b_CB_HVS1_Tr
breaker at branch 1 of HV side of transformer.

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Binary input of auxiliary contact of close position of circuit

33 BI_52b_CB_HVS2_Tr
breaker at branch 2 of HV side of transformer.
34 BI_Reserved1 Reserved binary input
35 BI_Reserved2 Reserved binary input
Binary input of indicating operating of external protection
36 BI_ExtTrp_Ctrl_BFP
device
Binary input of indicating branch protection of step-down
37 BI_Blk_Prot_ST1
transformer 1 blocked
Binary input of indicating branch protection of step-down
38 BI_Blk_Prot_ST2
transformer 2 blocked
Binary input of indicating gap zero-sequence protection of
39 BI_Ext_Ctrl_EF_Gap_Tr
main transformer controlled by external signal
Binary input indicating all binary input circuit is working in
40 BI_Pwr_Superv
good condition.
Binary input indicating the status of power supply for
41 BI_Pwr_MechRly
mechanical protection
Binary input indicating the status of power supply for
42 BI_Pwr_Opto
optical isolators
43 BI_Print Binary input used to initiate printer
44 BI_Pulse_GPS Binary input of GPS clock synchronous pulse
45 BI_RstTarg Binary input of signal reset
Internally generated binary input indicating operation of
46 FD_Diff_Tr/GTU fault detector of differential protection of main transformer
or generator-transformer unit.
Internally generated binary input indicating operation of
47 FD_PPF/EF_Tr phase-to-phase fault and earth-fault protection of main
transformer.
Internally generated binary input indicating operation of
48 FD_Diff_ST1
differential protection of step-down transformer 1.
Internally generated binary input indicating operation of
49 FD_PPF/EF_ST1 phase-to-phase fault and earth-fault protection of
step-down transformer 1.
Internally generated binary input indicating operation of
50 FD_Diff_ST2
differential protection of step-down transformer 2.
Internally generated binary input indicating operation of
51 FD_PPF/EF_ST2 phase-to-phase fault and earth-fault protection of
step-down transformer 2.
Internally generated binary input indicating operation of
52 FD_OvExc_Tr fault detector of over-excitation protection of main
transformer.
Internally generated binary input indicating operation of
53 FD_BFP/Flash_CB_HVS_Tr fault detector of breaker failure protection and breaker
flashover protection at HV side of main transformer.
54 FD_MechRly Internally generated binary input indicating operation of

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fault detector of mechanical protection of excitation

transformer.

4.4.5 Relay Alarm Signals

Any alarm signal generated by the relays will also be logged as individual events. The access
method and display format is similar to that of binary input changing record as shown as below.

The above figure shows the abbreviated description that is given to the various alarm conditions
and also a corresponding value between 0 and 31. This value is appended to each alarm event in
a similar way as for the input events previously described. It is used by the event extraction
software, such as RCSPC, to identify the alarm and is therefore invisible if the event is viewed on
the LCD.

The following table shows all of the alarm elements that may be displayed in this item.

Table 4.4-2 List of alarm elements

No. Item Description

Alarm indicating secondary circuit failure of VT at LV side
1 Alm_VTS_LVS_Tr
of main transformer.
Alarm indicating secondary circuit failure of VT at HV side
2 Alm_VTS_HVS_Tr
of main transformer.
3 Alm_OvLd_Tr Alarm indicating overload of main transformer.
Alarm indicating stage 1 of initial cooling of main
4 Alm_InitCool1_OvLd_Tr
transformer.
Alarm indicating stage 2 of initial cooling of main
5 Alm_InitCool2_OvLd_Tr
transformer.
Alarm indicating over current at HV side of main
6 Alm_BO_OC_HVS_Tr
transformer.
7 Alm_OvExc_Tr Alarm indicating over excitation of main transformer.
Alarm indicating operation of ROV protection of LV side of
8 Alm_ROV_LVS_Tr
main transformer.
Alarm indicating the position of circuit breaker at generator
9 Alm_Pos_GCB
terminal is abnormal.

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Alarm indicating the position of circuit breaker of branch 1

10 Alm_Pos_CB_HVS1_Tr
at HV side of step-down transformer is abnormal.
Alarm indicating the position of circuit breaker of branch 2
11 Alm_Pos_CB_HVS2_Tr
at HV side of step-down transformer is abnormal.
12 Alm_PM_DSP1_CPUBrd The DSP chip in CPU board damaged.
Alarm indicating the differential current is abnormal in
13 Alm_CTS_Diff_Tr
differential protection of main transformer.
Alarm indicating the differential current is abnormal in
14 Alm_CTS_REF_Tr
zero-sequence differential protection of main transformer.
Alarm indicating the differential current is abnormal in
15 Alm_CTS_WdgDiff_Tr
winding differential protection of main transformer.
Alarm indicating secondary circuit failure of CT in
16 Alm_CTS_Diff_GTU
differential protection of generator-transformer unit.
17 Alm_MechRly1 Alarm indicating operation of mechanical repeater 1.
18 Alm_MechRly2 Alarm indicating operation of mechanical repeater 2.
19 Alm_MechRly3 Alarm indicating operation of mechanical repeater 3.
20 Alm_MechRly4 Alarm indicating operation of mechanical repeater 4.
21 Alm_PwrLoss_MechRly Alarm indicating power loss of mechanical relay.
22 Alm_Inconsist_MechRly Alarm indicating circuit of mechanical is abnormal.
Alarm indicating secondary circuit failure of CT at branch 1
23 Alm_CTS_HVS1_Tr
of HV side of main transformer.
Alarm indicating secondary circuit failure of CT at branch 2
24 Alm_CTS_HVS2_Tr
of HV side of main transformer.
Alarm indicating secondary circuit failure of CT at LV side
25 Alm_CTS_LVS_Tr
of main transformer.
Alarm indicating secondary circuit failure of CT used by
26 Alm_CTS_Bak_HVS_Tr
backup protection at HV side of main transformer.
Alarm indicating secondary circuit failure of CT used by
27 Alm_CTS_Wdg_HVS_Tr winding differential protection at HV side of main
transformer.
Alarm indicating the differential current is abnormal in
28 Alm_Diff_Tr
differential protection of main transformer.
Alarm indicating the differential current is abnormal in
29 Alm_REF_Tr
zero-sequence differential protection of main transformer.
Alarm indicating the differential current is abnormal in
30 Alm_WdgDiff_Tr
winding differential protection of main transformer.
Alarm indicating the differential current is abnormal in
31 Alm_Diff_GTU
differential protection of generator-transformer unit.
Alarm indicating secondary circuit failure of VT of Branch
32 Alm_VTS_Br1_ST1
1 at LV side of step-down transformer 1.
Alarm indicating secondary circuit failure of VT of Branch
33 Alm_VTS_Br2_ST1
2 at LV side of step-down transformer 1.
34 Alm_VTS_Br1_ST2 Alarm indicating secondary circuit failure of VT of Branch

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1 at LV side of step-down transformer 2.

Alarm indicating secondary circuit failure of VT of Branch
35 Alm_VTS_Br2_ST2
2 at LV side of step-down transformer 2.
Alarm indicating overcurrent status at HV side of
36 Alm_BO_OC_HVS_ST1
step-down transformer 1.
Alarm indicating overcurrent status at HV side of
37 Alm_BO_OC_HVS_ST2
step-down transformer 2.
38 Alm_OvLd_ST1 Alarm indicating overload of step-down transformer 1.
Alarm indicating overload to initiate cooling of step-down
39 Alm_InitCool_OvLd_ST1
transformer 1.
40 Alm_OvLd_ST2 Alarm indicating overload of step-down transformer 2.
Alarm indicating overload to initiate cooling of step-down
41 Alm_InitCool_OvLd_ST2
transformer 2.
42 Alm_PM_DSP2_CPUBrd Alarm indicating DSP2 in CPU module damaged.
Alarm indicating secondary circuit failure of CT in
43 Alm_CTS_Diff_ST1
differential protection of step-down transformer 1.
Alarm indicating secondary circuit failure of CT in
44 Alm_CTS_Diff_ST2
differential protection of step-down transformer 2.
Alarm indicating secondary circuit failure of HV side of
45 Alm_CTS_HVS_ST1
step-down transformer 1.
Alarm indicating secondary circuit failure of branch1 at LV
46 Alm_CTS_Br1_ST1
side of step-down transformer 1.
Alarm indicating secondary circuit failure of branch2 at LV
47 Alm_CTS_Br2_ST1
side of step-down transformer 1.
Alarm indicating secondary circuit failure of HV side of
48 Alm_CTS_HVS_ST2
step-down transformer 2.
Alarm indicating secondary circuit failure of branch1 at LV
49 Alm_CTS_Br1_ST2
side of step-down transformer 2.
Alarm indicating secondary circuit failure of branch2 at LV
50 Alm_CTS_Br2_ST2
side of step-down transformer 2.
Alarm indicating the differential current is abnormal in
51 Alm_Diff_ST1
differential protection of step-down transformer1.
Alarm indicating the differential current is abnormal in
52 Alm_Diff_ST2
differential protection of step-down transformer2.
53 Alm_RAM_CPUBrd CPU module RAM damaged.
54 Alm_ROM_CPUBrd CPU module flash memory damaged.
CPU module EEPROM damaged judged by the mismatch
55 Alm_EEPROM_CPUBrd
of summation of all the settings with the CRC code.
Without modifying protection setting after modification of
56 Alm_InvalidSetting
rated secondary current of CT.
57 Alm_ModifiedSetting The relay is in the proceeding of setting parameters.
Loss of power supply of the optical couplers for binary
58 Alm_PwrLoss_Opto
inputs.

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59 Alm_TripOutput Driving transistor of binary output damaged.

Inner communication error between CPU and MON
60 Alm_InnerComm
modules.
61 Alm_DSP_CPUBrd The DSP chip in CPU board damaged.
Duration of pickup of any fault detector in MON board is in
62 Alm_PersistFD_CPUBrd
excess of 10s.
Mismatch of pickup of same type fault detectors in CPU
63 Alm_InconsistFD
and MON.
64 Alm_Sample_CPUBrd Failure of sampled data in CPU board.
Any one of binary input sampled directly does not match
65 Alm_BI_CPUBrd
with that of reorganization of protection itself.
66 Alm_Reboot_CPUBrd CPU module is rebooting.
67 Alm_RAM_MONBrd MON module RAM damaged.
68 Alm_ROM_MONBrd MON module flash memory damaged.
69 Alm_EEPROM_MONBrd MON module EEPROM damaged.
70 Alm_DSP_MONBrd The DSP chip in MON board damaged.
Duration of pickup of any fault detector in MON board is in
71 Alm_PersistFD_MONBrd
excess of 10s.
72 Alm_MONBrd MON module damaged
73 Alm_Sample_MONBrd Failure of sampled data in MON board.
74 Alm_Reboot_MONBrd MON module is rebooting.

4.4.6 Protection Element

Any operation of protection elements, (either a pickup or a trip condition) will be logged as an
event record, consisting of a text string indicating the operated element and an event sequence
No.. Again, this number is intended not only for use by the event extraction software, such as
RCSPC, but also for the user, and is therefore visible when the event is viewed on the LCD. The
below figure shows the format of operation record of protection element.

Where:

“Record No.” means the sequence No. of the record which is generated by RCS-985BT
automatically. “Date: YYYY-MM-DD” and “Time: HH:MM:SS:MS” commonly comprise the absolute

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time tag of the record. “Operation element” shows the name of the operation element. If there are
more than one elements operating, they will scroll one by one to display on LCD. “xxx ms” shows
the relative time of operation element to fault detector of the relay.

The following table lists all the operation elements that may be displayed on LCD.

Table 4.4-3 List of operation elements

No. Item Description

Operation element of unrestrained instantaneous
1 Op_InstDiff_Tr
differential protection of main transformer
Operation element of percentage differential protection of
2 Op_PcntDiff_Tr
main transformer
Operation element of DPFC percentage differential
3 Op_DPFC_Diff_Tr
protection of main transformer
Operation element of unrestrained instantaneous REF of
4 Op_InstREF_Tr
main transformer
5 Op_PcntREF_Tr Operation element of percentage REF of main transformer
Operation element of stage 1 of phase-to-phase
6 Op_Z1_Tr
impedance protection at HV side of main transformer
Operation element of stage 2 of phase-to-phase
7 Op_Z2_Tr
impedance protection at HV side of main transformer
Operation element of stage 1 of overcurrent protection at
8 Op_OC1_Tr
HV side of main transformer
Operation element of stage 2 of overcurrent protection at
9 Op_OC2_Tr
HV side of main transformer
Operation element of stage 1 with time delay 1 of zero
10 Op_ROC11_Tr sequence overcurrent protection at HV side of main
transformer
Operation element of stage 1 with time delay 2 of zero
11 Op_ROC12_Tr sequence overcurrent protection at HV side of main
transformer
Operation element of stage 2 with time delay 1 of zero
12 Op_ROC21_Tr sequence overcurrent protection at HV side of main
transformer
Operation element of stage 2 with time delay 2 of zero
13 Op_ROC22_Tr sequence overcurrent protection at HV side of main
transformer
Operation element of residual over voltage protection of
14 Op_ROV_Tr
main transformer
Operation element of residual over current protection of air
15 Op_ROC_Gap_Tr
gap of main transformer
Operation element of over excitation protection of main
16 Op_OvExc_Tr
transformer
17 Op_InvOvExc_Tr Operation element of inverse time over excitation

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protection of main transformer

Operation element of breaker flashover protection at HV
18 Op_Flash11_CB1_HVS_Tr
side of main transformer (time delay 1, circuit breaker A)
Operation element of breaker flashover protection at HV
19 Op_Flash12_CB1_HVS_Tr
side of main transformer (time delay 2, circuit breaker A)
Operation element of breaker flashover protection at HV
20 Op_Flash11_CB2_HVS_Tr
side of main transformer (time delay 1, circuit breaker B)
Operation element of breaker flashover protection at HV
21 Op_Flash12_CB2_HVS_Tr
side of main transformer (time delay 2, circuit breaker B)
Operation element of unrestrained instantaneous winding
22 Op_InstWdgDiff_Tr
differential protection of main transformer
Operation element of percentage winding differential
23 Op_PcntWdgDiff_Tr
protection of main transformer
Operation element of breaker failure protection at HV side
24 Op_BFP11_CB1_HVS_Tr
of main transformer (time delay 1, circuit breaker A)
Operation element of breaker failure protection at HV side
25 Op_BFP12_CB1_HVS_Tr
of main transformer (time delay 2, circuit breaker A)
Operation element of breaker failure protection at HV side
26 Op_BFP11_CB2_HVS_Tr
of main transformer (time delay 1, circuit breaker B)
Operation element of breaker failure protection at HV side
27 Op_BFP12_CB2_HVS_Tr
of main transformer (time delay 2, circuit breaker B)
28 Op_MechRly1 Operation of repeater of external mechanical input 1
29 Op_MechRly2 Operation of repeater of external mechanical input 2
30 Op_MechRly3 Operation of repeater of external mechanical input 3
31 Op_MechRly4 Operation of repeater of external mechanical input 4
Operation element of unrestrained instantaneous
32 Op_InstDiff_GTU
differential protection of generator-transformer unit
Operation element of percentage differential protection of
33 Op_PcntDiff_GTU
generator-transformer unit
Operation element of DPFC percentage differential
34 Op_DPFC_Diff_GTU
protection of generator-transformer unit
Operation element of instantaneous unrestrained
35 Op_InstDiff_ST1
differential protection of step-down transformer 1
Operation element of percentage differential protection of
36 Op_PcntDiff_ST1
step-down transformer 1
Operation element of stage 1 of overcurrent protection at
37 Op_OC1_HVS_ST1
HV side of step-down transformer 1
Operation element of stage 2 of overcurrent protection at
38 Op_OC2_HVS_ST1
HV side of step-down transformer 1
Operation element of stage 1 of overcurrent protection of
39 Op_OC1_Br1_ST1
branch 1 at LV side of step-down transformer 1
Operation element of stage 1 of overcurrent protection of
40 Op_OC2_Br1_ST1
branch 2 at LV side of step-down transformer 1

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Operation element of stage 2 of overcurrent protection of

41 Op_OC1_Br2_ST1
branch 1 at LV side of step-down transformer 1
Operation element of stage 2 of overcurrent protection of
42 Op_OC2_Br2_ST1
branch 2 at LV side of step-down transformer 1
Operation element of unrestrained instantaneous
43 Op_InstDiff_ST2
differential protection of step-down transformer 2
Operation element of percentage differential protection of
44 Op_PcntDiff_ST2
step-down transformer 2
Operation element of stage 1 of overcurrent protection at
45 Op_OC1_HVS_ST2
HV side of step-down transformer 2
Operation element of stage 2 of overcurrent protection at
46 Op_OC2_HVS_ST2
HV side of step-down transformer 2
Operation element of stage 1 of overcurrent protection of
47 Op_OC1_Br1_ST2
branch 1 at LV side of step-down transformer 2
Operation element of stage 1 of overcurrent protection of
48 Op_OC2_Br1_ST2
branch 2 at LV side of step-down transformer 2
Operation element of stage 2 of overcurrent protection of
49 Op_OC1_Br2_ST2
branch 1 at LV side of step-down transformer 2
Operation element of stage 2 of overcurrent protection of
50 Op_OC2_Br2_ST2
branch 2 at LV side of step-down transformer 2
Operation element of stage 1 of residual overcurrent
51 Op_ROC1_Br1_ST1 protection of branch 1 at LV side of step-down transformer
1
Operation element of stage 2 of residual overcurrent
52 Op_ROC2_Br1_ST1 protection of branch 1 at LV side of step-down transformer
1
Operation element of stage 1 of residual overcurrent
53 Op_ROC1_Br2_ST1 protection at branch 2 of LV side of step-down transformer
1
Operation element of stage 2 of residual overcurrent
54 Op_ROC2_Br2_ST1 protection at branch 2 of LV side of step-down transformer
1
Operation element of stage 1 of residual overcurrent
55 Op_ROC1_Br1_ST2 protection of branch 1 at LV side of step-down transformer
2
Operation element of stage 2 of residual overcurrent
56 Op_ROC2_Br1_ST2 protection of branch 1 at LV side of step-down transformer
2
Operation element of stage 1 of residual overcurrent
57 Op_ROC1_Br2_ST2 protection at branch 2 of LV side of step-down transformer
2
Operation element of stage 2 of residual overcurrent
58 Op_ROC2_Br2_ST2 protection at branch 2 of LV side of step-down transformer
2

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4.5 Disturbance Record

The integral disturbance recorder has an area of memory specifically set aside for record storage.
The number of records that may be stored by the relay is dependent upon the selected recording
duration. The recorder of CPU board can typically store a minimum of 32 records, among them 8
records with instantaneous waveform. The record is composed of tripping element, faulty phase,
operation time and the waveform content is composed of differential currents, corrected current of
each side of generator or transformer, three-phase current of each side, zero sequence current of
each side (if available), three-phase voltages, zero sequence voltage of each side, negative
sequence voltage and tripping pulse.

The MON board can store up to 4 seconds (24 sampling points per cycle) or 8 seconds (12
sampling points per cycle) continual waveform, which including all channels analog quantities
(sampled data, differential currents and so on), all the binary input changing state, binary output,
pick up flags of fault detectors, alarm signals, operation signals and tripping signals. Disturbance
records continue to be recorded until the available memory is exhausted, at which time the oldest
record(s) are overwritten to make space for the newest one.

It is not possible to view the disturbance records locally via the LCD; they must be extracted using
suitable software such as RCSPC.

The CPU board can also record latest 8 cycles of waveform in normal operation condition, which is
composed of three phases current, corrected current of each side for differential protection, three
phases voltage and zero sequence voltage of each side. This function can help user to check the
pole’s correctness of secondary circuit by comparing the phase of related quantities shown in
wave figure. This manual gives the detail instruction of getting normal operation waveform in
section 7.3.

4.6 Time Synchronization

In modern protective schemes it is often desirable to synchronize the relays real time clock so that
events from different relays can be placed in chronological order. This can be done using the
IRIG-B input, if fitted, or via the communication interface connected to the substation control
system. In addition to these methods, RCS-985BT offers the facility to synchronize via an
opto-coupler input. This pulse input will result in the real time clock snapping to the nearest minute.
The recommended pulse duration is 20ms to be repeated no more than once per minute. An
example of the time synchronization function is shown.

Time of “Sync. Pulse” Corrected Time

19:47:00 to 19:47:29 19:47:00
19:47:30 to 19:47:59 19:48:00

The above assumes a time format of hh:mm:ss.

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Chapter 5 Hardware Description

5.1 Hardware Overview

The protection’s hardware is based on a modular design whereby the relay is made up of an
assemblage of several modules that are drawn from a standard range. Some modules are
essential while others are optional depending on the user’s requirements.

The case materials of the relay are constructed from pre-finished steel that has a conductive
covering of aluminum and zinc. This provides good earthing at all joints giving a low impedance
path to earth that is essential for performance in the presence of external noise.

The boards and modules use a multi-point earthing strategy to improve the immunity to external
noise and minimize the effect of circuit noise. Ground planes are used on boards to reduce
impedance paths and spring clips are used to ground the module metalwork. Heavy duty terminal
blocks are used at the rear of the relay for the current and voltage signal connections. Medium
duty terminal blocks are used for the digital logic input signals, the output relay contacts, the power
supply and the rear communication port. A BNC connector may be used for the optional IRIG-B
signal. 9-pin female D-connector is used at the front of the relay for data communication.

Inside the protection the PCBs plug into the connector blocks at the rear, and can be removed
from the rear of the relay only. The connector blocks to the relay’s CT inputs are provided with
internal shorting links inside the relay which will automatically short the current generator circuits
before they are broken when the board is removed. The front panel consists of a membrane
keypad with tactile dome keys, an LCD and 5 LEDs mounted on an aluminum face plate.

5.1.1 Front View

RCS-985BT is made of 12U height 19” chassis with 21 connectors on its rear. Figure 5.1-1 shows
front view.

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Figure 5.1-1 Front view of RCS-985BT

Components mounted on its front include a 320×240 dot matrix LCD, a 9 button keypad, 5 LED
indicators and a DB9 connector for communication with HELP-90A or PC.

The five LED indicators are, from top to bottom:

HEALTHY Equipment running normally

VT ALARM Voltage circuit failure
CT ALARM Current circuit failure
ALARM Abnormal
TRIP Tripping output

As to the buttons of the keypad, “ENT” is “enter”, “GRP” is “setting group selector” and “ESC” is
“escape”.

5.1.2 Rear View

The rear view of RCS-985BT is shown in Figure 5.1-2.

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Figure 5.1-2 Rear view of RCS-985BT

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5.1.3 Functional Block Diagram of RCS-985BT

DSP1 opto- binary status

AC current
LPF A/D coupler input
and voltage DSP2

C P L D
output
HMI CPU1 relay
LCD
CPU module

HMI-CPU
QDJ
comm ports and
port to printer
E+
HMI

DSP3 opto-
binary status
LPF A/D coupler input
DSP4
D C 220 V
or 110 V

＋ 5V

C P L D
DC/DC

± 12 V

＋ 24 V
HMI CPU2
± 24 V to
optic-coupler management module

comm ports and

port to printer

The equipment RCS-985BT uses Motorola 32 bits monolithic microprocessor MC68332 as control
kernel for output logic and management functions, and high-speed digital signal processor DSP for
protection calculation. Sampling rate of the equipment is 24 points per cycle. Real time data are
processed parallel for all algorithms during whole process of fault. So the equipment can ensure
very high inherent reliability and security.

AC currents and voltages of CT and VT are transferred to low voltage signals by isolating
transformers and are inputted to CPU module and MON module. Data and logic are processed
respectively in these two modules with same hardware. The CPU module carries out functions of
protection algorithms, tripping logic, event record and printing. The MON module comprises
general fault detector and fault recorder. The fault detector will connect positive pole of power
supply of output relays after pickup. Format of the record is compatible with COMTRADE, and the
data recorded can be uploaded via separate serial port for communication or printing.

Power supply part is located in DC module. It converts DC 250/220/125/110 V into different DC

voltage levels needed by various modules of the equipment. DC module also comprises 24V and
250/220/125/110V opto-couplers for binary inputs.

AC current and voltage are converted to low voltage signals in modules AI1, AI2, AI3 and AI4. Two
ratings of AC current are option, 1A or 5A. It shall be stated definitely during ordering and checked
during commissioning.

Binary output of tripping commands, tripping signal output and status binary input parts are
comprised in five modules: SIG1, SIG2, SIG3, SIG4 and RLY. 24V and 250/220/125/110V

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opto-couplers are used here for binary input.

Briefly, the equipment is composed of twelve modules to achieve the work of generator or
generator-transformer unit protection. The modules are AC voltage and current input module1
(AI1), AC current input modules (AI2, AI3 and AI4), management/record module (MON), protection
CPU module (CPU), power supply module (PWR), signal modules (SIG1, SIG2, SIG3 and SIG4),
tripping contacts output (RLY) and human machine interface (HMI).

The relay hardware is based on a modular design whereby the relay is made up of an assemblage
of several modules.

5.2 Standard Connectors and Terminals

5.2.1 General Description

There are 21 connectors for external connections mounted on rear panel of the equipment as
shown in Figure 5.2-1, of which, 15 connectors are 30 pins while 6 connectors are 18 pins.

Connectors with 30 pins are used for DC power supply, binary input, communication and printer,
tripping, alarm and other signal output and AC voltage input. Numbers of these connectors are 1A,
1B, 2A, 2B, 3A, 3B, 4A, 4B, 5B, 6B, 7B, 8B, 9B and 10B.

Connectors with 18 pins are used for AC voltage input and current input. Numbers of these
connectors are 9C, 10C, 11B, 11C, 12B and 12C.

Figure 5.2-1 Layout of pins of two kinds of connectors

5.2.2 Pins Definition of ‘1A’ Connectors

Connector 1A: 30 pins male connector for tripping output

For showing the relation of each terminal clearly, the terminal’s location shown in the figure may be
different from the real physical location, and we needn’t figure out the blank terminals.

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Figure 5.2-2 Connector 1A of RCS-985BT

Pin No. Symbol Function Description

1A1 Blank
1A30 Blank
1A3-1A5 BO_TrpOutp1-1 tripping output channel 1-1
1A7-1A9 BO_TrpOutp1-2 tripping output channel 1-2
1A11-1A13 BO_TrpOutp1-3 tripping output channel 1-3
1A15-1A17 BO_TrpOutp1-4 tripping output channel 1-4
1A19-1A21 BO_TrpOutp2-1 tripping output channel 2-1
1A23-1A25 BO_TrpOutp2-2 tripping output channel 2-2
1A27-1A29 BO_TrpOutp2-3 tripping output channel 2-3
1A2-1A4 BO_TrpOutp3-1 tripping output channel 3-1
1A6-1A8 BO_TrpOutp3-2 tripping output channel 3-2
1A10-1A12 BO_TrpOutp3-3 tripping output channel 3-3
1A14-1A16 BO_TrpOutp3-4 tripping output channel 3-4
1A18-1A20 BO_TrpOutp4-1 tripping output channel 4-1
1A22-1A24 BO_TrpOutp4-2 tripping output channel 4-2
1A26-1A28 BO_TrpOutp5-1 tripping output channel 5-1

5.2.3 Pins Definition of ‘1B’ Connectors

Connector 1B: 30 pins male connector for tripping output

Figure 5.2-3 Connector 1B of RCS-985BT

Pin No. Symbol Function Description

1B1-1B3 BO_TrpOutp2-4 tripping output channel 2-4
1B5-1B7 BO_TrpOutp6-1 tripping output channel 6-1
1B9-1B11 BO_TrpOutp6-2 tripping output channel 6-2
1B13-1B15 BO_TrpOutp6-3 tripping output channel 6-3
1B17-1B19 BO_TrpOutp7-1 tripping output channel 7-1
1B21 -1B23 BO_TrpOutp8-1 tripping output channel 8-1
1B25-1B27 BO_TrpOutp9-1 tripping output channel 9-1
1B2-1B4 BO_TrpOutp5-2 tripping output channel 5-2
1B6-1B8 BO_TrpOutp5-3 tripping output channel 5-3
1B10-1B12 BO_TrpOutp5-4 tripping output channel 5-4

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1B14-1B16 BO_TrpOutp11-1 tripping output channel 11-1

1B18-1B20 BO_TrpOutp11-2 tripping output channel 11-2
1B22-1B24 BO_TrpOutp12-1 tripping output channel 12-1
1B26-1B28 BO_TrpOutp12-2 tripping output channel 12-2
1B29-1B30 BO_TrpOutp10-1 tripping output channel 10-1

5.2.4 Pins Definition of ‘2A’ Connectors

Connector 2A:30 pins male connector for signal output

Figure 5.2-4 Connector 2A of RCS-985BT

Pin No. Symbol Function Description

Binary output of local signal
2A1 common terminal 1 common terminal 1
REF or winding differential protection of main
2A1-2A7 BO_REF/WdgDiff_Tr
transformer tripping
breaker failure protection tripping at HV side of main
2A1-2A13 BO_BFP_CB1_HVS_Tr
transformer (breaker A)
breaker failure protection tripping at HV side of main
2A1-2A19 BO_BFP_CB2_HVS_Tr
transformer (breaker B)
2A1-2A25 BO_Reserved Reserved binary output
2A2 common terminal 2 common terminal 2
2A2-2A8 BO_Reserved Reserved binary output
generator-transformer unit or main transformer
2A2-2A14 BO_Diff_GTU/Tr
differential protection tripping
phase-to-phase fault protection of main transformer
2A2-2A20 BO_PPF_Tr
tripping
2A2-2A26 BO_EF_Tr earth-fault protection of main transformer tripping
Binary output of remote signal
2A3 common terminal 1 common terminal 1
REF or winding differential protection of main
2A3-2A9 BO_REF/WdgDiff_Tr
transformer tripping
breaker failure protection tripping at HV side of main
2A3-2A15 BO_BFP_CB1_HVS_Tr
transformer (breaker A)
breaker failure protection tripping at HV side of main
2A3-2A21 BO_BFP_CB2_HVS_Tr
transformer (breaker B)

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2A3-2A27 BO_Reserved Reserved binary output

2A4 common terminal 2 common terminal 2
2A4-2A10 BO_Reserved Reserved binary output
generator-transformer unit or main transformer
2A4-2A16 BO_Diff_GTU/Tr
differential protection tripping
phase-to-phase fault protection of main transformer
2A4-2A22 BO_PPF_Tr
tripping
2A4-2A28 BO_EF_Tr earth-fault protection of main transformer tripping
Binary output of event recorder
2A5 common terminal 1 common terminal 1
REF or winding differential protection of main
2A5-2A11 BO_REF/WdgDiff_Tr
transformer tripping
breaker failure protection tripping at HV side of main
2A5-2A17 BO_BFP_CB1_HVS_Tr
transformer (breaker A)
breaker failure protection tripping at HV side of main
2A5-2A23 BO_BFP_CB2_HVS_Tr
transformer (breaker B)
2A5-2A29 BO_Reserved Reserved binary output
2A6 common terminal 2 common terminal 2
2A6-2A12 BO_Reserved Reserved binary output
generator-transformer unit or main transformer
2A6-2A18 BO_Diff_GTU/Tr
differential protection tripping
phase-to-phase fault protection of main transformer
2A6-2A24 BO_PPF_Tr
tripping
2A6-2A30 BO_EF_Tr earth-fault protection of main transformer tripping

5.2.5 Pins Definition of ‘2B’ Connectors

Connector 2B: 30 pins male connector for signal output

Figure 5.2-5 Connector 2B of RCS-985BT

Pin No. Symbol Function Description

Binary output of local signal
2A1-2B1 BO_Reserved Reserved binary output
2A1-2B7 BO_Reserved Reserved binary output
breaker flashover protection tripping at HV side of
2A1-2B13 Op_Flash_CB1_HVS_Tr
main transformer

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2A1-2B19 BO_Reserved Reserved binary output

2A1-2B25 BO_Reserved Reserved binary output
gap zero-sequence protection of main transformer
2A2-2B2 BO_EF_Gap_Tr
tripping
2A2-2B8 BO_MechRly mechanical protection tripping
over-excitation protection tripping of main
2A2-2B14 BO_OvExc_Tr
transformer
Binary output of remote signal
2A3-2B3 BO_Reserved Reserved binary output
2A3-2B9 BO_Reserved Reserved binary output
breaker flashover protection tripping at HV side of
2A3-2B15 Op_Flash_CB1_HVS_Tr
main transformer
2A3-2B21 BO_Reserved Reserved binary output
2A3-2B27 BO_Reserved Reserved binary output
gap zero-sequence protection of main transformer
2A4-2B4 BO_EF_Gap_Tr
tripping
2A4-2B10 BO_MechRly mechanical protection tripping
over-excitation protection tripping of main
2A4-2B16 BO_OvExc_Tr
transformer
Binary output of event recorder
2A5-2B5 BO_Reserved Reserved binary output
2A5-2B11 BO_Reserved Reserved binary output
breaker flashover protection tripping at HV side of
2A5-2B17 Op_Flash_CB1_HVS_Tr
main transformer
2A5-2B23 BO_Reserved Reserved binary output
2A5-2B29 BO_Reserved Reserved binary output
gap zero-sequence protection of main transformer
2A6-2B6 BO_EF_Gap_Tr
tripping
2A6-2B12 BO_MechRly mechanical protection tripping
over-excitation protection tripping of main
2A6-2B18 BO_OvExc_Tr
transformer
Other binary output
output contact of overcurrent element of step-down
2B20-2B22 BO_OC_HVS_ST1
transformer 1
2B24-2B26 BO_TrpOutp13-1 Tripping output channel 13-1
2B28-2B30 BO_TrpOutp13-2 Tripping output channel 13-2

5.2.6 Pins Definition of ‘3A’ Connectors

Connector 3A:30 pins male connector for signal output

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Figure 5.2-6 Connector 3A of RCS-985BT

Pin No. Symbol Function Description

Binary output of local signal
3A1 common terminal 1 Local signal: common terminal 1
earth-fault protection of branch1 at LV side of
3A1-3A7 BO_EF_Br1_ST1
step-down transformer 1 tripping
earth-fault protection of branch1 at LV side of
3A1-3A13 BO_EF_Br1_ST2
step-down transformer 2 tripping
earth-fault protection of branch2 at LV side of
3A1-3A19 BO_EF_Br2_ST1
step-down transformer 1 tripping
earth-fault protection of branch2 at LV side of
3A1-3A25 BO_EF_Br2_ST2
step-down transformer 2 tripping
3A2 common terminal 2 common terminal 2
step-down transformer 1 differential protection
3A2-3A8 BO_Diff_ST1
tripping
backup protection at HV side of step-down
3A2-3A14 BO_Bak_HVS_ST1
transformer 1 tripping
backup protection of branch1 at LV side of step-down
3A2-3A20 BO_Bak_Br1_ST1
transformer 1 tripping
backup protection of branch1 at LV side of step-down
3A2-3A26 BO_Bak_Br1_ST2
transformer 2 tripping
Binary output of remote signal
3A3 common terminal 1 Local signal: common terminal 1
earth-fault protection of branch1 at LV side of
3A3-3A9 BO_EF_Br1_ST1
step-down transformer 1 tripping
earth-fault protection of branch1 at LV side of
3A3-3A15 BO_EF_Br1_ST2
step-down transformer 2 tripping
earth-fault protection of branch2 at LV side of
3A3-3A21 BO_EF_Br2_ST1
step-down transformer 1 tripping
earth-fault protection of branch2 at LV side of
3A3-3A27 BO_EF_Br2_ST2
step-down transformer 2 tripping
3A4 common terminal 2 common terminal 2
step-down transformer 1 differential protection
3A4-3A10 BO_Diff_ST1
tripping
3A4-3A16 BO_Bak_HVS_ST1 backup protection at HV side of step-down

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transformer 1 tripping
backup protection of branch1 at LV side of step-down
3A4-3A22 BO_Bak_Br1_ST1
transformer 1 tripping
backup protection of branch1 at LV side of step-down
3A4-3A28 BO_Bak_Br1_ST2
transformer 2 tripping
Binary output of event recorder
3A5 common terminal 1 Local signal: common terminal 1
earth-fault protection of branch1 at LV side of
3A5-3A11 BO_EF_Br1_ST1
step-down transformer 1 tripping
earth-fault protection of branch1 at LV side of
3A5-3A17 BO_EF_Br1_ST2
step-down transformer 2 tripping
earth-fault protection of branch2 at LV side of
3A5-3A23 BO_EF_Br2_ST1
step-down transformer 1 tripping
earth-fault protection of branch2 at LV side of
3A5-3A29 BO_EF_Br2_ST2
step-down transformer 2 tripping
3A6 common terminal 2 common terminal 2
step-down transformer 1 differential protection
3A6-3A12 BO_Diff_ST1
tripping
backup protection at HV side of step-down
3A6-3A18 BO_Bak_HVS_ST1
transformer 1 tripping
backup protection of branch1 at LV side of step-down
3A6-3A24 BO_Bak_Br1_ST1
transformer 1 tripping
backup protection of branch1 at LV side of step-down
3A6-3A30 BO_Bak_Br1_ST2
transformer 2 tripping

5.2.7 Pins Definition of ‘3B’ Connectors

Connector 3B: 30 pins male connector for signal output

Figure 5.2-7 Connector dB of RCS-985BT

Pin No. Symbol Function Description

Binary output of local signal
backup protection of branch2 at LV side of
3A1-3B1 BO_Bak_Br2_ST2
step-down transformer 2 tripping
3A1-3B7 BO_Reserved Reserved binary output
3A1-3B13 BO_Reserved Reserved binary output

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3A1-3B19 BO_Reserved Reserved binary output

3A1-3B25 BO_Reserved Reserved binary output
backup protection of branch2 at LV side of
3A2-3B2 BO_Bak_Br2_ST1
step-down transformer 1 tripping
step-down transformer 2 differential protection
3A2-3B8 BO_Diff_ST2
tripping
backup protection at HV side of step-down
3A2-3B14 BO_Bak_HVS_ST2
transformer 2 tripping
Binary output of remote signal
backup protection of branch2 at LV side of
3A3-3B3 BO_Bak_Br2_ST2
step-down transformer 2 tripping
3A3-3B9 BO_Reserved Reserved binary output
3A3-3B15 BO_Reserved Reserved binary output
3A3-3B21 BO_Reserved Reserved binary output
3A3-3B27 BO_Reserved Reserved binary output
backup protection of branch2 at LV side of
3A4-3B4 BO_Bak_Br2_ST1
step-down transformer 1 tripping
step-down transformer 2 differential protection
3A4-3B10 BO_Diff_ST2
tripping
backup protection at HV side of step-down
3A4-3B16 BO_Bak_HVS_ST2
transformer 2 tripping
Binary output of event recorder
backup protection of branch2 at LV side of
3A5-3B5 BO_Bak_Br2_ST2
step-down transformer 2 tripping
3A5-3B11 BO_Reserved Reserved binary output
3A5-3B17 BO_Reserved Reserved binary output
3A5-3B23 BO_Reserved Reserved binary output
3A5-3B29 BO_Reserved Reserved binary output
backup protection of branch2 at LV side of
3A6-3B6 BO_Bak_Br2_ST1
step-down transformer 1 tripping
step-down transformer 2 differential protection
3A6-3B12 BO_Diff_ST2
tripping
backup protection at HV side of step-down
3A6-3B18 BO_Bak_HVS_ST2
transformer 2 tripping
Other binary output
output contact of overcurrent element of step-down
3B20-3B22 BO_OC_HVS_ST2
transformer 2
3B24-3B26 TripOutp14-1 Tripping output channel 14-1
3B28-3B30 TripOutp14-2 Tripping output channel 14-2

5.2.8 Pins Definition of ‘4A’ Connectors

Connector 4A:30 pins male connector for signal and alarm output.

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Figure 5.2-8 Connector 4A of RCS-985BT

Pin No. Symbol Function Description

Binary output of local signal
4A1 Common terminal Common terminal
4A1-4A3 BO_FAIL Equipment being blocked
4A1-4A5 BO_Alm_Abnor Equipment alarm
4A1-4A7 BO_Alm_CTS CT circuit failure alarm
4A1-4A9 BO_Alm_VTS VT circuit failure alarm
4A1-4A11 BO_Alm_OvLd_Tr Overload alarm of main transformer
4A1-4A13 BO_Alm_OvLd_ST1 Overload alarm of step-down transformer 1
4A1-4A15 BO_Alm_OvLd_ST2 Overload alarm of step-down transformer 2
4A1-4A17 BO_Alm_OvExc_Tr Over-excitation alarm of main transformer
Zero-sequence voltage alarm at LV side of main
4A1-4A19 BO_Alm_ROV_LVS_Tr
transformer
4A1-4A21 BO_Reserved Reserved binary output
4A1-4A23 BO_Reserved Reserved binary output
4A1-4A25 BO_Reserved Reserved binary output
Binary output of remote signal
4A2 Common terminal Common terminal
4A2-4A4 BO_FAIL Equipment being blocked
4A2-4A6 BO_Alm_Abnor Equipment alarm
4A2-4A8 BO_Alm_CTS CT circuit failure alarm
4A2-4A10 BO_Alm_VTS VT circuit failure alarm
4A2-4A12 BO_Alm_OvLd_Tr Overload alarm of main transformer
4A2-4A14 BO_Alm_OvLd_ST1 Overload alarm of step-down transformer 1
4A2-4A16 BO_Alm_OvLd_ST2 Overload alarm of step-down transformer 2
4A2-4A18 BO_Alm_OvExc_Tr Over-excitation alarm of main transformer
Zero-sequence voltage alarm at LV side of main
4A2-4A20 BO_Alm_ROV_LVS_Tr
transformer
4A2-4A22 BO_Reserved Reserved binary output
4A2-4A24 BO_Reserved Reserved binary output
4A2-4A26 BO_Reserved Reserved binary output
Other binary output
4A27-4A29 BO_Alm_OC1_HVS_Tr Normal open contact 1 indicating operation of

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overcurrent element of main transformer protection

Normal closed contact 2 indicating operation of
4A28-4A30 BO_Alm_OC2_HVS_Tr
overcurrent element of main transformer protection

5.2.9 Pins definition of ‘4B’ connectors

Connector 4B:30 pins male connector for alarm and other output

Figure 5.2-9 Connector 4B of RCS-985BT

Pin No. Symbol Function Description

Binary output of abnormality
Normal open contact indicating operation of
4B1-4B3 BO_Alm_InitCool2_OvLd_Tr
stage 2 of initial cooling of main transformer.
Normal closed contact indicating operation of
4B5-4B7 BO_Alm_InitCool2_OvLd_Tr
stage 2 of initial cooling of main transformer.
Normal open contact indicating operation of
4B9-4B11 BO_Alm_InitCool1_OvLd_Tr
stage 1 of initial cooling of main transformer.
Normal closed contact indicating operation of
4B13-B15 BO_Alm_InitCool1_OvLd_Tr
stage 1 of initial cooling of main transformer.
Normal open contact 1 indicating operation of
4B17-4B19 BO_Alm_InitCool1_OvLd_ST1
initial cooling of step-down transformer 1.
Normal open contact 2 indicating operation of
4B21-4B23 BO_Alm_InitCool2_OvLd_ST1
initial cooling of step-down transformer 1.
Normal open contact 1 indicating operation of
4B25-4B27 BO_Alm_InitCool1_OvLd_ST2
initial cooling of step-down transformer 2.
Binary output of event recorder
4B2 Blank
4B4 Common terminal Common terminal
4B4-4B6 BO_Alm_CTS CT circuit failure alarm
4B4-4B8 BO_Alm_VTS VT circuit failure alarm
4B4-4B10 BO_Alm_OvLd_Tr Overload alarm of main transformer
4B4-4B12 BO_Alm_OvLd_ST1 Overload alarm of step-down transformer 1
4B4-4B14 BO_Alm_OvLd_ST2 Overload alarm of step-down transformer 2
4B4-4B16 BO_Alm_OvExc_Tr Over-excitation alarm of main transformer
Zero-sequence voltage alarm at LV side of
4B4-4B18 BO_Alm_ROV_LVS_Tr
main transformer

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4B4-4B20 BO_Reserved Reserved binary output

4B4-4B22 BO_Reserved Reserved binary output
4B4-4B24 BO_Reserved Reserved binary output
4B4-4B26 BO_FAIL Equipment being blocked
4B4-4B28 BO_Alm_Abnor Equipment alarm
Normal open contact 2 indicating operation of
4B29-4B30 BO_Alm_InitCool2_OvLd_ST2
initial cooling of step-down transformer 2.

5.2.10 Pins definition of ‘5A’ connectors

Connector 5A:30 pins male connector for alarm and other output

+ _
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30

Figure 5.2-10 Connector 5A of RCS-985BT

Pin No. Symbol Function Description

Binary output of abnormality
5A1 common terminal Common terminal
5A1-5A3 BO_MechRly3-1 Binary output 1 of mechanical repeater 3
5A1-5A5 BO_MechRly4-1 Binary output 1 of mechanical repeater 4
5A1-5A7 BO_MechRly2-1 Binary output 1 of mechanical repeater 2
5A1-5A9 BO_MechRly1-1 Binary output 1 of mechanical repeater 1
Binary output of event recorder
5A2 common terminal Common terminal
5A2-5A4 BO_MechRly3-2 Binary output 2 of mechanical repeater 3
5A2-5A6 BO_MechRly4-2 Binary output 2 of mechanical repeater 4
5A2-5A8 BO_MechRly2-2 Binary output 2 of mechanical repeater 2
5A2-5A10 BO_MechRly1-2 Binary output 2 of mechanical repeater 1
Binary output of local signal
5A11 common terminal Common terminal
5A11-5A12 BO_MechRly4-3 Binary output 3 of mechanical repeater 4
5A11-5A13 BO_MechRly2-3 Binary output 3 of mechanical repeater 2
Binary input of supervising power supply for
5A11-5A14 BO_Pwr_MechRly
mechanical repeater relay
5A11-5A15 BO_MechRly3-3 Binary output 3 of mechanical repeater 3
5A11-5A16 BO_MechRly1-3 Binary output 3 of mechanical repeater 1
Binary input (via 220V or 110V opto-coupler)

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5A17 BI_MechRly3 Binary input of external mechanical repeater3

5A18 BI_MechRly4 Binary input of external mechanical repeater4
5A19 BI_MechRly2 Binary input of external mechanical repeater2
5A20 BI_MechRly1 Binary input of external mechanical repeater1
Binary input of auxiliary contact(via 220V or 110V opto-coupler)
Monitoring auxiliary output contact of power supply of
5A21 BI_Pwr_Superv
mechanical protection
5A22 BI_52b_GCB Auxiliary contact of generator breaker
Auxiliary contact of breaker A at HV side of main
5A23 BI_52b_CB_HVS1_Tr
transformer
Auxiliary contact of breaker B at HV side of main
5A24 BI_52b_CB_HVS2_Tr
transformer
5A25 BI_Reserved Reserved binary input
5A26 BI_Reserved Reserved binary input
5A27 PWR+ Positive pole of mechanical repeaters’ power supply.
5A28 Blank
5A29 PWR- Negative pole of mechanical repeaters’ power supply.
5A30 Blank

5.2.11 Pins definition of ‘5B’ connectors

Connector 5B:30 pins male connector for alarm and other output

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29
+24V

0V
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30

Figure 5.2-11 Connector 5B of RCS-985BT

Pin No. Symbol Function Description

5B30 OPTO- negative pole of DC 24V for 24V opto-coupler
5B29 OPTO+ positive pole of DC 24V for 24V opto-couple
Binary input (via 24V opto-coupler)
5B1 Blank
5B2 Blank
5B3 EBI_Reserved Reserved enabling binary input
5B4 EBI_Reserved Reserved enabling binary input
5B5 EBI_Reserved Reserved enabling binary input
5B6 EBI_Reserved Reserved enabling binary input
5B7 EBI_Reserved Reserved enabling binary input
5B8 EBI_Reserved Reserved enabling binary input

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5B9 EBI_Reserved Reserved enabling binary input

5B10 EBI_Reserved Reserved enabling binary input
Enabling binary input of earth-fault protection branch
5B11 EBI_EF_Br1_ST2
1 of step-down transformer 2
Enabling binary input of earth-fault protection branch
5B12 EBI_EF_Br1_ST1
1 of step-down transformer 1
Enabling binary input of breaker failure protection at
5B13 EBI_BFP_CB_HVS_Tr
HV side of main transformer
Enabling binary input of generator overexcitation
5B14 EBI_OvExc_Tr
protection
Enabling binary input of earth-fault protection branch
5B15 EBI_EF_Br2_ST2
2 of step-down transformer 2
Enabling binary input of earth-fault protection branch
5B16 EBI_EF_Br2_ST1
2 of step-down transformer 1
Enabling binary input of breaker flashover protection
5B17 EBI_Flash_CB_HVS_Tr
at HV side of main transformer
5B18 EBI_Reserved Reserved enabling binary input
Enabling binary input of step-down transformer 2
5B19 EBI_Diff_ST2
differential protection
Enabling binary input of backup protection at HV side
5B20 EBI_Bak_HVS_ST2
of step-down transformer 2
Enabling binary input of external mechanical repeater
5B21 EBI_Trp_MechRly3
3 for tripping
Enabling binary input of external mechanical repeater
5B22 EBI_Trp_MechRly4
4 for tripping
Enabling binary input of external mechanical repeater
5B23 EBI_Trp_MechRly2
2 for tripping
Enabling binary input of external mechanical repeater
5B24 EBI_Trp_MechRly1
1 for tripping
5B25 EBI_Reserved Reserved enabling binary input
5B26 EBI_Reserved Reserved enabling binary input
5B27 Blank
5B28 Blank

5.2.12 Pins definition of ‘6B’ connectors

Connector 6B:30 pins male connector for alarm and other output

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+ _
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29

DC/DC
+24V 0V

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30

Figure 5.2-12 Connector 6B of RCS-985BT

Pin No. Symbol Function Description

6B27 PWR- negative pole of DC power supply
6B25 PWR+ positive pole of DC power supply
6B16 OPTO- negative pole of DC 24V for 24V opto-coupler
6B17 OPTO+ positive pole of DC 24V for 24V opto-couple
Binary input (via 24V opto-coupler)
Enabling binary input of differential protection of main
6B1 EBI_Diff_Tr
transformer
Enabling binary input of phase-to-phase backup
6B2 EBI_PPF_Tr
protection of main transformer
Enabling binary input of earth-fault protection of main
6B3 EBI_EF_Tr
transformer
Enabling binary input of gap zero-sequence
6B4 EBI_EF_Gap_Tr
protection of main transformer
Enabling binary input of winding differential protection
6B5 EBI_WdgDiff_Tr
of main protection
6B6 EBI_REF_Tr Enabling binary input of REF of main transformer
Enabling binary input of differential protection of
6B7 EBI_Diff_ST1
step-down transformer 1
Enabling binary input of backup protection at HV side
6B8 EBI_Bak_HVS_ST1
of step-down transformer 1
Enabling binary input of backup protection of branch
6B9 EBI_Bak_Br1 _ST1
1 at LV side of step-down transformer1
Enabling binary input of backup protection of branch
6B10 EBI_Bak_Br1_ST2
1 at LV side of step-down transformer 2
Enabling binary input of backup protection of branch
6B11 EBI_Bak_Br2 _ST1
2 at LV side of step-down transformer1
Enabling binary input of backup protection of branch
6B12 EBI_Bak_Br2 _ST2
2 at LV side of step-down transformer 2
6B13 BI_Print Binary input of print button
6B14 BI_Pulse_GPS Binary input of clock synchronization pulse
6B15 BI_ResetTarget Binary input of signal reset button
6B18 Blank

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Binary input of blocking protection of step-down

6B19 BI_Blk_Prot_ST1
transformer 1
Binary input indicating external protection operating
6B20 BI_ExtTrp_Ctrl_BFP
to initiate breaker failure protection
Binary input of blocking protection of step-down
6B21 BI_Blk_Prot_ST2
transformer 2
Binary input of gap zero-sequence protection
6B22 BI_Ext_Ctrl_EF_Gap_Tr
controlled by external binary input
Binary input used for monitoring the power supply of
6B23 BI_Pwr_Opto
all binary inputs
6B24 Blank
6B26 Blank
6B28 Blank
6B29 Earth
6B30 Earth

5.2.13 Pins Definition of ‘7B/8B’ Connectors

Connector 7B, 8B: 30 pins male connector for communication and printing.

The definitions of connector 7B and connector 8B are same.

Figure 5.2-13 Connectors 7B, 8B of RCS-985BT

Communication port
7B1/8B1 RS485A
For GPS clock synchronizing
7B3/8B3 RS485B
7B5/8B5 RS485A
For SAS or RTU (first)
7B7/8B7 RS485B
7B9/8B9 RS485A
For SAS or RTU (Second)
7B11/8B11 RS485B
7B21/8B21 RS232TX
For printer
7B23/8B23 RS232RX
7B27/8B27 Ground of communication
7B30/8B30 Ground of chassis

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5.2.14 Pins Definition of ‘9B’ Connectors

Connector 9B: 30 pins for voltage input.

U1L U1N U2L U2N U3L U3N

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30
U1A U1B U1C U1N U2A U2B U2C U2N U3A U3B U3C U3N

Figure 5.2-14 Connectors 9B of RCS-985BT

Voltage input
9B1
9B26
Blank
9B28
9B30
9B3 Zero-sequence voltage input at LV side of main transformer (polarity mark)
9B5 Zero-sequence voltage input at LV side of main transformer
9B7 Backup zero-sequence voltage input 1 (polarity mark)
9B9 Backup zero-sequence voltage input 1
9B11 Backup zero-sequence voltage input 2 (polarity mark)
9B13 Backup zero-sequence voltage input 2
9B23 Zero-sequence voltage input at HV side of main transformer (polarity mark)
9B25 Zero-sequence voltage input at HV side of main transformer
9B2 Phase A voltage input at LV side main transformer
9B4 Phase B voltage input at LV side main transformer
9B6 Phase C voltage input at LV side main transformer
9B8 Neutral point voltage input at LV side main transformer
9B10 Backup phase A voltage input
9B12 Backup phase B voltage input
9B14 Backup phase C voltage input
9B16 Backup neutral point voltage input
9B18 Phase A voltage input at HV side main transformer
9B20 Phase B voltage input at HV side main transformer
9B22 Phase C voltage input at HV side main transformer
9B24 Neutral point voltage input at HV side main transformer

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5.2.15 Pins Definition of ‘9C’ Connectors

Connector 9C: 18 pins for current input

Figure 5.2-15 Connectors 9C of RCS-985BT

Current input
9C1 IA’ , phase A of three-phase current input---channel 13
9C2 IA , phase A of three-phase current input---channel 13 (polarity mark)
9C3 IB’ , phase B of three-phase current input---channel 13
9C4 IB , phase B of three-phase current input---channel 13 (polarity mark)
9C5 IC’ , phase C of three-phase current input---channel 13
9C6 IC , phase C of three-phase current input---channel 13 (polarity mark)
9C7 IA’ , phase A of three-phase current input---channel 14
9C8 IA , phase A of three-phase current input---channel 14 (polarity mark)
9C9 IB’ , phase B of three-phase current input---channel 14
9C10 IB , phase B of three-phase current input---channel 14 (polarity mark)
9C11 IC’ , phase C of three-phase current input---channel 14
9C12 IC , phase C of three-phase current input---channel 14 (polarity mark)
9C13 3I0’, Zero-sequence current---channel 5
9C14 3I0, Zero-sequence current---channel 5 (polarity mark)
9C15 3I0’, Zero-sequence current---channel 6
9C16 3I0, Zero-sequence current---channel 6(polarity mark)
9C17 3I0’, Zero-sequence current---channel 7
9C18 3I0, Zero-sequence current---channel 7(polarity mark)

5.2.16 Pins Definition of ‘10B’ Connectors

Connector 10B: 30 pins for voltage input

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UA UB UA UB UA UB UA UB
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30
UB UC UB UC UB UC UB UC

Figure 5.2-16 Connectors 10B of RCS-985BT

Voltage input
10B1 UA , phase A voltage from branch 1 of LV side VT of step-down transformer1
10B2 UB , phase B voltage from branch 1 of LV side VT of step-down transformer1
10B3 UB , phase B voltage from branch 1 of LV side VT of step-down transformer1
10B4 UC, phase C voltage from branch 1 of LV side VT of step-down transformer1
10B5 UA , phase A voltage from branch 2 of LV side VT of step-down transformer1
10B6 UB , phase B voltage from branch 2 of LV side VT of step-down transformer1
10B7, 10B8 Reserved
10B9 UB , phase B voltage from branch 2 of LV side VT of step-down transformer1
10B10 UC, phase C voltage from branch 2 of LV side VT of step-down transformer1
10B11 UA , phase A voltage from branch 1 of LV side VT of step-down transformer2
10B12 UB , phase B voltage from branch 1 of LV side VT of step-down transformer2
10B13 UB , phase B voltage from branch 1 of LV side VT of step-down transformer2
10B14 UC, phase C voltage from branch 1 of LV side VT of step-down transformer2
10B15-10B18 Reserved
10B19 UA , phase A voltage from branch 2 of LV side VT of step-down transformer2
10B20 UB , phase B voltage from branch 2 of LV side VT of step-down transformer2
10B21 UB , phase B voltage from branch 2 of LV side VT of step-down transformer2
10B22 UC, phase C voltage from branch 2 of LV side VT of step-down transformer2
10B23-10B30 Reserved

5.2.17 Pins Definition of ‘10C’ Connectors

Connector 10C:18 pins for voltage and current input

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Figure 5.2-17 Connectors 10C of RCS-985BT

Pin No. Symbol Function Description

10C1 I04
Zero sequence current input---channel 4
10C2 I04N
10C3 UR+2
DC voltage input of rotor
10C5 UR-2
10C7 IR+
DC current input of rotor
10C9 IR-
10C11 Test terminal
10C13 UR+
DC voltage input for rotor earth fault protection
10C15 Axis of rotor
10C17 UR-
10C4
10C6
10C8
10C10
Reserved
10C12
10C14
10C16
10C18

For RCS-985BT, the current and the voltage of rotor are not used, so this connector (10C) does
not need to be connected and only hardware circuit is reserved.

5.2.18 Pins Definition of ‘11B’ Connectors

Connector 11B: 18 pins for current input

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Figure 5.2-18 Connectors 11B of RCS-985BT

Current input
11B1 IA’ , phase A of three-phase current input---channel 7
11B2 IA , phase A of three-phase current input---channel 7 (polarity mark)
11B3 IB’ , phase B of three-phase current input---channel 7
11B4 IB , phase B of three-phase current input---channel 7 (polarity mark)
11B5 IC’ , phase C of three-phase current input---channel 7
11B6 IC , phase C of three-phase current input---channel 7 (polarity mark)
11B7 IA’ , phase A of three-phase current input---channel 8
11B8 IA , phase A of three-phase current input---channel 8 (polarity mark)
11B9 IB’ , phase B of three-phase current input---channel 8
11B10 IB , phase B of three-phase current input---channel 8 (polarity mark)
11B11 IC’ , phase C of three-phase current input---channel 8
11B12 IC , phase C of three-phase current input---channel 8 (polarity mark)
11B13 IA’ , phase A of three-phase current input---channel 9
11B14 IA , phase A of three-phase current input---channel 9 (polarity mark)
11B15 IB’ , phase B of three-phase current input---channel 9
11B16 IB , phase B of three-phase current input---channel 9(polarity mark)
11B17 IC’ , phase C of three-phase current input---channel 9
11B18 IC , phase C of three-phase current input---channel 9 (polarity mark)

5.2.19 Pins Definition of ‘11C’ Connectors

Connector 11C: 18 pins for current input

Figure 5.2-19 Connectors 11C of RCS-985BT

Current input
11C1 IA’ , phase A of three-phase current input---channel 10
11C2 IA , phase A of three-phase current input---channel 10 (polarity mark)
11C3 IB’ , phase B of three-phase current input---channel 10
11C4 IB , phase B of three-phase current input---channel 10 (polarity mark)
11C5 IC’ , phase C of three-phase current input---channel 10
11C6 IC , phase C of three-phase current input---channel 10 (polarity mark)

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11C7 IA’ , phase A of three-phase current input---channel 11

11C8 IA , phase A of three-phase current input---channel 11 (polarity mark)
11C9 IB’ , phase B of three-phase current input---channel 11
11C10 IB , phase B of three-phase current input---channel 11 (polarity mark)
11C11 IC’ , phase C of three-phase current input---channel 11
11C12 IC , phase C of three-phase current input---channel 11 (polarity mark)
11C13 IA’ , phase A of three-phase current input---channel 12
11C14 IA , phase A of three-phase current input---channel 12 (polarity mark)
11C15 IB’ , phase B of three-phase current input---channel 12
11C16 IB , phase B of three-phase current input---channel 12(polarity mark)
11C17 IC’ , phase C of three-phase current input---channel 12
11C18 IC , phase C of three-phase current input---channel 12 (polarity mark)

5.2.20 Pins Definition of ‘12B’ Connectors

Connector 12B: 18 pins for current input

Figure 5.2-20 Connectors 12B of RCS-985BT

Current input
12B1 IA’ , phase A of three-phase current input---channel 1
12B2 IA , phase A of three-phase current input---channel 1 (polarity mark)
12B3 IB’ , phase B of three-phase current input---channel 1
12B4 IB , phase B of three-phase current input---channel 1 (polarity mark)
12B5 IC’ , phase C of three-phase current input---channel 1
12B6 IC , phase C of three-phase current input---channel 1 (polarity mark)
12B7 IA’ , phase A of three-phase current input---channel 2
12B8 IA , phase A of three-phase current input---channel 2 (polarity mark)
12B9 IB’ , phase B of three-phase current input---channel 2
12B10 IB , phase B of three-phase current input---channel 2 (polarity mark)
12B11 IC’ , phase C of three-phase current input---channel 2
12B12 IC , phase C of three-phase current input---channel 2 (polarity mark)
12B13 IA’ , phase A of three-phase current input---channel 3
12B14 IA , phase A of three-phase current input---channel 3 (polarity mark)

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12B15 IB’ , phase B of three-phase current input---channel 3

12B16 IB , phase B of three-phase current input---channel 3(polarity mark)
12B17 IC’ , phase C of three-phase current input---channel 3
12B18 IC , phase C of three-phase current input---channel 3 (polarity mark)

5.2.21 Pins Definition of ‘12C’ Connectors

Connector 12C: 18 pins for current input

Figure 5.2-21 Connectors 12C of RCS-985BT

Current input
12C1 IA’ , phase A of three-phase current input---channel 4
12C2 IA , phase A of three-phase current input---channel 4 (polarity mark)
12C3 IB’ , phase B of three-phase current input---channel 4
12C4 IB , phase B of three-phase current input---channel 4(polarity mark)
12C5 IC’ , phase C of three-phase current input---channel 4
12C6 IC , phase C of three-phase current input---channel 4 (polarity mark)
12C7 IA’ , phase A of three-phase current input---channel 5
12C8 IA , phase A of three-phase current input---channel 5 (polarity mark)
12C9 IB’ , phase B of three-phase current input---channel 5
12C10 IB , phase B of three-phase current input---channel 5(polarity mark)
12C11 IC’ , phase C of three-phase current input---channel 5
12C12 IC , phase C of three-phase current input---channel 5 (polarity mark)
12C13 3I0’ , zero-sequence current input---channel 1
12C14 3I0, zero-sequence current input---channel 1(polarity mark)
12C15 3I0’ , zero-sequence current input---channel 2
12C16 3I0, zero-sequence current input---channel 2(polarity mark)
12C17 3I0’ , zero-sequence current input---channel 3
12C18 3I0, zero-sequence current input---channel 3(polarity mark)

5.3 Binary Output

5.3.1 Trip Outputs
The equipment provides 14 groups of tripping relays with 33 pairs of contacts totally as shown in

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following figure. These tripping relays can be configured by tripping output logic setting, and
practical and flexible tripping modes can be provided by each protective function then. Tripping
output logic setting is a specific setting of each certain protective function. Please refer to Chapter
7 for details of setting.

Trip CB of GROUP1--TrpOutp1 Trip CB of GROUP4--TrpOutp4 Trip CB of GROUP9--TrpOutp9

TrpOutp1-1 TrpOutp4-1 TrpOutp9-1

1A03 1A05 1A18 1A20 1B25 1B27
TrpOutp1-2 TrpOutp4-2
1A07 1A09 1A22 1A24 Trip CB of GROUP10--TrpOutp10
TrpOutp1-3
1A11 1A13 Trip CB of GROUP5--TrpOutp5 TrpOutp10-1
1B29 1B30
TrpOutp1-4
1A15 1A17 TrpOutp5-1
1A26 1A28 Trip CB of GROUP11--TrpOutp11
Trip CB of GROUP2--TrpOutp2 TrpOutp5-2
1B02 1B04 TrpOutp11-1
1B14 1B16
TrpOutp2-1 TrpOutp5-3
1A19 1A21 1B06 1B08 TrpOutp11-2
1B18 1B20
TrpOutp2-2 TrpOutp5-4
1A23 1A25 1B10 1B12
Trip CB of GROUP12--TrpOutp12
TrpOutp2-3 Trip CB of GROUP6--TrpOutp6
1A27 1A29
TrpOutp12-1
TrpOutp2-4 TrpOutp6-1 1B22 1B24
1B01 1B03 1B05 1B07
TrpOutp12-2
TrpOutp6-2 1B26 1B28
Trip CB OF GROUP3--TrpOutp3 1B09 1B11
TrpOutp6-3 Trip CB of GROUP13--TrpOutp13
TrpOutp3-1 1B13 1B15
1A02 1A04
TrpOutp13-1
TrpOutp3-2 Trip CB of GROUP7--TrpOutp7 2B24 2B26
1A06 1A08
TrpOutp13-2
TrpOutp3-3 TrpOutp7-1 2B28 2B30
1A10 1A12 1B17 1B19
TrpOutp3-4 Trip CB of GROUP14--TrpOutp4
1A14 1A16 Trip CB of GROUP8--TrpOutp8
TrpOutp14-1
1B21 TrpOutp8-1 3B24 3B26
1B23
TrpOutp14-2
3B28 3B30

Figure 5.3-1 Trip outputs

The tripping output logic setting is a 4 digits hexadecimal number or a 16 bits binary number. Every
bit corresponds to a circuit breaker. The breaker will be tripped if the corresponding bit is set as “1”
and not tripped if the bit is set as “0”.

Table 5.3-1 Tripping logic and contacts of output relays

No Bit No. Tripping group No. Quantity of tripping contacts

1 Bit 0 Tripping function enabled
2 Bit 1 TrpOutp1: group 1 of tripping output 4
3 Bit 2 TrpOutp2: group 2 of tripping output 4
4 Bit 3 TrpOutp3: group 3 of tripping output 4
5 Bit 4 TrpOutp4: group 4 of tripping output 2
6 Bit 5 TrpOutp5: group 5 of tripping output 4
7 Bit 6 TrpOutp6: group 6 of tripping output 3
8 Bit 7 TrpOutp7: group 7 of tripping output 1
9 Bit 8 TrpOutp8: group 8 of tripping output 1
10 Bit 9 TrpOutp9: group 9 of tripping output 1

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11 Bit 10 TrpOutp10: group 10 of tripping output 1

12 Bit 11 TrpOutp11: group 11 of tripping output 2
13 Bit 12 TrpOutp12: group 12 of tripping output 2
14 Bit 13 TrpOutp13: group 13 of tripping output 2
15 Bit 14 TrpOutp14: group 14 of tripping output 2

Outputs of TrpOutp1, 2, 5, 6 are instantaneous contacts, which can be used to trip CB or initial
failure of CB. While other outputs are expand 140ms after contacts operate.

5.3.2 Signal Outputs

The equipment provides 36 signals and each signal consists of 1 magnetic latching contact (for
local signals) and 2 wiper-type contacts (for SOE and remote signals). See the figure below.

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Local signal Remote signal Event Record

3A02 3A04 3A06
BO_Diff_ST1 BO_Diff_ST1 BO_Diff_ST1
3A8 3A10 3A12
BO_Bak_HVS_ST1 BO_Bak_HVS_ST1 BO_Bak_HVS_ST1
3A14 3A16 3A18
BO_Bak_Br1_ST1 BO_Bak_Br1_ST1 BO_Bak_Br1_ST1
3A20 3A22 3A24
BO_Bak_Br1_ST2 BO_Bak_Br1_ST2 BO_Bak_Br1_ST2
3A26 3A28 3A30
BO_Bak_Br2_ST1 BO_Bak_Br2_ST1 BO_Bak_Br2_ST1
3B2 3B4 3B6
BO_Diff_ST2 BO_Diff_ST2 BO_Diff_ST2
3B8 3B10 3B12
BO_Bak_HVS_ST2 BO_Bak_HVS_ST2 BO_Bak_HVS_ST2
3B14 3B16 3B18

Group 4

Figure 5.3-2 Signal outputs

5.3.3 Alarm Outputs

Local signal Remote signal Event record

4A01 4A02 4B04
BO_FAIL BO_FAIL BO_FAIL
4A03 4A04 4B26
BO_Alm_Abnor BO_Alm_Abnor BO_Alm_Abnor
4A05 4A06 4B28
BO_Alm_CTS BO_Alm_CTS BO_Alm_CTS
4A07 4A08 4B06
BO_Alm_VTS BO_Alm_VTS BO_Alm_VTS
4A09 4A10 4B08
BO_Alm_OvLd_Tr BO_Alm_OvLd_Tr BO_Alm_OvLd_Tr
4A11 4A12 4B10
BO_Alm_OvLd_ST1 BO_Alm_OvLd_ST1 BO_Alm_OvLd_ST1
4A13 4A14 4B12
BO_Alm_OvLd_ST2 BO_Alm_OvLd_ST2 BO_Alm_OvLd_ST2
4A15 4A16 4B14
BO_Alm_OvExc_Tr BO_Alm_OvExc_Tr BO_Alm_OvExc_Tr
4A17 4A18 4B16
BO_Alm_ROV_LVS_Tr BO_Alm_ROV_LVS_Tr BO_Alm_ROV_LVS_Tr
4A19 4A20 4B18

Figure 5.3-3 Alarm outputs

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5.3.4 Other Outputs

BO_Alm_InitCool1_OvLd_Tr BO_OC_HVS_ST1
4B09 4B11 2B20 2B22
BO_Alm_InitCool1_OvLd_Tr BO_OC_HVS_ST2
4B13 4B15 3B20 3B22
BO_Alm_InitCool1_OvLd_ST1 BO_Alm_OC1_HVS_Tr
4B17 4B19 4A27 4A29
BO_Alm_InitCool2_OvLd_ST1 BO_Alm_OC2_HVS_Tr
4B21 4B23 4A28 4A30
BO_Alm_InitCool1_OvLd_ST2 BO_Alm_InitCool2_OvLd_Tr
4B25 4B27 4B01 4B03
BO_Alm_InitCool2_OvLd_ST2 BO_Alm_InitCool2_OvLd_Tr
4B29 4B30 4B05 4B07

Figure 5.3-4 Other outputs

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Chapter 6 Settings

6.1 Overview

The relay must be configured to the system and application by means of appropriate settings. The
settings of this relay include system parameters, protection element settings and scheme logic
settings.

6.2 Equipment Parameters

— Setting List

No. Item Range Remark

1 Active_Grp 0~1
2 Equip_ID 6 characters maximum
3 Comm_Addr 0～255
4 COM1_Baud 1.2/2.4/4.8 / 9.6 /14.4/ 19.2 / 38.4 kbit/s
5 COM2_Baud 1.2/2.4/4.8 / 9.6 /14.4/ 19.2 / 38.4 kbit/s
6 Printer_Baud 4.8 / 9.6 /19.2 kbit/s
7 Protocol 0000-FFFF
Logic setting “1” - enable, “0” - disable
8 En_Auto_Print 0/1
9 En_Net_Print 0/1
10 En_Remote_Cfg 0/1
11 GPS_Pulse 0/1

Note!

Symbols of the parameter listed in above table are used for communication, printing and
displaying on LCD.

— Setting Description

1. Active_Grp

Two setting groups can be configured for the equipment, and only one is active at one time.
However, equipment parameters and system parameters are common for all protection setting
groups.

2. Equip_ID

The setting consists of ASCII codes, which is identification for report printing only. It can be
configured according to the name or number of generator.

3. Comm_Addr

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The address used for the host computer to identify the equipment, usually provided by substation
system. If the equipment is not connected to automation system, equipment address may be
random.

4. COM1_Baud

The baud rate of serial port 1 shall be selected from specified range.

5. COMBaud

The baud rate of serial port 2 shall be selected from specified range.

6. Printer_Baud

The baud rate used for printer port shall be selected from specified range.

7. Protocol

The logic setting consists of 16 binary digits but four hexadecimal digits can be viewed through
device LCD screen. Every digit has a dedicated meaning and some digits have no definition.

Following will be seen on PC through RCSPC software.

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
B: Modbus

B: LFP

A: Modbus

A: LFP

A: 103
The definitions of digits are:

Bit Definition
0 communication port A using protocol IEC 60870-5-103
1 communication port A using proprietary protocol LFP
2 communication port A using MODBUS protocol
3 No definition
4 No definition
5 communication port B using proprietary protocol LFP
6 communication port B using MODBUS protocol
7-15 No definitions

For example, if logic setting [Protocol] is set as “0041”, it means communication port A use IEC
60870-5-103 protocol, and port B use MODBUS protocol.

8. En_Auto_Print

This setting shall be set as “1” if automatic report printing is expected after the relay operates
when a fault occurs. Otherwise it shall be set as “0”. It is suggested that the user may set this
parameter of the equipment as “1” (i.e. automatic printing), if the equipment is always connected
directly with a printer, or set as “0” (i.e. not automatic printing) if the equipment is connected with a
printer by through switch on panel.

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9. En_Net_Print

Set it as “1” if shared network printer is used for printing. Set it as “0” if dedicated printer is used.
Network printer means several protection equipments share one printer through a printer
management unit and RS-485 port. Dedicated printer means the protection equipment connected
with a printer through RS232 port directly.

10. En_Remote_Cfg

Set it as “0” if only local configuration is permitted. Set it as “1” if local and remote configurations
are both permitted.

11. GPS_Pulse

Set it as “1” for minute pulse and “0” for second pulse.

— Access Path

MainMenupSETTINGSp EQUIP SETTINGS

6.3 System Parameters

6.3.1 Logic Settings

These logic settings are used to configure protective function of the protective device. They can be
set as “1” or “0”. Setting as “1” means that the corresponding protective function is enabled or valid,
while setting as “0” means that the corresponding protective function is disabled or invalid. When
the logics setting of protection function is set as “0”, all settings corresponding with the protection
function will be invisible.

— Setting List

No. Item Range Remark

1 En_Diff_Tr 0/1
2 En_REF_Tr 0/1
3 En_WdgDiff_Tr 0/1
4 En_PPF_Tr 0/1
5 En_EF_Tr 0/1
6 En_OvExc_Tr 0/1
7 En_Flash_CB_HVS 0/1 0: Disable
8 En_BFP_CB_HVS 0/1 1: Enable
9 En_Diff_ST1 0/1
10 En_Bak_HVS_ST1 0/1
11 En_Bak_Br1_ST1 0/1
12 En_Bak_Br2_ST1 0/1
13 En_Diff_ST2 0/1
14 En_Bak_HVS_ST2 0/1

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15 En_Bak_Br1_ST2 0/1
16 En_Bak_Br2_ST2 0/1
17 En_MechRly 0/1
18 En_TestMode(#) 0/1

Symbols of the parameter listed in above table are used for communication, printing and
displaying on LCD. Setting marked with “#” means that it is can not be seen on LCD or by printing
and only can be seen through RCSPC software.

— Setting Description

1. En_Diff_Tr

This logic setting is used to enable/disable differential protection of main transformer.

2. En_REF_Tr

This logic setting is used to enable/disable zero-sequence differential protection of main

transformer.

3. En_WdgDiff_Tr

This logic setting is used to enable/disable winding differential protection of main transformer.

4. En_PPF_Tr

This logic setting is used to enable/disable phase-to-phase fault protection of main transformer.

5. En_EF_Tr

This logic setting is used to enable/disable earth-fault protection of main transformer.

6. En_OvExc_Tr

This logic setting is used to enable/disable over-excitation protection of main transformer.

7. En_Flash_CB_HVS

This logic setting is used to enable/disable breaker flashover protection at HV side of main
transformer.

8. En_BFP_CB_HVS

This logic setting is used to enable/disable breaker failure protection at HV side of main
transformer.

9. En_Diff_ST1

This logic setting is used to enable/disable differential protection of step-down transformer 1.

10. En_Bak_HVS_ST1

This logic setting is used to enable/disable backup protection at HV side of step-down transformer
1.

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11. En_Bak_Br1_ST1

This logic setting is used to enable/disable backup protection of branch 1 at HV side of step-down
transformer 1.

12. En_Bak_Br2_ST1

This logic setting is used to enable/disable backup protection of branch 2 at HV side of step-down
transformer 1.

13. En_Diff_ST2

This logic setting is used to enable/disable differential protection of step-down transformer 2.

14. En_Bak_HVS_ST2

This logic setting is used to enable/disable backup protection at HV side of step-down transformer
2.

15. En_Bak_Br1_ST2

This logic setting is used to enable/disable backup protection of branch 1 at HV side of step-down
transformer 2.

16. En_Bak_Br2_ST2

This logic setting is used to enable/disable backup protection of branch 2 at HV side of step-down
transformer 2.

17. En_MechRly

This logic setting is used to enable/disable mechanical protection.

18. En_TestMode(#)

This logic setting is configured especially for equipment debugging status. It is only seen by
RCSPC, which is used for generating messages of alarm or operation element for remote PC.

“Enable”: enable sending all tripping contacts signals, protection tripping signals, alarm signals
and monitoring signals through the software RCSPC.

“Disable”: disable the function mentioned above.

— Access path

MainMenupSETTINGSpSYS SETTINGSpPROT CONFIG

6.3.2 Main Transformer System Parameters

— Setting List

No. Item Range Step

1 Sn_Tr 0-1000 MVA 0.1 MVA
2 U1n_HVS_Tr 0-2000 kV 0.1 kV
3 U1n_LVS_Tr 0-100 kV 0.01 kV

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4 U1n_VT_HVS_Tr 0-2000 kV 0.1 kV

5 U2n_VT_HVS_Tr 0-100 V 0.01 V
6 U2n_DeltVT_HVS_Tr 0-300 V 0.01 V
7 I1n_CT_HVS_Tr 0-60000 A 1A
8 I2n_CT_HVS_Tr 1, 5 A 1A
9 I1n_CT_Bak_HVS_Tr 0-60000 A 1A
10 I2n_CT_Bak_HVS_Tr 1, 5 A 1A
11 I1n_CT_LVS_Tr 0-60000 A 1A
12 I2n_CT_LVS_Tr 1, 5 A 1A
13 I1n_CT#_HVS_ST1 0-60000 1A
14 I2n_CT#_HVS_ST1 1, 5A 1A
15 I1n_CT#_HVS_ST2 0-60000A 1A
16 I2n_CT#_HVS_ST2 1,5A 1A
17 I1n_CT_NP_Tr 0-60000A 1A
18 I2n_CT_NP_Tr 1,5A 1A
19 I1n_CT_Gap_Tr 0-60000A 1A
20 I2n_CT_Gap_Tr 1,5A 1A
Logic setting “1” - enable, “0” – disable
21 Yd11_Conn_Tr 0/1 1
22 Yyd11_Conn_Tr 0/1 1
23 Yd1_Conn_Tr 0/1
24 Yyd1_Conn_Tr 0/1
25 Opt_GCB 0/1 1

— Setting Description

1. Sn_Tr

Transformer capacity shall be configured as its name plate stated

2. U1n_HVS_Tr

System rated voltage at HV side of main transformer. This setting is used for calculating the rated
current of main transformer. It should be set according to the real operating voltage of the power
system

3. U1n_LVS_Tr

System rated voltage at LV side of main transformer

4. U1n_VT_HVS_Tr

Rated primary voltage of VT at HV side of main transformer

5. U2n_VT_HVS_Tr

Rated secondary voltage of VT at HV side of main transformer

6. U2n_DeltVT_HVS_Tr

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Rated secondary voltage of open-delta of VT at HV side of main transformer

7. I1n_CT_HVS_Tr

Rated primary current of CT of HV side of main transformer

8. I2n_CT_HVS_Tr

Rated secondary current of CT of HV side of main transformer

9. I1n_CT_Bak_HVS_Tr

Rated primary current of backup CT of HV side of transformer

10. I2n_CT_Bak_HVS_Tr

Rated secondary current of backup CT of HV side of transformer

11. I1n_CT_LVS_Tr

Rated primary current of CT at LV side of transformer

12. I2n_CT_LVS_Tr

Rated secondary current of CT at LV side of transformer

13. I1n_CT#_HVS_ST1

Rated primary current of CT at HV side of step-down transformer1 for MT differential protection

14. I2n_CT#_HVS_ST1

Rated secondary current of CT at HV side of step-down transformer1 for MT differential protection

15. I1n_CT#_HVS_ST2

Rated primary current of CT at HV side of step-down transformer2 for MT differential protection

16. I2n_CT#_HVS_ST2

Rated secondary current of CT at HV side of step-down transformer2 for MT differential protection

17. I1n_CT_NP_Tr

Rated primary current of CT at neutral point of transformer

18. I2n_CT_ NP_Tr

Rated secondary current of CT at neutral point of transformer

19. I1n_CT_Gap_Tr

Rated primary current of gap CT at HV side of transformer

20. I2n_CT_Gap_Tr

Rated secondary current of gap CT at HV side of transformer

21. Yd11_Conn_Tr

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The connection mode of main transformer is Yd-11 mode. The current input for HV side is only
one.

22. Yyd11_Conn_Tr

The connection mode of main transformer is Yd-11 mode. The currents input for HV side are two
CTs, such as 3/2 breakers of HV bus.

23. Yd1_Conn_Tr

The option of connection mode of main transformer (Yd-1 mode)

The current input for HV side is only one.

24. Yyd1_Conn_Tr

The option of connection mode of main transformer (YYd-1 mode)

The currents input for HV side are two CTs, such as 3/2 breakers of HV bus.

25. Opt_GCB

Logic setting of circuit breaker at terminal of generator

“1” means there is a circuit breaker at terminal of generator. “0” means there isn’t a circuit breaker
at terminal of generator.

— Access Path

MainMenupSETTINGSpSYS SETTINGSpTR SYS SETTINGS

6.3.3 System Parameters of Step-down Transformer

— Setting List

Step-down Transformer 1

No. Symbol Range Step

1 Sn_ST1 0~100 MVA 0.01 MVA
2 U1n_HVS_ST1 0~600 kV 0.01 kV
3 U1n_Br1_ST1 0~600 kV 0.01 kV
4 U1n_Br2_ST1 0~600 kV 0.01 kV
5 U1n_VT_Br1_ST1 0~600 kV 0.01 kV
6 U2n_VT_Br1_ST1 57.74~110 V 0.01 V
7 U1n_VT_Br2_ST1 0~600 kV .01 kV
8 U2n_VT_Br2_ST1 57.74~110 V 0.01 V
9 I1n_CT_HVS_ST1 0~60000 A 1A
10 I2n_CT_HVS_ST1 1, 5 A
11 I1n_CT_Br1_ST1 0~60000 A 1A
12 I2n_CT_Br1_ST1 1, 5 A
13 I1n_CT_Br2_ST1 0~60000 A 1A

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No. Symbol Range Step

14 I2n_CT_Br2_ST1 1, 5 A
15 I1n_CT_NP_Br_ST1 0~60000 A 1A
16 I2n_CT_NP_Br_ST1 1, 5 A
Logic setting “1”: enable; “0”: disable
17 Yyy12_Conn_ST1 0/1
18 Ddd12_Conn_ST1 0/1
19 Dyy11_Conn_ST1 0/1
20 Ydd11_Conn_ST1 0/1
21 Dyy1_Conn_ST1 0/1

Step-down Transformer 2

No. Symbol Range Step

1 Sn_ST2 0~100 MVA 0.01 MVA
2 U1n_HVS_ST2 0~600 kV 0.01 kV
3 U1n_Br1_ST2 0~600 kV 0.01 kV
4 U1n_Br2_ST2 0~600 kV 0.01 kV
5 U1n_VT_Br1_ST2 0~600 kV 0.01 kV
6 U2n_VT_Br1_ST2 57.74~110 V 0.01 V
7 U1n_VT_Br2_ST2 0~600 kV .01 kV
8 U2n_VT_Br2_ST2 57.74~110 V 0.01 V
9 I1n_CT_HVS_ST2 0~60000 A 1A
10 I2n_CT_HVS_ST2 1, 5 A
11 I1n_CT_Br1_ST2 0~60000 A 1A
12 I2n_CT_Br1_ST2 1, 5 A
13 I1n_CT_Br2_ST2 0~60000 A 1A
14 I2n_CT_Br2_ST2 1, 5 A
15 I1n_CT_NP_Br_ST2 0~60000 A 1A
16 I2n_CT_NP_Br_ST2 1, 5 A
Logic setting “1”: enable; “0”: disable
17 Yyy12_Conn_ST2 0/1
18 Ddd12_Conn_ST2 0/1
19 Dyy11_Conn_ST2 0/1
20 Ydd11_Conn_ST2 0/1
21 Dyy1_Conn_ST2 0/1

— Setting Description

1. Sn_ST1(2)

Capacity of the exciter or step-down transformer shall be configured as its name plate stated

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2. U1n_HVS_ST1(2)

Rated primary voltage of HV side of step-down transformers

3. U1n_Br1_ST1(2) or U1n_Br2_ST1(2)

Rated primary voltage of branch 1 or branch 2 of LV side of step-down transformer

4. U1n_VT_Br1_ST1(2) or U1n_VT_Br2_ST1(2)]

Rated primary voltage of VT at branch 1 or branch 2 of LV side of step-down transformer

5. U2n_VT_Br1_ST1(2) or U2n_VT_Br2_ST1(2)]

Rated secondary voltage of VT at branch 1 or branch 2 of LV side of step-down transformer

6. I1n_CT_HVS_ST1(2)

Rated primary current of CT1 with small ratio at HV side of step-down transformer

7. I2n_CT_HVS_ST1(2)

Rated secondary current of CT1 with small ratio at HV side of step-down transformer

8. I1n_CT_Br1_ST1(2) or I1n_CT_Br2_ST1(2)

Rated primary current of CT at branch 1 or branch 2 of LV side of step-down transformer

9. I2n_CT_Br1_ST1(2) or I2n_CT_Br2_ST1(2)

Rated secondary current of CT at branch 1 or branch 2 of LV side of step-down transformer

10. I1n_CT_NP_Br_ST1(2)

Rated primary current of CT at neutral point of LV side of step-down transformer

11. I2n_CT_NP_Br_ST1(2)

Rated secondary current of CT at neutral point of LV side of step-down transformer

12. Yyy12_Conn_ST

The connection mode of step-down transformer is Yyy-12 mode

13. Ddd12_Conn_ST

The connection mode of step-down transformer is Ddd-12 mode

14. Dyy11_Conn_ST

The connection mode of step-down transformer is Dyy-11 mode

15. Ydd11_Conn_ST

The connection mode of step-down transformer is Ydd-11 mode.

16. Dyy1_Conn_ST

The connection mode of step-down transformer is Dyy-1 mode

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— Access Path

MainMenupSETTINGSpSYS SETTINGSpST1 SYS SETTINGS

MainMenupSETTINGSpSYS SETTINGSpST2 SYS SETTINGS

6.3.4 Implicit Configuration Settings

The settings in the following list are associated with application-specific primary layout of generator
and exciter, tripping logics. These settings can not be seen on LCD of equipment and only be
viewed and configured on PC through RCSPC software in the submenu “CONFIG SETTINGS”.
These settings are usually configured in factory or configured by field commission engineer
according to the design drawing and project requirement.

— Setting List

No. Symbol Range

1 Opt_SLD 0001-01FF
2 Cfg_Polar_CT 0000-FFFF
3 Cfg_CT_HVS1_Tr Current channel 0-15
4 Cfg_CT_HVS2_Tr Current channel 0-15
5 Cfg_CT_Bak_HVS_Tr Current channel 0-15
6 Cfg_CT_NP_HVS_Tr Current channel 0-15
7 Cfg_CT_LVS_Tr Current channel 0-15
8 Cfg_CT#_HVS_ST1 Current channel 0-15
9 Cfg_CT#_HVS_ST2 Current channel 0-15
10 Cfg_CT_HVS_ST1 Current channel 0-15
11 Cfg_CT_Br1_ST1 Current channel 0-15
12 Cfg_CT_Br2_ST1 Current channel 0-15
13 Cfg_CT_HVS_ST2 Current channel 0-15
14 Cfg_CT_Br1_ST2 Current channel 0-15
15 Cfg_CT_Br2_ST2 Current channel 0-15
16 Cfg_CT_NP_Tr Zero-current channel 0-7
17 Cfg_CT_Gap_Tr Zero-current channel 0-7
18 Cfg_CT_NP_Br1_ST1 Zero-current channel 0-7
19 Cfg_CT_NP_Br2_ST1 Zero-current channel 0-7
20 Cfg_CT_NP_Br1_ST2 Zero-current channel 0-7
21 Cfg_CT_NP_Br2_ST2 Zero-current channel 0-7
22 Cfg_CT_Diff_Tr Zero-current channel 0-7
23 Cfg_REF_Tr Zero-current channel 0-7
24 Cfg_CT_WdgDiff_Tr Zero-current channel 0-7
25 Opt_WaveRec_MON Pickup/Trip
26 Opt_Debug_MON DSP2/DSP1
27 Opt_Dur_WaveRec_MON 4S/8S

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No. Symbol Range

28 En_Displ_Pickup Yes/No

1. Opt_SLD

This is the logic setting of connection type between bus, main transformer and step-down
transformer, which decides the default LCD displaying in normal operation condition. Each bit from
0 to 3 represents a unique figure displayed on LCD if the bit is set as “1”. The following table gives
the actual meaning of each bit. Only one bit can be set as “1” simultaneously.

No. Item Bit Meaning

1 Opt_SLD_1 Bit0 3/2 bus connection, two three-winding step-down transformers
Double bus connection, two three-winding step-down
2 Opt_SLD_2 Bit1
transformers
3 Opt_SLD_3 Bit2 3/2 bus connection, two two-winding step-down transformers
Double bus connection, two two-winding step-down
4 Opt_SLD_4 Bit3
transformers

2. Cfg_Polar_CT

Generally, CT polarity definition is shown as the below table. However if some CT polarity direction
is reversed by incorrect wiring connecting, there is still chance to correct it by configuring this logic
setting easily. Please set the corresponding digit of the logic setting. Bit01~Bit15 are
corresponding to 15 three-phase current channels one by one. If any bit is set as “0”, the program
will reverse the current polarity of this channel before calculation.

Following will be seen on PC through RCSPC software.

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Three-phase channel 15

Three-phase channel 14

Three-phase channel 13

Three-phase channel 12

Three-phase channel 10
Three-phase channel 11

Three-phase channel 9

Three-phase channel 8

Three-phase channel 7

Three-phase channel 6

Three-phase channel 5

Three-phase channel 4

Three-phase channel 3

Three-phase channel 2

Three-phase channel 1

No definition

3. Cfg_CT_HVS1_Tr

Configurable setting for deciding which channel is chosen to input three-phase current of HVS1
side of main transformer

Following table gives all the choices that user can decide. Only one bit at most can be set as “1”
simultaneously.

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

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Three-phase channel 15

Three-phase channel 14

Three-phase channel 13

Three-phase channel 12

Three-phase channel 10
Three-phase channel 11

Three-phase channel 9

Three-phase channel 8

Three-phase channel 7

Three-phase channel 6

Three-phase channel 5

Three-phase channel 4

Three-phase channel 3

Three-phase channel 2

Three-phase channel 1

No definition
4. Cfg_CT_HVS2_Tr

Configurable setting for deciding which channel is chosen to input three-phase current of HVS2
side of main transformer

The definition is the same to the above table

5. Cfg_CT_Bak_HVS_Tr

Configurable setting for deciding which channel is chosen to input three-phase current of HVS
side of main transformer

This current is specially used for backup protection of main transformer. The definition is the same
to the above table except for the bit0. In this setting, if the bit0 is set as “1”, the protection will
recognize this directly input current as the whole current of HVS side of main transformer,
otherwise, the protection will automatically add HVS1 and HVS2 side currents mentioned above to
be the whole current of HVS side and ignoring the current input from this channel.

6. No.6~No. 27

Configurable setting for deciding which channel is chosen to input each current

The definition of each bit is the same to that of No.4. The actual meaning of each setting is given in
the following table.

No. settings Specific description

Channel selection for the neutral point current at HV side of
1 Cfg_CT_NP_HVS_Tr
main transformer
Channel selection for the current at LV side of main
2 Cfg_CT_LVS_Tr
transformer
Channel selection for the current via high ratio CT at HV side
3 Cfg_CT#_HVS_ST1
of step-down transformer 1
Channel selection for the current via high ratio CT at HV side
4 Cfg_CT#_HVS_ST2
of step-down transformer 2
Channel selection for the current at HV side of step-down
5 Cfg_CT_HVS_ST1
transformer 1
Channel selection for the current of branch 1 at LV side of
6 Cfg_CT_Br1_ST1
step-down transformer 1
7 Cfg_CT_Br2_ST1 Channel selection for the current of branch 2 at LV side of

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step-down transformer 1
Channel selection for the current at HV side of step-down
8 Cfg_CT_HVS_ST2
transformer 2
Channel selection for the current of branch 1 at LV side of
9 Cfg_CT_Br1_ST2
step-down transformer 2
Channel selection for the current of branch 2 at LV side of
10 Cfg_CT_Br2_ST2
step-down transformer 2
Channel selection for zero-sequence current obtained for
11 Cfg_CT_NP_Tr
neutral point of main transformer
Channel selection for gap zero-sequence current obtained
12 Cfg_CT_Gap_Tr
for main transformer
Channel selection for zero-sequence current obtained for
13 Cfg_CT_NP_Br1_ST1 neutral point of branch 1 at LV side of step-down transformer
1
Channel selection for zero-sequence current obtained for
14 Cfg_CT_NP_Br2_ST1 neutral point of branch 2 at LV side of step-down transformer
1
Channel selection for zero-sequence current obtained for
15 Cfg_CT_NP_Br1_ST2 neutral point of branch 1 at LV side of step-down transformer
2
Channel selection for zero-sequence current obtained for
16 Cfg_CT_NP_Br2_ST2 neutral point of branch 2 at LV side of step-down transformer
2

7. Cfg_CT_Diff_Tr

Logic setting of selecting three-phase current channels for differential protection of main
transformer

If the bit is set as “1”, it means this group is used in the differential protection of main transformer.
Following will be seen on PC through RCSPC software.

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CT#_HVS_ST

CT_HVS2_Tr

CT_HVS1_Tr
CT_HVS_ST
CT_LVS_ST

CT_LVS_Tr

8. Cfg_REF_Tr

Logic setting of selecting three-phase current channels for zero-sequence differential protection of
main transformer

If the bit is set as “1”, it means this group is used in the zero-sequence differential protection of
main transformer. Following will be seen on PC through RCSPC software.

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15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

CT_Bush_HVS_Tr
CT_Wdg_HVS_Tr

CT_NP_HVS_Tr

CT_HVS2_Tr

CT_HVS1_Tr
9. Cfg_CT_WdgDiff_Tr

Logic setting of selecting three-phase current channels for winding differential protection of main
transformer

If the bit is set as “1”, it means this group is used in the winding differential protection of main
transformer. Following will be seen on PC through RCSPC software.

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

CT_Wdg_HVS_Tr

CT_HVS2_Tr

CT_HVS1_Tr
10. Opt_WaveRec_MON CT_HVS_ST

Logic setting of selecting recording triggering mode of MON module

“0”: recording is triggered when any fault detector picks up.

“1”: recording is triggered when any protection element trips.

11. Opt_Debug_MON

This logic setting is provided especially for software developing, not for ordinary users.

12. Opt_Dur_WaveRec_MON

Logic setting of selecting recording time of MON module

“0”: recording persisting time is 4 s with 24 samples per cycle.

“1”: recording persisting time is 8 s with 12 samples per cycle.

13. En_Displ_Pickup

This logic setting is provided especially for software developing, not for ordinary users.

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6.4 Protection Settings

The protection settings are used to determine the characteristic of each protection.

6.4.1 Differential Protection of Main Transformer

— Setting List

No. Symbol Range Step

1 I_Pkp_PcntDiff_Tr 0.10–1.50 (Ie) 0.01 (Ie)
2 I_InstDiff_ Tr 2.00–14.00 (Ie) 0.01 (Ie)
3 Slope1_PcntDiff_ Tr 0.10–0.50 0.01
4 Slope2_PcntDiff_ Tr 0.50–0.80 0.01
5 k_Harm_PcntDiff_Tr 0.10-0.35 0.01
6 TrpLog_Diff_ Tr 0000–7FFF 1
Logic setting 1: enable; 0: disable
1 En_InstDiff_ Tr 0, 1
2 En_PcntDiff_ Tr 0, 1
3 En_DPFC_Diff_Tr 0, 1
4 Opt_Inrush_Ident_ Tr 0, 1
5 Opt_CTS_Blk_PcntDiff_Tr 0, 1
6 Opt_Diff_GTU/Tr 0, 1

— Setting Description

1. I_Pkp_PcntDiff_Tr

This is pickup setting of percentage current differential protection, which is also the setting of fault
detector of percentage differential protection. It shall be higher than maximum unbalanced current
of the transformer during normal rated load, i.e.

I cdqd = K rel ( K er + ΔU + Δm) I e

(Equation 6.4-1)

Where:

I cdqd represents the setting [I_Pkp_PcntDiff_Tr]

I e is secondary calculated rated current of transformer

K rel is reliability coefficient (generally K rel = 1.3 - 1.5)

K er is the ratio error of CT (=0.03X2, for class 10P; =0.01X2, for class 5P and class TP);

ΔU is the maximum deviation (in percentage of rated voltage) due to tap changing.

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Δm is the error caused by the difference between ratios of CT at all side, 0.05 is recommended.

For practical engineering application, I cdqd =（0.3 - 0.5） I e is reasonable and unbalanced current

in differential scheme during maximum load of transformer shall be measured.

2. I_InstDiff_Tr

Setting of unrestrained instantaneous differential protection, which is used to clear serious internal

fault quickly and prevent operation delay caused by CT saturation. The setting I cdsd (i.e.

[I_InstDiff]) shall be greater than inrush current and maximum unbalanced current due to external
fault or asynchronous closing, generally

I cdsd = K ⋅ I e (Equation 6.4-2)

Where:

K is a multiple depending on capacity of transformer and the system reactance, 6 – 8 is

recommended.

I e is secondary calculated rated current of transformer.

Sensitivity coefficient of unrestrained instantaneous differential protection K sen shall be calculated

according to the phase-to-phase solid short circuit fault in normal operation condition at installed

point of the relay. K sen ≥ 1.2 is required.

3. Slope1_PcntDiff_Tr

Setting of the first slope of percentage differential protection, it shall be:

K bl1 ≥ K er (Equation 6.4-3)

Where:

K er is the error of current ratio of CT, no more than 0.1. K bl1 is 0.10-0.20 generally.

Sensitivity check for percentage differential protection

The sensitivity coefficient K sen shall be calculated according to phase-to-phase short circuit on

outlet of transformer protected by the differential relay in minimum operation mode. From the

calculated minimum short circuit current I k . min and relevant restraint current I res , corresponding

pickup current I op will be found in the operation characteristic curve of percentage differential

relay, and then the sensitivity coefficient is:

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K sen = I k . min / I op
(Equation 6.4-4)

K sen ≥2 is required.

4. Slope2_PcntDiff_Tr

Setting of second slope of percentage differential protection

Calculation of secondary unbalanced current:

--- For two winding transformer

I unb. max = ( K ap K cc K er + ΔU + Δm) I k . max

(Equation 6.4-5)

Where:

Definition of K er , ΔU and Δm have been mentioned above;

K cc is the “same type coefficient” of CT, 0.1 is considered.

I k . max is the maximum value of fundamental component of external short circuit fault current

(secondary).

K ap is the coefficient of DC component. K ap = 1.0 if CT at both sides are class TP, or K ap = 1.5 -

2.0 if CT at both sides are class P.

--- For three winding transformer

Take external short circuit fault at LV side as example:

I unb . max = K ap K cc K er I k . max + ΔU h I k .h . max + Δm I I k . I . max + Δm II I k . II . max

(Equation 6.4-6)

Where:

Definition of K er , K cc and K ap have been mentioned above;

ΔU h are maximum deviations (in percentage of rated voltage) on HV side due to tap changing.

I k . max is the maximum value of fundamental component of short circuit secondary current flowing

through CT at the fault side during external fault at LV side.

I k .h. max is the maximum value of fundamental component of short circuit secondary current flowing

through CT on tap changing sides during external fault at LV side.

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I k .I . max and I k .II . max are the fundamental components of secondary currents flowing through CT at

other sides during external fault at LV side.

ΔmI and ΔmII are errors caused by difference between ratios of CT (auxiliary CT included if any)
at relevant sides.

Second slope of percentage differential protection is:

I unb. max* − I cdqd * − 3k bl1

k bl 2 =
I k . max* − 3 (Equation 6.4-7)

Where:

Definition of I unb. max* , I cdqd * and I k . max* are almost same to I unb. max , I cdqd and

I k . max mentioned above, and the only difference is they are per unit values. I e (secondary

calculated rated current of transformer) is the base value of per unit.

kbl 2 =0.70 is recommended.

5. k_Harm_PcntDiff_Tr

Restraint coefficient of second harmonic

This parameter is the blocking threshold of second harmonics involving in differential current to
against inrush current when the transformer is energized. The differential protection will be
blocked when the percentage of second harmonics reaches the threshold because the percentage
of second harmonics is high in inrush current but low in fault current. It is recommended that the
parameter is set to be 15% -20%.

6. TrpLog_DIff_Tr

Tripping output logic setting of differential protection is used to specify which breaker or breakers
will be tripped by this protection.

7. En_InstDiff_Tr

Unrestrained instantaneous differential protection enabled. If this setting is set as “1”, it means this
protection is enabled. Otherwise, it means the protection is disabled.

8. En_PcntDiff_Tr

Percentage differential protection enabled. If this setting is set as “1”, it means this protection is
enabled. Otherwise, it means the protection is disabled.

9. En_DPFC_Diff_Tr

DPFC percentage differential protection enabled. If this setting is set as “1”, it means this
protection is enabled. Otherwise, it means the protection is disabled.

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10. Opt_Inrush_Ident_Tr

Inrush current blocking principle selection:

“0”, discrimination by harmonics

“1”, waveform distortion criteria is used

11. Opt_CTS_Blk_PcntDiff_Tr

If this logic setting is set as “1”, it means percentage differential protection will be blocked when CT
circuit failure happens. Otherwise, it means the function is disabled.

12. Opt_Diff_GTU/Tr

1: differential protection of generator-transformer unit

0: differential protection of main transformer

— Access Path

MainMenupSETTINGSpPROT SETTINGSpTR DIFF PROT

6.4.2 Restricted Earth-fault Protection of Main Transformer

— Overview

No. Symbol Range Step

1 I_Pkp_PcntREF_Tr 0.10~1.50 In 0.01 In
2 I_InstREF_Tr 2.00~14.00 In 0.01 In
3 Slope_PcntREF_Tr 0.30~0.80 0.01
4 TrpLog_REF_Tr 0000~7FFF 1
Logic setting 1: enable; 0: disable
1 En_InstREF_Tr 0/1
2 En_PcntREF_Tr 0/1
3 Opt_CTS_Blk_PcntR 0,1

— Setting Description

1. I_Pkp_PcntREF_Tr

Pickup current setting of REF

The calculation of this setting is based on secondary rated current of CT. The pickup current of
REF shall be greater than the maximum unbalance current while main transformer works under
normal rated load, i.e.

I0cdqd = K rel (K er + Δm)In (Equation 6.4-8)

Where:

I0cdqd represents for [I_Pkp_PcntREF_Tr]

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In is rated secondary current of CT

K rel is reliability coefficient (generally K rel =1.3~1.5)

K er is the ratio errors of CT (for type 10P, K er =0.03X2, for class 5P and class TP, K er =0.01X2)

Δm is the error caused by the difference between ratios of CT at all side, 0.05 is recommended

For practical engineering calculation, Iocdqd =(0.2 - 0.5)In is reasonable and unbalance current in

differential scheme during maximum load of main transformer shall be measured.

Please note that calculation of zero-sequence differential current settings is based on the
secondary rated current of CT. If a setting value got from calculation is together with its unit
Ampere, this setting shall be divided by secondary rated current of this side of CT, to get per unit
value.

Sensitivity check for percentage REF

Sensitivity of percentage REF shall be checked with the solid earthed short circuit in its protected

zone. K sen ≥ 2 is required. In solid earthed system, distribution of zero-sequence current for single

phase to ground fault depends on the configuration of zero-sequence network of power system.
Magnitude of the single-phase ground fault current depends on not only zero-sequence distance
of system but also positive and negative sequence distance or power system operation mode.
When power system is in maintenance status, in order to remain the zero-sequence network
unchanged and increase sensitivity for earth fault protection, the 220kV power system is generally
compensated by properly changing earth mode of main transformer. Neutral point of main
transformer of 400kV power system is now generally earthed with small reactance. Therefore,
sensitivity of REF shall be checked in minimum operation mode for 220kV power system and
minimum operation mode or small maintenance mode for 400kV power system.

Note!

Positive polarity of CT is at busbar side on HV side and at neutral point for serial-winding.

2. I_InstREF_Tr

Current setting of unrestrained instantaneous REF

3. Slope_PcntREF_Tr

Restraint coefficient of percentage REF

4. TrpLog_REF_Tr

Logic setting of tripping output for REF

5. En_InstREF_Tr

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Enable unrestrained instantaneous REF

6. En_PcntREF_Tr

Enable percentage REF

7. Opt_CTS_Blk_PcntREF_Tr

If this logic setting is set as “1”, it means percentage REF will be blocked when CT circuit failure
happens. Otherwise, it means the function is disabled.

— Access Path

MainMenupSETTINGSpPROT SETTINGSp TR HVS REF PROT

6.4.3 Winding Differential Protection of Main Transformer

— Setting List

No. Symbol Range Step

1 I_Pkp_PcntWdgDiff_Tr 0.10~1.50 In 0.01 In
2 I_InstWdgDiff_Tr 2.00~14.00 In 0.01 In
3 Slope_PcntWdgDiff_Tr 0.30~0.80 0.01
4 TrpLog_WdgDiff_Tr 0000~7FFF 1
Logic setting 1: enable; 0: disable
1 En_InstWdgDiff_Tr 0/1
2 En_PcntWdgDiff_Tr 0/1
3 Opt_CTS_Blk_PcntWdgDiff 0,1

— Setting Description

1. I_Pkp_PcntWdgDiff_Tr

This is pickup setting of percentage winding differential protection, which is also the setting of fault
detector of percentage differential protection. It shall be higher than maximum unbalanced current
of the transformer during normal rated load, i.e.

I cdqd = K rel ( K er + ΔU + Δm) I e

(Equation 6.4-9)

Where:

I cdqd represents the setting [I_Pkp_PcntWdgDiff_Tr]

I e is secondary calculated rated current of transformer

K rel is reliability coefficient (generally K rel = 1.3 - 1.5);

K er is the ratio error of CT (=0.03X2, for class 10P; =0.01X2, for class 5P and class TP);

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 Chapter 6 Settings

ΔU is the maximum deviation (in percentage of rated voltage) due to tap changing
Δm is the error caused by the difference between ratios of CT at all side, 0.05 is recommended

For practical engineering application, I cdqd =（0.3 - 0.5） I e is reasonable and unbalanced current

in differential scheme during maximum load of transformer shall be measured.

Sensitivity check for percentage winding differential protection

The sensitivity coefficient K sen shall be calculated according to phase-to-phase short circuit on

outlet of transformer protected by the differential relay in minimum operation mode. From the

calculated minimum short circuit current I k . min and relevant restraint current I res , corresponding

pickup current I op will be found in the operation characteristic curve of percentage differential

relay, and then the sensitivity coefficient is:

K sen = I k . min / I op
(Equation
6.4-10)

K sen ≥2 is required.

2. I_InstWdgDiff_Tr

Current setting of unrestrained instantaneous winding differential protection

3. Slope_PcntWdgDiff_Tr

Restraint coefficient of percentage winding differential protection

4. TrpLog_WdgDiff_Tr

Logic setting of tripping output for winding differential protection

5. En_InstWdgDiff_Tr

Enable unrestrained instantaneous winding differential protection

6. En_PcntWdgDiff_Tr

Enable percentage winding differential protection

7. Opt_CTS_Blk_PcntWdgDiff

If this logic setting is set as “1”, it means percentage winding differential protection will be blocked
when CT circuit failure happens. Otherwise, it means the function is disabled.

— Access Path

MainMenupSETTINGSpPROT SETTINGSp TR WDG DIFF PROT

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Chapter 6 Settings

6.4.4 Phase-to-phase Fault Protection of Main Transformer

— Setting List

No. Symbol Range Step

1 V_NegOV_VCE_Tr 1.00 V~20.00 V 0.01 V
2 Vpp_UV_VCE_Tr 10.00V~100.00V 0.01 V
3 I_OC1_Tr 0.10 A~100.00 A 0.01 A
4 t_OC1_Tr 0.00 s~10.00 s 0.01 s
5 TrpLog_OC1_Tr 0000~FFFF 1
6 I_OC2_Tr 0.10 A~100.00 A 0.01 A
7 t_OC2_Tr 0.00 s~10.00 s 0.01 s
8 TrpLog_OC2_Tr 0000~FFFF 1
9 Z1_Fwd_Tr 0.00~100.00 Ohm 0.01Ohm
10 Z1_Rev_Tr 0.00~100.00 Ohm 0.01Ohm
11 t_Z1_Tr 0.00~10.00 s 0.01 s
12 TrpLog_Z1_Tr 0000~FFFF 1
13 Z2_Fwd_Tr 0.00~100.00 Ohm 0.01Ohm
14 Z2_Rev_Tr 0.00~100.00 Ohm 0.01Ohm
15 t_Z2_Tr 0.00~10.00 s 0.01 s
16 TrpLog_Z2_Tr 0000~FFFF 1
17 I_Alm_OvLd_Tr 0.10~100.00 A 0.01 A
18 t_Alm_OvLd_Tr 0.00~10.00 s 0.01 s
19 I_InitCool1_OvLd_Tr 0.10~100.00 A 0.01 A
20 t_InitCool1_OvLd_Tr 0.00~10.00 s 0.01 s
21 I_InitCool2_OvLd_Tr 0.10~100.00 A 0.01 A
22 t_InitCool2_OvLd_Tr 0.00~10.00 S 0.01 S
23 I_BO_OC_HVS_Tr 0.10~100.00 A 0.01 A
24 t_BO_OC_HVS_Tr 0.00~10.00 S 0.01 S
Logic setting 1: enable; 0: disable
1 En_VCE_Ctrl_OC1_Tr 0/1
2 En_VCE_Ctrl_OC2_Tr 0/1
3 En_LVS.VCE_Ctrl_OC_Tr 0/1
4 En_Mem_Curr_Tr 0/1
5 Opt_VTS_Ctrl_OC_Tr 0/1
6 En_OvLd_Tr 0/1
7 En_InitCool1_OvLd_Tr 0/1
8 En_InitCool2_OvLd_Tr 0/1
9 En_BO_OC_HVS_Tr 0/1

The current is gained from the current input channel at HV side of main transformer. For double
busbar arrangement at HV side of main transformer, usually it is the current at HV side of main

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 Chapter 6 Settings

transformer. For 3/2 breaker arrangement at HV side of main transformer, it is either bushing
current at HV side of main transformer or the summation of current from double breaker CTs at HV
side of main transformer

— Setting Description

1. V_NegOV_VCE_Tr

This is setting of negative sequence voltage control element of main transformer. Setting and
displayed value of negative sequence voltage are U2.

Setting of this relay shall be higher than measured imbalance voltage during normal operation
condition, generally

U op.2 = (0.06 − 0.08)U n (Equation 6.4-11)

Where：

U n is secondary rated phase-to-phase voltage.

Sensitivity factor of negative sequence voltage relay shall be checked by

U k .2. min
K sen = (Equation
U op.2

6.4-12)

Where U k .2. min is minimum secondary negative sequence voltage at location of the relay during

phase-to-phase metallic short circuit fault at end of backup protected zone. K sen ≥2.0 is required

for near backup protection and K sen ≥1.5 for remote backup protection.

Note!

When sensitivity factor is checked for current relay and voltage relay, unfavorable normal
system operation condition and unfavorable type of short circuit fault shall be adopted. If
sensitivity factor of under voltage relay is not high enough, function of composite voltage
on LV side initiation can be enabled. Voltage is taken from LV side by configure logic
setting [En_LVS.VCE_Ctrl_OC_Tr].

2. Vpp_UV_VCE_Tr

Voltage of voltage control element is taken from LV side usually (logic setting
[En_LVS.VCE_Ctrl_OC_TR] is set as 1.). Undervoltage setting shall be higher than the lowest
voltage during starting process of the largest motor connected with the LV busbar.

Setting of phase-to-phase under voltage of composite voltage control element

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It shall coordinate with generator starting condition.

Setting shall be higher than possible minimum voltage during normal operation, namely

U min
U op = (Equation 6.4-13)
K rel ⋅K r

Where K rel is reliability factor, 1.10 – 1.20; K r is release factor, 1.05 – 1.25; U min is possible

minimum voltage during normal operation, 0.9 times of secondary rated line voltage generally.

When VT on HV side of the transformer is used for the under voltage relay

U op = 0.7U n (Equation 6.4-14)

Where:

U n is secondary rated line voltage

When step-up transformer is used in a power plant and VT on generator side is used for under
voltage relay, its setting shall be higher than under voltage during operation of generator without
excitation,

U op = (0.5 − 0.6)U n (Equation 6.4-15)

Where:

U n is secondary rated line voltage

Sensitivity factor of under voltage relay shall be checked by

U op
K sen = (Equation 6.4-16)
U c. max

Where:

U c.max is maximum secondary residual voltage at location of the relay when phase-to-phase

metallic short circuit fault occurs at the check point during operation condition for calculation.

K sen ≥1.5 is required for near backup protection and K sen ≥1.2 for remote backup protection.

3. I_OC1_Tr

Setting of overcurrent protection stage 1

Setting of overcurrent relay shall be higher than rated current of transformer,

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K rel
I op = Ie (Equation 6.4-17)
Kr

Where:

K rel is reliability factor, 1.2 generally; K r is release factor, 0.85 – 0.95; I e is secondary rated

current.

Sensitivity factor of overcurrent relay shall be checked by following:

I k( 2.min
)
K sen = (Equation 6.4-18)
I op

Where:

I k( 2.min
)
is minimum fault current through location of the relay during phase-to-phase metallic short

circuit at end of backup protected section. K sen ≥ 1.3 is required for near backup protection and

K sen ≥ 1.2 for remote backup protection.

4. t_OC1_Tr

The time delay of stage 1 of overcurrent protection

It shall coordinate with main protection only and oscillation period is not needed to be considered.
It is set as 0.5 s generally.

5. TrpLog_OC1_Tr

Tripping output logic setting of the time delay of over current protection stage 1

6. I_OC2_Tr

Setting of overcurrent protection stage 2

7. t_OC2_Tr

The first time delay of overcurrent protection stage 2

8. TrpLog_OC2_Tr

Tripping output logic setting of the first time delay of over current protection stage 2

9. Z1_Fwd_Tr

Stage 1 of positive direction impedance setting of phase-to-phase impedance protection

Here positive direction means the direction is pointing to the transformer instead of generator
itself.

If the value of this setting is greater than the next one, then the characteristic of distance protection

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is set as excursive impedance circle; if it is equal to the next one, the characteristic is whole
impedance circle; if the next one is set as “0”, the characteristic becomes directional impedance.

Generally, low impedance protection is considered as the backup protection of transformer in case
that voltage-controlled overcurrent protection cannot satisfy the sensitivity requirement of
transformer.

Setting of this impedance relay shall coordinate with that of HV side outlet, namely

Z op = K rel K inf Z (Equation 6.4-19)

Where K rel is reliability factor, 0.8 generally; Kinf is enhanced factor, taking minimum value of

various operation conditions; Z is setting of impedance protection of coordinating HV side outlet;

Sensitivity shall be checked by phase-to-phase short circuit on end of designated protected zone,
namely

Z op
K sen = (Equation 6.4-20)
Z

Where Z is equivalent secondary impedance value of designated protected section. K sen ≥1.3

Is required.

When this direction of impedance relay points to transformer.

The forward setting can be based on enough sensitivity for fault on terminal of generator and
referred to equation hereinabove. Reverse impedance equals to 5% - 10% of forward impedance.
Reverse setting shall be lower than setting of the shortest zone 1 of impedance protection of outlet
from this side busbar.

10. Z1_Rev_Tr

Stage 1 of negative direction impedance setting of distance protection

In general, this setting is set as 5-10% of the positive direction impedance setting.

11. t_Z1_Tr

The first time delay of distance protection stage 1

12. TrpLog_Z1_Tr

Tripping output logic setting of distance protection stage 1

13. Z2_Fwd_Tr

Stage 2 of ppositive direction impedance setting of phase-to-phase impedance protection

14. Z2_Rev_Tr

Stage 2 of negative direction impedance setting of distance protection

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15. t_Z2_Tr

The time delay of distance protection stage 2

16. TrpLog_Z2_Tr

Tripping output logic setting of distance protection stage 2

17. I_Alm_OvLd_Tr

Current setting of overload alarm

18. t_Alm_OvLd_Tr

Time delay of overload alarm

19. I_InitCool1_OvLd_Tr

Current setting of cooling initiation of main transformer

20. t_InitCool1_OvLd_Tr

Time delay of cooling initiation of main transformer

21. I_InitCool1_OvLd_Tr

Current setting of stage 1 of cooling initiation of main transformer

22. t_InitCool1_OvLd_Tr

Time delay of stage 1 of cooling initiation of main transformer

23. I_InitCool2_OvLd_Tr

Current setting of stage 2 of cooling initiation of main transformer

24. t_InitCool2_OvLd_Tr

Time delay of stage 2 of cooling initiation of main transformer

25. I_BO_OC_HVS_Tr

Current setting of output of overcurrent element of main transformer

26. t_BO_OC_HVS_Tr

Time delay of output of overcurrent element of main transformer

27. En_VCE_Ctrl_OC1_Tr

Logic setting of overcurrent protection stage 1 controlled by voltage element

“1”: the overcurrent protection stage 1 is controlled by voltage element

“0”: the protection is not controlled by voltage element

28. En_VCE_Ctrl_OC2_Tr

Logic setting of overcurrent protection stage2 controlled by voltage element

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29. En_LVS.VCE_Ctrl_OC_Tr

Logic setting of overcurrent protection controlled by LV side VCE

30. En_Mem_Curr_Tr

Logic setting of memory function of current

Note!

For generator with self parallel excitation system, the memory function of transformer is
usually disabled for phase to phase backup protection. But if it is enabled, the overcurrent
protection must be configured as voltage controlled overcurrent protection.

31. Opt_VTS_Ctrl_OC_Tr

Protection performance during VT circuit failure

“1”: when VT circuit failure at one side is detected, voltage control element at the same side will be
disabled but overcurrent relay on the same side can still be controlled by voltage control elements
of other side if corresponding logic setting is set as “1”.

“0”: when VT circuit failure at one side is detected, the overcurrent relay will become an
overcurrent relay without voltage element control.

32. En_OvLd_Tr

Logic setting of enabling overload alarm of main transformer

33. En_InitCool1_OvLd_Tr

Logic setting of enabling stage 1 of cooling initiation of main transformer

34. En_InitCool2_OvLd_Tr

Logic setting of enabling stage 2 of cooling initiation of main transformer

35. En_BO_OC_HVS_Tr

Logic setting of enabling output of overcurrent element of main transformer

— Access Path

MainMenupSETTINGSpPROT SETTINGSpTR PPF BAK PROT

6.4.5 Earth-fault Protection of Main Transformer

— Setting List

No. Symbol Range Step

1 V_ROV_VCE_Tr 2.00 –100.00V 0.01V
2 I_ROC1_Tr 0.10 –100.00A 0.01A
3 t_ROC11_Tr 0.00–10.00s 0.01s
4 TrpLog_ROC11_Tr 0000-FFFF 1

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5 t_ROC12_Tr 0.00–10.00s 0.01s

6 TrpLog_ROC12_Tr 0000-FFFF 1
7 I_ROC2_Tr 0.10–100.00A 0.01A
8 t_ROC21_Tr 0.00– 10.00s 0.01 s
9 TrpLog_ROC21_Tr 0000-FFFF 1
10 t_ROC22_Tr 0.00– 10.00s 0.01s
11 TrpLog_ROC22_Tr 0000-FFFF 1
12 V_ROV_Gap_HVS_Tr 2.00 – 220.00 V 0.01 V
13 t_ROV_Gap_HVS_Tr 0.00 – 10.00 s 0.01 s
14 TrpLog_ROV_Gap_HVS_Tr 0000-FFFF 1
15 I_ROC_Gap_HVS_Tr 0.10–100.00A 0.01A
16 t_ROC_Gap_HVS_Tr 0.00 – 10.00 s 0.01
17 TrpLog_ROC_Gap_HVS_Tr 0000-FFFF 1
18 V_Alm_ROV_LVS_Tr 5.00 – 100.00V 0.01 V
19 t_Alm_ROV_LVS_Tr 0.00 – 10.00s 0.01s
Logic setting “1” - enable, “0” – disable
1 En_VCE.ROV_Ctrl_ROC1_Tr 0/1
2 En_VCE.ROV_Ctrl_ROC2_Tr 0/1
3 En_Dir_Ctrl_ROC1_Tr 0/1
4 En_Dir_Ctrl_ROC2_Tr 0/1
5 En_Calc_3I0_ROC1_HVS 0/1
6 En_Calc_3I0_ROC2_HVS 0/1
7 En_Alm_ROV_LVS_Tr 0/1
8 En_BI_Ctrl_EF_Gap_HVS 0/1
9 Opt_CT_Calc_3I0_HVS 0/1

— Setting Description

1. V_ROV_VCE_Tr

Setting (3U0) of zero-sequence voltage control element for zero-sequence overcurrent protection.

2. I_ROC1_Tr

Setting of stage 1 of zero-sequence overcurrent protection

This setting shall coordinate with unrestraint main protection or stage 1 or 2 of zero sequence
overcurrent relay of adjacent power line.

I op.o.I = K rel K brI I op.o.1I (Equation 6.4-21)

Where:

I op.o.I is setting of stage 1 of zero sequence overcurrent relay,

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K brI is branch factor of zero sequence current which is ratio of zero sequence current passing

through the relay and passing through the faulty line during ground fault at end of protected zone
of stage 1 of power line zero sequence overcurrent protection, maximum value for various
operation conditions being Taken;

K rel is reliability factor, 1.1 generally

I op.o.1I is setting of relevant stage of coordinating line protection.

Sensitivity factor of zero sequence overcurrent relay shall be checked by

3I k .o. min
K sen = (Equation 6.4-22)
I op.o

Where:

3I k .o. min is minimum secondary zero sequence current passing through location of the relay

during ground fault at end of protected zone; I op.o is this setting. K sen ≥1.5 Is required.

3. t_ROC11_Tr

Time delay 1 of stage 1 of zero-sequence overcurrent protection

When earth fault occurs on near end of HV side outlet of startup/standby transformer, it is
protected by both this protection and zero-sequence overcurrent protection stage 2 on remote end,
so the time delay setting of this protection is

t = t II − Δt (Equation 6.4-23)

Where:

t is time delay [t_ROC11_Tr].

t II is time delay of zero-sequence overcurrent protection stage2 on remote end.

Δt is the step difference of delay.

4. TrpLog_ROC11_Tr

Tripping output logic setting of zero-sequence overcurrent protection stage 1 with time delay 1

5. t_ROC12_Tr

Time delay 2 of stage 1 of zero-sequence overcurrent protection

6. TrpLog_ROC12_Tr

Tripping output logic setting of zero-sequence overcurrent protection stage 1 with time delay 2

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7. I_ROC2_Tr

Setting of stage 2 of zero-sequence overcurrent protection

The setting shall coordinate with operating current of zero-sequence overcurrent protection of HV
side feeders for remote end earth fault:

(3I 0 ) op
I op.o.II = K c 0 C 0' (Equation 6.4-24)
nTA

Where:

K c 0 is coordination coefficient, (generally K co = 1.1);

(3I o ) op is the primary operating current of backup zone of zero-sequence overcurrent protection

of HV side feeders to be coordinated.

C 0' is the distribution coefficient of zero sequence current that is equal to the ratio of zero
sequence current passing through this end protection and that passing through the power line,

takes the maximum value in various operation modes; and nTA is current ratio of CT.

8. t_ROC21_Tr

Delay 1 of stage 2 of zero-sequence overcurrent protection.

9. TrpLog_ROC21_Tr

Tripping output logic setting of zero-sequence overcurrent protection stage 2 with time delay 1

10. t_ROC22_Tr

Time delay 2 of stage 2 of zero-sequence overcurrent protection

11. TrpLog_ROC22_Tr

Tripping output logic setting of zero-sequence overcurrent protection stage 2 with time delay 2

12. V_ROV_Gap_HVS_Tr

Voltage setting of gap zero-sequence overvoltage protection

13. t_ROV_Gap_HVS_Tr

Time delay of gap zero-sequence overvoltage protection

14. TrpLog_ROV_Gap_HVS_Tr

Tripping output logic setting of gap zero-sequence overvoltage protection

15. I_ROC_Gap_HVS_Tr

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Current setting of gap zero-sequence overcurrent protection

16. t_ROC_Gap_HVS_Tr

Time delay of gap zero-sequence overcurrent protection

17. TrpLog_ROC_Gap_HVS_Tr

Tripping output logic setting of gap zero-sequence overcurrent protection

18. V_Alm_ROV_LVS_Tr

Voltage setting of zero sequence overvoltage alarm at LV side

19. t_Alm_ROV_LVS_Tr

Delay of zero sequence overvoltage alarm at LV side.

20. En_VCE.ROC_Ctrl_ROC1_Tr

Stage 1 of zero-sequence overcurrent protection controlled by zero-sequence voltage element.

21. En_VCE.ROC_Ctrl_ROC2_Tr

Stage 2 of zero-sequence overcurrent protection controlled by zero-sequence voltage element.

22. En_Dir_Ctrl_ROC1_Tr

Stage 1 of zero-sequence overcurrent protection is controlled by direction element.

23. En_Dir_Ctrl_ROC2_Tr

Stage 2 of zero-sequence overcurrent protection is controlled by direction element.

24. En_Calc_3I0_ROC1_HVS

Stage 1 of zero-sequence overcurrent protection uses calculated zero-sequence current at HV

side of main transformer

25. En_Calc_3I0_ROC2_HVS

Stage 2 of zero-sequence overcurrent protection uses calculated zero-sequence current at HV

side of main transformer

26. En_Alm_ROV_LVS_Tr

Enable zero sequence overvoltage alarm at LV side.

27. En_BI_Ctrl_EF_Gap_HVS

Gap zero-sequence protection can be enabled via binary input externally.

28. Opt_CT_Calc_3I0_HVS

CT option of calculated zero-sequence current

0: bushing CT at HV side of main transformer

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1: winding CT at neutral point of main transformer

— Access Path

MainMenupSETTINGSpPROT SETTINGSpTR EF BAK PROT

6.4.6 Over-excitation Protection of Main Transformer

— Setting List

No. Symbol Range Step

1 k_OvExc1_Tr 1.00 – 2.00 0.01
2 t_OvExc1_Tr 0.00 – 3000.00 s 0.01s
3 TrpLog_OvExc1_Tr 0000 – FFFF 1
4 k_Alm_OvExc_Tr 1.00 – 2.00 0.01
5 t_Alm_OvExc_Tr 0.00 – 25.00 s 0.01s
6 k0_InvOvExc_Tr 1.00 – 2.00 0.01
7 t0_InvOvExc_Tr 1.00 – 3000.00 s 0.01s
8 k1_InvOvExc_Tr 1.00 – 2.00 0.01
9 t1_InvOvExc_Tr 1.00 – 3000.00 s 0.01s
10 k2_InvOvExc_Tr 1.00 – 2.00 0.01
11 t2_InvOvExc_Tr 1.00 – 3000.00 s 0.01s
12 k3_InvOvExc_Tr 1.00 – 2.00 0.01
13 t3_InvOvExc_Tr 1.00 – 3000.00 s 0.01s
14 k4_InvOvExc_Tr 1.00 – 2.00 0.01
15 t4_InvOvExc_Tr 1.00 – 3000.00 s 0.01s
16 k5_InvOvExc_Tr 1.00 – 2.00 0.01
17 t5_InvOvExc_Tr 1.00 – 3000.00 s 0.01s
18 k6_InvOvExc_Tr 1.00 – 2.00 0.01
19 t6_InvOvExc_Tr 1.00 – 3000.00 s 0.01s
20 k7_InvOvExc_Tr 1.00 – 2.00 0.01
21 t7_InvOvExc_Tr 1.00 – 3000.00 s 0.01s
22 TrpLog_InvOvExc_ 0000 – FFFF 1

— Setting Description

1. k_OvExc1_Tr

Setting of stage 1 of definite time over excitation protection of main transformer

U
B U gn
N = = = U ∗ / f ∗ = 1.3 or data provided by the factory
Bn f
f gn

2. t_OvExc1_Tr

Delay of stage 1 of definite time over excitation protection of main transformer

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3. TrpLog_OvExc1_Tr

Tripping output logic setting of stage 1 of definite time over excitation protection of main
transformer

The function of this protection is used for islanding, excitation shutting or programming, excitation
reducing etc

4. k_Alm_OvExc_Tr

Setting of over-excitation alarm of main transformer

Setting of alarm shall be lower than that of over excitation protection. 1.1 is recommended.

5. t_Alm_OvExc_Tr

Time delay of over-excitation alarm of main transformer

6. k0_InvOvExc_Tr

The upper limit of inverse-time over-excitation protection of main transformer (at point n0)

7. t0_InvOvExc_Tr

Time delay of upper limit of inverse-time over-excitation protection of main transformer (at point
n0)

8. k1_InvOvExc_Tr

The factor at point n1 of inverse-time over-excitation curve

Setting range of various inverse-time over-excitation coefficient s is 1.1~2.0. However the upper
limit of inverse-time over-excitation protection (No.6) shall be higher than the factor at point n1 of
inverse-time over-excitation curve, and the factor at point n1 of inverse-time over-excitation curve
shall be higher than that of point n2, etc.. Finally, the factor at point n6 of inverse-time
over-excitation curve (No.18) shall be higher than the lower limit of inverse-time over-excitation
protection (No.20).

The following relation should be met:

[k0_InvOvExc_Tr]>[k1_InvOvExc_Tr]>[k2_InvOvExc_Tr]>[k3_InvOvExc_Tr]>[k4_InvOvExc_Tr]>[
k5_InvOvExc_Tr]>[k6_InvOvExc_Tr]>[k7_InvOvExc_Tr]

9. t1_InvOvExc_Tr

Time delay at point n1 of inverse-time over-excitation curve

The range of time delay of various inverse-time over-excitation protection is 0s~6000s, i.e.,
0~50min. Time delay of upper limit of inverse-time over-excitation protection (No.7) shall be
shorter than time delay at point n1 of inverse-time over-excitation curve, and time delay of at point
n1 shall be shorter than that of point n2, etc.. Finally, time delay at point n6 of inverse-time
over-excitation curve (No.19) shall be shorter than that time delay of lower limit of inverse-time
over-excitation protection (No.21).

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The following relation should be met:

[t0_InvOvExc_Tr]<[t1_InvOvExc_Tr]<[t2_InvOvExc_Tr]<[t3_InvOvExc_Tr]<[t4_InvOvExc_Tr]<[t5
_InvOvExc_Tr]<[t6_InvOvExc_Tr]<[t7_InvOvExc_Tr]

10. k2_InvOvExc_Tr

The factor at point n2 of inverse-time over-excitation curve

11. t2_InvOvExc_Tr

Time delay at point n2 of inverse-time over-excitation curve

12. k3_InvOvExc_Tr

The factor at point n3 of inverse-time over-excitation curve

13. t3_InvOvExc_Tr

Time delay at point n3 of inverse-time over-excitation curve

14. k4_InvOvExc_Tr

The factor at point n4 of inverse-time over-excitation curve

15. t4_InvOvExc_Tr

Time delay at point n4 of inverse-time over-excitation curve

16. k5_InvOvExc_Tr

The factor at point n5 of inverse-time over-excitation curve

17. t5_InvOvExc_Tr

Time delay at point n5 of inverse-time over-excitation curve

18. k6_InvOvExc_Tr

The factor at point n6 of inverse-time over-excitation curve

19. t6_InvOvExc_Tr

Time delay at point n6 of inverse-time over-excitation curve

20. k7_InvOvExc_Tr

The lower limit of inverse-time over-excitation protection of main transformer (at point n7)

21. t7_InvOvExc_Tr

Time delay of lower limit of inverse-time over-excitation protection of main transformer (at point n7)

22. TrpLog_InvOvExc_Tr

Tripping output logic setting of inverse-time over-excitation protection of main transformer

— Access Path

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MainMenupSETTINGSpPROT SETTINGSpTR OVEXC PROT

6.4.7 Breaker Flashover Protection of Main Transformer

— Setting List

No. Symbol Range Step

1 I_NegOC_Flash1_CB_HVS 0.1~20.0 A 0.01 A
2 t_Flash11_CB_HVS 0.1~1.0 S 0.01 S
3 TrpLog_Flash11_CB_HVS 0000~FFFF 1
4 t_Flahs12_CB_HVS 0.1~1.0 S 0.01 S
5 TrpLog_Flash12_CB_HVS 0000~FFFF 1

— Setting Description

1. I_NegOC_Flash1_CB_HVS

Negative-sequence current setting of breaker flashover protection at HV side of main transformer

2. t_Flash11_CB_HVS

The first time delay of breaker flashover protection at HV side of main transformer

3. TrpLog_Flash11_CB_HVS

Tripping output logic setting of breaker flashover protection at HV side of main transformer (the
first time delay)

4. t_Flahs12_CB_HVS

The second time delay of breaker flashover protection at HV side of main transformer

5. TrpLog_Flash12_CB_HVS

Tripping output logic setting of breaker flashover protection at HV side of main transformer (the
second time delay)

— Access Path

MainMenupSETTINGSpPROT SETTINGSpTR HVS FLASH PROT

6.4.8 Breaker Failure Protection of Main Transformer

— Setting List

No. Symbol Range Step

1 I_BFP1_CB_HVS_Tr 0.1~50.0 A 0.01 A
2 I_ROC_BFP1_CB_HVS_Tr 0.1~50.0 A 0.01 A
3 I_NegOC1_BFP_CB_HVS_Tr 0.1~50.0 A 0.01 A
4 t_BFP11_CB_HVS_Tr 0.1~10 S 0.01 S
5 TrpLog_BFP11_CB_HVS_Tr 0000~FFFF 1
6 t_BFP12_CB_HVS_Tr 0.1~10 S 0.01 S

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7 TrpLog_BFP12_CB_HVS_Tr 0000~FFFF 1
Logic setting “1” - enable, “0” – disable
1 En_ROC_Ctrl_BFP_CB_HVS_Tr 0/1
2 En_NegOC_Ctrl_BFP_CB_HVS_Tr 0/1
3 En_ExtTrp_Ctrl_BFP_CB_HVS_Tr 0/1
4 En_CB_Ctrl_BFP_CB_HVS_Tr 0/1

— Setting Description

1. I_BFP1_CB_HVS_Tr

Phase current setting of breaker failure protection at HV side of main transformer

2. I_ROC_BFP1_CB_HVS_Tr

Zero-sequence current setting of breaker failure protection at HV side of main transformer

3. I_NegOC1_BFP_CB_HVS_Tr

Negative-sequence current setting of breaker failure protection at HV side of main transformer

4. t_BFP11_CB_HVS_Tr

The first time delay of breaker failure protection at HV side of main transformer

5. TrpLog_BFP11_CB_HVS_Tr

Tripping output logic setting of breaker failure protection at HV side of main transformer (the first
time delay)

6. t_BFP12_CB_HVS_Tr

The second time delay of breaker failure protection at HV side of main transformer

7. TrpLog_BFP12_CB_HVS_Tr

Tripping output logic setting of breaker failure protection at HV side of main transformer (the
second time delay)

8. En_ROC_Ctrl_BFP_CB_HVS_Tr

The logic setting used to enable zero-sequence current criterion of breaker failure protection at HV
side of main transformer

9. En_NegOC_Ctrl_BFP_CB_HVS_Tr

The logic setting used to enable negative-sequence current criterion of breaker failure protection
at HV side of main transformer

10. En_ExtTrp_Ctrl_BFP_CB_HVS_Tr

The logic setting of enable breaker failure protection at HV side of main transformer controlled by
external binary input from tripping contact

11. En_CB_Ctrl_BFP_CB_HVS_Tr

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The logic setting of enable breaker failure protection at HV side of main transformer controlled by
external binary input from CB open position

— Access Path

MainMenupSETTINGSpPROT SETTINGSpTR HVS BFP PROT

6.4.9 Differential Protection of Step-down Transformer

— Setting List

Step-down Transformer 1
No. Symbol Range Step
1 I_Pkp_PcntDiff_ST1 0.10~1.50 (Ie) 0.01 (Ie)
2 I_InstDiff_ST1 2.0~14.0 (Ie) 0.01 (Ie)
3 Slope1_PcntDiff_ST1 0.10~ 0.50 0.01
4 Slope2_PcntDiff_ST1 0.50 ~0.80 0.01
5 k_Harm_PcntDiff_ST1 0.10~ 0.35 0.01
6 TrpLog_Diff_ST1 0000~FFFF 1
Logic setting “1” - enable, “0” – disable
1 En_InstDiff_ST1 0/1
2 En_PcntDiff_ST1 0/1
3 Opt_Inrush_Ident_ST1 0/1
4 Opt_CTS_Blk_PcntDiff_ST1 0/1
Step-down Transformer 2
No. Symbol Range Step
1 I_Pkp_PcntDiff_ST2 0.10~1.50 (Ie) 0.01 (Ie)
2 I_InstDiff_ST2 2.0~14.0 (Ie) 0.01 (Ie)
3 Slope1_PcntDiff_ST2 0.10 ~0.50 0.01
4 Slope2_PcntDiff_ST2 0.50~0.80 0.01
5 k_Harm_PcntDiff_ST2 0.10~0.35 0.01
6 TrpLog_Diff_ST2 0000~FFFF 1
Logic setting “1” - enable, “0” – disable
1 En_InstDiff_ST2 0/1
2 En_PcntDiff_ST2 0/1
3 Opt_Inrush_Ident_ST2 0/1
4 Opt_CTS_Blk_PcntDiff_ST2 0/1

— Setting Description

12. I_Pkp_PcntDiff_ST1(2)

Setting of pickup value of percentage differential current of step-down transformer

13. I_InstDiff_ST1(2)

Setting of unrestrained instantaneous differential protection of step-down transformer

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14. Slope1_PcntDiff_ST1(2)

Restraint coefficient of the first slope of the differential characteristic curve

15. Slope2_PcntDiff_ST1(2)

Maximum value of restraint coefficient of the differential characteristic curve

16. k_Harm_PcntDiff_ST1(2)

Restraint coefficient of second harmonics

17. TrpLog_Diff_ST1(2)

Tripping output logic setting of differential protection of step-down transformer

18. En_InstDiff_ST1(2)

Enable unrestrained instantaneous differential protection of step-down transformer

19. En_PcntDiff_ST1(2)

Enable percentage differential protection of step-down transformer

20. Opt_Inrush_Ident_ST1(2)

Inrush current blocking mode

Select criterion of Inrush current detection

“0”, discrimination by harmonics

“1”, waveform distortion criterion is used

21. Opt_CTS_Blk_PcntDiff_ST1(2)

Enable differential protection blocked by CT circuit failure

“0”: Differential protection is not blocked by CT circuit failure

“1”: Differential protection is blocked by CT circuit failure

— Access Path

MainMenupSETTINGSpPROT SETTINGSp ST1 DIFF PROT

MainMenupSETTINGSpPROT SETTINGSp ST2 DIFF PROT

6.4.10 Backup Protection at HV Side of Step-down Transformer

— Setting List

Step-down Transformer 1
No. Symbol Range Step
1 V_NegOV_VCE_HVS_ST1 1.00~20.00 V 0.01 V
2 Vpp_UV_VCE_ HVS_ST1 10.00~100.00 V 0.01 V
3 I_OC1_HVS_ST1 0.10~50.00 A 0.01 A

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4 t_OC1_HVS_ST1 0.00~10.00 S 0.01 S

5 TrpLog_OC1_HVS_ST1 0000~FFFF 1
6 I_OC2_HVS_ST1 0.10~50.00 A 0.01 A
7 t_OC2_HVS_ST1 0.00~10.00 S 0.01 S
8 TrpLog_OC2_HVS_ST1 0000~FFFF 1
9 I_Alm_OvLd_HVS_ST1 0.10~50.00 A 0.01 A
10 t_Alm_OvLd_HVS_ST1 0.00~10.00 S 0.01 S
11 I_InitCool_OvLd_HVS_ST1 0.10~50.00 A 0.01 A
12 t_InitCool_OvLd_HVS_ST1 0.00~10.00 S 0.01 S
13 I_BO_OC_HVS_ST1 0.10~200.00 A 0.01 A
14 t_BO_OC_HVS_ST1 0.00~10.00 S 0.01 S
Logic setting “1” - enable, “0” – disable
1 En_VCE_Ctrl_OC1_HVS_ST1 0/1
2 En_VCE_Ctrl_OC2_HVS_ST1 0/1
3 En_Mem_Curr_HVS_ST1 0/1
4 Opt_VTS_Ctrl_OC_HVS_ST1 0/1
5 En_Alm_OvLd_HVS_ST1 0/1
6 En_InitCool_OvLd_HVS_ST1 0/1
7 En_BO_OC_HVS_ST1 0/1
8 En_LVSProt_Blk_OC1_HVS_ST1 0/1
Step-down Transformer 2
No. Symbol Range Step
1 V_NegOV_VCE_HVS_ST2 1.00~20.00 V 0.01 V
2 Vpp_UV_VCE_ HVS_ST2 10.00~100.00 V 0.01 V
3 I_OC1_HVS_ST2 0.10~50.00 A 0.01 A
4 t_OC1_HVS_ST2 0.00~10.00 S 0.01 S
5 TrpLog_OC1_HVS_ST2 0000~FFFF 1
6 I_OC2_HVS_ST2 0.10~50.00 A 0.01 A
7 t_OC2_HVS_ST2 0.00~10.00 S 0.01 S
8 TrpLog_OC2_HVS_ST2 0000~FFFF 1
9 I_Alm_OvLd_HVS_ST2 0.10~50.00 A 0.01 A
10 t_Alm_OvLd_HVS_ST2 0.00~10.00 S 0.01 S
11 I_InitCool_OvLd_HVS_ST2 0.10~50.00 A 0.01 A
12 t_InitCool_OvLd_HVS_ST2 0.00~10.00 S 0.01 S
13 I_BO_OC_HVS_ST2 0.10~200.00 A 0.01 A
14 t_BO_OC_HVS_ST2 0.00~10.00 S 0.01 S
Logic setting “1” - enable, “0” – disable
1 En_VCE_Ctrl_OC1_HVS_ST2 0/1
2 En_VCE_Ctrl_OC2_HVS_ST2 0/1
3 En_Mem_Curr_HVS_ST2 0/1
4 Opt_VTS_Ctrl_OC_HVS_ST2 0/1

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5 En_Alm_OvLd_HVS_ST2 0/1
6 En_InitCool_OvLd_HVS_ST2 0/1
7 En_BO_OC_HVS_ST2 0/1
8 En_LVSProt_Blk_OC1_HVS_ST2 0/1

— Setting Description

1. V_NegOV_VCE_HVS_ST1(2)

Negative sequence voltage setting of composite voltage control element at HV side of step-down
transformer

2. Vpp_UV_VCE_HVS_ST1(2)

Setting of phase-to-phase under voltage of composite voltage control element

3. I_OC1_HVS_ST1(2)

Setting of stage 1 of definite time overcurrent protection

4. t_OC1_HVS_ST1(2)

Time delay of stage 1 definite time overcurrent protection

5. TrpLog_OC1_HVS_ST1(2)

Tripping output logic setting of stage 1 of definite time overcurrent protection

6. I_OC2_HVS_ST1(2)

Setting of stage 2 of definitive time overcurrent protection

7. t_OC2_HVS_ST1(2)

Time delay of stage 2 of definite time overcurrent protection

8. TrpLog_OC2_HVS_ST1(2)

Tripping output logic setting of definite time overcurrent protection stage 2

9. I_Alm_OvLd_HVS_ST1(2)

Current setting of overload protection at HV side of step-down transformer

10. t_Alm_OvLd_HVS_ST1(2)

Time delay of overload protection at HV side of step-down transformer

11. I_InitCool_OvLd_HVS_ST1(2)

Current setting of overload to initiate cooling system at HV side of step-down transformer

12. t_InitCool_OvLd_HVS_ST1(2)

Time setting of overload to initiate cooling system at HV side of step-down transformer

13. I_BO_OC_HVS_ST1(2)

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Current setting of binary output of overcurrent element at HV side of step-down transformer

14. t_BO_OC_HVS_ST1(2)

Time setting of binary output of overcurrent element at HV side of step-down transformer

15. En_VCE_Ctrl_OC1_ HVS_ST1(2)

Logic setting of stage 1 of overcurrent protection controlled by voltage element

16. En_VCE_Ctrl_OC2_ HVS_ST1(2)

Logic setting of stage 2 of overcurrent protection controlled by voltage element

17. En_Mem_Curr_ HVS_ST1(2)

Logic setting of memory function of current

18. Opt_VTS_Ctrl_OC_HVS_ST1(2)

Protection performance during VT circuit failure

“1”: when VT circuit failure at one side is detected, voltage control element at the same side will be
disabled but overcurrent relay on the same side can still be controlled by voltage control elements
of other side if corresponding logic setting is set as “1”.

“0”: when VT circuit failure at one side is detected, the overcurrent relay will become an
overcurrent relay without voltage element control.

19. En_Alm_OvLd_HVS_ST1(2)

Enable alarm for overload protection at HV side of step-down transformer

20. En_InitCool_OvLd_HVS_ST1(2)

Enable overload to initiate cooling system at HV side of step-down transformer

21. En_BO_OC_HVS_ST1(2)

Enable binary output of overcurrent element at HV side of step-down transformer

22. En_LVSProt_Blk_OC1_HVS_ST1(2)

Enable stage 1 of overcurrent protection at HV side of step-down transformer controlled by branch

protection at LV side of main transformer

— Access Path

MainMenupSETTINGSpPROT SETTINGSpST1 HVS BAK PROT

MainMenupSETTINGSpPROT SETTINGSpST2 HVS BAK PROT

6.4.11 Backup Protection of Branch at LV Side of Step-down Transformer

— Setting List

Branch 1 (Step-down Transformer 1)

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No. Symbol Range Step

1 V_NegOV_VCE_Br1_ST1 1.00~20.00 V 0.01 V
2 Vpp_UV_VCE_Br1_ST1 2.00~100.00 V 0.01 V
3 I_OC1_Br1_ST1 0.10~100.00 A 0.01 A
4 t_OC1_Br1_ST1 0.00~10.00 S 0.01 S
5 TrpLog_OC1_Br1_ST1 0000~FFFF 1
6 I_OC2_Br1_ST1 0.10~100.00 A 0.01 A
7 t_OC2_Br1_ST1 0.00~10.00 S 0.01 S
8 TrpLog_OC2_Br1_ST1 0000~FFFF 1
9 I_ROC1_Br1_ST1 0.10~100.00 A 0.01 A
10 t_ROC1_Br1_ST1 0.00~10.00 S 0.01 S
11 TrpLog_ROC1_Br1_ST1 0000~FFFF 1
12 I_ROC2_Br1_ST1 0.10~100.00 A 0.01 A
13 t_ROC2_Br1_ST1 0.00~10.00 S 0.01 S
14 TrpLog_ROC2_Br1_ST1 0000~FFFF 1
Logic setting “1” - enable, “0” – disable
1 En_VCE_Ctrl_OC1_Br1_ST1 0/1
2 En_VCE_Ctrl_OC2_Br1_ST1 0/1
3 Opt_VTS_Ctrl_OC_Br1_ST1 0/1
Branch 2 (Step-down Transformer 1)
1 V_NegOV_VCE_Br2_ST1 1.00~20.00 V 0.01 V
2 Vpp_UV_VCE_Br2_ST1 2.00~100.00 V 0.01 V
3 I_OC1_Br2_ST1 0.10~100.00 A 0.01 A
4 t_OC1_Br2_ST1 0.00~10.00 S 0.01 S
5 TrpLog_OC1_Br2_ST1 0000~FFFF 1
6 I_OC2_Br2_ST1 0.10~100.00 A 0.01 A
7 t_OC2_Br2_ST1 0.00~10.00 S 0.01 S
8 TrpLog_OC2_Br2_ST1 0000~FFFF 1
9 I_ROC1_Br2_ST1 0.10~100.00 A 0.01 A
10 t_ROC1_Br2_ST1 0.00~10.00 S 0.01 S
11 TrpLog_ROC1_Br2_ST1 0000~FFFF 1
12 I_ROC2_Br2_ST1 0.10~100.00 A 0.01 A
13 t_ROC2_Br2_ST1 0.00~10.00 S 0.01 S
14 TrpLog_ROC2_Br2_ST1 0000~FFFF 1
Logic setting “1” - enable, “0” – disable
1 En_VCE_Ctrl_OC1_Br2_ST1 0/1
2 En_VCE_Ctrl_OC2_Br2_ST1 0/1
3 Opt_VTS_Ctrl_OC_Br2_ST1 0/1
Branch 1 (Step-down Transformer 2)
No. Symbol Range Step
1 V_NegOV_VCE_Br1_ST2 1.00~20.00 V 0.01 V

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2 Vpp_UV_VCE_Br1_ST2 2.00~100.00 V 0.01 V

3 I_OC1_Br1_ST2 0.10~100.00 A 0.01 A
4 t_OC1_Br1_ST2 0.00~10.00 S 0.01 S
5 TrpLog_OC1_Br1_ST2 0000~FFFF 1
6 I_OC2_Br1_ST2 0.10~100.00 A 0.01 A
7 t_OC2_Br1_ST2 0.00~10.00 S 0.01 S
8 TrpLog_OC2_Br1_ST2 0000~FFFF 1
9 I_ROC1_Br1_ST2 0.10~100.00 A 0.01 A
10 t_ROC1_Br1_ST2 0.00~10.00 S 0.01 S
11 TrpLog_ROC1_Br1_ST2 0000~FFFF 1
12 I_ROC2_Br1_ST2 0.10~100.00 A 0.01 A
13 t_ROC2_Br1_ST2 0.00~10.00 S 0.01 S
14 TrpLog_ROC2_Br1_ST2 0000~FFFF 1
Logic setting “1” - enable, “0” – disable
1 En_VCE_Ctrl_OC1_Br1_ST2 0/1
2 En_VCE_Ctrl_OC2_Br1_ST2 0/1
3 Opt_VTS_Ctrl_OC_Br1_ST2 0/1
Branch 2 (Step-down Transformer 2)
1 V_NegOV_VCE_Br2_ST2 1.00~20.00 V 0.01 V
2 Vpp_UV_VCE_Br2_ST2 2.00~100.00 V 0.01 V
3 I_OC1_Br2_ST2 0.10~100.00 A 0.01 A
4 t_OC1_Br2_ST2 0.00~10.00 S 0.01 S
5 TrpLog_OC1_Br2_ST2 0000~FFFF 1
6 I_OC2_Br2_ST2 0.10~100.00 A 0.01 A
7 t_OC2_Br2_ST2 0.00~10.00 S 0.01 S
8 TrpLog_OC2_Br2_ST2 0000~FFFF 1
9 I_ROC1_Br2_ST2 0.10~100.00 A 0.01 A
10 t_ROC1_Br2_ST2 0.00~10.00 S 0.01 S
11 TrpLog_ROC1_Br2_ST2 0000~FFFF 1
12 I_ROC2_Br2_ST2 0.10~100.00 A 0.01 A
13 t_ROC2_Br2_ST2 0.00~10.00 S 0.01 S
14 TrpLog_ROC2_Br2_ST2 0000~FFFF 1
Logic setting “1” - enable, “0” – disable
1 En_VCE_Ctrl_OC1_Br2_ST2 0/1
2 En_VCE_Ctrl_OC2_Br2_ST2 0/1
3 Opt_VTS_Ctrl_OC_Br2_ST2 0/1

— Setting Description

1. V_NegOV_VCE_Br1(2)_ST1(2)

Negative sequence voltage setting of composite voltage control element of branch 1 or branch 2 of
step-down transformer

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2. Vpp_UV_VCE_Br1(2)_ST1(2)

Setting of phase-to-phase under voltage of composite voltage control element

3. I_OC1_Br1(2)_ST1(2)

Setting of stage 1 of definite time overcurrent protection

4. t_OC1_Br1(2)_ST1(2)

Time delay of stage 1 of definite time overcurrent protection

5. TrpLog_OC1_Br1(2)_ST1(2)

Tripping output logic setting of stage 1 of definite time overcurrent protection

6. I_OC2_Br1(2)_ST1(2)

Setting of stage 2 of definitive time overcurrent protection

7. t_OC2_Br1(2)_ST1(2)

Time delay of stage 2 of definite time overcurrent protection

8. TrpLog_OC2_Br1(2)_ST1(2)

Tripping output logic setting of stage 2 of definite time overcurrent protection

9. I_ROC1_Br1(2)_ST1(2)

Setting of stage 1 of definitive time zero sequence overcurrent protection

10. t_ROC1_Br1(2)_ST1(2)

Time delay of stage 1 of definite time zero sequence overcurrent protection

11. TrpLog_ROC1_Br1(2)_ST1(2)

Tripping output logic setting of stage 1 of definite time zero sequence overcurrent protection

12. I_ROC2_Br1(2)_ST1(2)

Setting of stage 2 of definitive time zero sequence overcurrent protection

13. t_ROC2_Br1(2)_ST1(2)

Time delay of stage 2 of definite time zero sequence overcurrent protection

14. TrpLog_ROC2_Br1(2)_ST1(2)

Tripping output logic setting of stage 2 of definite time zero sequence overcurrent protection

15. En_VCE_Ctrl_OC1_ Br1(2)_ST1(2)

Logic setting of stage 1 of overcurrent protection controlled by voltage element

16. En_VCE_Ctrl_OC2_ Br1(2)_ST1(2)

Logic setting of stage 2 of overcurrent protection controlled by voltage element

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17. Opt_VTS_Ctrl_OC_Br1(2)_ST1(2)

Protection performance during VT circuit failure

“1”: when VT circuit failure at one side is detected, voltage control element at the same side will be
disabled but overcurrent relay on the same side can still be controlled by voltage control elements
of other side if corresponding logic setting is set as “1”.

“0”: when VT circuit failure at one side is detected, the overcurrent relay will become an
overcurrent relay without voltage element control.

— Access Path

MainMenupSETTINGSpPROT SETTINGSp ST1 BR1 BAK PROT

MainMenupSETTINGSpPROT SETTINGSp ST1 BR2 BAK PROT

MainMenupSETTINGSpPROT SETTINGSp ST2 BR1 BAK PROT

MainMenupSETTINGSpPROT SETTINGSp ST2 BR2 BAK PROT

6.4.12 Mechanical Protection

— Setting List

No. Symbol Range Step

1 t_MechRly1 0.00~6000.0 S 0.1S
2 TrpLog_MechRly1 0000~FFFF 1
3 t_MechRly2 0.00~6000.0 S 0.1S
4 TrpLog_MechRly2 0000~FFFF 1
5 t_MechRly3 0.00~6000.0 S 0.1S
6 TrpLog_MechRly3 0000~FFFF 1
7 t_MechRly4 0.00~6000.0 S 0.1S
8 TrpLog_MechRly4 0000~FFFF 1
Logic setting “1” - enable, “0” – disable
1 En_Supv_MechRly 0/1

— Setting Description

1. t_MechRly1

Time delay of output contact of external mechanical contact input1 repeater

2. TrpLog_MechRly1

Tripping output logic setting of output contact of mechanical contact input1

3. t_MechRly2

Time delay of output contact of external mechanical contact input1 repeater

4. TrpLog_MechRly2

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Tripping output logic setting of output contact of mechanical contact input2

5. t_MechRly3

Time delay of output contact of external mechanical contact input1 repeater

6. TrpLog_MechRly3

Tripping output logic setting of output contact of mechanical contact input3

7. t_MechRly4

Time delay of output contact of external mechanical contact input1 repeater

8. TrpLog_MechRly4

Tripping output logic setting of output contact of mechanical contact input4

9. En_Supv_MechRly

Logic setting to enable/disable the supervision function to mechanical relays

— Access Path

MainMenupSETTINGSpPROT SETTINGSpMECH RLY PROT

6.5 Calculated Parameters

The settings listed in the following tables calculated by the RCS-985BT itself automatically, they
need not to be set by user. The settings are calculated according to the system parameters that
user input, include primary rated currents, secondary rated currents, secondary rated voltages and
correction coefficients used in all kinds of differential protection relays. Listing of the calculated
settings is only for reference of setting check or commission.

6.5.1 Calculated Parameters of Primary Rated Current

— Setting List

No. Symbol Range

1 I1b_SnTr_CT_HVS_Tr 0-60000 A
2 I1b_SnTr_CT_LVS_Tr 0-60000 A
3 I1b_SnST_CT_HVS_ST1 0-60000 A
4 I1b_SnST_CT_Br1_ST1 0-60000 A
5 I1b_SnST_CT_Br2_ST1 0-60000 A
6 I1b_SnST_CT_HVS_ST2 0-60000 A
7 I1b_SnST_CT_Br1_ST2 0-60000 A
8 I1b_SnST_CT_Br2_ST2 0-60000 A

— Setting Description

1. I1b_SnTr_CT_HVS_Tr

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Primary rated current at HV side of main transformer

Sn
The equation is I b1n =
3U b1n

2. I1b_SnTr_CT_LVS_Tr

Primary rated current at LV side of main transformer.

3. I1b_SnST_CT_HVS_ST1

Primary rated current at HV side of step-down transformer 1.

4. I1b_SnST_CT_Br1_ST1

Primary rated current of branch 1 at LV side of step-down transformer 1.

5. I1b_SnST_CT_Br2_ST1

Primary rated current at branch 2 at LV side of step-down transformer 1.

6. I1b_SnST_CT_HVS_ST2

Primary rated current at HV side of step-down transformer 2.

7. I1b_SnST_CT_Br1_ST2

Primary rated current of branch 1 at LV side of step-down transformer 2.

8. I1b_SnST_CT_Br2_ST2

Primary rated current at branch 2 at LV side of step-down transformer 2.

— Access Path

MainMenupSETTINGSpCALC SETTINGSpPRI RATED CURR

6.5.2 Calculated Parameters of Secondary Rated Current

— Setting List

No. Symbol Range

1 I2b_SnTr_CT_HVS_Tr 0-600 A
2 I2b_SnTr_CT_LVS_Tr 0-600 A
3 I2b_SnTr_CT_ST1 0-600 A
4 I2b_SnTr_CT_ST2 0-600 A
5 I2b_SnTr_CT_Bak_HVS_Tr 0-600 A
6 I2b_SnST_CT_HVS_ST1 0-600 A
7 I2b_SnST_CT_Br1_ST1 0-600 A
8 I2b_SnST_CT_Br2_ST1 0-600 A
9 I2b_SnST_CT_HVS_ST2 0-600 A
10 I2b_SnST_CT_Br1_ST2 0-600 A

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11 I2b_SnST_CT_Br2_ST2 0-600 A

— Setting Description

1. I2b_SnTr_CT_HVS_Tr

Secondary rated current at HVS of main transformer

I b1n
The equation is I b 2 n =
nbLH

2. I2b_SnTr_CT_LVS_Tr

Secondary rated current at LVS of main transformer

3. I2b_SnTr_CT_ST1

Secondary rated current at HVS of step-down transformer1

4. I2b_SnTr_CT_ST2

Secondary rated current at HVS of step-down transformer2

5. I2b_SnTr_CT_Bak_HVS_Tr

Secondary rated current of backup CT at HVS of step-down transformer of main transformer

6. I2b_SnST_CT_HVS_ST1

Secondary rated current of CT at HV side of step-down transformer1

7. I2b_SnST_CT_Br1_ST1

Secondary rated current of branch 1 at LV side of step-down transformer1

8. I2b_SnST_CT_Br2_ST1

Secondary rated current of branch 2 at LV side of step-down transformer1

9. I2b_SnST_CT_HVS_ST2

Secondary rated current of CT at HV side of step-down transformer2

10. I2b_SnST_CT_Br1_ST2

Secondary rated current of branch 1 at LV side of step-down transformer2

11. I2b_SnST_CT_Br2_ST2

Secondary rated current of branch 2 at LV side of step-down transformer2

— Access Path

MainMenupSETTINGSpCALC SETTINGSp SEC RATED CURR

6.5.3 Calculated Parameters of Secondary Rated Voltage

— Setting List

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No. Symbol Range

1 U2b_VT_HVS_Tr 0-600 V
2 U2b_DeltVT_HVS_Tr 0-600 V
3 U2b_VT_Br1_ST1 0-600 V
4 U2b_VT_Br2_ST1 0-600 V
5 U2b_VT_Br1_ST2 0-600 V
6 U2b_VT_Br2_ST2 0-600 V

— Setting Description

1. V2b_VT_HVS_Tr

Secondary rated voltage at HV side of main transformer.

2. U2b_DeltVT _HVS_Tr

Secondary rated voltage of delta VT at HV side of main transformer.

3. U2b_VT_Br1_ST1

Secondary rated voltage of branch 1 at LV side of step-down transformer 1.

4. U2b_VT_Br1_ST2

Secondary rated voltage of branch 1 at LV side of step-down transformer 2.

5. U2b_VT_Br2_ST1

Secondary rated voltage at branch 2 at LV side of step-down transformer 1.

6. U2b_VT_Br2_ST2

Secondary rated voltage at branch 2 at LV side of step-down transformer 2.

— Access Path

MainMenupSETTINGSpCALC SETTINGSpSEC RATED VOLT

6.5.4 Calculated Parameters of Differential Coefficient

— Setting List

No. Symbol Range

1 k_TrHVS_Diff_Tr 0-60
2 k_TrLVS_Diff_Tr 0-60
3 k_ST1_Diff_Tr 0-60
4 k_ST2_Diff_Tr 0-60
5 k_HVS_Diff_ST1 0-60
6 k_Br1_Diff_ST1 0-60
7 k_Br2_Diff_ST1 0-60
8 k_HVS_Diff_ST2 0-60

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9 k_Br1_Diff_ST2 0-60
10 k_Br2_Diff_ST2 0-60
11 k_Calc_REF_HVS 0-60
12 k_NP_REF_HVS 0-60
13 k_HVS_WdgDiff 0-60
14 k_Wdg_WdgDiff 0-60

— Setting Description

1. k_TrHVS_Diff _Tr

Differential coefficient of HV side for differential protection of main transformer

2. k_TrLVS_Diff _Tr

Differential coefficient of LVS of main transformer for differential protection of main transformer, the
base side is LV side.

3. k_ST1_Diff_Tr

Differential coefficient of HV side of step-down transformer 1 for differential protection of main

transformer

4. k_ST2_Diff_Tr

Differential coefficient of HV side of step-down transformer 2 for differential protection of main

transformer

5. k_HVS_Diff_ST1

Differential coefficient of HV side for differential protection of step-down transformer 1

6. k_Br1_Diff_ST1

Differential coefficient of branch 1 at LV side for differential protection of step-down transformer 1

7. k_Br2_Diff_ST1

Differential coefficient of branch 2 at LV side for differential protection of step-down transformer 1

8. k_HVS_Diff_ST2

Differential coefficient of HV side for differential protection of step-down transformer 2

9. k_Br1_Diff_ST2

Differential coefficient of branch 1 at LV side for differential protection of step-down transformer 2

10. k_Br2_Diff_ST2

Differential coefficient of branch 2 at LV side for differential protection of step-down transformer 2

11. k_NP_REF_Tr

Differential coefficient of neutral point of main transformer for REF of main transformer

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12. k_Calc_REF_Tr

Differential coefficient of HV side of main transformer for REF of main transformer

13. k_HVS_WdgDiff

Differential coefficient of HV side for winding differential protection

14. k_Wdg_WdgDiff

Differential coefficient of winding side for winding differential protection

— Access Path

MainMenupSETTINGSpCALC SETTINGSpDIFF CORR COEF

6.5.5 Implicit Configuration Settings

The settings in the following list can not be seen on LCD of equipment and only be viewed and
configured on PC through RCSPC software in the submenu “CONFIG SETTINGS”. These settings
are usually configured in factory or configured by field commission engineer according to the
design drawing and project requirement.

1. Inner parameters of differential coefficient

No. Symbol Range

1 k2_TrHVS_Diff_Tr 0-60
2 k2_TrLVS_Diff_Tr 0-60
3 k2_ST1_Diff_Tr 0-60
4 k2_ST2_Diff_Tr 0-60
5 k2_HVS_Diff_ST1 0-60
6 k2_Br1_Diff_ST1 0-60
7 k2_Br2_Diff_ST1 0-60
8 k2_HVS_Diff_ST2 0-60
9 k2_Br1_Diff_ST2 0-60
10 k2_Br2_Diff_ST2 0-60
11 k2_Calc_REF_HVS 0-60
12 k2_NP_REF_HVS 0-60
13 k2_HVS_WdgDiff 0-60
14 k2_Wdg_WdgDiff 0-60

2. Inner parameters of secondary rated current

No. Symbol Range

1 I2b2_SnTr_CT_HVS_Tr 0-600 A
2 I2b2_SnTr_CT_LVS_Tr 0-600 A
3 I2b2_SnTr_CT_ST1 0-600 A
4 I2b2_SnTr_CT_ST2 0-600 A
5 I2b2_SnTr_CT_Bak_HVS_Tr 0-600 A

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6 I2b2_SnST_CT_HVS_ST1 0-600 A
7 I2b2_SnST_CT_Br1_ST1 0-600 A
8 I2b2_SnST_CT_Br2_ST1 0-600 A
9 I2b2_SnST_CT_HVS_ST2 0-600 A
10 I2b2_SnST_CT_Br1_ST2 0-600 A
11 I2b2_SnST_CT_Br2_ST2 0-600 A

Inner secondary rated currents and differential coefficients are used in differential protection. All
parameters have the same meaning with those of calculated secondary rated current and
differential coefficient.

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Chapter 7 Human Machine Interface

User can access the relay from the front panel of the device. Local communication with the relay is
possible using a computer (PC) with the RCSPC software via an RS232 port on the front panel.
Furthermore, remote communication is also possible switched-in substation automatic system via
a RS485 port.

This chapter describes human machine interface (HMI), menu tree and LCD display. At the same
time how to input settings using keypad is described in detail. Finally, this chapter introduces the
RCSPC software and wave analysis software.

7.1 User Interfaces

The settings and functions of the RCS-985BT can be accessed both from the front panel keypad
and LCD and via the front and rear communication ports. Information on each of these methods is
given in this section to describe how to start using the relay.

7.1.1 Front Panel

The front panel of the relay is shown in Figure 7.1-1. The human-machine interface consists of a
human-machine interface (HMI) module which allows a communication as simple as possible for
the user.

RCS-985 5
GENERATOR-TRANSFORMER UNIT
PROTECTION
2

HEALTHY

VT ALARM
GRP

CT ALARM

ALARM
ENT 3
ESC

1 TRIP

NARI RELAYS ELECTRIC CO., LD 6

Figure 7.1-1 Front panel of RCS-985BT

The front panel of the relay includes the following, as indicated in Figure 7.1-1:

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No. Brief Description

1 A 320×240 dots liquid crystal display (LCD)
2 The relay front panel features control pushbutton switches with LEDs that
facilitate local control. Factory default settings associate specific relay
functions with these 9 direct-action pushbuttons and LEDs e.g.
3 A 9-key keypad comprising 4 arrow keys (◄,►,▲and ▼), an plus key
(+), a minus key (-), a escape key ( ESC) and a active group setting key
(GRP)
4 A 9-pin female D-type front port for communication with a PC locally to
the relay (up to 15m distance) via an EIA(RS)232 serial data connection,
which providing internal signal monitoring and high speed local
downloading of software.
5 Name of protection
6 Name of manufacture

7.1.2 LCD
A 320×240 dots liquid crystal display (LCD) with LED backlight. The backlight can be switched on
automatically whenever the keypad is operated or operation or alarm issued. Backlight will be
turned off after a while.

7.1.2.1 Default Display

The front panel menu has a default display under normal state after powered-up. If there is no
keypad activity for the 5 minutes timeout period, the default will return again and the LCD backlight
will turn off. To provide more information, the default display a typical single-line scheme generator
system and relevant quantities in operation condition, as shown below.

2001-12-19 10:28:03
1
0.00A 0.00A DIMT: 0.00Ie
6
2
DIFC: 0.00In 7
3 0.00V DIT0: 0.00In 8
DIAT: 0.00Ie 9
4
DIBT: 0.00Ie 10

5 0.00A 0.00A F: 0.00 Hz 11

No. Description
1 Real clock
2 The current of HV side

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3 The voltage of HV side

4 Wiring connection of generator-transformer unit
5 The current at HV side of step-down transformer
6 Differential current of main transformer
7 Winding differential current of main transformer
8 Zero-sequence differential current of main transformer
9 Differential current of step-down transformer 1
10 Differential current of step-down transformer 2
11 Frequency

7.1.2.2 Fault Report

Whenever there is an un-eliminated fault record in the relay, the default display will be replaced by
fault report.

Figure 7.1-2 Fault display of RCS-985BT

7.1.2.3 Self-supervision Report

Whenever there is an un-eliminated internal failure record in the relay, the default display will be
replaced by alarm report.

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7.1.2.4 Binary Input Change Report

Whenever there is state change of any binary input, the default display will be replaced by change
report of binary input as shown as below.

7.1.3 Keypad
The keypad and keys on the front panel of the equipment provide convenience to the operator to
view a certain data or change the device’s setting.

The keypad contains nine keys, and each key has different function to the other one. Figure 7.1-3
shows the keypad and keys.

Figure 7.1-3 Keypad mounted on the front panel

No. Key Item Function

1 “▲”, “▼”, “◄”, “►” Move between selectable branches of the menu tree
2 “＋”, “－” Change parameters or settings
3 ENT Provide Confirm/Execute function
4 RST Reset signals
5 ESC Exit the present level in the menu tree

Note!

Any setting change operation should start with simply pressing “+”, “◄”, “▲” and “-” in
sequence, as a password. Without the operation, modifying settings is invalid.

Report delete operation should executed by pressing “+”, “-”, “+”, “-” and “ENT” in

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sequence after exiting the main menu.

7.1.4 LED Indications

There are five LED indicators, which can indicate the operation state of the device. Figure 7.1-4
shows the LED indicators on the front panel of the device.

HEALTHY

VT ALARM

CT ALARM

ALARM

TRIP

Figure 7.1-4 LED indicators

1. “HEALTHY” (Green)

The LED indicates that the relay is in correct working order, and should be on at all times. It will be
extinguished when some internal error in hardware or software have been detected by
self-diagnosing facilities, such as setting error, RAM or ROM error, power source failure, output
circuit failure and so on. The state of the LED “HEALTHY” is reflected by the watchdog contact at
the rear terminals of the relay. The LED “HEALTHY” cannot light again automatically even if the
failure is eliminated except that the relay is reset or powered up by manual.

2. “VT ALARM” (Yellow)

The LED “VT ALARM” indicates that the relay has found any failure of VT circuit.

3. “CT ALARM” (Yellow)

The LED “CT ALARM” indicates that the relay has found any failure of CT circuit.

4. “ALARM” (Yellow)

The LED “ALARM” indicates that the relay has registered an alarm. This may be triggered by one
of the following failures: defective pickup, failure of analog or digital input circuit, optical isolator
power loss and so on. The LED “ALARM” will constantly illuminate, and will extinguish, when the
alarms have been cleared.

5. “TRIP” (RED)

The LED “TRIP” will be lit up once the corresponding relays operate and remain lit even after the

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trip commands go off. It can be turned off by pressing the button “RESET” on the protection panel
to energized binary input [BI_RstTarg], or by remote resetting command.

7.2 Menu Structure

7.2.1 Menu Tree

In this part, the main layout of the menu which is shown on the LCD of the local human-machine
interface (HMI) will be described in detail.

Under normal condition, the default display is always on LCD. Press key “▲” to enter the main
menu of the device. If the current display is the latest report display or self-supervision report,
please do as same as above.
N A R I - R E L A Y S

VALUES CPU METERING TR METERING

REPORT CPU BI STATE ST METERING

MON METERING
PRINT
MON BI STATE
SETTINGS
PHASE ANGLE
CLOCK
VERSION
DEBUG

Figure 7.2-1 View diagram of menu

The default display can be replaced by the menu when press“▲” or “ESC”.

The menu of this relay is arranged as a tree-shaped cascade structure. See Figure 7.2-2. The
menu can be browsed using the keypad.

Starting at the default display, to enter into main menu, press “▲”.

To select the required item, use the “▲” and “▼” keys.

To enter the lower level menu, select the required item and press “ENT”.

To return to the upper level menu, press “ESC”.

The menu can be browsed using the four arrow keys, following the structure shown in Figure 7.2-1.
Thus, starting at the default display the “▲” key will display the first column heading. To select the
required column heading use the “▲”and “▼” keys. To return to the default display, press the clear
key “ESC” from any of the column headings.

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MAIN MENU

VALUES REPORT SETTINGS

CPU METERING TRP REPORT EQUIP SETTINGS

ALM REPORT SYS SETTINGS
TR METERING
BI CHG REPORT
PROT CONFIG
TR METERING
PRINT TR SYS SETTINGS
DIFF CURR
ST1 SYS SETTINGS
TR CURR SETTINGS
ST2 SYS SETTINGS
ALL SIDES VOLT
ACTIVE SETTINGS
PROT SETTINGS
ST METERING EQUIP SETTINGS
SYS SETTINGS TR DIFF PROT
ST1 DIFF CURR
PROT SETTINGS TR HVS REF PROT
ST1 METERING
CALC SETTINGS TR WDG DIFF PROT
ST2 DIFF CURR
TRIP LOGIC TR PPF BAK PROT
ST2 METERING
MODIFIED SETTINGS TR EF BAK PROT
CPU BI STATE OTHER GRP SETTINGS TR OVEXC PROT
TR HVS FLASH PROT
TR PROT EBI TRIP RECORD
TR HVS BFP PROT
ST PROT EBI
TRIP REPORT ST1 DIFF PROT
MECH RLY EBI
TR DIFF WAVE ST1 HVS BAK PROT
AUX BI
TR REF&WD WAVE ST1 BR1 BAK PROT
PROT FD
TR CURR WAVE ST1 BR2 BAK PROT
PS SUPERV BI
TR HVS WAVE ST2 DIFF PROT
MON METERING TR LVS WAVE ST2 HVS BAK PROT
ST1 CURR WAVE ST2 BR1 BAK PROT
TR METERING
ST2 CURR WAVE ST2 BR2 BAK PROT
TR METERING ST VOLT WAVE MECH RLY PROT
DIFF CURR
ALARM REPORT SETTINGS COPY
TR CURR
BI CHG REPORT CALC SETTINGS
ALL SIDES VOLT
PRESENT WAVE PRI RATED CURR
ST METERING
SEC RATED CURR
TRIGGER
ST1 DIFF CURR SEC RATED VOLT
BI STATE
ST1 METERING DIFF CORR COEF
PHASE ANGLE
ST2 DIFF CURR
TR DIFF WAVE CLOCK
ST2 METERING
TR REF&WD WAVE VERSION
MON BI STATE TR CURR WAVE DEBUG
TR HVS WAVE
TR PROT EBI COMM STATUS
TR LVS WAVE
ST PROT EBI MEMORY IMAGE
ST1 CURR WAVE
MECH RLY EBI
ST2 CURR WAVE
AUX BI
ST VOLT WAVE
PROT FD
PS SUPERV BI

PHASE ANGLE

TR PHASE ANGLE
ST1 PHASE ANGLE
ST2 PHASE ANGLE

Figure 7.2-2 Tree diagram of total command menu

The above figure shows the menu tree structure of this equipment.

7.2.2 Password Protection

The menu structure contains two levels of access. The level of access is enabled determines what
users can do by entry of password. The levels of access are summarized in the Table 7.2-1.

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The password is 4 digits. The factory default passwords is sequent pressing of the keys “+”, “◄”,
“▲”, “-” and “ENT”.

Table 7.2-1 Password level

Access level Operations enabled

Level 0: No password required Read access to all settings, alarms, event records and fault
records
Level 1: Password required All settings modified

7.3 Operation Instruction

The following contents are to tell user how to make use of each submenu in detail.

7.3.1 View CPU and MON Metering Values

Metering data consists of AC sampled data and phase angle in the submenu VALUES. Take
viewing data relevant to differential protection of CPU metering as an example. User can view data
of MON in the same way by entering “MON METERING” submenu.

Navigate the menu through the following path and you will see the interface of LCD as shown in
Figure 7.3-1.

Main menu->VALUES->CPU METERING->TR METERING->DIFF CURR

Figure 7.3-1 LCD display of metering data

A scroll bar appears on the right means there are more rows needed to be displayed. Please press
key “▼” to see the next page and press key “ESC” to exit to the upper level submenu.

7.3.2 View Binary Inputs in CPU and MON

The status of binary input comprises enabling binary inputs and other binary inputs of auxiliary
contacts.

For instance, navigate the menu through the following path and you will see the interface of LCD

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to see binary inputs related to generator’s protection sampled by CPU.

Main menu->VALUES->CPU BI STATE->TR PROT EBI

Figure 7.3-2 LCD display of status of binary inputs

Press key “ESC” to exit to the submenu.

7.3.3 View Phase Angle

Entering into “PHASE ANGLE” submenu, the calculated angles between sampled voltages or
between sampled voltages and currents by CPU system will be displayed on LCD as shown below,
which can be used to check the correctness of secondary circuit wiring.

The angles displayed is that the former value leading to the later one, which varies from
-180~+180, as shown as figure below for example.

TR PHASE ANGLE
o
φi_HVS1_&_LVS_Tr: 000 000 000
o
φi_HVS2_&_LVS_Tr: 000 000 000
o
φi_ST1_&_LVS_Tr: 000 000 000
o
φi_ST2_&_LVS_Tr: 000 000 000
o
φipp_HVS1_Tr: 000 000 000
o
φipp_HVS2_Tr: 000 000 000
o
φipp_Bak_HVS_Tr: 000 000 000
o
φipp_LVS_Tr: 000 000 000

Figure 7.3-3 Phase angle displayed on LCD

Push “▼” key to show the other information.

Push “ESC” key to return to upper level menu.

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7.3.4 View Report

7.3.4.1 REPORTÆTRIP REPORT

Scrolling the cursor to this submenu and press “ENT” key, the LCD will display the latest trip report
if exist; otherwise a clew of “NO TRIP REPORT” will appear. If there are several trip reports stored
in memory, user can look up historical record one by one by pushing “▲” key.

RCS-985BT can store up to 32 latest trip reports. When the available space is exhausted, the
oldest report is automatically overwritten by the new one.

Push either “ENT” or “ESC” key to return to upper level menu.

7.3.4.2 REPORTÆALARM REPORT

Scrolling the cursor to this submenu and press “ENT” key, the LCD will display the latest alarm
report if exist, otherwise a clew of “NO ALARM REPORT” will appear. If there are several alarm
reports stored in memory, user can look up historical record one by one by pushing “▲” key.

RCS-985BT can store up to 32 latest alarm reports. When the available space is exhausted, the
oldest report is automatically overwritten by the new one.

Push either “ENT” or “ESC” key to revert to upper level menu.

7.3.4.3 REPORTÆBI CHG REPORT

Scrolling the cursor to this submenu and press “ENT” key, the LCD will display the last BI CHG
report if exist, otherwise a clew of “NO BI CHG REPORT” will appear. If there are several BI CHG
reports stored in memory, user can look up historical record one by one by pushing “▲” key.

RCS-985BT can store up to 32 latest signaling reports. When the available space is exhausted,
the oldest report is automatically overwritten by the new one

Push either “ENT” or “ESC” key to return to upper level menu.

7.3.5 Delete Records

If you want to delete the content of fault records or event records, you can follow the operating
steps. Note you cannot select which kind of records or which one record to be deleted but delete
all records.

Operating steps:

Press key “▲” to enter the main menu at first.

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Figure 7.3-4 LCD display of deleting report step 1

Press keys “+”, “-”, “+”, “-”, “ENT” in sequence in the main menu to make LCD display Figure 7.3-5.

Confirm to clear all reports?

“ENT” to confirm, “ESC”to cancel.

Figure 7.3-5 LCD display of deleting report step 2

Press key “ENT” to delete all records or press key “ESC” to exit to main menu. If key “ENT” is
pressed, LCD will display Figure 7.3-6 when equipment is deleting all records. If key “ESC” is
pressed, Figure 7.3-4 will be displayed. LCD will automatically return to Figure 7.3-4 in 3 seconds
without pressing any key.

Figure 7.3-6 LCD display of deleting report step 3

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7.3.6 Print Records

7.3.6.1 PRINTÆTRIP REPORT

Used for printing of trip report of protection. User can select the report that he wants to print by
pushing “▲” and “▼” keys to select the SOE number.

7.3.6.2 PRINTÆALARM REPORT

Used for printing of alarm. User can select the report that he wants to print by pushing “▲” and “▼”
keys.

7.3.6.3 PRINTÆBI CHG REPORT

Used for printing of signaling report. User can select the report that he wants to print by pushing
“▲” and “▼” keys.

7.3.6.4 PRINTÆPRESENT VALUES

Used for printing of present values of relay, including sampled binary inputs, analog quantities and
so on. If you want to see the normal recording waveform, please follow the operating steps.

Operating steps:

First, please go in to the main menu by pressing key “▲”.

Press key “▲” or “▼” to select “PRINT” item by scrolling the cursor upward or downward and then
press the “ENT” to the lower level submenu.

Then press key “▲” or “▼”to select “PRESENT WAVE” by scrolling the cursor upward or
downward. Press key “ENT” to enter the lower level submenu.

Press “TRIGGER” submenu to start recording. The equipment will record 5-cycle waveform after
pressing the key.

Please select the other items in the submenu “PRESENT WAVE” by scrolling cursor to print the
waveform.

7.3.7 Modify Settings

7.3.7.1 SETTINGSÆEQUIP SETTINGS

To change one of the equipment settings, first navigate the “SETTING” menu to display the
relevant cell. Press “ENT” to enter the submenu, and then proceed to “EQUIP SETTINGS”
submenu. Keys “▲” and “▼” are used to select which kind of the settings to be modified by
scrolling the cursor upward or downward. Press key “◄” or “►” to move the cursor to the digit to
be modified. Press key “+” and “–” to modify data. Press key “ESC” to return back without
modification. Pressing key “ENT” the LCD will prompt to input confirm password, then enter
password mentioned in section 7.2.2 and quit to default display by pressing “ESC” key. After a
period of extinguishing of the “HEALTHY” LED and blocking of relay itself, RCS-985BT is ready for
new operation to fault according to new settings, the modification is completed. The following
figure shows the path to access this submenu.

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7.3.7.2 SETTINGSÆPROT SETTINGS

To change the value of a setting, first navigate the menu to “SETTING” then corresponding
submenu to display the relevant cell. Please locate the setting you want to change after entering
the right submenu by operating the keypad as described before. Then go on to operate as
following steps.

Press key “◄” or “►” to move the cursor to the digit to be modified. Pressing key “+” and “–” to
change the digit. Press key “+” once to add 1 to the digit and press key “–” once to subtract 1 from
the digit.

Press key “ESC” to cancel the modification and return to upper level submenu.

Press key “ENT” to confirm the modification and the LCD will prompt you to input confirm code.

Figure 7.3-7 LCD display of inputting password

Press keys “+”, “◄”, “▲” and “–” in sequence to complete the modification. If the password input is
wrong, prompt for password will appear again. If no operation in 3 seconds, LCD will return to last
display.

If the password inputted is right, then equipment will check setting and Figure 7.3-8 will be
displayed temporarily. If there is no error in checking setting, Equipment will modify setting with
Figure 7.3-9 displayed temporarily. Then LCD will return to upper level submenu automatically.

Checking settings...

Figure 7.3-8 LCD display of equipment checking setting

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Figure 7.3-9 LCD display of equipment modifying setting

If errors in settings are detected, the LCD will display wrong setting warning for 3 s.

Figure 7.3-10 LCD display of wrong setting warning

Then LCD will display the setting list for the operator to modify the wrong setting. The cursor will
stay at the first wrong setting needed to be modified.

Note!

If the group number or protection system parameter is changed, all protection settings will
be invalid and have to be configured again.

Attentions should be paid that before modifying the protection settings, the active group
number in “EQUIP SETTINGS” should modified firstly, otherwise what is modified will be
applied to current active group.

7.3.8 Copy Settings

The relay stores 2 setting groups from No.0 through No.1. Only present setting group is active, the
others are provided for different operating conditions. The equipment settings are shared for the
two setting groups, but the protection settings are independent. Generally the equipment is
delivered with default settings stored in active setting group “0”. The contents of other setting
groups may be invalid. Therefore after application-specific settings for group No.0 have been
ready, it is necessary to copy settings of group No.0 to No. 1 setting groups, and make some

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modification afterwards when necessary, so as to avoid entering all settings one by one. Please
copy settings as following steps.

Press key “▲” to enter the main menu at first.

Figure 7.3-11 LCD display step 1 of copying setting

Move cursor to “SETTINGS” item and press key “ENT” or key“►” to enter submenu.

VALUES

REPORT
EQUIP SETTINGS
PRINT
SYS SETTINGS
SETTINGS
PROT SETTINGS
CLOCK SETTINGS COPY
VERSION CALC SETTINGS
DEBUG

Figure 7.3-12 LCD display step 2 of copying setting

Move cursor to “SETTINGS COPY” item and press “ENT” to display following interface.

Figure 7.3-13 LCD display step 3 of copying setting

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Press key “+” and “–” to change digit where the cursor stays. Pressing key “+” once will add 1 to
the digit and pressing key “–” once will subtract 1 from the digit. (For example: input 01)

Press “ENT” the LCD will prompt to input confirm code. Please see the figure below.

Figure 7.3-14 Password input interface

Please press keys “+”, “◄”, “▲” and “–” in sequence, and then the equipment will copy setting and
display following interface.

Figure 7.3-15 LCD display of equipment copying setting

Then the contents of setting group 0 will be totally copied to setting group 1 and present active
setting group will be switched to Group1.

Note!

Press “ENT” to confirm, then settings group 0 will be totally copied to settings group 1 and
present active group will be switched to group 1.

7.3.9 Clock Set

Please set the equipment clock as following steps.

Navigate the menu: Main menu->CLOCK

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After you press key “ENT”, the following will be displayed on the LCD.

Figure 7.3-16 LCD display of device clock

2007 – 02 – 05: shows the date February 5th 2007.

09: 08: 39: shows the time 09:08:39

Press keys “▲”, “▼”, “◄” and “►” to select the digit to be modified. Press key “+” and “–” to modify
data. Pressing key “+” once will add 1 to the digit and pressing key “–” once will subtract 1 from the
digit.

Press key “ESC” to return to main menu without modification.

Press key “ENT” to confirm the modification and return to the main menu.

7.3.10 Check Version

The equipment program has following parts. One is CPU module program, one is MON module
program, and another is HMI module program. There are totally independent.

Navigate the menu:

Main menu->VERSION

After you press key “ENT”, the follow will be displayed on the LCD.

VERSION

CPUBrd: RCS-985BT3Y 3.02 7882C6BF

2009-9-4 15:54

MONBrd: RCS-985BT3Y 3.02 901FEA33

2009-8-7 8:18

HMI: RCS-985BT3Y 3.02 5AFB

2009-9-4 14:25 T - 090519

SUBQ_ID: 00056151

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Figure 7.3-17 LCD display of software information

CPUBrd/MONBrd/HMI: shows CPU/MON/HMI module program information.

RCS-985BT3Y: shows the program name of CPU/MON/HMI

3.02: shows the software version number of CPU/MON/HMI.

7882C6BF: shows the CRC (check code) of CPU module program.

901FEA33: shows the CRC (check code) of MON module program.

5AFB: shows the CRC (check code) of HMI module program.

2009-9-4 15:54: shows that CPU software creating time is 15:54 Sept. 4th 2009.

2009-8-7 08:18: shows that MON software creating time is 10:20 Aug. 7th 2009.

2009-9-4 14:25: shows that HMI software creating time is 08:15 Sept. 4th 2009.

T-090519: shows the project number.

SUBQ_ID: 00056151: shows management sequential number of the software

Note!

What Figure 7.3-17 shows is just an example to introduce the meaning of VERSION, the
actual program VERSION is application-specific.

Press key “ESC” to return to upper level submenu.

7.3.11 DEBUG Menu

1. COMM STATUS

This submenu is used to monitor communication condition of the equipment with external system.
Display of this submenu is as follows:

Figure 7.3-18 Display of communication status

Columns 485A and 485B display communication condition of RS-485 port1 and RS-485 port2
respectively. If communication condition is normal, “Y” will flash in the related position. If there is

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flashing “N” in the position, it mean there are some problems. Please check the communication.

Table 7.3-1 Items of DEBUG menu

Item status Description

Communication circuit is open or no data is sent from
Received Data N
external system.
Valid Frame N Baud rate or protocol is wrong.
Valid Address N Communication address is wrong.
Sent Data N There is problem in the sent message.

“Received Data” means the equipment has received data from external system. If “N” flashes, it
means the circuit is open or no data is sent from external system.

“Valid Frame” means the equipment has received complete frame from external system. If “N”
flashes, it means Configuration of the baud rate or protocol is wrong.

“Valid Address” means the equipment has received related message from external system. If “N”
flashes, it means Configuration of the address is wrong.

“Sent Data” means the equipment has sent data to external system. If “N” flashes, it means there
is problem with the message.

Communication condition is normal if “Y” of all items flashes.

2. MEMPRY DEBUG

The LCD displays real time value in memory of CPU, DSP1 and DSP2. These data are used
mainly for program debugging.

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Chapter 8 Communication

8.1 General Description

This section outlines the remote data communication interfaces of the RCS-985BT relay. The relay
can supports IEC60870-5-103 and Modbus protocols.

The two rear EIA RS-485 standardized interfaces are isolated and are suitable for permanent
connection whichever protocol is selected. The advantage of this type of connection is that up to
32 relays can be “daisy chained” together using a simple twisted pair electrical connection.

It should be noted that the descriptions contained within this section do not aim to fully detail the
protocol itself. The relevant documentation for the protocol should be referred to for this
information. This section serves to describe the specific implementation of the protocol in the relay.

8.2 Rear Communication Port Information

8.2.1 RS-485 Interface

This relay provides two rear RS-485 communication ports, and each port has three terminals (A, B
and SHLD) in the 12-terminal screw connector located on the back of the relay. SHLD terminal is
ground terminal for the earth shield of the communication cable. The rear ports provide RS-485
serial data communication and are intended for use with a permanently wired connection to a
remote control center.

The protocol provided by the relay is indicated in the relay submenu in the “EQUIP SETTINGS”
column. Using the keypad and LCD, set the parameter [Protocol] to select the corresponding
protocol.

8.2.1.1 EIA RS-485 Standardized Bus

The EIA RS-485 two-wire connection provides a half-duplex fully isolated serial connection to the
product. The connection is polarized and whilst the product’s connection diagrams indicate the
polarization of the connection terminals it should be borne in mind that there is no agreed
definition of which terminal is which. If the master is unable to communicate with the product, and
the communication parameters match, then it is possible that the two-wire connection is reversed.

8.2.1.2 Bus Termination

The EIA RS-485 bus must have 120Ω (Ohm) ½ Watt terminating resistors fitted at either end
across the signal wires (see Figure 8.2-1). Some devices may be able to provide the bus
terminating resistors by different connection or configuration arrangements, in which case
separate external components will not be required. However, this product does not provide such a
facility, so if it is located at the bus terminus then an external termination resistor will be required.

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EIA RS-485

Figure 8.2-1 EIA RS-485 bus connection arrangements

8.2.1.3 Bus Connections & Topologies

The EIA RS-485 standard requires that each device is directly connected to the physical cable that
is the communications bus. Stubs and tees are expressly forbidden, such as star topologies. Loop
bus topologies are not part of the EIA RS-485 standard and are forbidden by it also.

Two-core screened cable is recommended. The specification of the cable will be dependent on the
application, although a multi-strand 0.5mm2 per core is normally adequate. Total cable length must
not exceed 500m. The screen must be continuous and connected to ground at one end, normally
at the master connection point; it is important to avoid circulating currents, especially when the
cable runs between buildings, for both safety and noise reasons.

This product does not provide a signal ground connection. If a signal ground connection is present
in the bus cable then it must be ignored, although it must have continuity for the benefit of other
devices connected to the bus. At no stage must the signal ground be connected to the cables
screen or to the product’s chassis. This is for both safety and noise reasons.

8.2.1.4 Biasing

It may also be necessary to bias the signal wires to prevent jabber. Jabber occurs when the signal
level has an indeterminate state because the bus is not being actively driven. This can occur when
all the slaves are in receive mode and the master is slow to turn from receive mode to transmit
mode. This may be because the master purposefully waits in receive mode, or even in a high
impedance state, until it has something to transmit. Jabber causes the receiving device(s) to miss
the first bits of the first character in the packet, which results in the slave rejecting the message
and consequentially not responding. Symptoms of these are poor response times (due to retries),
increasing message error counters, erratic communications, and even a complete failure to
communicate.

Biasing requires that the signal lines be weakly pulled to a defined voltage level of about 1V. There
should only be one bias point on the bus, which is best situated at the master connection point.
The DC source used for the bias must be clean; otherwise noise will be injected. Note that some
devices may (optionally) be able to provide the bus bias, in which case external components will
not be required.

Note!

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It is extremely important that the 120Ω termination resistors are fitted. Failure to do so will
result in an excessive bias voltage that may damage the devices connected to the bus.

As the field voltage is much higher than that required, NARI-RELAYS cannot assume
responsibility for any damage that may occur to a device connected to the network as a
result of incorrect application of this voltage.

Ensure that the field voltage is not being used for other purposes (i.e. powering logic inputs)
as this may cause noise to be passed to the communication network.

8.2.2 IEC60870-5-103 Communication

The IEC specification IEC60870-5-103: Telecontrol Equipment and Systems, Part 5: Transmission
Protocols Section 103 defines the use of standards IEC60870-5-1 to IEC60870-5-5 to perform
communication with protection equipment. The standard configuration for the IEC60870-5-103
protocol is to use a twisted pair EIA RS-485 connection over distances up to 500m. It also supports
to use an Ethernet connection. The relay operates as a slave in the system, responding to
commands from a master station.

To use the rear port with IEC60870-5-103 communication, the relay’s relevant settings must be
configured. To do this use the keypad and LCD user interface. In the submenu “EQUIP
SETTINGS”, set the parameter [Protocol] as “0001”, then set the baud rate of each rear port.

8.2.3 Modbus Communication

Standard: Modicon Modbus Protocol Reference Guide, PI-MBUS-300 Rev.E is also supported by
the equipment through EIA RS-485 interface.

To use the rear port with Modbus communication, the relay’s relevant settings must be configured.
To do this use the keypad and LCD user interface. In the submenu “EQUIP SETTINGS”, set the
parameter [Protocol] as “0008”, then set the baud rate of each rear port.

8.3 IEC60870-5-103 Protocol over Serial Port

The IEC60870-5-103 interface over serial port is a master/slave interface with the relay as the
slave device. It is properly developed by NARI-RELAYS.

The relay conforms to compatibility level 3.

The following IEC60870-5-103 facilities are supported by this interface:

z Initialization (reset)

z Time synchronization

z Event record extraction

z General interrogation

z Disturbance records

z General Commands

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8.3.1 Physical Connection and Link Layer

Physical Layer Setup: RS-485, 1 start bit, 8 data bits, even parity, 1 stop bit.

Two EIA RS-485 standardized ports are available for IEC60870-5-103 in this relay. The
transmission speed is optional: 4800 bit/s, 9600 bit/s, 19200 bit/s or 38400 bit/s.

The link layer strictly abides by the rules defined in the IEC60870-5-103.

8.3.2 Initialization
Whenever the relay has been powered up, or if the communication parameters have been
changed, a reset command is required to initialize the communications. The relay will respond to
either of the two reset commands (Reset CU or Reset FCB), the difference is that the Reset CU
will clear any unsent messages in the relay’s transmit buffer.

The relay will respond to the reset command with an identification message ASDU 5, the COT
(Cause Of Transmission) of this response will be either Reset CU or Reset FCB depending on the
nature of the reset command.

In addition to the above identification message, if the relay has been powered up it will also
produce a power up event.

8.3.3 Time Synchronization

The relay time and date can be set using the time synchronization feature of the IEC60870-5-103
protocol. The relay will correct for the transmission delay as specified in IEC60870-5-103. If the
time synchronization message is sent as a send/confirm message then the relay will respond with
a confirmation. Whether the time-synchronization message is sent as a send confirmation or a
broadcast (send/no reply) message, a time synchronization Class 1 event will be
generated/produced.

If the relay clock is synchronized using the IRIG-B input then it will not be possible to set the relay
time using the IEC60870-5-103 interface.

8.3.4 Setting
Settings are transferred via Generic Service. If the setting [En_Remote_Cfg] in the submenu
“EQUIP SETTINGS” is set as 0, to modify settings remotely will not be allowed. Moreover, “EQUIP
SETTINGS” & “SYSTEM SETTINS” are not allowed to be modified remotely whether the setting
[En_Remote_Cfg] is set as “1” or “0”.

8.3.5 Spontaneous Events

Events are categorized using the following information:

z Type identification (TYP)

z Function type (FUN)

z Information number (INF)

The following tables contain a complete listing of all events produced by the relay.

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8.3.5.1 Trip Reports

Trip reports are sent by ASDU2 (time-tagged message).

FUN INF Event FUN INF Event

231 39 Op_OC1_Tr 229 73 Op_OC1_HVS_ST2
231 40 Op_OC2_Tr 229 74 Op_OC2_HVS_ST2
227 241 Op_ROC11_Tr 231 51 Op_OC1_Br1_ST2
227 242 Op_ROC12_Tr 231 52 Op_OC2_Br1_ST2
227 243 Op_ROC21_Tr 231 53 Op_OC1_Br2_ST2
227 244 Op_ROC22_Tr 231 54 Op_OC2_Br2_ST2
231 205 Op_ROV_Tr 229 75 Op_InstDiff_ST1
235 245 Op_ROC_Gap_Tr 229 76 Op_PcntDiff_ST1
227 234 Op_InstDiff_Tr 229 77 Op_OC1_HVS_ST1
227 235 Op_PcntDiff_Tr 229 78 Op_OC2_HVS_ST1
227 236 Op_DPFC_Diff_Tr 231 55 Op_OC1_Br1_ST1
231 201 Op_InstREF_Tr 231 56 Op_OC2_Br1_ST1
231 202 Op_PcntREF_Tr 231 57 Op_OC1_Br2_ST1
231 37 Op_Z1_Tr 231 58 Op_OC2_Br2_ST1
231 38 Op_Z2_Tr 231 41 Op_ROC1_Br1_ST1
235 246 Op_BFP11_CB1_HVS_Tr 231 42 Op_ROC2_Br1_ST1
235 247 Op_BFP12_CB1_HVS_Tr 231 43 Op_ROC1_Br2_ST1
235 248 Op_BFP11_CB2_HVS_Tr 231 44 Op_ROC2_Br2_ST1
235 249 Op_BFP12_CB2_HVS_Tr 231 45 Op_ROC1_Br1_ST2
231 108 Op_MechRly1 231 46 Op_ROC2_Br1_ST2
231 109 Op_MechRly2 231 47 Op_ROC1_Br2_ST2
231 153 Op_MechRly3 231 48 Op_ROC2_Br2_ST2
231 154 Op_MechRly4 231 91 TrpOutp8
231 49 Op_OvExc_Tr 231 92 TrpOutp9
231 50 Op_InvOvExc_Tr 231 93 TrpOutp10
233 246 Op_Flash11_CB1_HVS_Tr 231 94 TrpOutp11
233 247 Op_Flash12_CB1_HVS_Tr 231 95 TrpOutp12
233 248 Op_Flash11_CB2_HVS_Tr 231 96 TrpOutp13
233 249 Op_Flash12_CB2_HVS_Tr 231 97 TrpOutp14
235 226 Op_InstWdgDiff_Tr 231 84 TrpOutp1
235 227 Op_PcntWdgDiff_Tr 231 85 TrpOutp2
227 249 Op_InstDiff_GTU 231 86 TrpOutp3
227 250 Op_PcntDiff_GTU 231 87 TrpOutp4
233 234 Op_DPFC_Diff_GTU 231 88 TrpOutp5
229 72 Op_InstDiff_ST2 231 89 TrpOutp6
229 71 Op_PcntDiff_ST2 231 90 TrpOutp7

8.3.5.2 Alarm Reports

Alarm reports consist of self-check alarm report and equipment operation alarm reports, which are

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sent by ASDU1 (time-tagged message).

FUN INF Event FUN INF Event

231 17 Alm_Pos_GCB 231 23 Alm_VTS_Br2_ST1
227 75 Alm_Pos_CB_HVS1_Tr 231 24 Alm_VTS_Br1_ST2
227 76 Alm_Pos_CB_HVS2_Tr 231 25 Alm_VTS_Br2_ST2
227 79 Alm_PM_DSP1_CPUBrd 231 26 Alm_BO_OC_HVS_ST1
229 127 Alm_VTS_LVS_Tr 231 27 Alm_BO_OC_HVS_ST2
227 68 Alm_VTS_HVS_Tr 231 28 Alm_CTS_Br1_ST2
227 131 Alm_OvLd_Tr 231 29 Alm_CTS_Br2_ST2
227 132 Alm_InitCool1_OvLd_Tr 229 70 Alm_Diff_ST1
235 71 Alm_InitCool2_OvLd_Tr 229 63 Alm_Diff_ST2
231 21 Alm_BO_OC_HVS_Tr 229 92 Alm_CTS_Diff_ST1
227 157 Alm_OvExc_Tr 229 64 Alm_CTS_Diff_ST2
227 160 Alm_ROV_LVS_Tr 229 67 Alm_CTS_HVS_ST1
231 104 Alm_MechRly2 231 31 Alm_CTS_Br1_ST1
231 143 Alm_MechRly4 231 32 Alm_CTS_Br2_ST1
231 142 Alm_MechRly3 229 62 Alm_CTS_HVS_ST2
231 105 Alm_MechRly1 227 82 Alm_DSP_CPUBrd
227 135 Alm_PwrLoss_MechRly 227 214 Alm_PersistFD_CPUBrd
229 245 Alm_Inconsist_MechRly 227 215 Alm_InconsistFD
227 153 Alm_CTS_Diff_Tr 227 217 Alm_Sample_CPUBrd
231 194 Alm_CTS_REF_Tr 229 246 Alm_BI_CPUBrd
235 230 Alm_CTS_WdgDiff_Tr 231 33 Alm_Reboot_CPUBrd
227 152 Alm_CTS_Diff_GTU 227 194 Alm_RAM_CPUBrd
227 146 Alm_Diff_GTU 227 195 Alm_ROM_CPUBrd
227 138 Alm_CTS_HVS1_Tr 227 196 Alm_EEPROM_CPUBrd
227 139 Alm_CTS_HVS2_Tr 227 223 Alm_InvalidSetting
227 140 Alm_CTS_LVS_Tr 227 81 Alm_ModifiedSetting
229 137 Alm_CTS_Bak_HVS_Tr 227 202 Alm_PwrLoss_Opto
235 250 Alm_CTS_Wdg_HVS_Tr 227 200 Alm_TrpOutput
227 147 Alm_Diff_Tr 227 211 Alm_InnerComm
235 199 Alm_REF_Tr 229 202 Alm_DSP_MONBrd
235 231 Alm_WdgDiff_Tr 229 203 Alm_PersistFD_MONBrd
231 19 Alm_OvLd_ST1 227 216 Alm_MONBrd
229 66 Alm_InitCool_OvLd_ST1 229 204 Alm_Sample_MONBrd
231 20 Alm_OvLd_ST2 231 34 Alm_Reboot_MONBrd
229 65 Alm_InitCool_OvLd_ST2 229 205 Alm_RAM_MONBrd
227 137 Alm_PM_DSP2_CPUBrd 229 206 Alm_ROM_MONBrd
231 22 Alm_VTS_Br1_ST1 229 207 Alm_EEPROM_MONBrd

8.3.5.3 Binary Input

Binary input is sent by ASDU1 (time-tagged message).

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FUN INF Event FUN INF Event

235 240 EBI_EF_Br1_ST2 231 13 EBI_Bak_Br1_ST2
235 238 EBI_EF_Br1_ST1 231 12 EBI_Bak_Br2_ST1
235 88 EBI_BFP_CB_HVS_Tr 231 14 EBI_Bak_Br2_ST2
227 28 EBI_OvExc_Tr 227 45 EBI_Diff_Tr
235 241 EBI_EF_Br2_ST2 227 46 EBI_PPF_Tr
235 239 EBI_EF_Br2_ST1 227 47 EBI_EF_Tr
233 223 EBI_Flash_CB_HVS_Tr 227 48 EBI_EF_Gap_Tr
235 242 BI_Blk_Prot_ST1 235 232 EBI_WdgDiff_Tr
231 195 BI_ExtTrp_Ctrl_BFP 231 188 EBI_REF_Tr
235 243 BI_Blk_Prot_ST2 229 56 EBI_Diff_ST1
235 244 BI_Ext_Ctrl_EF_Gap_Tr 229 57 EBI_Bak_HVS_ST1
227 44 BI_Pwr_Superv 227 59 BI_52b_GCB
229 54 EBI_Diff_ST2 227 60 BI_52b_CB_HVS1_Tr
229 55 EBI_Bak_HVS_ST2 227 61 BI_52b_CB_HVS2_Tr
231 129 EBI_Trp_MechRly3 231 102 BI_MechRly2
231 130 EBI_Trp_MechRly4 231 134 BI_MechRly4
231 101 EBI_Trp_MechRly2 231 133 BI_MechRly3
231 100 EBI_Trp_MechRly1 231 103 BI_MechRly1
231 11 EBI_Bak_Br1_ST1 227 58 BI_Pwr_MechRly

8.3.6 General Interrogation

The GI can be used to read the status of the relay, the function numbers, and information numbers
that will be returned during the GI cycle. The GI cycle strictly abides by the rules defined in the
IEC60870-5-103.

Referring the IEC60870-5-103 standard can get the enough details about general interrogation.

8.3.7 Disturbance Records

This relay can store up to eight disturbance records in its memory. A pickup of the fault detector or
an operation of the relay can make the relay store the disturbance records.

Disturbance actual channel (ACC) table is showed below.

ACC No. Name ACC No. Name

64 Ida_Diff_ST1 124 Ida_Diff_Tr
65 Idb_Diff_ST1 125 Idb_Diff_Tr
66 Idc_Diff_ST1 126 Idc_Diff_Tr
67 Ia_CT_HVS_ST1 127 Icra_HVS1_Tr
68 Ib_CT_HVS_ST1 128 Icrb_HVS1_Tr
69 Ic_CT_HVS_ST1 129 Icrc_HVS1_Tr
70 Ia_Br1_ST1 130 Icra_HVS2_Tr
71 Ib_Br1_ST1 131 Icrb_HVS2_Tr
72 Ic_Br1_ST1 132 Icrc_HVS2_Tr

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ACC No. Name ACC No. Name

73 Ia_Br2_ST1 133 Icra_LVS_Tr
74 Ib_Br2_ST1 134 Icrb_LVS_Tr
75 Ic_Br2_ST1 135 Icrc_LVS_Tr
76 Ida_Diff_ST2 136 Icra_ST1_Tr
77 Idb_Diff_ST2 137 Icrb_ST1_Tr
78 Idc_Diff_ST2 138 Icrc_ST1_Tr
79 Ia_CT_HVS_ST2 139 Icra_ST2_Tr
80 Ib_CT_HVS_ST2 140 Icrb_ST2_Tr
81 Ic_CT_HVS_ST2 141 Icrc_ST2_Tr
82 Ia_Br1_ST2 142 Ia_Bak_HVS_Tr
83 Ib_Br1_ST2 143 Ib_Bak_HVS_Tr
84 Ic_Br1_ST2 144 Ic_Bak_HVS_Tr
85 Ia_Br2_ST2 145 Ia_HVS1_Tr
86 Ib_Br2_ST2 146 Ib_HVS1_Tr
87 Ic_Br2_ST2 147 Ic_HVS1_Tr
88 Uab_Br1_ST1 148 Ia_HVS2_Tr
89 Ubc_Br1_ST1 149 Ib_HVS2_Tr
90 Uab_Br2_ST1 150 Ic_HVS2_Tr
91 Ubc_Br2_ST1 151 Ia_LVS_Tr
92 Uab_Br1_ST2 152 Ib_LVS_Tr
93 Ubc_Br1_ST2 153 Ic_LVS_Tr
94 Uab_Br2_ST2 154 I0_NP_HVS_Tr
95 Ubc_Br2_ST2 155 I0_Gap_HVS_Tr
96 I0_NP_Br1_ST1 156 U0_DeltVT_HVS_Tr
97 I0_NP_Br2_ST1 157 U0_DeltVT_LVS_Tr
98 I0_NP_Br1_ST2 158 Ua_HVS_Tr
99 I0_NP_Br2_ST2 159 Ub_HVS_Tr
100 Ia_CT#_HVS_ST1 160 Uc_HVS_Tr
101 Ib_CT#_HVS_ST1 161 Id_REF_Tr
102 Ic_CT#_HVS_ST1 162 Icr_HVS1_REF_Tr
103 Ia_CT#_HVS_ST2 163 Icr_HVS2_REF_Tr
104 Ib_CT#_HVS_ST2 164 U/F_OvExc_Tr
105 Ic_CT#_HVS_ST2 165 Ua_LVS_Tr
106 Icra_HVS_ST1 166 Ub_LVS_Tr
107 Icrb_HVS_ST1 167 Uc_LVS_Tr
108 Icrc_HVS_ST1 168 Ida_WdgDiff_Tr
109 Icra_Br1_ST1 169 Idb_WdgDiff_Tr
110 Icrb_Br1_ST1 170 Idc_WdgDiff_Tr
111 Icrc_Br1_ST1 171 Ia_Wdg_HVS_Tr
112 Icra_Br2_ST1 172 Ib_Wdg_HVS_Tr
113 Icrb_Br2_ST1 173 Ic_Wdg_HVS_Tr
114 Icrc_Br2_ST1 174 Icr_NP_REF_Tr

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ACC No. Name ACC No. Name

115 Icra_HVS_ST2 175 Icra_HVS1_WdgDiff_Tr
116 Icrb_HVS_ST2 176 Icrb_HVS1_WdgDiff_Tr
117 Icrc_HVS_ST2 177 Icrc_HVS1_WdgDiff_Tr
118 Icra_Br1_ST2 178 Icra_HVS2_WdgDiff_Tr
119 Icrb_Br1_ST2 179 Icrb_HVS2_WdgDiff_Tr
120 Icrc_Br1_ST2 180 Icrc_HVS2_WdgDiff_Tr
121 Icra_Br2_ST2 181 Icra_Wdg_WdgDiff_Tr
122 Icrb_Br2_ST2 182 Icrb_Wdg_WdgDiff_Tr
123 Icrc_Br2_ST2 183 Icrc_Wdg_WdgDiff_Tr

8.3.8 Generic Service

The generic service can be used to read the setting and protection measurement of the relay, and
modify the setting. Two supported type identifications are ASDU 21 and ASDU 10. For more
details about generic service, see the IEC60870-5-103 standard.

The generic services supported by this protective device are shown in the following table.

Group No. Group Name

1 Setting_Group
2 Equipment Settings
3 Protection Config
4 Tr Sys Settings
5 ST1 Sys Settings
6 ST2 Sys Settings
7 Tr Diff Prot Settings
8 Tr HVS REF Prot Settings
9 Tr Wdg Diff Prot Settings
10 Tr PPF Bak Prot Settings
11 Tr EF Bak Prot Settings
12 Tr OvExc Prot Settings
13 Tr HVS Flash Prot Settings
14 Tr HVS BFP Prot Settings
15 ST1 Diff Prot Settings
16 ST1 HVS Bak Prot Settings
17 ST1 Br1 Bak Prot Settings
18 ST1 Br2 Bak Prot Settings
19 ST2 Diff Prot Settings
20 ST2 HVS Bak Prot Settings
21 ST2 Br1 Bak Prot Settings
22 ST2 Br2 Bak Prot Settings
23 MechRly Prot Settings
65 Prot Metering of ST1
66 Prot Metering of ST2

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Group No. Group Name

67 Prot Metering of Tr

8.4 Modbus Protocol over Serial Port

8.4.1 Overview
The RCS-985BT relay support several communications protocols to allow the connection to the
equipment such as personal computers, RTUs, SCADA masters, and programmable logic
controllers. The Modicon Modbus RTU protocol is the most basic protocol supported by the
RCS-985BT. Modbus is available via RS485 serial links or via Ethernet (using the Modbus/TCP
specification).

The following information is provided primarily for users who wish to develop their own master
communication drivers and applies to the serial Modbus RTU protocol. The characteristics are
listed below:

z Standard: Modicon Modbus Protocol Reference Guide, PI-MBUS-300 Rev.E

z Physical Layer Setup: RS485, 1 start bit,8 data bits, no bit for parity,1 stop bit

z Link Layer Setup: Only RTU Mode Supported

z Frame Length Up limit: 256 Bytes

z Baud Rate: Configurable

z Device Address: Configurable

z Parity: no

The following Modbus function codes are supported but re-defined by the relay:

02 Read Input Status-Get real-time statuses (binary)

03 Read Holding Registers- Get Settings

04 Read Input Registers- Get metering values of equipment

8.4.2 Fetch real time status (Binary)

Function Code: 02H

This function reads the ON/OFF status of discrete inputs in the slave. The status in the response
message is packed as one input per bit of the data field. Status is indicated as: 1 = ON; 0 = OFF.
The LSB of the first data byte contains the input addressed in the query. The other inputs follow
toward the high order end of this byte, and from ‘low order to high order’ in subsequent bytes.

Example 1: If the master wants to fetch Trip Information (0000H~0003H), the query frame would
be as follows (Suppose the slave address was 1):

01 02 00 00 00 04 79 C9

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Start Start
Slave Function Num of Num of
Register Register CRC Lo CRC Hi
Addr Code Status Hi Status Lo
Addr Hi Addr Lo

The response fame would be as follows (Suppose the value of 0000H~0003H equal to 1,1,0,1
respectively):

01 02 01 0B E0 4F
Function
Slave Addr Length Status CRC Lo CRC Hi
Code

Example 2: If the master wants to fetch Trip Information (0002H~000DH), the query frame would
be as follows (Suppose the slave address was 1):

01 02 00 02 00 0C D9 CF
Start Start
Slave Function Num of Num of
Register Register CRC Lo CRC Hi
Addr Code Status Hi Status Lo
Addr Hi Addr Lo

The response fame would be as follows (Suppose the value of 0002H~000DH equal to
1,1,0,1,0,0,1,0,1,1,1,0 respectively):

01 02 02 07 4B FB BF
Function
Slave Addr Length Status Hi Status Lo CRC Lo CRC Hi
Code

8.4.2.1 Trip Information

Value of corresponding Bit=1: operate, 0: drop back or not operate.

Address Item Name Address Item Name

0000H Op_InstDiff_Tr 0024H Op_OC1_HVS_ST1
0001H Op_PcntDiff_Tr 0025H Op_OC2_HVS_ST1
0002H Op_DPFC_Diff_Tr 0026H Op_OC1_Br1_ST1
0003H Op_InstREF_Tr 0027H Op_OC2_Br1_ST1
0004H Op_PcntREF_Tr 0028H Op_OC1_Br2_ST1
0005H Op_Z1_Tr 0029H Op_OC2_Br2_ST1
0006H Op_Z2_Tr 002AH Op_InstDiff_ST2
0007H Op_OC1_Tr 002BH Op_PcntDiff_ST2
0008H Op_OC2_Tr 002CH Op_OC1_HVS_ST2
0009H Op_ROC11_Tr 002DH Op_OC2_HVS_ST2
000AH Op_ROC12_Tr 002EH Op_OC1_Br1_ST2
000BH Op_ROC21_Tr 002FH Op_OC2_Br1_ST2
000CH Op_ROC22_Tr 0030H Op_OC1_Br2_ST2
000DH Op_ROV_Tr 0031H Op_OC2_Br2_ST2
000EH Op_ROC_Gap_Tr 0032H Op_ROC1_Br1_ST1
000FH Op_OvExc_Tr 0033H Op_ROC2_Br1_ST1
0010H Op_InvOvExc_Tr 0034H Op_ROC1_Br2_ST1

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Address Item Name Address Item Name

0011H Op_Flash11_CB1_HVS_Tr 0035H Op_ROC2_Br2_ST1
0012H Op_Flash12_CB1_HVS_Tr 0036H Op_ROC1_Br1_ST2
0013H Op_Flash11_CB2_HVS_Tr 0037H Op_ROC2_Br1_ST2
0014H Op_Flash12_CB2_HVS_Tr 0038H Op_ROC1_Br2_ST2
0015H Op_InstWdgDiff_Tr 0039H Op_ROC2_Br2_ST2
0016H Op_PcntWdgDiff_Tr 003AH TrpOutp1
0017H Op_BFP11_CB1_HVS_Tr 003BH TrpOutp2
0018H Op_BFP12_CB1_HVS_Tr 003CH TrpOutp3
0019H Op_BFP11_CB2_HVS_Tr 003DH TrpOutp4
001AH Op_BFP12_CB2_HVS_Tr 003EH TrpOutp5
001BH Op_MechRly1 003FH TrpOutp6
001CH Op_MechRly2 0040H TrpOutp7
001DH Op_MechRly3 0041H TrpOutp8
001EH Op_MechRly4 0042H TrpOutp9
001FH Op_InstDiff_GTU 0043H TrpOutp10
0020H Op_PcntDiff_GTU 0044H TrpOutp11
0021H Op_DPFC_Diff_GTU 0045H TrpOutp12
0022H Op_InstDiff_ST1 0046H TrpOutp13
0023H Op_PcntDiff_ST1 0047H TrpOutp14

8.4.2.2 Alarm Information

“1” means alarm,”0” for no alarm or draw off.

Address Item Name Address Item Name

1000H Alm_VTS_LVS_Tr 1025H Alm_OvLd_ST1
1001H Alm_VTS_HVS_Tr 1026H Alm_InitCool_OvLd_ST1
1002H Alm_OvLd_Tr 1027H Alm_OvLd_ST2
1003H Alm_InitCool1_OvLd_Tr 1028H Alm_InitCool_OvLd_ST2
1004H Alm_InitCool2_OvLd_Tr 1029H Alm_PM_DSP2_CPUBrd
1005H Alm_BO_OC_HVS_Tr 102AH Alm_CTS_Diff_ST1
1006H Alm_OvExc_Tr 102BH Alm_CTS_Diff_ST2
1007H Alm_ROV_LVS_Tr 102CH Alm_CTS_HVS_ST1
1008H Alm_Pos_GCB 102DH Alm_CTS_Br1_ST1
1009H Alm_Pos_CB_HVS1_Tr 102EH Alm_CTS_Br2_ST1
100AH Alm_Pos_CB_HVS2_Tr 102FH Alm_CTS_HVS_ST2
100BH Alm_PM_DSP1_CPUBrd 1030H Alm_CTS_Br1_ST2
100CH Alm_CTS_Diff_Tr 1031H Alm_CTS_Br2_ST2
100DH Alm_CTS_REF_Tr 1032H Alm_Diff_ST1
100EH Alm_CTS_WdgDiff_Tr 1033H Alm_Diff_ST2
100FH Alm_CTS_Diff_GTU 1034H Alm_RAM_CPUBrd
1010H Alm_MechRly2 1035H Alm_ROM_CPUBrd
1011H Alm_MechRly4 1036H Alm_EEPROM_CPUBrd

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Address Item Name Address Item Name

1012H Alm_MechRly3 1037H Alm_InvalidSetting
1013H Alm_MechRly1 1038H Alm_ModifiedSetting
1014H Alm_PwrLoss_MechRly 1039H Alm_PwrLoss_Opto
1015H Alm_Inconsist_MechRly 103AH Alm_TrpOutput
1016H Alm_CTS_HVS1_Tr 103BH Alm_InnerComm
1017H Alm_CTS_HVS2_Tr 103CH Alm_DSP_CPUBrd
1018H Alm_CTS_LVS_Tr 103DH Alm_PersistFD_CPUBrd
1019H Alm_CTS_Bak_HVS_Tr 103EH Alm_InconsistFD
101AH Alm_CTS_Wdg_HVS_Tr 103FH Alm_Sample_CPUBrd
101BH Alm_Diff_Tr 1040H Alm_BI_CPUBrd
101CH Alm_REF_Tr 1041H Alm_Reboot_CPUBrd
101DH Alm_WdgDiff_Tr 1042H Alm_RAM_MONBrd
101EH Alm_Diff_GTU 1043H Alm_ROM_MONBrd
101FH Alm_VTS_Br1_ST1 1044H Alm_EEPROM_MONBrd
1020H Alm_VTS_Br2_ST1 1045H Alm_DSP_MONBrd
1021H Alm_VTS_Br1_ST2 1046H Alm_PersistFD_MONBrd
1022H Alm_VTS_Br2_ST2 1047H Alm_MONBrd
1023H Alm_BO_OC_HVS_ST1 1048H Alm_Sample_MONBrd
1024H Alm_BO_OC_HVS_ST2 1049H Alm_Reboot_MONBrd

8.4.2.3 Binary Input Change Information

“1” means binary change,”0” for no change or draw off.

Address Item Name Address Item Name

2000H EBI_EF_Br1_ST2 2013H EBI_PPF_Tr
2001H EBI_EF_Br1_ST1 2014H EBI_EF_Tr
2002H EBI_BFP_CB_HVS_Tr 2015H EBI_EF_Gap_Tr
2003H EBI_OvExc_Tr 2016H En_WdgDiff_Tr
2004H EBI_EF_Br2_ST2 2017H En_REF_Tr
2005H EBI_EF_Br2_ST1 2018H EBI_Diff_ST1
2006H En_Flash_CB_HVS_Tr 2019H EBI_Bak_HVS_ST1
2007H EBI_Diff_ST2 201AH EBI_Bak_Br1_ST1
2008H EBI_Bak_HVS_ST2 201BH EBI_Bak_Br1_ST2
2009H EBI_Trp_MechRly3 201CH EBI_Bak_Br2_ST1
200AH EBI_Trp_MechRly4 201DH EBI_Bak_Br2_ST2
200BH EBI_Trp_MechRly2 201EH BI_MechRly2
200CH EBI_Trp_MechRly1 201FH BI_MechRly4
200DH BI_Blk_Prot_ST1 2020H BI_MechRly3
200EH BI_ExtTrp_Ctrl_BFP 2021H BI_MechRly1
200FH BI_Blk_Prot_ST2 2022H BI_Pwr_MechRly
2010H BI_Ext_Ctrl_EF_Gap_Tr 2023H BI_52b_GCB
2011H BI_Pwr_Superv 2024H BI_52b_CB_HVS1_Tr

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Address Item Name Address Item Name

2012H EBI_Diff_Tr 2025H BI_52b_CB_HVS2_Tr

8.4.3 Fetch Metering Values of Equipment

Function Code: 04H

The metering values in the response message are packed as two bytes per register. For each
register, the first byte contains the high order bits and the second contains the low order bits.

8.4.3.1 ST1 Metering

Address Analog Name Unit

0000H Ida_Diff_ST1(decimal digits=2) Ie
0001H Idb_Diff_ST1(decimal digits=2) Ie
0002H Idc_Diff_ST1(decimal digits=2) Ie
0003H Ira_Diff_ST1(decimal digits=2) Ie
0004H Irb_Diff_ST1(decimal digits=2) Ie
0005H Irc_Diff_ST1(decimal digits=2) Ie
0006H Icra_HVS_ST1(decimal digits=2) Ie
0007H Icrb_HVS_ST1(decimal digits=2) Ie
0008H Icrc_HVS_ST1(decimal digits=2) Ie
0009H Icra_Br1_ST1(decimal digits=2) Ie
000AH Icrb_Br1_ST1(decimal digits=2) Ie
000BH Icrc_Br1_ST1(decimal digits=2) Ie
000CH Icra_Br2_ST1(decimal digits=2) Ie
000DH Icrb_Br2_ST1(decimal digits=2) Ie
000EH Icrc_Br2_ST1(decimal digits=2) Ie
000FH Ia_CT_HVS_ST1(decimal digits=2) A
0010H Ib_CT_HVS_ST1(decimal digits=2) A
0011H Ic_CT_HVS_ST1(decimal digits=2) A
0012H I1_CT_HVS_ST1(decimal digits=2) A
0013H I2_CT_HVS_ST1(decimal digits=2) A
0014H I0_CT_HVS_ST1(decimal digits=2) A
0015H Ia_CT#_HVS_ST1(decimal digits=2) A
0016H Ib_CT#_HVS_ST1(decimal digits=2) A
0017H Ic_CT#_HVS_ST1(decimal digits=2) A
0018H I1_CT#_HVS_ST1(decimal digits=2) A
0019H I2_CT#_HVS_ST1(decimal digits=2) A
001AH I0_CT#_HVS_ST1(decimal digits=2) A
001BH Ia_Br1_ST1(decimal digits=2) A
001CH Ib_Br1_ST1(decimal digits=2) A
001DH Ic_Br1_ST1(decimal digits=2) A
001EH I1_Br1_ST1(decimal digits=2) A
001FH I2_Br1_ST1(decimal digits=2) A

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Address Analog Name Unit

0020H I0_Calc_Br1_ST1(decimal digits=2) A
0021H I0_NP_Br1_ST1(decimal digits=2) A
0022H Uab_Br1_ST1(decimal digits=2) V
0023H Ubc_Br1_ST1(decimal digits=2) V
0024H Uca_Br1_ST1(decimal digits=2) V
0025H U1_Br1_ST1(decimal digits=2) V
0026H U2_Br1_ST1(decimal digits=2) V
0027H Ia_Br2_ST1(decimal digits=2) A
0028H Ib_Br2_ST1(decimal digits=2) A
0029H Ic_Br2_ST1(decimal digits=2) A
002AH I1_Br2_ST1(decimal digits=2) A
002BH I2_Br2_ST1(decimal digits=2) A
002CH I0_Calc_Br2_ST1(decimal digits=2) A
002DH I0_NP_Br2_ST1(decimal digits=2) A
002EH Uab_Br2_ST1(decimal digits=2) V
002FH Ubc_Br2_ST1(decimal digits=2) V
0030H Uca_Br2_ST1(decimal digits=2) V
0031H U1_Br2_ST1(decimal digits=2) V
0032H U2_Br2_ST1(decimal digits=2) V

8.4.3.2 ST2 Metering

Address Analog Name Unit

1000H Ida_Diff_ST2(decimal digits=2) Ie
1001H Idb_Diff_ST2(decimal digits=2) Ie
1002H Idc_Diff_ST2(decimal digits=2) Ie
1003H Ira_Diff_ST2(decimal digits=2) Ie
1004H Irb_Diff_ST2(decimal digits=2) Ie
1005H Irc_Diff_ST2(decimal digits=2) Ie
1006H Icra_HVS_ST2(decimal digits=2) Ie
1007H Icrb_HVS_ST2(decimal digits=2) Ie
1008H Icrc_HVS_ST2(decimal digits=2) Ie
1009H Icra_Br1_ST2(decimal digits=2) Ie
100AH Icrb_Br1_ST2(decimal digits=2) Ie
100BH Icrc_Br1_ST2(decimal digits=2) Ie
100CH Icra_Br2_ST2(decimal digits=2) Ie
100DH Icrb_Br2_ST2(decimal digits=2) Ie
100EH Icrc_Br2_ST2(decimal digits=2) Ie
100FH Ia_CT_HVS_ST2(decimal digits=2) A
1010H Ib_CT_HVS_ST2(decimal digits=2) A
1011H Ic_CT_HVS_ST2(decimal digits=2) A
1012H I1_CT_HVS_ST2(decimal digits=2) A
1013H I2_CT_HVS_ST2(decimal digits=2) A

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Address Analog Name Unit

1014H I0_CT_HVS_ST2(decimal digits=2) A
1015H Ia_CT#_HVS_ST2(decimal digits=2) A
1016H Ib_CT#_HVS_ST2(decimal digits=2) A
1017H Ic_CT#_HVS_ST2(decimal digits=2) A
1018H I1_CT#_HVS_ST2(decimal digits=2) A
1019H I2_CT#_HVS_ST2(decimal digits=2) A
101AH I0_CT#_HVS_ST2(decimal digits=2) A
101BH Ia_Br1_ST2(decimal digits=2) A
101CH Ib_Br1_ST2(decimal digits=2) A
101DH Ic_Br1_ST2(decimal digits=2) A
101EH I1_Br1_ST2(decimal digits=2) A
101FH I2_Br1_ST2(decimal digits=2) A
1020H I0_Calc_Br1_ST2(decimal digits=2) A
1021H I0_NP_Br1_ST2(decimal digits=2) A
1022H Uab_Br1_ST2(decimal digits=2) V
1023H Ubc_Br1_ST2(decimal digits=2) V
1024H Uca_Br1_ST2(decimal digits=2) V
1025H U1_Br1_ST2(decimal digits=2) V
1026H U2_Br1_ST2(decimal digits=2) V
1027H Ia_Br2_ST2(decimal digits=2) A
1028H Ib_Br2_ST2(decimal digits=2) A
1029H Ic_Br2_ST2(decimal digits=2) A
102AH I1_Br2_ST2(decimal digits=2) A
102BH I2_Br2_ST2(decimal digits=2) A
102CH I0_Calc_Br2_ST2(decimal digits=2) A
102DH I0_NP_Br2_ST2(decimal digits=2) A
102EH Uab_Br2_ST2(decimal digits=2) V
102FH Ubc_Br2_ST2(decimal digits=2) V
1030H Uca_Br2_ST2(decimal digits=2) V
1031H U1_Br2_ST2(decimal digits=2) V
1032H U2_Br2_ST2(decimal digits=2) V

8.4.3.3 Tr Metering

Address Analog Name Unit

2000H Ida_Diff_Tr(decimal digits=2) Ie
2001H Idb_Diff_Tr(decimal digits=2) Ie
2002H Idc_Diff_Tr(decimal digits=2) Ie
2003H Ira_Diff_Tr(decimal digits=2) Ie
2004H Irb_Diff_Tr(decimal digits=2) Ie
2005H Irc_Diff_Tr(decimal digits=2) Ie
2006H Icra_HVS1_Tr(decimal digits=2) Ie
2007H Icrb_HVS1_Tr(decimal digits=2) Ie

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Address Analog Name Unit

2008H Icrc_HVS1_Tr(decimal digits=2) Ie
2009H Icra_HVS2_Tr(decimal digits=2) Ie
200AH Icrb_HVS2_Tr(decimal digits=2) Ie
200BH Icrc_HVS2_Tr(decimal digits=2) Ie
200CH Icra_LVS_Tr(decimal digits=2) Ie
200DH Icrb_LVS_Tr(decimal digits=2) Ie
200EH Icrc_LVS_Tr(decimal digits=2) Ie
200FH Icra_ST1_Tr(decimal digits=2) Ie
2010H Icrb_ST1_Tr(decimal digits=2) Ie
2011H Icrc_ST1_Tr(decimal digits=2) Ie
2012H Icra_ST2_Tr(decimal digits=2) Ie
2013H Icrb_ST2_Tr(decimal digits=2) Ie
2014H Icrc_ST2_Tr(decimal digits=2) Ie
2015H Ida_WdgDiff_Tr(decimal digits=2) In
2016H Idb_WdgDiff_Tr(decimal digits=2) In
2017H Idc_WdgDiff_Tr(decimal digits=2) In
2018H Ira_WdgDiff_Tr(decimal digits=2) In
2019H Irb_WdgDiff_Tr(decimal digits=2) In
201AH Irc_WdgDiff_Tr(decimal digits=2) In
201BH Icra_HVS1_WdgDiff_Tr(decimal digits=2) In
201CH Icrb_HVS1_WdgDiff_Tr(decimal digits=2) In
201DH Icrc_HVS1_WdgDiff_Tr(decimal digits=2) In
201EH Icra_HVS2_WdgDiff_Tr(decimal digits=2) In
201FH Icrb_HVS2_WdgDiff_Tr(decimal digits=2) In
2020H Icrc_HVS2_WdgDiff_Tr(decimal digits=2) In
2021H Icra_Wdg_WdgDiff_Tr(decimal digits=2) In
2022H Icrb_Wdg_WdgDiff_Tr(decimal digits=2) In
2023H Icrc_Wdg_WdgDiff_Tr(decimal digits=2) In
2024H Id_REF_Tr(decimal digits=2) In
2025H Ir_REF_Tr(decimal digits=2) In
2026H Icr_HVS1_REF_Tr(decimal digits=2) In
2027H Icr_HVS2_REF_Tr(decimal digits=2) In
2028H Icr_NP_REF_Tr(decimal digits=2) In
2029H Ia_HVS1_Tr(decimal digits=2) A
202AH Ib_HVS1_Tr(decimal digits=2) A
202BH Ic_HVS1_Tr(decimal digits=2) A
202CH I1_HVS1_Tr(decimal digits=2) A
202DH I2_HVS1_Tr(decimal digits=2) A
202EH I0_HVS1_Tr(decimal digits=2) A
202FH Ia_HVS2_Tr(decimal digits=2) A
2030H Ib_HVS2_Tr(decimal digits=2) A
2031H Ic_HVS2_Tr(decimal digits=2) A

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Address Analog Name Unit

2032H I1_HVS2_Tr(decimal digits=2) A
2033H I2_HVS2_Tr(decimal digits=2) A
2034H I0_HVS2_Tr(decimal digits=2) A
2035H Ia_Bak_HVS_Tr(decimal digits=2) A
2036H Ib_Bak_HVS_Tr(decimal digits=2) A
2037H Ic_Bak_HVS_Tr(decimal digits=2) A
2038H I1_Bak_HVS_Tr(decimal digits=2) A
2039H I2_Bak_HVS_Tr(decimal digits=2) A
203AH I0_Bak_HVS_Tr(decimal digits=2) A
203BH Ia_Wdg_HVS_Tr(decimal digits=2) A
203CH Ib_Wdg_HVS_Tr(decimal digits=2) A
203DH Ic_Wdg_HVS_Tr(decimal digits=2) A
203EH I1_Wdg_HVS_Tr(decimal digits=2) A
203FH I2_Wdg_HVS_Tr(decimal digits=2) A
2040H I0_Wdg_HVS_Tr(decimal digits=2) A
2041H I0_NP_HVS_Tr(decimal digits=2) A
2042H I0_Gap_HVS_Tr(decimal digits=2) A
2043H Ia_LVS_Tr(decimal digits=2) A
2044H Ib_LVS_Tr(decimal digits=2) A
2045H Ic_LVS_Tr(decimal digits=2) A
2046H I1_LVS_Tr(decimal digits=2) A
2047H I2_LVS_Tr(decimal digits=2) A
2048H I0_LVS_Tr(decimal digits=2) A
2049H Ua_HVS_Tr(decimal digits=2) V
204AH Ub_HVS_Tr(decimal digits=2) V
204BH Uc_HVS_Tr(decimal digits=2) V
204CH Uab_HVS_Tr(decimal digits=2) V
204DH Ubc_HVS_Tr(decimal digits=2) V
204EH Uca_HVS_Tr(decimal digits=2) V
204FH U1_HVS_Tr(decimal digits=2) V
2050H U2_HVS_Tr(decimal digits=2) V
2051H U0_Calc_HVS_Tr(decimal digits=2) V
2052H U0_DeltVT_HVS_Tr(decimal digits=2) V
2053H U/F_OvExc_Tr(decimal digits=3)
2054H f(decimal digits=2) Hz
2055H Ua_LVS_Tr(decimal digits=2) V
2056H Ub_LVS_Tr(decimal digits=2) V
2057H Uc_LVS_Tr(decimal digits=2) V
2058H Uab_LVS_Tr(decimal digits=2) V
2059H Ubc_LVS_Tr(decimal digits=2) V
205AH Uca_LVS_Tr(decimal digits=2) V
205BH U1_LVS_Tr(decimal digits=2) V

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Address Analog Name Unit

205CH U2_LVS_Tr(decimal digits=2) V
205DH U0_Calc_LVS_Tr(decimal digits=2) V
205EH U0_DeltVT_LVS_Tr(decimal digits=2) V

8.4.4 Fetch Settings Value of Equipment

Function Code: 03H

8.4.4.1 Equipment Settings

Address Setting Name Unit

0000H Active_Grp
0001H Equip_ID(ASCII Hi Word)
0002H Equip_ID(ASCII Mi Word)
0003H Equip_ID(ASCII Lo Word)
0004H Comm_Addr(integer)
0005H COM1_Baud(integer) bps
0006H COM2_Baud(integer) bps
0007H Printer_Baud(integer) bps
Bit0: COM1 870-5-103 Protocal
Bit1: COM1 LFP Protocal
0008H Protocol Bit2: COM1 Modbus Protocal
Bit5: COM2 LFP Protocal
Bit6: COM2 Modbus Protocal
Bit0: En_Auto_Print
Bit1: En_Net_Print
0009H Control word
Bit3: En_Remote_Cfg
Bit4: GPS_Pulse

8.4.4.2 System Settings

1. Protection Configuration

Address Setting Name Unit

Bit0:En_Diff_Tr
Bit1:En_REF_Tr
Bit2:En_WdgDiff_Tr
Bit3:En_PPF_Tr
Bit4:En_EF_Tr
Protection Config
1000H Bit5:En_OvExc_Tr
Word 1
Bit7:En_Flash_CB_HVS
Bit8:En_BFP_CB_HVS
Bit9:En_Diff_ST1
Bit10:En_Bak_HVS_ST1
Bit11:En_Bak_Br1_ST1

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Address Setting Name Unit

Bit12:En_Bak_Br2_ST1
Bit13:En_Diff_ST2
Bit14:En_Bak_HVS_ST2
Bit15:En_Bak_Br1_ST2
Protection Config Bit0:En_Bak_Br2_ST2
1001H
Word 2 Bit1:En_MechRly

2. Tr System Settings

Address Setting Name Unit

1002H Sn_Tr(decimal digits=1) MVA
1003H U1n_HVS_Tr(decimal digits=1) kV
1004H U1n_LVS_Tr(decimal digits=2) kV
1005H U1n_VT_HVS_Tr(decimal digits=1) kV
1006H U2n_VT_HVS_Tr V
1007H U2n_DeltVT_HVS_Tr V
1008H I1n_CT_HVS_Tr(integer) A
1009H I2n_CT_HVS_Tr A
100AH I1n_CT_Bak_HVS_Tr(integer) A
100BH I2n_CT_Bak_HVS_Tr A
100CH I1n_CT_LVS_Tr(integer) A
100DH I2n_CT_LVS_Tr A
100EH I1n_CT#_HVS_ST1(integer) A
100FH I2n_CT#_HVS_ST1 A
1010H I1n_CT#_HVS_ST2(integer) A
1011H I2n_CT#_HVS_ST2 A
1012H I1n_CT_NP_Tr(integer) A
1013H I2n_CT_NP_Tr A
1014H I1n_CT_Gap_Tr(integer) A
1015H I2n_CT_Gap_Tr A
Bit0:Yd11_Conn_Tr
Bit1:Yyd11_Conn_Tr
Control
1016H Bit2:Opt_GCB
Word
Bit3:Yd1_Conn_Tr
Bit4:Yyd1_Conn_Tr

3. ST1 System Settings

Address Setting Name Unit

1017H Sn_ST1(decimal digits=2) MVA
1018H U1n_HVS_ST1(decimal digits=2) kV
1019H U1n_Br1_ST1(decimal digits=2) kV
101AH U1n_Br2_ST1(decimal digits=2) kV
101BH U1n_VT_Br1_ST1(decimal digits=2) kV

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101CH U2n_VT_Br1_ST1 V
101DH U1n_VT_Br2_ST1(decimal digits=2) kV
101EH U2n_VT_Br2_ST1 V
101FH I1n_CT_HVS_ST1(integer) A
1020H I2n_CT_HVS_ST1 A
1021H I1n_CT_Br1_ST1(integer) A
1022H I2n_CT_Br1_ST1 A
1023H I1n_CT_Br2_ST1(integer) A
1024H I2n_CT_Br2_ST1 A
1025H I1n_CT_NP_Br_ST1(integer) A
1026H I2n_CT_NP_Br_ST1 A
Bit0:Yyy12_Conn_ST1
Bit1:Ddd12_Conn_ST1
Control
1027H Bit2:Dyy11_Conn_ST1
Word
Bit3:Ydd11_Conn_ST1
Bit4:Dyy1_Conn_ST1

4. ST2 System Settings

Address Setting Name Unit

1028H Sn_ST2(decimal digits=2) MVA
1029H U1n_HVS_ST2(decimal digits=2) kV
102AH U1n_Br1_ST2(decimal digits=2) kV
102BH U1n_Br2_ST2(decimal digits=2) kV
102CH U1n_VT_Br1_ST2(decimal digits=2) kV
102DH U2n_VT_Br1_ST2 V
102EH U1n_VT_Br2_ST2(decimal digits=2) kV
102FH U2n_VT_Br2_ST2 V
1030H I1n_CT_HVS_ST2(integer) A
1031H I2n_CT_HVS_ST2 A
1032H I1n_CT_Br1_ST2(integer) A
1033H I2n_CT_Br1_ST2 A
1034H I1n_CT_Br2_ST2(integer) A
1035H I2n_CT_Br2_ST2 A
1036H I1n_CT_NP_Br_ST2(integer) A
1037H I2n_CT_NP_Br_ST2 A
Bit0:Yyy12_Conn_ST2
Bit1:Ddd12_Conn_ST2
Control
1038H Bit2:Dyy11_Conn_ST2
Word
Bit3:Ydd11_Conn_ST2
Bit4:Dyy1_Conn_ST2

8.4.4.3 Protection Settings

Function Code: 03H

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1. Tr Diff Prot Settings

Address Setting Name Unit

2000H I_Pkp_PcntDiff_Tr(decimal digits=2) Ie
2001H I_InstDiff_Tr(decimal digits=2) Ie
2002H Slope1_PcntDiff_Tr(decimal digits=2)
2003H Slope2_PcntDiff_Tr(decimal digits=2)
2004H k_Harm_PcntDiff_Tr(decimal digits=2)
2005H TrpLog_Diff_Tr
Bit0:En_InstDiff_Tr
Bit1:En_PcntDiff_Tr
Control
2006H Bit2:En_DPFC_Diff_Tr
Word
Bit3:Opt_Inrush_Ident_Tr
Bit4:Opt_CTS_Blk_PcntDiff_Tr

2. Tr HVS REF Prot Settings

Address Setting Name Unit

2007H I_Pkp_PcntREF_Tr(decimal digits=2) In
2008H I_InstREF_Tr(decimal digits=2) In
2009H Slope_PcntREF_Tr(decimal digits=2)
200AH TrpLog_REF_Tr
Bit0:En_InstREF_Tr
Control
200BH Bit1:En_PcntREF_Tr
Word
Bit2:Opt_CTS_Blk_PcntREF_Tr

3. Tr Wdg Diff Prot Settings

Address Setting Name Unit

200CH I_Pkp_PcntWdgDiff_Tr(decimal digits=2) In
200DH I_InstWdgDiff_Tr(decimal digits=2) In
200EH Slope_PcntWdgDiff_Tr(decimal digits=2)
200FH TrpLog_WdgDiff_Tr
Bit0:En_InstWdgDiff_Tr
Control
2010H Bit1:En_PcntWdgDiff_Tr
Word
Bit2:Opt_CTS_Blk_PcntWdgDiff_Tr

4. Tr PPF Bak Prot Settings

Address Setting Name Unit

2011H V_NegOV_VCE_Tr(decimal digits=2) V
2012H Vpp_UV_VCE_Tr(decimal digits=2) V
2013H I_OC1_Tr(decimal digits=2) A
2014H t_OC1_Tr(decimal digits=2) S
2015H TrpLog_OC1_Tr
2016H I_OC2_Tr(decimal digits=2) A

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Address Setting Name Unit

2017H t_OC2_Tr(decimal digits=2) S
2018H TrpLog_OC2_Tr
2019H Z1_Fwd_Tr(decimal digits=2) Ω
201AH Z1_Rev_Tr(decimal digits=2) Ω
201BH t_Z1_Tr(decimal digits=2) S
201CH TrpLog_Z1_Tr
201DH Z2_Fwd_Tr(decimal digits=2) Ω
201EH Z2_Rev_Tr(decimal digits=2) Ω
201FH t_Z2_Tr(decimal digits=2) S
2020H TrpLog_Z2_Tr
2021H I_Alm_OvLd_Tr(decimal digits=2) A
2022H t_Alm_OvLd_Tr(decimal digits=2) S
2023H I_InitCool1_OvLd_Tr(decimal digits=2) A
2024H t_InitCool1_OvLd_Tr(decimal digits=2) S
2025H I_InitCool2_OvLd_Tr(decimal digits=2) A
2026H t_InitCool2_OvLd_Tr(decimal digits=2) S
2027H I_BO_OC_HVS_Tr(decimal digits=2) A
2028H t_BO_OC_HVS_Tr(decimal digits=2) S
Bit0:En_VCE_Ctrl_OC1_Tr
Bit1:En_VCE_Ctrl_OC2_Tr
Bit2:En_LVS.VCE_Ctrl_OC_Tr
Bit3:En_Mem_Curr_Tr
Control
2029H Bit4:Opt_VTS_Ctrl_OC_Tr
Word
Bit5:En_OvLd_Tr
Bit6:En_InitCool1_OvLd_Tr
Bit7:En_InitCool2_OvLd_Tr
Bit8:En_BO_OC_HVS_Tr

5. Tr EF Bak Prot Settings

Address Setting Name Unit

202AH V_ROV_VCE_Tr(decimal digits=2) V
202BH I_ROC1_Tr(decimal digits=2) A
202CH t_ROC11_Tr(decimal digits=2) S
202DH TrpLog_ROC11_Tr
202EH t_ROC12_Tr(decimal digits=2) S
202FH TrpLog_ROC12_Tr
2030H I_ROC2_Tr(decimal digits=2) A
2031H t_ROC21_Tr(decimal digits=2) S
2032H TrpLog_ROC21_Tr
2033H t_ROC22_Tr(decimal digits=2) S
2034H TrpLog_ROC22_Tr
2035H V_ROV_Gap_HVS_Tr(decimal digits=2) V

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Address Setting Name Unit

2036H t_ROV_Gap_HVS_Tr(decimal digits=2) S
2037H TrpLog_ROV_Gap_HVS_Tr
2038H I_ROC_Gap_HVS_Tr(decimal digits=2) A
2039H t_ROC_Gap_HVS_Tr(decimal digits=2) S
203AH TrpLog_ROC_Gap_HVS_Tr
203BH V_Alm_ROV_LVS_Tr(decimal digits=2) V
203CH t_Alm_ROV_LVS_Tr(decimal digits=2) S
Bit0:En_VCE.ROV_Ctrl_ROC1_Tr
Bit1:En_VCE.ROV_Ctrl_ROC2_Tr
Bit2:En_Dir_Ctrl_ROC1_Tr
Bit3:En_Dir_Ctrl_ROC2_Tr
Control
203DH Bit4:En_Calc_3I0_ROC1_HVS
Word
Bit5:En_Calc_3I0_ROC2_HVS
Bit6:En_Alm_ROV_LVS_Tr
Bit7:En_BI_Ctrl_EF_Gap_HVS
Bit8:Opt_CT_Calc_3I0_HVS

6. Tr OvExc Prot Settings

Address Setting Name Unit

203EH k_OvExc_Tr(decimal digits=2)
203FH t_OvExc_Tr(decimal digits=1) S
2040H TrpLog_OvExc_Tr
2041H k_Alm_OvExc_Tr(decimal digits=2)
2042H t_Alm_OvExc_Tr(decimal digits=1) S
2043H k0_InvOvExc_Tr(decimal digits=2)
2044H t0_InvOvExc_Tr(decimal digits=1) S
2045H k1_InvOvExc_Tr(decimal digits=2)
2046H t1_InvOvExc_Tr(decimal digits=1) S
2047H k2_InvOvExc_Tr(decimal digits=2)
2048H t2_InvOvExc_Tr(decimal digits=1) S
2049H k3_InvOvExc_Tr(decimal digits=2)
204AH t3_InvOvExc_Tr(decimal digits=1) S
204BH k4_InvOvExc_Tr(decimal digits=2)
204CH t4_InvOvExc_Tr(decimal digits=1) S
204DH k5_InvOvExc_Tr(decimal digits=2)
204EH t5_InvOvExc_Tr(decimal digits=1) S
204FH k6_InvOvExc_Tr(decimal digits=2)
2050H t6_InvOvExc_Tr(decimal digits=1) S
2051H k7_InvOvExc_Tr(decimal digits=2)
2052H t7_InvOvExc_Tr(decimal digits=1) S
2053H TrpLog_InvOvExc_Tr

7. Tr HVS Flash Prot Settings

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Address Setting Name Unit

2054H I_NegOC_Flash1_CB_HVS_Tr(decimal digits=2) A
2055H t_Flash11_CB_HVS_Tr(decimal digits=2) S
2056H TrpLog_Flash11_CB_HVS_Tr
2057H t_Flahs12_CB_HVS_Tr(decimal digits=2) S
2058H TrpLog_Flash12_CB_HVS_Tr

8. Tr HVS BFP Prot Settings

Address Setting Name Unit

2059H I_BFP1_CB_HVS_Tr(decimal digits=2) A
205AH I_ROC_BFP1_CB_HVS_Tr(decimal digits=2) A
205BH I_NegOC1_BFP_CB_HVS_Tr(decimal digits=2) A
205CH t_BFP11_CB_HVS_Tr(decimal digits=2) S
205DH TrpLog_BFP11_CB_HVS_Tr
205EH t_BFP12_CB_HVS_Tr(decimal digits=2) S
205FH TrpLog_BFP12_CB_HVS_Tr
Bit0:En_ROC_Ctrl_BFP_CB_HVS_Tr
Control Bit1:En_NegOC_Ctrl_BFP_CB_HVS_Tr
2060H
Word Bit2:En_ExtTrp_Ctrl_BFP_CB_HVS_Tr
Bit3:En_CB_Ctrl_BFP_CB_HVS_Tr

9. ST1 Diff Prot Settings

Address Setting Name Unit

2061H I_Pkp_PcntDiff_ST1(decimal digits=2) Ie
2062H I_InstDiff_ST1(decimal digits=2) Ie
2063H Slope1_PcntDiff_ST1(decimal digits=2)
2064H Slope2_PcntDiff_ST1(decimal digits=2)
2065H k_Harm_PcntDiff_ST1(decimal digits=2)
2066H TrpLog_Diff_ST1
Bit0:En_InstDiff_ST1
Control Bit1:En_PcntDiff_ST1
2067H
Word Bit2:Opt_Inrush_Ident_ST1
Bit3:Opt_CTS_Blk_PcntDiff_ST1

10. ST1 HVS Bak Prot Settings

Address Setting Name Unit

2068H V_NegOV_VCE_HVS_ST1(decimal digits=2) V
2069H Vpp_UV_VCE_HVS_ST1(decimal digits=2) V
206AH I_OC1_HVS_ST1(decimal digits=2) A
206BH t_OC1_HVS_ST1(decimal digits=2) S
206CH TrpLog_OC1_HVS_ST1
206DH I_OC2_HVS_ST1(decimal digits=2) A
206EH t_OC2_HVS_ST1(decimal digits=2) S

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Address Setting Name Unit

206FH TrpLog_OC2_HVS_ST1
2070H I_Alm_OvLd_HVS_ST1(decimal digits=2) A
2071H t_Alm_OvLd_HVS_ST1(decimal digits=2) S
2072H I_InitCool_OvLd_HVS_ST1(decimal digits=2) A
2073H t_InitCool_OvLd_HVS_ST1(decimal digits=2) S
2074H I_BO_OC_HVS_ST1(decimal digits=2) A
2075H t_BO_OC_HVS_ST1(decimal digits=2) S
Bit0:En_VCE_Ctrl_OC1_HVS_ST1
Bit1:En_VCE_Ctrl_OC2_HVS_ST1
Bit2:En_Mem_Curr_HVS_ST1
Control Bit3:Opt_VTS_Ctrl_OC_HVS_ST1
2076H
Word Bit4:En_Alm_OvLd_HVS_ST1
Bit5:En_InitCool_OvLd_HVS_ST1
Bit6:En_BO_OC_HVS_ST1
Bit7:En_LVSProt_Blk_OC1_HVS_ST1

11. ST1 Br1 Bak Prot Settings

Address Setting Name Unit

2077H V_NegOV_VCE_Br1_ST1(decimal digits=2) V
2078H Vpp_UV_VCE_Br1_ST1(decimal digits=2) V
2079H I_OC1_Br1_ST1(decimal digits=2) A
207AH t_OC1_Br1_ST1(decimal digits=2) S
207BH TrpLog_OC1_Br1_ST1
207CH I_OC2_Br1_ST1(decimal digits=2) A
207DH t_OC2_Br1_ST1(decimal digits=2) S
207EH TrpLog_OC2_Br1_ST1
207FH I_ROC1_Br1_ST1(decimal digits=2) A
2080H t_ROC1_Br1_ST1(decimal digits=2) S
2081H TrpLog_ROC1_Br1_ST1
2082H I_ROC2_Br1_ST1(decimal digits=2) A
2083H t_ROC2_Br1_ST1(decimal digits=2) S
2084H TrpLog_ROC2_Br1_ST1
Bit0:En_VCE_Ctrl_OC1_Br1_ST1
Control
2085H Bit1:En_VCE_Ctrl_OC2_Br1_ST1
Word
Bit2:Opt_VTS_Ctrl_OC_Br1_ST1

12. ST1 Br2 Bak Prot Settings

Address Setting Name Unit

2086H V_NegOV_VCE_Br2_ST1(decimal digits=2) V
2087H Vpp_UV_VCE_Br2_ST1(decimal digits=2) V
2088H I_OC1_Br2_ST1(decimal digits=2) A
2089H t_OC1_Br2_ST1(decimal digits=2) S

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Address Setting Name Unit

208AH TrpLog_OC1_Br2_ST1
208BH I_OC2_Br2_ST1(decimal digits=2) A
208CH t_OC2_Br2_ST1(decimal digits=2) S
208DH TrpLog_OC2_Br2_ST1
208EH I_ROC1_Br2_ST1(decimal digits=2) A
208FH t_ROC1_Br2_ST1(decimal digits=2) S
2090H TrpLog_ROC1_Br2_ST1
2091H I_ROC2_Br2_ST1(decimal digits=2) A
2092H t_ROC2_Br2_ST1(decimal digits=2) S
2093H TrpLog_ROC2_Br2_ST1
Bit0:En_VCE_Ctrl_OC1_Br2_ST1
Control
2094H Bit1:En_VCE_Ctrl_OC2_Br2_ST1
Word
Bit2:Opt_VTS_Ctrl_OC_Br2_ST1

13. ST2 Diff Prot Settings

Address Setting Name Unit

2095H I_Pkp_PcntDiff_ST2(decimal digits=2) Ie
2096H I_InstDiff_ST2(decimal digits=2) Ie
2097H Slope1_PcntDiff_ST2(decimal digits=2)
2098H Slope2_PcntDiff_ST2(decimal digits=2)
2099H k_Harm_PcntDiff_ST2(decimal digits=2)
209AH TrpLog_Diff_ST2
Bit0:En_InstDiff_ST2
Control Bit1:En_PcntDiff_ST2
209BH
Word Bit2:Opt_Inrush_Ident_ST2
Bit3:Opt_CTS_Blk_PcntDiff_ST2

14. ST2 HVS Bak Prot Settings

Address Setting Name Unit

209CH V_NegOV_VCE_HVS_ST2(decimal digits=2) V
209DH Vpp_UV_VCE_HVS_ST2(decimal digits=2) V
209EH I_OC1_HVS_ST2(decimal digits=2) A
209FH t_OC1_HVS_ST2(decimal digits=2) S
20A0H TrpLog_OC1_HVS_ST2
20A1H I_OC2_HVS_ST2(decimal digits=2) A
20A2H t_OC2_HVS_ST2(decimal digits=2) S
20A3H TrpLog_OC2_HVS_ST2
20A4H I_Alm_OvLd_HVS_ST2(decimal digits=2) A
20A5H t_Alm_OvLd_HVS_ST2(decimal digits=2) S
20A6H I_InitCool_OvLd_HVS_ST2(decimal digits=2) A
20A7H t_InitCool_OvLd_HVS_ST2(decimal digits=2) S
20A8H I_BO_OC_HVS_ST2(decimal digits=2) A

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Address Setting Name Unit

20A9H t_BO_OC_HVS_ST2(decimal digits=2) S
Bit0:En_VCE_Ctrl_OC1_HVS_ST2
Bit1:En_VCE_Ctrl_OC2_HVS_ST2
Bit2:En_Mem_Curr_HVS_ST2
Control Bit3:Opt_VTS_Ctrl_OC_HVS_ST2
20AAH
Word Bit4:En_Alm_OvLd_HVS_ST2
Bit5:En_InitCool_OvLd_HVS_ST2
Bit6:En_BO_OC_HVS_ST2
Bit7:En_LVSProt_Blk_OC1_HVS_ST2

15. ST2 Br1 Bak Prot Settings

Address Setting Name Unit

20ABH V_NegOV_VCE_Br1_ST2(decimal digits=2) V
20ACH Vpp_UV_VCE_Br1_ST2(decimal digits=2) V
20ADH I_OC1_Br1_ST2(decimal digits=2) A
20AEH t_OC1_Br1_ST2(decimal digits=2) S
20AFH TrpLog_OC1_Br1_ST2
20B0H I_OC2_Br1_ST2(decimal digits=2) A
20B1H t_OC2_Br1_ST2(decimal digits=2) S
20B2H TrpLog_OC2_Br1_ST2
20B3H I_ROC1_Br1_ST2(decimal digits=2) A
20B4H t_ROC1_Br1_ST2(decimal digits=2) S
20B5H TrpLog_ROC1_Br1_ST2
20B6H I_ROC2_Br1_ST2(decimal digits=2) A
20B7H t_ROC2_Br1_ST2(decimal digits=2) S
20B8H TrpLog_ROC2_Br1_ST2
Bit0:En_VCE_Ctrl_OC1_Br1_ST2
Control
20B9H Bit1:En_VCE_Ctrl_OC2_Br1_ST2
Word
Bit2:Opt_VTS_Ctrl_OC_Br1_ST2

16. ST2 Br2 Bak Prot Settings

Address Setting Name Unit

20BAH V_NegOV_VCE_Br2_ST2(decimal digits=2) V
20BBH Vpp_UV_VCE_Br2_ST2(decimal digits=2) V
20BCH I_OC1_Br2_ST2(decimal digits=2) A
20BDH t_OC1_Br2_ST2(decimal digits=2) S
20BEH TrpLog_OC1_Br2_ST2
20BFH I_OC2_Br2_ST2(decimal digits=2) A
20C0H t_OC2_Br2_ST2(decimal digits=2) S
20C1H TrpLog_OC2_Br2_ST2
20C2H I_ROC1_Br2_ST2(decimal digits=2) A
20C3H t_ROC1_Br2_ST2(decimal digits=2) S

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Address Setting Name Unit

20C4H TrpLog_ROC1_Br2_ST2
20C5H I_ROC2_Br2_ST2(decimal digits=2) A
20C6H t_ROC2_Br2_ST2(decimal digits=2) S
20C7H TrpLog_ROC2_Br2_ST2
Bit0:En_VCE_Ctrl_OC1_Br2_ST2
Control
20C8H Bit1:En_VCE_Ctrl_OC2_Br2_ST2
Word
Bit2:Opt_VTS_Ctrl_OC_Br2_ST2

17. MechRly Prot Settings

Address Setting Name Unit

20C9H t_MechRly1(decimal digits=1) S
20CAH TrpLog_MechRly1
20CBH t_MechRly2(decimal digits=1) S
20CCH TrpLog_MechRly2
20CDH t_MechRly3(decimal digits=1) S
20CEH TrpLog_MechRly3
20CFH t_MechRly4(decimal digits=1) S
20D0H TrpLog_MechRly4
Control Bit0:En_Supv_MechRly
20D1H
Word

8.4.5 Diagnostics

Function Code: 08H

Modbus function 08 provides a series of tests for checking the communication system between the
master and slave, or for checking various internal error conditions within the slave.

The function uses a two–byte sub-function code field in the query to define the type of test to be
performed. The slave echoes both the function code and sub-function code in a normal response.

The listing below shows the sub-function codes supported by the equipment.

Code Name
00H Return Query Data
01H Restart Comm Option
04H Force Listen Only Mode
0BH Return Bus Message Count
0CH Return Bus Comm. Error Count
0DH Return Bus Exception Error Cnt
0EH Return Slave Message Count
0FH Return Slave No Response Cnt

8.4.6 Exception Responses

Except for broadcast messages, when a master device sends a query to a slave device it expects

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a normal response. If the slave receives the query without a communication error but the salve
cannot handle it (for example, if the request is to read a non–existent coil or register), the slave will
return an exception response informing the master of the nature of the error.

The listing below shows the exception codes supported by the equipment.

Code Description
01H Illegal Function
02H Illegal Data Address
03H Illegal Data Value
07H Negative Acknowledge

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Chapter 9 Installation

9.1 General Description

The equipment must be shipped, stored and installed with the greatest care.

Choose the place of installation such that the communication interface and the controls on the
front of the device are easily accessible.

Air must circulate freely around the equipment. Observe all the requirements regarding place of
installation and ambient conditions given in this instruction manual.

Take care that the external wiring is properly brought into the equipment and terminated correctly
and pay special attention to grounding. Strictly observe the corresponding guidelines contained in
this section.

9.2 Safety Instructions

Modules and units may only be replaced by correspondingly trained personnel. Always observe
the basic precautions to avoid damage due to electrostatic discharge when handling the
equipment.

In certain cases, the settings have to be configured according to the demands of the engineering
configuration after replacement. It is therefore assumed that the personnel who replace modules
and units are familiar with the use of the operator program on the service PC.

Danger!

Only insert or withdraw the PWR module while the power supply is switched off. To this
end, disconnect the power supply cable that connects with the PWR module.

Warning!

Only insert or withdraw the other boards while the power supply is switched off.

Warning!

The modules of the RCS-985BT may only be inserted in its own slots. Components can be
damaged or destroyed by inserting boards in the wrong slots.

Danger!

Improper handling of the equipment can cause damage or an incorrect response of the
equipment itself or the primary plant.

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Warning!

Industry packs and ribbon cables may only be replaced or the positions of jumpers be
changed on a workbench appropriately designed for working on electronic equipment. The
RCS-985BT modules, bus backplanes are sensitive to electrostatic discharge when not in
the unit's housing.

The basic precautions to guard against electrostatic discharge are as follows:

z Should boards have to be removed from RCS-985BT installed in a grounded cubicle in an HV

switchgear installation, discharge yourself by touching station ground (the cubicle)
beforehand.

z Only hold electronic boards at the edges, taking care not to touch the components.

z Only works on boards that have been removed from the cubicle on a workbench designed for
electronic equipment and wear a grounded wristband. Do not wear a grounded wristband,
however, while inserting or withdrawing units.

z Always store and ship the electronic boards in their original packing. Place electronic parts in
electrostatic screened packing materials.

9.3 Checking the Shipment

Check that the consignment is complete immediately upon receipt. Notify the nearest
NARI-RELAYS Company or agent, should departures from the delivery note, the shipping papers
or the order be found.

Visually inspect all the material when unpacking it. When there is evidence of transport damage,
lodge a claim immediately in writing with the last carrier and notify the nearest NARI-RELAYS
Company or agent.

If the equipment is not going to be installed immediately, store all the parts in their original packing
in a clean dry place at a moderate temperature. The humidity should not exceed 90% at a
maximum temperature of +55°C; the permissible storage temperature range in dry air is -40°C to
+70°C.

9.4 Material and Tools Required

The necessary mounting kits will be provided, including screws, pincers and assembly
instructions.

A suitable drill and spanners are required to secure the cubicles to the floor using the plugs
provided (if RCS-985BT is mounted in cubicles).

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9.5 Device Location and Ambient Conditions

The place of installation should permit easy access especially to front of the device, i.e. to the
human-machine interface of the equipment.

There should also be free access at the rear of the equipment for additions and replacement of
electronic boards.

Since every piece of technical equipment can be damaged or destroyed by inadmissible ambient
conditions, such as:

1) The location should not be exposed to excessive air pollution (dust, aggressive substances).

2) Severe vibration, extreme changes of temperature, high levels of humidity, surge voltages of
high amplitude and short rise time and strong induced magnetic fields should be avoided as
far as possible.

3) Air must not be allowed to circulate freely around the equipment.

The equipment can in principle be mounted in any attitude, but it is normally mounted vertically
(visibility of markings).

Warning!

Excessively high temperature can appreciably reduce the operating life of the RCS-985BT.

9.6 Mechanical Installation

The equipment adopts IEC standard chassis and is rack with modular structure. RCS-985BT
equipment is IEC 12U high and 19” wide. Figure 9.6-1 shows its dimensions and Figure 9.6-2
shows the panel cut-out.

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Figure 9.6-1 Dimensions of the RCS-985BT

465

450
531.5

457.2

190.5

8 - Φ 6.8

Figure 9.6-2 Cut-out of RCS-985BT

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Note!

It is necessary to leave enough space top and bottom of the cut-out in the cubicle for heat
emission of the RCS-985BT.

As mentioned former (refer to Chapter 5), all modules must be plugged into the proper slots of the
RCS-985BT respectively. The safety instructions must be abided by when installing the boards,
see section 9.2.

In the case of equipment supplied in cubicles, place the cubicles on the foundations that have
been prepared. Take care while doing so not to jam or otherwise damage any of the cables that
have already been installed. Secure the cubicles to the foundations.

9.7 Electrical Installation and Wiring

9.7.1 Grounding Guidelines

Switching operations in HV installations generate transient over voltages on control signal cables.
There is also a background of electromagnetic RF fields in electrical installations that can induce
spurious currents in the devices themselves or the leads connected to them.

All these influences can influence the operation of electronic apparatus.

On the other hand, electronic apparatus can transmit interference that can disrupt the operation of
other apparatus.

In order to minimize these influences as far as possible, certain standards have to be observed
with respect to grounding, wiring and screening.

Note!

All these precautions can only be effective if the station ground is of good quality.

9.7.2 Cubicle Grounding

The cubicle must be designed and fitted out such that the impedance for RF interference of the
ground path from the electronic device to the cubicle ground terminal is as low as possible.

Metal accessories such as side plates, blanking plates etc., must be effectively connected
surface-to-surface to the grounded frame to ensure a low-impedance path to ground for RF
interference. The contact surfaces must not only conduct well, they must also be non-corroding.

Note!

If the above conditions are not fulfilled, there is a possibility of the cubicle or parts of it
forming a resonant circuit at certain frequencies that would amplify the transmission of
interference by the devices installed and also reduce their immunity to induced
interference.

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Movable parts of the cubicle such as doors (front and back) or hinged equipment frames must be
effectively grounded to the frame by three braided copper strips (see Figure 9.7-1).

The metal parts of the cubicle housing and the ground rail are interconnected electrically
conducting and corrosion proof. The contact surfaces shall be as large as possible.

Note!

For metallic connections please observe the voltage difference of both materials according
to the electrochemical code.

The cubicle ground rail must be effectively connected to the station ground rail by a grounding strip
(braided copper).

Figure 9.7-1 Cubicle grounding system

9.7.3 Ground Connection on the Device

There is a ground terminal on the rear panel (see Figure 9.7-3), and the ground braided copper
strip can be connected with it. Take care that the grounding strip is always as short as possible.
The main thing is that the device is only grounded at one point. Grounding loops from unit to unit
are not allowed.

There are some ground terminals on some connectors of the RCS-985BT, and the sign is “GND”.
All the ground terminals are connected in the cabinet of this relay. So, the ground terminal on the
rear panel (see Figure 9.7-2) is the only ground terminal of this device.

Figure 9.7-2 Ground terminal of the RCS-985BT

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9.7.4 Grounding Strips and their Installation

High frequency currents are produced by interference in the ground connections and because of
skin effect at these frequencies, only the surface region of the grounding strips is of consequence.

The grounding strips must therefore be of (preferably tinned) braided copper and not round copper
conductors, as the cross-section of round copper would have to be too large.

Data of braided copper strip: threaded M4, 2.5mm2.

Proper terminations must be fitted to both ends (press/pinch fit and tinned) with a hole for bolting
them firmly to the items to be connected.

The surfaces to which the grounding strips are bolted must be electrically conducting and
non-corroding.

The following figure shows the ground strip and termination.

Figure 9.7-3 Ground strip and termination

9.7.5 Making the Electrical Connections

Always make sure established guidelines for this type of terminal is followed during installation.
When necessary, please use screened twisted-pair cables to minimize susceptibility. Otherwise,
use any kind of regular nonscreened tinned RK cable or equivalent.

When using screened cabling always use 360° full screen cable bushing to ensure screen
coupling. Ensure that all signals of the single circuit are in the same single cable. Avoid mixing
current and voltage measuring signals in the same cable. Also use separate cables for control and
measuring circuits.

9.7.5.1 Connecting the CT circuits

Heavy-duty terminal block, M4 threaded terminal ends

9.7.5.2 Connecting the VT/CT circuits

VT circuit must be connected with the protective device through an MCB.

9.7.5.3 Connecting the auxiliary power

Auxiliary power cords cross can be directly screwed fixed on the rear panel of DC board.

9.7.5.4 Input/output signal connectors

Welding terminals; those devices are supplied with sufficient M4 screws for making connections to

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the rear mounted terminal blocks using ring terminals, with a recommended maximum of two ring
terminals per terminal.

To meet the insulation requirements of the terminal block, for the sake of safety, an insulating
sleeve should be fitted over the ring terminal after crimping.

The wire used for all connections to the welding terminal blocks and heavy duty terminal blocks,
except the RS-485 port, should have a minimum voltage rating of 300Vrms.

It is recommended that the auxiliary power circuit wiring should be protected by using a 16A high
rupture capacity (HRC) fuse of type NIT or TIA. For safety reasons, current transformer circuits
must never be open.

9.7.5.5 Installing the RS-485 serial port communication cables:

When using galvanic connection between the synchronizer equipment and communication
equipment or point-to-point galvanic connection between two equipments it is essential that the
cable installation is carefully done. This is true regardless of type of module used, only the
possible length of the cable differs. The factors that must be taken into account is the susceptibility
for noise disturbance, due to that the levels of the communication signal are very low. For a best
result, a cable with twisted pairs with screen should be used.

RS-485 serial communication interface, a termination 120-ohm resistor has to be connected at

each extremity of the bus. Refer to 8.2.

9.7.5.6 IRIG-B Connections (if applicable)

The IRIG-B input and BNC connector have a characteristic impedance of 50Ω. It is recommended
that connections between the IRIG-B equipment and the relay are made using coaxial cable of
type RG59LSF with a halogen free, fire retardant sheath.

9.7.5.7 Front EIA(RS)232 Port

Short term connections to the EIA(RS)232 port, located at the bottom of face cover, can be made
using a screened multi-core communication cable up to 15m long, or a total capacitance of 2500pF.
The cable should be terminated at the relay end with a 9-way, metal shelled, D-type male plug.

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Chapter 10 Commissioning

10.1 General Description

This relay is fully numerical in their design, implementing all protection and non-protection
functions in software. The relay employ a high degree of self-checking and in the unlikely event of
a failure, will give an alarm. As a result of this, the commissioning test does not need to be as
extensive as with non-numeric electronic or electro-mechanical relays.

To commission numerical relays, it is only necessary to verify that the hardware is functioning
correctly and the application-specific software settings have been applied to the relay.

Blank commissioning test and setting records are provided at the end of this manual for
completion as required.

Before carrying out any work on the equipment, the user should be familiar with the contents of the
safety and technical data sections and the ratings on the equipment’s rating label.

10.2 Safety Instructions

Warning!

Hazardous voltages are present in this electrical equipment during operation.

Non-observance of the safety rules can result in severe personal injury or property
damage.

Warning!

Only qualified personnel shall work on and around this equipment after becoming
thoroughly familiar with all warnings and safety notices of this manual as well as with the
applicable safety regulations.

Particular attention must be drawn to the following:

z The earthing screw of the device must be connected solidly to the protective earth conductor
before any other electrical connection is made.

z Hazardous voltages can be present on all circuits and components connected to the supply
voltage or to the measuring and test quantities.

z Hazardous voltages can be present in the device even after disconnection of the supply
voltage (storage capacitors!)

z The limit values stated in the technical data must not be exceeded at all, not even during
testing and commissioning.

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z When testing the device with secondary test equipment, make sure that no other
measurement quantities are connected. Take also into consideration that the trip circuits and
maybe also close commands to the circuit breakers and other primary switches are
disconnected from the device unless expressly stated.

Danger!

Current transformer secondary circuits must have been short-circuited before the current
leads to the device are disconnected.

Warning!

Primary test may only be carried out by qualified personnel, who are familiar with the
commissioning of protection system, the operation of the plant and safety rules and
regulations (switching, earthing, etc.)

10.3 Commission Tools

Required tools for testing of a protective device:

Minimum equipment required:

„ Multifunctional dynamic current and voltage injection test set with interval timer (For example,
Omicron CMC356).

„ Multimeter with suitable AC current range and AC/DC voltage ranges of 0-440V and 0-250V
respectively.

„ Continuity tester (if not included in the multimeter).

„ Phase angle meter.

„ Phase rotation meter.

Note!

Modern test set may contain many of the above features in one unit.

Optional equipment:

„ An electronic or brushless insulation tester with a DC output not exceeding 500 V (for
insulation resistance test when required).

„ A portable PC, with appropriate software (this enables the rear communications port to be
tested, if this is to be used, and will also save considerable time during commissioning).

„ EIA RS-485 to EIA RS-232 converter (if EIA RS-485 IEC60870-5-103 port is being tested).

„ An EPSON® 300K printer.

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„ RCS-900 serials dedicated protection tester TEST or HELP-90.

At the same time, the calculated settings, substation configuration diagram, the protective device
diagram and the instruction manual is essential to test the protective device.

The relay has to be set before the testing can start. Only the functions that are used should be
tested.

The response from a test can be viewed in different ways:

„ Binary output signals

„ Service values in the local HMI

„ A PC with RCSPC software or SCADA or master station

All used setting groups should be tested. The user can release the functions to be tested and
prevent other functions from operation by setting the corresponding parameters.

The setting checks ensure that all of the application-specific protection settings (i.e. both the
protection’s function and programmable scheme logic settings), for the particular installation, have
been correctly applied to the protection.

10.4 Setting Familiarization

When commissioning a RCS-985BT for the first time, sufficient time should be allowed to become
familiar with the method by which the settings are applied. The Chapter 7 contains a detailed
description of the menu structure of this relay.

With the front cover in place all keys are accessible. All menu cells can be read. LED indicators
and alarms can be reset. Protection or configuration settings can be changed, or fault and event
records cleared. However, menu cells will require the appropriate password to be entered before
changes can be made.

Alternatively, if a portable PC is available together with suitable setting software (such as

RCS-9700 SAS software), the menu can be viewed a page at a time to display a full column of
data and text. This PC software also allows settings to be entered more easily, saved to a file on
disk for future reference or printed to produce a setting record. Refer to the PC software user
manual for details. If the software is being used for the first time, allow sufficient time to become
familiar with its operation.

10.5 Product Checks

These product checks cover all aspects of the relay which should be checked to ensure that it has
not been physically damaged prior to commissioning, is functioning correctly and all input quantity
measurements are within the stated tolerances.

If the application-specific settings have been applied to the relay prior to commissioning, it is
advisable to make a copy of the settings so as to allow them restoration later. This could be done

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by extracting the settings from the relay itself via printer or manually creating a setting record.

10.5.1 With the Relay De-energized

The RCS-985BT is fully numerical and the hardware is continuously monitored. Commissioning
tests can be kept to a minimum and need only include hardware tests and conjunctive tests. The
function tests are carried out according to user’s correlative regulations.

The following tests are necessary to ensure the normal operation of the equipment before it is first
put into service.

„ Hardware tests

These tests are performed for the following hardware to ensure that there is no hardware
defect. Defects of hardware circuits other than the following can be detected by
self-monitoring when the DC power is supplied.

„ User interfaces test

„ Binary input circuits and output circuits test

„ AC input circuits test

„ Function tests

These tests are performed for the following functions that are fully software-based. Tests of
the protection schemes and fault locator require a dynamic test set.

„ Measuring elements test

„ Timers test

„ Metering and recording test

„ Conjunctive tests

The tests are performed after the relay is connected with the primary equipment and other
external equipment.

„ On load test.

„ Phase sequence check and polarity check.

10.5.1.1 Visual Inspection

After unpacking the product, check for any damage to the relay case. If there is any damage, the
internal module might also have been affected, contact the vendor. Following items listed is
necessary.

„ Protection panel

Carefully examine the protection panel, protection equipment inside and other parts inside to
see that no physical damage has occurred since installation.

The rated information of other auxiliary protections should be checked to ensure it is correct

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for the particular installation.

„ Panel wiring

Check the conducting wire which is used in the panel to assure that their cross section
meeting the requirement.

Carefully examine the wiring to see that they are no connection failure exists.

„ Label

Check all the isolator binary inputs, terminal blocks, indicators, switches and push buttons to
make sure that their labels meet the requirements of this project.

„ Equipment plug-in modules

Check each plug-in module of the equipments on the panel to make sure that they are well
installed into the equipment without any screw loosened.

„ Earthing cable

Check whether the earthing cable from the panel terminal block is safely screwed to the panel
steel sheet.

„ Switch, keypad, isolator binary inputs and push button

Check whether all the switches, equipment keypad, isolator binary inputs and push buttons
work normally and smoothly.

10.5.1.2 Insulation Test (if required)

Insulation resistance tests are only necessary during commissioning if it is required for them to be
done and they have not been performed during installation.

Isolate all wiring from the earth and test the isolation with an electronic or brushless insulation
tester at a DC voltage not exceeding 500V, The circuits need to be tested should include:

„ Voltage transformer circuits

„ Current transformer circuits

„ DC power supply

„ Optic-isolated control inputs

„ Output contacts

„ Communication ports

The insulation resistance should be greater than 100MΩ at 500V.

Test method:

To unplug all the terminals sockets of this protective device, and do the Insulation resistance test
for each circuit above with an electronic or brushless insulation tester.

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On completion of the insulation resistance tests, ensure all external wiring is correctly reconnected
to the protection

10.5.1.3 Check the Jumpers

In general, the jumpers of the relay have been set correctly before sent to user. While, checking
the jumpers is a good habit before the relay is brought to service.

10.5.1.4 External Wiring

Check that the external wiring is correct to the relevant relay diagram and scheme diagram.
Ensure as far as practical that phasing/phase rotation appears to be as expected.

Check the wiring against the schematic diagram for the installation to ensure compliance with the
customer’s normal practice.

10.5.1.5 Auxiliary Supply

The relay can be operated from either 110/125Vdc or 220/250Vdc auxiliary supply depending on
the relay’s nominal supply rating. The incoming voltage must be within the operating range
specified in the following table, before energizing the relay, measure the auxiliary supply to ensure
it within the operating range.

Rated Voltage 110/125Vdc 220/250Vdc

Variation 80% ~ 120% 80% ~ 120%

It should be noted that the relay can withstand an AC ripple of up to 15% of the upper rated voltage
on the DC auxiliary supply.

Warning!

Energize the relay only if the auxiliary supply is within the specified operating ranges.

10.5.2 With the Relay Energized

The following groups of checks verify that the relay hardware and software is functioning correctly
and should be carried out with the auxiliary supply applied to the relay.

The current and voltage transformer connections must remain isolated from the relay for these
checks. The trip circuit should also remain isolated to prevent accidental operation of the
associated circuit breaker.

10.5.2.1 Front Panel LCD Display

The liquid crystal display (LCD) is designed to operate in a wide range of substation ambient
temperatures. For this purpose, this relay has an automatic “LCD contrast” adjusting feature,
which is capable to adjust LCD contrast automatically according to the ambient temperature.

Connect the relay to DC power supply correctly and turn the relay on. Check program version and
forming time displayed in command menu to ensure that are corresponding to what ordered.

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10.5.2.2 Date and Time

If the time and date is not being maintained by substation automation system, the date and time
should be set manually.

Set the date and time to the correct local time and date using menu item “CLOCK”.

In the event of the auxiliary supply failing, with a battery fitted on CPU board, the time and date will
be maintained. Therefore when the auxiliary supply is restored the time and date will be correct
and not need to set again.

To test this, remove the auxiliary supply from the relay for approximately 30s. After being
re-energized, the time and date should be correct.

10.5.2.3 Light Emitting Diodes (LEDs)

On power up, the green LED “HEALTHY” should have illuminated and stayed on indicating that
the relay is healthy.

The relay has latched signal relays which remember the state of the trip, auto-reclosing when the
relay was last energized from an auxiliary supply. Therefore these indicators may also illuminate
when the auxiliary supply is applied. If any of these LEDs are on then they should be reset before
proceeding with further testing. If the LED successfully reset, the LED goes out. There is no testing
required for that that LED because it is known to be operational.

It is likely that alarms related to voltage transformer supervision will not reset at this stage.

1. Test LED "HEALTHY"

Apply the rated DC Power supply and check that the “HEALTHY” LED is lighting in green. We
need to emphasize that the “HEALTHY” LED is always lighting in operation course except that the
equipment find serious errors in it.

2. Test LED "ALARM"

Produce one of the abnormal conditions listed in Table 4.4-2, the “ALARM” LED will light in yellow.
When abnormal condition reset, the “ALARM” LED extinguishes.

3. Testing the "TRIP" LED

The “TRIP” LED can be tested by initiating a manual circuit breaker trip from the relay. However
the “TRIP” LED will operate during the setting checks (performed later). Therefore no further
testing of the “TRIP” LED is required at this stage.

10.5.2.4 Testing the AC Current Inputs

This test verified that the accuracy of current measurement is within the acceptable tolerances.

Apply current equal to the line current transformer secondary winding rating to each current
transformer input of the corresponding rating in turn, see the following table or external connection
diagram for appropriate terminal numbers, checking its magnitude using a multimeter/test set
readout. The corresponding reading can then be checked in the relays menu.

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The measurement tolerant error is in range of ±2.5% or 0.02In, whichever is greater. However an
additional allowance must be made for the accuracy of the test equipment being used.

Current channel linearity and precision checkout

Input Measurement (on LCD)

Group No. Item
Value Angle Value Angle
IA
Three-phase
IB
current channel 1
IC
IA
…….. IB
IC
Zero-sequence
3I0
current channel 1
…….. 3I0

10.5.2.5 Testing the AC Voltage Inputs

This test verified that the accuracy of voltage measurement is within the acceptable tolerances.

Apply rated voltage to each voltage transformer input in turn; checking its magnitude using a
multimeter/test set readout. The corresponding reading can then be checked in the relays menu.

The measurement tolerant error is in range of ±2.5% or 0.1V, whichever is greater. However an
additional allowance must be made for the accuracy of the test equipment being used.

Voltage channel linearity and precision checkout

Input Measurement (on LCD)

Group No. Item
Value Angle Value Angle
UA
Three-phase
UB
voltage channel 1
UC
UA
……… UB
UC
zero-sequence
3U0
voltage channel 1
……… 3U0

10.5.2.6 Testing the Binary Inputs

This test checks that all the binary inputs on the relay are functioning correctly.

The binary inputs should be energized one at a time, see external connection diagrams for
terminal numbers.

Ensure that the voltage applied on the binary input must be within the operating range.

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The status of each binary input can be viewed using menu item “CPU BI STATE” or “MON BI
STATE”. Sign “1” denotes an energized input and sign “0” denotes a de-energized input.

Binary Inputs testing checkout

Terminal No. Signal Name BI Status on LCD Correct?

10.5.2.7 Test Output Relays

This test checks that all the output relays are functioning correctly. Connect a continuity tester
across the terminals corresponding to each output relays as given in external connection diagram.

Note!

The terminals mentioned below are of the relay other than terminals mounted on panel. It
is more convenient to connect test set through terminals mounted on panel.

1. Watchdog contact check

Switch off the power of the protection equipment, and then normally closed watchdog contacts (i.e.
equipment being blocked contacts) can be tested, which are closed when the protection
equipment is powered off.

2. Alarm contacts check

Simulate various abnormalities of equipment operation, such as VT circuit failure, CT circuit failure
and etc., and the corresponding alarm contact can be tested.

3. Tripping signal contacts check

Simulate various faults to make every protection operate, and the corresponding signal contact
can be tested.

4. Tripping output contacts check

Please first configure one tripping matrix of some one protection to select all tripping output
channels. Then simulate a fault to make the protection operates and all tripping output contacts
can be tested

10.5.3 Print Fault Report

In order to acquire the details of protection operation, it is convenient to print the fault report of
protection device. For further details, see section 7.3.6.

A complete fault report shall include the following contents:

1. The fault report for the latest tripping event

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2. Fault related information, such as the maximum fault current, fault phase, etc.

3. Wave record of the variation of all the analog quantity and binary inputs during the course of
fault occurrence.

10.5.4 On-load Checks

The objectives of the on-load checks are:

z Confirm the external wiring to the current inputs is correct.

z Check the polarity of each current transformer.

However, these checks can only be carried out if there are no restrictions preventing the
tenderization of the plant being protected.

Remove all test leads, temporary shorting leads, etc. and replace any external wiring that has
been removed to allow testing.

If it has been necessary to disconnect any of the external wiring from the protection in order to
perform any of the foregoing tests, it should be ensured that all connections are replaced in
accordance with the relevant external connection or scheme diagram. Confirm current transformer
wiring.

10.5.5 Final Checks

After the above tests are completed, remove all test or temporary shorting leads, etc. If it has been
necessary to disconnect any of the external wiring from the protection in order to perform the
wiring verification tests, it should be ensured that all connections are replaced in accordance with
the relevant external connection or scheme diagram.

Ensure that the protection has been restored to service.

If the protection is in a new installation or the circuit breaker has just been maintained, the circuit
breaker maintenance and current counters should be zero. If a test block is installed, remove the
test plug and replace the cover so that the protection is put into service.

Ensure that all event records, fault records, disturbance records and alarms have been cleared
and LED’s has been reset before leaving the protection.

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 Chapter 11 Maintenance

Chapter 11 Maintenance

11.1 Maintenance Schedule

It is recommended that products supplied by NARI-RELAYS receive periodic monitoring after

installation. In view of the critical nature of protective relays and their infrequent operation, it is
desirable to confirm that they are operating correctly at regular intervals.

This relays are self-supervised and so require less maintenance than earlier designs of relay. Most
problems will result in an alarm so that remedial action can be taken. However, some periodic
tests should be done to ensure that the relay is functioning correctly and the external wiring is
intact.

11.2 Regular Testing

The relay is almost completely self-supervised. The circuits which can not be supervised are
binary input, output circuits and human machine interfaces. Therefore regular testing can be
minimized to checking the unsupervised circuits.

11.3 Failure Tracing and Repair

Failures will be detected by automatic supervision or regular testing.

When a failure is detected by supervision, a remote alarm is issued and the failure is indicated on
the front panel with LED indicators and LCD display. It is also recorded in the alarm record.
Failures detected by supervision are traced by checking the “ALARM REPORT” screen on the
LCD. See section 4.1 for the details of the alarm events.

When a failure is detected during regular testing, confirm the following:

z Test circuit connections are correct

z Modules are securely inserted in position

z Correct DC power voltage is applied

z Correct AC inputs are applied

z Test procedures comply with those stated in the manual

11.4 Replace Failed Modules

If the failure is identified to be in the relay module and the user has spare modules, the user can
recover the protection by replacing the failed modules.

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Repair at the site should be limited to module replacement. Maintenance at the component level is
not recommended.

Check that the replacement module has an identical module name (AI, PWR, CPU, MON, SIG, BI,
BO, etc.) and hardware type-form as the removed module. Furthermore, the CPU module
replaced should have the same software version. And AI and PWR module replaced should have
the same ratings.

The module name is indicated on the top front of the module. The software version is indicated in
LCD menu “VERSION”.

Warning!

Units and modules may only be replaced while the supply is switched off and only by
appropriately trained and qualified personnel. Strictly observe the basic precautions to
guard against electrostatic discharge.

Warning!

When handling a module, take anti-static measures such as wearing an earthed wrist band
and placing modules on an earthed conductive mat. Otherwise, many of the electronic
components could suffer damage. After replacing the CPU module, check the settings.

Danger!

After replacing modules, be sure to check that the same configuration is set as before the
replacement. If this is not the case, there is a danger of the unintended operation of
switchgear taking place or of protections not functioning correctly. Persons may also be
put in danger.

1. Replacing a module

1) Switch off the DC power supply

2) Disconnect the trip outputs

3) Short circuit all AC current inputs and disconnect all AC voltage inputs

4) According to different module to take different operating steps, and please refer to following.

WARNING: Hazardous voltage can be present in the DC circuit just after switching off the

DC power supply. It takes approximately 30 seconds for the voltage to discharge.

2. Replacing the Human Machine Interface Module (front panel)

1) Open the relay front panel

2) Unplug the ribbon cable on the front panel by pushing the catch outside.

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 Chapter 11 Maintenance

3) Detach the HMI module from the relay

4) Attach the replacement module in the reverse procedure.

3. Replacing other modules

1) Unscrew the module connector

2) Unplug the connector from the target module.

3) Unscrew the module.

4) Pull out the module

5) Inset the replacement module in the reverser procedure.

6) After replacing the CPU module, input the application-specific setting values again.

Figure 11.4-1 Replace module

11.5 Replace Button Battery

Each relay has a battery to maintain status data and the correct time when the auxiliary supply
voltage fails. The data maintained includes event, fault and disturbance records.

This battery will periodically need changing. If the battery-backed facilities are not required to be
maintained during an interruption of the auxiliary supply, the steps below can be followed to
remove the battery.

CAUTION: Before carrying out any work on the equipment, the user should be familiar with

the contents of the safety and technique data sections and the ratings on the equipment’s
rating label.

Instructions for replacing the battery

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1. Withdraw the CPU board from RCS-985BT.

2. Gently extract the battery from its socket. If necessary, use a small, insulated screwdriver to
prize the battery free.

3. Ensure that the metal terminals in the battery socket are free from corrosion, grease and dust.

4. The replacement battery should be removed from its packaging and placed into the battery
holder, taking care to ensure that the polarity markings on the battery agree with those
adjacent to the socket as shown as below.

Figure 11.5-1 Battery replacement

Note!

Ensure that the battery is securely held in its socket and that the battery terminals are
making good contact with the metal terminals of the socket.

5. Insert the CPU module into RCS-985BT.

11.6 Cleaning

Before cleaning the relay, ensure that all AC/DC supplies, current transformer connections are
isolated to prevent any chance of an electric shock whilst cleaning. Use a smooth cloth to clean
the front panel. Do not use abrasive material or detergent chemicals.

The equipment may be cleaned using a lint-free cloth moistened with clean water. The use of
detergents, solvents or abrasive cleaners is not recommended as they may damage the relay’s
surface and leave a conductive residue.

11.7 Storage

The spare relay or module should be stored in a dry and clean room. Based on IEC standard
60255-6 the storage temperature should be from -40°C to +70°C, but the temperature of from 0oC
to +40oC is recommended for long-term storage.

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 Chapter 12 Decommissioning and Disposal

Chapter 12 Decommissioning and Disposal

12.1 Decommissioning

1. Switching off

To switch off the protective device, switch off the external miniature circuit breaker of the power
supply.

2. Disconnecting Cables

Disconnect the cables in accordance with the rules and recommendations made by relational
department.

Danger!

Before disconnecting the power supply cables that connected with the DC module of the
protective device, make sure that the external miniature circuit breaker of the power supply
is switched off.

Danger!

Before disconnecting the cables that are used to connect analog input module with the
primary CTs and VTs, make sure that the circuit breaker for the primary CTs and VTs is
switched off.

3. Dismantling

The protective device rack may now be removed from the system cubicle, after which the cubicles
may also be removed.

Danger!

When the station is in operation, make sure that there is an adequate safety distance to
live parts, especially as dismantling is often performed by unskilled personnel.

12.2 Disposal

In every country there are companies specialized in the proper disposal of electronic waste.

Note!

Strictly observe all local and national regulations when disposing of the device.

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 Chapter 13 Manual Version History

Chapter 13 Manual Version History

In the latest version of RCS-985BT, several descriptions on existing features have been modified.
These are described with reference to the table listed below:

Manual History

Software Version Manual Version Source Documentation

RCS-985BT Generator-Transformer Unit
R3.02 R1.00
Protection

Modification Recorder

Manual Version Section Page No. Description of change Note

R1.00 Original release

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