Mokhalad Ali Chapter 2 lecture3

Single Electron Transistor (SET)

 The concept of miniaturization of devices is date back, which originated from the classic talk
entitled “There’s Plenty of Room at the Bottom” given by physicist Richard Feynman in an
annual meeting of American Physical Society on 29th December 1959.
 In his talk, he challenges the miniaturization and focuses idea on how to manipulate and control
the matter in atomic and molecular levels. Finally his dream came into reality with the discovery
of carbon nanotube by Sumio Ijima in 1991 at the NEC laboratory, Tsukuba, Japan.
 This discovery became the launching pad of Today’s nanoscience and nanotechnology.
 Since then worldwide, scientists, researchers, engineers and technologists have started to
investigate a variety of ways to synthesize materials in the size of nanometer and finally led to
the development of quantum dots (QD).
 This QD is a nanoparticle having all the dimensions reduced to below 100 nm, which is the main
building block of Single Electron Transistor (SET).
 This SET is actually a new type of switching device that uses controlled electron tunneling to
amplify current.
 According to Moor’s law every after 18 months the density of transistor in integrated circuit is
becoming almost double.
 The resulting fact of size reduction and power dissipation may limit the scope of further
miniaturization of integrated circuit using the existing semiconductor technology (silicon based)
and leads to evolve alternatives using nanoscience and technology.
 As such, SET is expected to be an option to replace normal transistor either bipolar transistor
(BJT) or field effect transistor (FET), the building block of computers, for the next generation of
electronic devices like optical computers etc.
 However, the SET is yet in its infancy because of complexity in cost effective fabrications but
still having promising applications in the next generation electronic devices and sensors.
 Mokhalad Ali Chapter 2 lecture3

Transistor

 Transistor was first invented by Shockley, Brattain and Barden in 1948 [9].
 Then it was integrated in a chip as integrated circuit in 1961.
 In 2003, it was reduced to processor consisting of millions of transistors in a chip to be used in
the computer.
 Finally, the processor size became 22 nm by the year of 2013. As such, miniaturization of
transistor has made the complemented metal oxide semiconductor (CMOS) as the workhorse of
modern electronics.
 By the forecast of Moor’s law as depicted in the Fig., CMOS has attained its least most possible
size and likely ending the regime of semiconductor technology.

 Transistor is a three terminal switching device used in computers as well as electronic devices.
 The three terminals are source (S), drain (D) and gate (G) .
 It is of two kinds such as n-channel and p-channel depending on the type of material of channel.
 They are broadly classified as bipolar transistor (BJT) and field effect transistor (FET).
 Complementary metal–oxide–semiconductor (CMOS) is the latest version of FET.
 The FET is constructed with n-type (n-channel) or p-type (p-channel) semiconductor as channel
and one or two gate consisting of p-type (for n-channel) or n-type (p-channel) semiconductor
separated from the channel by insulating layer as depicted in the Fig. below.
 Mokhalad Ali Chapter 2 lecture3

Principle of Operation

 In its operation, the drain-to-source voltage (VDS) provides current through the channel.
 The gate voltage (VGS) controls the current (electrons) flow through the channel by depleting
immobile opposite charge layers as depicted in figure-2(b).
 Notable here, millions of electrons flows through the channel in its operation and maximum of them
dissipated as heat, which ultimately heats up the device and radiates out.
 The resulting effect is therefore power loss. Further miniaturization and power dissipation are the
challenges, which may be meeting by the use of SET in the next generation technology.
 By the time, the fabrication of SET has been possible in the laboratory, wherein QD is the main part,
but yet to be publicly available in the market with any devices.

Quantum Dot (QD)

 When all the three dimensions of a material reduced to the nanometer range, then this material is
called quantum dot (QD).
 It may have cubical or spherical shape. When the material dimensions reduce then the
delocalized electrons become localized and confined with discrete energy levels, which can be
called quantized.
 As such, they behave like an atom and therefore sometimes referred to as artificial atom
Accordingly, its electrical and optical properties depend mostly on its size and geometrical
structure of the quantum dot (QD).
 There is metallic and semiconductor QDs.
 The metallic QD used in the construction of SET.
 The density of quantum energy states of localized electrons depend on the size of QD.
 Mokhalad Ali Chapter 2 lecture3

 The smallest QDs have the compressed quantum energy states whereas the biggest QDs have
spaced quantum energy states of localized electrons as depicted in figure-3.

Single Electron Transistor (SET)

 A single electron transistor (SET) is a new type of switching device that uses controlled electron
tunneling to amplify current.
 This transistor is constructed based on quantum mechanical principle.
 The single electron transistor is similar to the normal transistor (FET) except the channel is
replaced by QD.
 The QD is separated by thin insulators from both the source and drain.
 The thin insulators act as tunnel barrier between source to QD and QD to drain.
 The gate is connected to the QD by a capacitor, Cg. as shown in figure-4.
 In SET, electron tunnels in two steps such as source to dot and dot to drain.
 The gate voltage Vg controls the charge on this capacitor Cg.
 Mokhalad Ali Chapter 2 lecture3

Working Principle

 The metallic QD, which is separated from the source and drain by the thin insulators, is
capacitively coupled to the gate as shown in figure-5(a).
 This gate controls the tunneling current across the tunnel barrier and operates on the principle of
coulomb blockade

 The energy needed to charge the capacitor is e2 /2. It is typically 80 meV [1].
 If this energy is not supplied to the system electron transport will be blocked at sufficiently lower
temperature, this is known as coulomb blockade (CB) as shown in figure-5(b).
 The working principle with the help of biasing is discussed below:
 Under no bias condition, the transportation of electron from source to drain will not take place
because the Fermi levels of both the source and drain will be in the same level and the localized
as well as quantized electrons are in quantum mechanically confinement as discrete energy
levels and provides coulomb blockade in QD. This situation is depicted in figure-6(a).

 Now if a bias voltage applied between drain to source (VDS), then the Fermi level of sources, S
will go up and of drain, D go down by the amount of energy /2, which cause off Fermi levels
between source and drain.
 This situation is depicted in figure-6(b). In this case, electron may transfer from source to QD
but without gate voltage (VG) it will not happened because for an extra electron, the energy of
 Mokhalad Ali Chapter 2 lecture3

QD will be increased by the same amount, which is contrary to the principle of conservation of
energy of the system.
 As such, by sweeping the gate voltage for a fixed drain to source voltage, VDS, the tunneling of
one electron through the QD in a fashion source to QD and QD to drain is possible to make.
 In that, when a gate voltage, VG is changed by ΔVg=e /Cg, then for a certain situation, the
whole energy levels of QD go down below the Fermi level of source region but remain above the
Fermi level in the drain region as depicted in figure-6(c).
 Under this condition, electron from source will hope to the QD and from QD to drain.
Accordingly, the laws of conservation of energy will be maintained inside the QD.
 By thus gate controls tunneling of one electron from source to drain.
 This is the working principle of SET.
 Now if a curve for drain current, I as a function of gate voltage, VG is plotted then the current
spike will be obtained every after e/Cg volt as depicted in figure-7(a).
 For different gate voltage, VG by changing the bias, VDS the current, I will increase, which is
depicted in figure-7(b).
 If both the bias is simultaneously changed and plot the data as VDS vs. Vg, then the coulomb
diamond will be obtained as shown in figure-7(c).
Mokhalad Ali Chapter 2 lecture3
 Mokhalad Ali Chapter 2 lecture3

Promising applications of SET

The SET used in a variety of applications as describe below:

A. The SET are efficient charge sensors for reading out the spin or charge qbits confined in QD.
The SET can be used as an efficient probe of signal-to-noise ratio both for dc and radio
frequency single shot measurement.

B. The SET can effectively detect infrared signal at the room temperature and therefore can serve as
IR sensor in sophisticated device like IR camera.

C. The SET can be used as extremely sensitive and potentially useful detector of microwave wave
radiation.

D. The high sensitivity of SETs has enabled them to be used as supersensitive electrometers in
unique physical measurements.

E. Another application of single-electron electrometry is the possibility of measuring the electron

F. The problem of leakage current is solved by the use of another logic device name charge state
logic in which single bits of information are presented by the presence/absence of single
electrons at certain conducting islands throughout the whole circuit. In these circuits the static
currents and power vanish, since there is no dc current in any static state.

G. An SET having nonvolatile memory function is a key for the programmable SET logic.

H. One new avenue toward a new standard of absolute temperature can be developed by the use of
1D single-electron arrays.

I. The single-electron transistors can be used in the "voltage state" mode.

Limitations of SET Implementations

Despite variety of applications, SET implementation in the device has some limitations as follows:

A. The first major limitation with the single electron logic circuits is the randomness of the
background charge.
B. The another big limitation with all the known types of single electron logic devices is the
requirement Ec~100kB T, which in practice means sub-nanometer island size for room
temperature operation.
C. Outside environment linking with SETs by normal wire connection is another limitation
considering the size of SET.
D. Lithography technique is another major limitation with single electron devices because of
difficulty in fabrication at room temperature.
E. The rate of coherent quantum mechanical process is crudely less than that for the single electron-
tunneling.