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Lab 1 Mixed Signal

The document is a lab report that describes experiments conducted with current mirror circuits using NMOS transistors. The objectives were to: 1) Estimate NMOS parameters, 2) Design a current mirror circuit, and 3) Analyze the effect of varying the load resistance. Procedures included building current mirror circuits on a breadboard and in PSpice, measuring currents and voltages, and plotting the results. The experiments showed that the load current initially increases with load voltage as the NMOS transitions from cutoff to saturation, then becomes constant in saturation.

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Nornis Dalina
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356 views11 pages

Lab 1 Mixed Signal

The document is a lab report that describes experiments conducted with current mirror circuits using NMOS transistors. The objectives were to: 1) Estimate NMOS parameters, 2) Design a current mirror circuit, and 3) Analyze the effect of varying the load resistance. Procedures included building current mirror circuits on a breadboard and in PSpice, measuring currents and voltages, and plotting the results. The experiments showed that the load current initially increases with load voltage as the NMOS transitions from cutoff to saturation, then becomes constant in saturation.

Uploaded by

Nornis Dalina
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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Lab Report

EXPERIMENT 1: Current Mirror Circuits


EEB 2072: Analogue Mixed Signal System Lab

NAME : NORNIS DALINA BINTI NAWAWI


ID : 16001042
DATE : 14th Jan 2020
GROUP : TUESDAY (9a.m. to 1p.m.)
LOCATION : 22-01-15
1. Introduction.

During the study of MOSFET amplifiers, bias circuits were used to operate the
MOSFETs in the required saturation region. These bias circuit can be sources to
establish the required quiescent drain current for the design. The current mirror circuit
is a current source circuit used in the design of integrated circuits.

Current mirror.
The two-transistor current source, also called a current mirror, is the basic
building block in the design of integrated circuit current sources. A current mirror is a
circuit designed to copy a current through one active device by controlling the current
in another active device of a circuit, keeping the output current constant regardless of
loading. The current being "copied" can be, and sometimes is, a varying signal
current.
So related to this experiment, we are using MOSFET (NMOS) as main
component of our experiment. During the study of MOSFET amplifiers, bias circuits
were used to operate the MOSFETs in the required saturation region. These bias
circuits can be current sources to establish the required quiescent drain current for the
design. The current mirror circuit is a current source circuit used in the design of
integrated circuits.

2. Objectives:

In this experiment we are aiming to:

1. Estimate the NMOS parameters.


2. Design a Current Mirror circuit.
3. Analyze the effect of varying the load resistance.

3. Procedure & Disccussion.

Pre-lab:
Question 1(a):
1. Build a circuit based on the lab manual by using NMOS BS107 on a breadboard.
2. Apply 0.5V and put ammeter in between V DD source and the NMOS to measure a
current.
3. Slowly increase the VDD in small increments until current starts to flow by using
ammeter.
4. Record where the NMOS has transitioned from cut off to being ON state. The
voltage represents the the threshold voltage (Vt).
Question 1(b):
1. Add 1 kΩ resistor in series with the ammeter as shown in figure 1(b) based on lab
manual. “Diode connected” will ensure the NMOS operates in saturation mode.
2. Use VDD = 5V
3. Measure the DC voltage between the drain and ground/source (𝑉𝐷𝑆𝑠𝑎𝑡) using
Oscilloscope and the drain current(𝐼𝐷) using an ammeter.
4. Use formula below to calculate the conduction parameter (𝑘𝑛)
1 W
k n= k ' n
2 L

Question 2:

1. Design a current mirror circuit as in Figure 2 based on the lab manual.


2. Obtain the suitable RREF, for an IL = 5 mA and V1= 10V.
3. Then, use estimated threshold voltage (𝑉𝑡) and the conduction parameter (𝑘𝑛)
which is the values obtained in the previous section.
4. Calculate the minimum output voltage (𝑉𝑜) required for this current mirror to
operate.
5. Set R L = 1kΩ and obtain the minimum required load voltage.

Question 3:
1. Simulate the circuit from question 2 using Pspice software using the BS107 NMOS
model.
2. Use a load voltage (𝑉𝐿) so that V L ≤ V L ≤9 V .
min

3. Attach the used schematics.


4. Plot and measure the DC current values of I REF and I l.
5. Plot and measure the DC voltage values of V gs and V o

Question 4:
1. Still using your same circuit from question 2, sweep the load voltage (𝑉𝐿) from 0 to
10 V in steps of 0.5 V.
2. Plot V o , V gs versus V L and I L, I REF versus V L
3. Justify the observation on I L with respect to increasing values of V L
Lab-Experiment:
Experiment 1:
1. Build the circuit from question 2.
2. Apply load voltage V L= 7V.
3. Use the multi-meter and measure the DC current values of I REF and I l
4. Use the multi-meter and measure the DC voltage values of V o , V gs and V L
5. Compare the measurements of the designed with the simulated values.
Experiment 2:
1. Build the circuit from question 4.
2. Sweep the load voltage as stated in question 4
3. Use the multi-meter and measure the DC current values of V o and I l for each of V L
4. Plot a graph of I L versus V L
5. Plot a graph of V o versus V L
6. Compare the measurements of the designed with the simulated values.
Question 3:
Attach schematics by using Pspice software.

Plot and measure the DC current values of IREF and IL :

Theoretical value of Iref = 7.3956mA


Calculated value of Iref based on Q2= 7.869mA
Theoretical value of IL = 6.8116mA
Calculated value of IL based on Q2 = 5mA
Plot and measure the DC voltage Vgs and Vo. :

Theoretical value of Vgs= 2.6044V


Calculated value of Vgs based on Q2= 2.085V
Theoretical value of Vo = 0.188V
Calculated value of Vobased on Q2= 0.285V

Question 4:
Plot Vo, Vgs versus VL :

The increasing of load voltage affect triode to saturation. When VL increase, Vo and Vgs
will increase.

Plot the IL, Iref, versus VL :

IL constant at the end because its reach saturation region. Initially in triode region
which is off state and saturation region will be on state of NMOS.

-Lab Experiment
Experiment 1: The result (using the multi-meter) for current and voltage.
V gs=1.896V
V o =0.160 V
V L=7.31 V
I REF =8.08 mA
I L =4.22 mA
Experiment 2 : The data values that are obtained are as follows. The value of Load Voltage
(VL), Load Current (IL) and Output Voltage (VO).

VL (V) IL (mA) VO (V) VL(V)


0 0.01 0 0
0.5 0.47 0.012 0.411
1.0 0.94 0.027 0.981
1.5 1.42 0.042 1.469
2.0 1.88 0.062 1.927
2.5 2.41 0.082 2.427
3.0 2.91 0.115 2.986
3.5 3.31 0.148 3.473
4.0 3.82 0.202 3.930
4.5 4.14 0.360 4.449
5.0 4.25 0.770 4.956
5.5 4.28 1.328 5.443
6.0 4.29 1.765 5.928
6.5 4.31 2.233 6.470
7.0 4.33 2.667 7.000
7.5 4.35 3.224 7.490
8.0 4.40 3.671 7.980
8.5 4.44 4.156 8.450
9.0 4.44 4.635 8.970
9.5 4.49 5.064 9.470
10.0 4.48 5.508 9.800
Experiment 2:

Load current (IL) vs Load Voltage (VL)


6

IL (design) IL

Output voltage (Vo) vs Load voltage (VL).


6

Vo (min) Vo
4. Conclusion.

In conclusion, we have achieved all the objectives that stated in this experiment. First
objective is about to estimate the NMOS parameters. The parameters of the NMOS can be
obtained which is the conduction parameters and the threshold voltage. Next objective is to
design a current mirror circuit. As we know, a current mirror is a circuit designed to copy a
current through one active device by controlling the current in another active device of a
circuit and keeping the output current constant regardless of loading. Each NMOS function
are the same where it will initially in triode region which is OFF state and the saturation
region will be the ON state of the NMOS. So in this experiment we had used two NMOS
component to construct a current mirror circuit. The increasing of the load voltage affects the
load current from triode region to saturation region. This is because when load voltage
increase, it will cause the Vo and VGS increase. As a result, the load current pass through
increases until it reached the saturation region where it will be constant. However, we
increase the value of voltage from 10V to 12V to get the saturation point.

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