Arithmetic and Logic Instructions

Dr. Hanal ABUZANT

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  The ADD instruction is used for binary
addition.
 The addition causes the flag bits to change.
 Addition can be 8, 16, and 32-bits.
 All of the addressing modes presented in
Chapter 2 are used by addition.
ADD AX,BX ;AX = AX + BX

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  The INC instruction adds a one to a register
or the contents of a memory location.
INC BX ;BX = BX + 1
INC BYTE PTR [BX]

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  The ADC instruction adds the carry bit into
the sum. Used for wide additions (wider than
32-bits) and other reasons.
ADC AX,DX ;AX = AX + DX + C
ADX ESI,[EBX] ; for 386 and above

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 ADD Vs. ADC
ADD AX,CX
ADC BX,DX

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  The SUB instruction performs subtraction and
the flags change to reflect condition of the
result.
 As with other arithmetic and logic
instructions, subtraction exists for 8, 16, and
32-bit data.
SUB AL,3 ;AL = AL - 3
SUB CX,SI

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  The DEC instruction subtracts one from a
register or the contents of a memory location.
DEC BX ;BX = BX - 1
DEC WORD PTR [BX]

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  The SBB instruction subtracts with borrow
(where the borrow is held in the carry flag).

SBB AX,BX ;AX = AX – BX – C

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  The CMP instruction is a special form of the
SUB instruction. A compare does not result in
a difference that is saved, on the flag bits
change to reflect the difference.

CMP AL,3
;if AL = 3 the result to zero (flag)

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  The MUL (unsigned) and IMUL (signed)
instruction exist to perform 8-, 16-, or 32-
bit multiplication.
 The result is always a double wide result.
 The carry and overflow bits indicate
conditions about the multiplication.
 A special IMUL exists with 3 operands.

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  The DIV (unsigned) and IDIV (signed)
instruction exist to perform division on 8-,
16-, or 32-bit numbers.
 Division is always performed o a double wide
dividend.
 The result is always in the form of an integer
quotient and an integer remainder.

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  Answer:
◦ AL=6, AH=1

W.NUMB
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  The AND instruction performs logical
multiplication (the AND operation).

 AND instruction:
◦ AND AL,0F8H; which means make the first three
bits in AL equals zero .
 TEST instruction:
◦ TEST AL,07h; which means test if the first three bits
are zeros or not, if one of them is one, that means
the zero flag is not zero

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  BX= 0105H

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  The OR instruction generates the logical sum
(OR operation).

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  The XOR instruction performs the Exclusive
OR operation.

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  CX=0003h

 In or: cx=0603h, 0000 0110 0000 0011

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  The NEG (negate) instruction 2’s
complements a number,
 The NOT instruction 1’s complements a
number.
NOT EAX
NEG DWORD PTR [EBX]

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  There are 4 shift instructions. Two are logical
shifts and two are arithmetic shifts.
 The logical shifts reposition the bits in a
number. The arithmetic shifts multiply or
divide signed numbers by powers of two.
 SHR and SHL are logical and SAR and SAL are
arithmetic shifts.
SHL AL,3 or SHL AL,CL

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 Multiply
by 2

Divide
by 2

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  Rotates are shifts that re-circulate the bit that
moves out of an end of the register or
memory location.
 Four rotates exist where two just rotate the
target and two rotate the target through the
carry flag.
ROL AL,3 or RCL AL,3

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 25
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  The TEST instruction is a special form of the
AND instruction that produces no result
except for a change of the flags.
 This instruction is often used to test multiple
bits of a number.

TEST AL,3 ;test the right two bits (if both are
zero the result is zero)

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