1 2 3 4 5 6 7 8

CPU CORE
VCC_CORE

+1.5V_RUN
X'TAL
14.31818MHz ZB3
MAX8736 VGA option
Page:31
+1.0V/+1.2V
Clock generator
Yonah/Yonah Celeron-M VGA Power
+1.2V +1.2V
MAX1993
A
(SC1470) ICS951413CGLFT INTEL Mobile_479 CPU Page:30
A

VCCP_+1.05V VCCP_+1.05V Page:5 SOCKET_M

Page:3, 4
(MAX1992) Page:32 VGA Memory
VGA_CORE
128MB/256MB
(Channel-B)
+1.8VSUS
HOST BUS 533/667MHZ Page:19
+1.8VSUS
+1.8V
+0.9V_VTER
(NCP5214) +0.9V_VTER RGB
Page:33 NB VGA CRT
PCI-E 16X
DDR-II SODIMM1 DDR-II 533/667MHz
ATi RC410ME ATI M52-P(M54-P) Page: 20
+3VPCU LVDS
+3VPCU/+5VPCU +3V_S5
Page: 10 533MHz/667MHz Page: 15, 16, LVDS
17, 18, 19 Page: 20
+3V_S5 +3VSUS 707-Pins FCBGA Package
+3V DDR-II SODIMM2 Page: 6 , 7, 8, 9
+3V/+5V Page: 10 UMA(option)
+5VPCU
B
+3VSUS/+5VSUS +5VSUS
B

15V +5V
MAX1999 15V MINI-Card
Page:34 Manufacturing Option 2X PCIE
2X PCIE Wireless LAN
Page: 22
SATA HDD MARVEL USB7
Page: 21 2X PCIE
BATTERY CHARGER SATA 88E8038
MAX8724 Page:35 64QFN-Pins Package BOTHHAND RJ45
BATTERY SB TRANSFORMER Page: 23
PATA HDD ATA 66/100 RTC Page: 23 NS0013
Power State Table Page: 21 Page: 23
Page: 11
ATi SB460
Power Control Power 549-Pins BGA Package
Name Signal State IDE-ODD PCI BUS 33MHZ
Page: 21 TI PCI7412 PCMCIA
VCC_CORE VRON S0 Azalia Cardbus controller SLOT
Page: 11, 12, 13, 14 USB 2.0 Page: 24
C VCCP_+1.05V MAINON S0 C
AD17
MIC-IN
+3VPCU N/A ALWAYS AUDIO CODEC REQ3# / GNT3#
+3V_S5 S5_ON S0-S5 Page: 26 REALTEK- ALC883 INTE#, INTH#, 5 IN1 CARD
+3VSUS SUSD S0-S3 X'TAL LPC 33MHZ
48-pins Package 32.768KHz INTG#(share) READER
+3V MAIND S0 Page: 24,25
LINE-IN Page: 26 Page: 25
+5VPCU N/A ALWAYS Page: 26
+5VSUS SUSD S0-S3 KBC
BIOS
+5V MAIND S0 NS PC97551 MINI-PCI
Audio AMP MODEM 176-Pins Package Page: 28
MAX9755 Wireless LAN
15V N/A S0 Page: 28
AD20
Page: 27 Page: 26
Bluetooth
REQ2# / GNT2#
+1.2V MAINON S0 USB
interface INTF#,
VGA_CORE VGA_MAINON S0 Page:22 INTG#(share)
Page: 22
USB6
+2.5V MAINON S0 SPEAKER RJ11 Touchpad Keyboard Audio DJ FAN
(Delay 1ms) SYSTEM
Page: 27 Page: 23 Page: 26 Page: 29 Page: 27 Page: 29 USB PORT*3
D D
+0.9V_VTER MAINON S0 Page: 22
+1.8V_S5 S5_ON S0-S5 USB0,2,4
+1.8VSUS SUSON S0-S3 PROJECT : ZB3
+1.8V MAIND S0
Quanta Computer Inc.
+1.5V_RUN MAINON S0 Size Document Number Rev
BLOCK DIAGRAM 1A

Date: Monday, April 03, 2006 Sheet 1 of 37

1 2 3 4 5 6 7 8
 5 4 3 2 1

TABLE OF CONTENTS
POWER VOLTAGE ACTIVE SCOPE PAGE
Page 01 : BLOCK DIAGRAM POWER UP SEQUENCE
Page 02 : TABLE OF CONTENTS 15V 15V S0 33

Page 03 : Yanah CPU(HOST Bus)-1 +5V +5V S0 33 +5VPCU

Page 04 : Yanah CPU(POWER/NC)-2 +3V +3.3V S0 33

RSMRST#
Page 05 : CLOCK GENERATOR +5VPCU +5V ALWAYS 33

SYSTEM
D
Page 06 : RC410ME-MEMORY_AGTL+ I/F +3VPCU +3.3V ALWAYS 33 SUSB#, SUSC# D

Page 07 : RC410ME-PCIE LINK EXTERNAL VGA +5VSUS +5V S0-S3 33

15V,+5V,+3V
Page 08 : RC410ME-LVDS OUT & CLKGEN +3VSUS +3.3V S0-S3 33

Page 09 : RC410ME-POWER +3V_S5 +3.3V S0-S5 33 HWPG_1.2V

Page 10 : DDR2 SO-DIMM X2 & TERMINA

Page 11 : SB460M-PCIE/PCI/CPU/LPC VCC_CORE VID[0..6] S0 31 HWPG_1.8V

CPU
Page 12 : SB460M ACPI/GPIO/USB/AC97 VCCP_+1.05V +1.05V S0 31

Page 13 : SB460M HDD/POWER/DECOUPLI +1.5V_RUN +1.5V S0 31 HWPG_VGA

Page 14 : SB460M STRAPS VCCP_+1.05V +1.05V S0 31 IMVP_PWRGD

Page 15 : M52-P_MAIN_PCIE (1 of 4) +1.8V +1.8V S0 33
NB_PWRGD
Page 16 : M52-P_MEM_GND (2 of 4) +1.8VSUS +1.8V S0-S3 33
Page 17 : M52-P_Power_LVDS(3 of 4) +1.2V +1.2V S0 32 EC_PWRGD
Page 18 : M52-P_Straps (4 of 4) +3V +3.3V S0 33
H_PWRGD
Page 19 : VGA RAM (64BIT DDR2)

RC410ME NB
+1.2V_PCIE +1.2V S0 9
Page 20 : CRT & LVDS +1.2V_CORE +1.2V S0 9 PCIRST#
Page 21 : HDD & CDROM ,HOLES
C C

VDD18 +1.8V S0 9
H_RESET#
Page 22 : MINI PCI, USB Bluetooth PORT VDDA18 +1.8V S0 9
Page 23 : LAN PCI-E EE88038 NB_VDDR +3.3V S0 8
Page 24 : PCI7412-PCMCIA CONTROLLE
T1 T2 T3
AVDD_NB +3.3V S0 8
Page 25 : PCI7412-CARD READER AVDDQ +1.8V S0 8 T1>= 70 ms 1ms < T2 < 10ms

Page 26 : CODEC T/P MIC/LINE-IN/OUT-ALC883

1ms < T3 < 5ms
PLVDD +1.8V S0 8
Page 27 : AUDIO AMP&LINE OUT NB_LPVDD +1.8V S0 8
Page 28 : PC97551 & FLASH NB_LVDDR18A +1.8V S0 8
Page 29 : FAN,SWITCH,LED,KB
Page 30 : VGA CORE 1.0V/1.2V +3V +3.3V S0 33
Page 31 : CPU CORE-MAX8736ETL+ +1.8V +1.8V S0 33
Page 32 : +VCCP(1.05V)& 1.2V(NB PWR +3V_S5 +3.3V S0-S5 33
Page 33 : DDRII PWR_1.8VSUS-VTERM +1.8V_S5 +1.8V S0-S5 30
Page 34 : SYSTEM +5V& +3V MAX1999A VCCP_+1.05V +1.05V S0 31
B
Page 35 : BATTERY CHARGER +1.8VUSB_PHY +1.8V S0-S5 13 B

V5_REF +5V S0 13
+1.8V Reserve 13
SB460 SB

+1.8V_ATA
PLLVDD_ATA +1.8V Reserve 13
XTLVDD_ATA +1.8V Reserve 13
PCIE_PVDD +1.8V S0 11
PCIE_VDDR +1.8V S0 11
AVDD_USB +3VSUS S0-S3 12
+3.3V_AVDDC +3.3V S0-S3 12
VCCRTC +3.0V -- 11
VDDQ_3V +3.3V S0 13
VDD_1.8V +1.8V S0 13
SB_S5_3V +3.3V S0-S5 13
SB_S5_1.8V +1.8V S0-S5 13
AVDD_CK_1.8V +1.8V S0 13
A A

+1.8V S0 33
DDR2

+1.8V
+1.8VSUS +1.8V S0-S3 10
+0.9V_VTER +0.9V S0 10
PROJECT : ZB3
Quanta Computer Inc.
Size Document Number Rev
BLOCK DIAGRAM 1A

Date: Monday, April 03, 2006 Sheet 2 of 37

5 4 3 2 1
 5 4 3 2 1

H_A#[3..16] U34A
6 H_A#[3..16] T29 VCCP_+1.05V H_D#[0..63] H_D#[0..63]
H_A#3 J4 H1 U34B
A[3]# ADS# H_ADS# 6 6 H_D#[0..63] H_D#[0..63] 6
H_A#4 L4 E2 H_D#0 E22 AA23 H_D#32
A[4]# BNR# H_BNR# 6 D[0]# D[32]#
H_A#5 M3 G5 H_D#1 F24 AB24 H_D#33
A[5]# BPRI# H_BPRI# 6 D[1]# D[33]#

1
H_A#6 K5 H_D#2 E26 V24 H_D#34
H_A#7 A[6]# R132 H_D#3 D[2]# D[34]# H_D#35
M1 A[7]# DEFER# H5 H_DEFER# 6 H22 D[3]# D[35]# V26

ADDR GROUP 0

DATA GRP 0
H_A#8 200_4 H_D#4 H_D#36

DATA GRP 2
N2 A[8]# DRDY# F21 H_DRDY# 6 F23 D[4]# D[36]# W25
H_A#9 J1 E1 H_D#5 G25 U23 H_D#37
D A[9]# DBSY# H_DBSY# 6 D[5]# D[37]# D

CONTROL
H_A#10 N3 H_D#6 E25 U25 H_D#38

2
H_A#11 A[10]# H_D#7 D[6]# D[38]# H_D#39
P5 A[11]# BR0# F1 H_BR0# 6 E23 D[7]# D[39]# U22
H_A#12 P2 H_D#8 K24 AB25 H_D#40
H_A#13 A[12]# D[8]# D[40]#
L1 A[13]# IERR# D20 H_IERR# H_D#9 G24 D[9]# D[41]# W22 H_D#41
H_A#14 P4 B3 H_INIT# H_D#10 J24 Y23 H_D#42
A[14]# INIT# H_INIT# 11 D[10 D[42]#
H_A#15 P1 H_D#11 J23 AA26 H_D#43
A[15]# T37 D[11]# D[43]#
H_A#16 R1 H4 H_D#12 H26 Y26 H_D#44
A[16]# LOCK# H_LOCK# 6 D[12]# D[44]#
L2 H_RS#[2..0] 6 H_D#13 F26 Y22 H_D#45
6 H_ADSTB#0 ADSTB[0]# D[13]# D[45]#
6 H_REQ#[0..4] B1 H_RESET# H_D#14 K22 AC26 H_D#46
RESET# H_RESET# 6 D[14]# D[46]#
H_REQ#0 K3 F3 H_RS#0 H_D#15 H25 AA24 H_D#47
H_REQ#1 H2 REQ[0]# RS[0]# H_RS#1 D[15]# D[47]#
REQ[1]# RS[1]# F4 6 H_DSTBN#0 H23 DSTBN[0]# DSTBN[2]# W24 H_DSTBN#2 6
H_REQ#2 K2 G3 H_RS#2 G22 Y25
REQ[2]# RS[2]# 6 H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 6
H_REQ#3 J3 G2 J26 V23
REQ[3]# TRDY# H_TRDY# 6 6 H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 6
H_REQ#4 L5
H_A#[17..31] REQ[4]# T31 H_D#[0..63] H_D#[0..63]
6 H_A#[17..31] HIT# G6 H_HIT# 6 6 H_D#[0..63] H_D#[0..63] 6
H_A#17 Y2 E4 H_D#16 N22 AC22 H_D#48
A[17]# HITM# H_HITM# 6 D[16]# D[48]#
H_A#18 U5 H_D#17 K25 AC23 H_D#49
H_A#19 A[18]# ITP_BPM#0 H_D#18 D[17]# D[49]# H_D#50
R3 A[19]# BPM[0]# AD4 T3 P26 D[18]# D[50]# AB22
H_A#20 W6 AD3 ITP_BPM#1 H_D#19 R23 AA21 H_D#51
A[20]# BPM[1]# T90 D[19]# D[51]#

DATA GRP 1
XDP/ITP SIGNALS
H_A#21 U4 AD1 ITP_BPM#2 Place voltage H_D#20 L25 AB21 H_D#52

DATA GRP 3
A[21]# BPM[2]# T89 divider within D[20]# D[52]#
H_A#22 Y5 AC4 ITP_BPM#3 H_D#21 L22 AC25 H_D#53
A[22]# BPM[3]# T7 0.5" of GTLREF D[21]# D[53]#
H_A#23 U2 AC2 ITP_BPM#4 H_D#22 L23 AD20 H_D#54
A[23]# PRDY# T91 pin D[22]# D[54]#
H_A#24 R4 AC1 XDP_BPM#5 H_D#23 M23 AE22 H_D#55
H_A#25 A[24]# PREQ# XDP_TCK H_D#24 D[23]# D[55]# H_D#56
T5 A[25]# TCK AC5 P25 D[24]# D[56]# AF23
H_A#26 T3 AA6 XDP_TDI H_D#25 P22 AD24 H_D#57
H_A#27 A[26]# TDI XDP_TDO VCCP_+1.05V H_D#26 D[25]# D[57]# H_D#58
W3 A[27]# TDO AB3 T18 P23 D[26]# D[58]# AE21
H_A#28 W5 AB5 XDP_TMS H_D#27 T24 AD21 H_D#59
H_A#29 A[28]# TMS XDP_TRST# H_D#28 D[27]# D[59]# H_D#60
Y4 A[29]# TRST# AB6 R24 D[28]# D[60]# AE25
H_A#30 W2 C20 XDP_DBRESET# H_D#29 L26 AF25 H_D#61
H_A#31 A[30]# DBR# H_D#30 D[29]# D[61]# H_D#62
Y1 A[31]# T25 D[30]# D[62]# AF22
6 H_ADSTB#1 V4 ADSTB[1]# PROCHOT D21 H_PROCHOT# H_D#31 N24 D[31]# D[63]# AF26 H_D#63
THERMDA A24 H_THERMDA 6 H_DSTBN#1 M24 DSTBN[1]# DSTBN[3]# AD23 H_DSTBN#3 6
THERM

H_A20M# A6 A25 H_THERMDC R105 N25 AE24

C 11 H_A20M# A20M# THERMDC 6 H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 6 C
H_FERR# A5 1K/F_4 M26 AC20
11 H_FERR# FERR# 6 H_DINV#1 DINV[1]# DINV[3]# H_DINV#3 6
H_IGNNE# C4 C7 H_THERMTRIP#
11 H_IGNNE# IGNNE# THERMTRIP#
R143 0_4 V_CPU_BTLREF AD26 R26 COMP0
H_STPCLK# GTLREF COMP[0] COMP1
11 H_STPCLK# D5 STPCLK#
MISC COMP[1] U26
C6 *1K/F_4 U1 COMP2
H CLK

11 H_INTR LINT0 COMP[2]

B4 A22 R504 1 2 TEST1 C26 V1 COMP3
11 H_NMI LINT1 BCLK[0] CLK_CPU_BCLK 5 TEST1 COMP[3]
H_SMI# A3 A21 R100
11 H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# 5
2K/F_4 R506 1 1K/F_42 TEST2 D25 E5 H_DPRSTP#
TP_RSVD#1 TEST2 DPRSTP#
T22 AA1 RSVD[01]# DPSLP# B5 H_DPSLP# 11
TP_RSVD#2 AA4 T22 TP_RSVD#12 Pop R694 for Yonah B0 & forward D24
T23 RSVD[02]# RSVD[12]# T25 DPWR# H_DPWR# 6
TP_RSVD#3 AB2 B22 D6
T15 RSVD[03]# 5 CPU_HBSEL0 BSEL[0] PWRGOOD H_PWRGD 11
TP_RSVD#4
RESERVED

T21 AA3 RSVD[04]# 5 CPU_HBSEL1 B23 BSEL[1] SLP# D7 H_CPUSLP# 12

2
TP_RSVD#5 M4 D2 TP_RSVD#13 C21 AE6
T28 RSVD[05]# RSVD[13]# T32 5 CPU_HBSEL2 BSEL[2] PSI# H_PSI# 31
TP_RSVD#6 N5 F6 TP_RSVD#14 R110 R114 R113 R120
T27 RSVD[06]# RSVD[14]# T30
TP_RSVD#7 T2 D3 TP_RSVD#15 PZ47903-2741-01 54.9/F_4 27.4/F_4 54.9/F_4 27.4/F_4
T26 RSVD[07]# RSVD[15]# T33
TP_RSVD#8 V3 C1 TP_RSVD#16
T24 RSVD[08]# RSVD[16]# T35
TP_RSVD#9 B2 AF1 TP_RSVD#17
T36 T88

1
TP_RSVD#10 RSVD[09]# RSVD[17]# TP_RSVD#18 VCCP_+1.05V
T34 C3 RSVD[10]# RSVD[18]# D22 T70
C23 TP_RSVD#19
RSVD[19]# T72
TP_RSVD#11 B25 C24 TP_RSVD#20
T71 RSVD[11]# RSVD[20]# T73
R490
PZ47903-2741-01 470_4 Comp0,2 connect with Zo=27.4ohm.
VCCP_+1.05V
R141 *200_4 R492 0_4 R495 *56_4 Comp1,3 connect with Zo=55ohm,
H_PWRGD 1 2 H_DPRSTP# 1 2 make these trace length shorter than 0.5".
Edison --01/04 Adding a voltage divider(1.1V).

3
R488 470_4 Q34 R498 *56_4
2 MMBT3904 H_DPSLP# 1 2
SB_THERMTRIP# 12 11,31 DPRSLPVR
R497 200_4
H_DPSLP# 1 2 Populate for Yonah A0,

1
XDP_TCK PD 27.4/1% R147 20K/F_4
EC_PWRGD 8,12,28
de-pop for Yonah A1
R142 200_4
XDP_TRST PD 680ohm /5%
B H_CPUSLP# 1 2 XDP_TDI PU 150ohm /1.05V VCCP_+1.05V B

XDP_TMS PU 39.2/1% Q6 R603

3

R144 *330_4 *MMBT3904 10K_4 +3V

R499 56_4 VCCP_+1.05V 2
H_FERR# 2 1 VCCP_+1.05V R493
*330_4
1

R146 *54.9/F_4 VCCP_+1.05V Q5 Q4 R494

2

2
XDP_DBRESET# MMBT3904 *MMBT3904 *10K_4
R491 56_4 R496
R86 54.9/F_4 2 1 H_THERMTRIP# 1 3 1999_SHT# 34
56_4 1 3
XDP_TMS
R145 56_4 R140
2

2 1 H_IERR# *0_4
R89 54.9/F_4 H_PROCHOT# CPU_PROCHOT#
CPU_PROCHOT# 12,28,31
XDP_TDI

R91 54.9/F_4
XDP_BPM#5 +3V

CPU H/W MONITOR

Signal Resistor Value Connect To Resistor Placement
R71 54.9/F_4
XDP_TCK TDI 150 ohm +/- 5% VTT Within 2.0" of the CPU

R73 54.9/F_4 R485 Q31 TMS 39 ohm +/- 5% VTT Within 2.0" of the CPU
2

XDP_TRST# +3V 10K_4 2N7002E

TRST# 680 ohm +/- 5% GND Within 2.0" of the CPU
+3V 1 3 MBDATA_CPU 28 TCK 27 ohm +/- 5% GND Within 2.0" of the CPU
15 MIL
R487 47_6 3V_THM R484 +3V TDO Open VTT Within 2.0" of the CPU
2

10K_4
C719 Address 98H To SB GPIO ITP_EN R268 Depop +3VRUN Close to CK410M Pin8
A .1U_4 1 3 A
MAX6648_AL# 12
R486
U32 G781 Q32 2N7002E 10K_4 Q33
2

1 6 2N7002E
H_THERMDC VCC -ALT KBSMDAT
3 DXN SMDATA 7
2 8 KBSMCLK 1 3
DXP SMCLK MBCLK_CPU 28
4 -OVT GND 5
C721 +3V
2200P_4 PROJECT : ZB3
H_THERMDA
10 mil trace /

CPU 5
10 mil space

4
R489
10K_4 To FAN
MAX6648_OV# 29

3 2
Size

Date:
Document Number
Quanta Computer Inc.
Yanah CPU(HOST Bus)-1
Monday, April 03, 2006
1
Sheet 3 of 37
Rev
1A
 A

U34D
A4 VSS[001] VSS[082] P6
A8 VSS[002] VSS[083] P21
A11 VSS[003] VSS[084] P24
A14 VSS[004] VSS[085] R2
VCC_CORE VCC_CORE A16 R5
U34C VSS[005] VSS[086]
A19 VSS[006] VSS[087] R22
A7 VCC[001] VCC[68] AB20 A23 VSS[007] VSS[088] R25
A9 VCC[002] VCC[69] AB7 A26 VSS[008] VSS[089] T1
A10 VCC[003] VCC[70] AC7 B6 VSS[009] VSS[090] T4
A12 VCC[004] VCC[71] AC9 B8 VSS[010] VSS[091] T23
A13 VCC[005] VCC[72] AC12 B11 VSS[011] VSS[092] T26
VCC_CORE A15 AC13 B13 U3
VCC[006] VCC[73] VSS[012] VSS[093]
A17 VCC[007] VCC[74] AC15 B16 VSS[013] VSS[094] U6
A18 VCC[008] VCC[75] AC17 B19 VSS[014] VSS[095] U21
A20 VCC[009] VCC[76] AC18 B21 VSS[015] VSS[096] U24
B7 VCC[010] VCC[77] AD7 B24 VSS[016] VSS[097] V2
C137 C162 C164 C154 B9 AD9 C5 V5
22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 VCC[011] VCC[78] VSS[017] VSS[098]
B10 VCC[012] VCC[79] AD10 C8 VSS[018] VSS[099] V22
B12 VCC[013] VCC[80] AD12 C11 VSS[019] VSS[100] V25
B14 VCC[014] VCC[81] AD14 C14 VSS[020] VSS[101] W1
B15 VCC[015] VCC[82] AD15 C16 VSS[021] VSS[102] W4
B17 VCC[016] VCC[83] AD17 C19 VSS[022] VSS[103] W23
C153 C133 C136 C149 B18 AD18 C2 W26
22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 VCC[017] VCC[84] VSS[023] VSS[104]
B20 VCC[018] VCC[85] AE9 C22 VSS[024] VSS[105] Y3
C9 VCC[019] VCC[86] AE10 C25 VSS[025] VSS[106] Y6
C10 VCC[020] VCC[87] AE12 D1 VSS[026] VSS[107] Y21
C12 VCC[021] VCC[88] AE13 D4 VSS[027] VSS[108] Y24
C13 VCC[022] VCC[89] AE15 D8 VSS[028] VSS[109] AA2
C738 C737 C736 C735 C15 AE17 D11 AA5
22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 VCC[023] VCC[90] VSS[029] VSS[110]
C17 VCC[024] VCC[91] AE18 D13 VSS[030] VSS[111] AA8
C18 VCC[025] VCC[92] AE20 D16 VSS[031] VSS[112] AA11
D9 VCC[026] VCC[93] AF9 D19 VSS[032] VSS[113] AA14
D10 VCC[027] VCC[94] AF10 D23 VSS[033] VSS[114] AA16
D12 VCC[028] VCC[95] AF12 D26 VSS[034] VSS[115] AA19
C734 C775 C27 C760 D14 AF14 E3 AA22
22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 VCC[029] VCC[96] VSS[035] VSS[116]
D15 VCC[030] VCC[97] AF15 E6 VSS[036] VSS[117] AA25
D17 VCC[031] VCC[98] AF17 E8 VSS[037] VSS[118] AB1
D18 VCC[032] VCC[99] AF18 E11 VSS[038] VSS[119] AB4
E7 AF20 VCCP_+1.05V E14 AB8
VCC[033] VCC[100] VSS[039] VSS[120]
E9 VCC[034] E16 VSS[040] VSS[121] AB11
C761 C132 C723 C758 E10 V6 E19 AB13
22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 VCC[035] VCCP[01] VSS[041] VSS[122]
E12 VCC[036] VCCP[02] G21 E21 VSS[042] VSS[123] AB16
E13 VCC[037] VCCP[03] J6 E24 VSS[043] VSS[124] AB19
E15 K6 + C141 F5 AB23
VCC[038] VCCP[04] *330U/2.5V_7343 VSS[044] VSS[125]
E17 VCC[039] VCCP[05] M6 F8 VSS[045] VSS[126] AB26
E18 VCC[040] VCCP[06] J21 F11 VSS[046] VSS[127] AC3
C722 C763 C739 C759 E20 K21 F13 AC6
22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 VCC[041] VCCP[07] VSS[047] VSS[128]
F7 VCC[042] VCCP[08] M21 F16 VSS[048] VSS[129] AC8
A F9 VCC[043] VCCP[09] N21 F19 VSS[049] VSS[130] AC11 A
F10 VCC[044] VCCP[10] N6 F2 VSS[050] VSS[131] AC14
F12 VCC[045] VCCP[11] R21 +1.5V_RUN F22 VSS[051] VSS[132] AC16
F14 VCC[046] VCCP[12] R6 F25 VSS[052] VSS[133] AC19
C150 C151 C26 C152 F15 T21 G4 AC21
22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 VCC[047] VCCP[13] VSS[053] VSS[134]
F17 VCC[048] VCCP[14] T6 G1 VSS[054] VSS[135] AC24
F18 VCC[049] VCCP[15] V21 G23 VSS[055] VSS[136] AD2

1
F20 W21 C731 C732 G26 AD5
VCC[050] VCCP[16] .01U_4 10U_8 VSS[056] VSS[137]
AA7 VCC[051] H3 VSS[057] VSS[138] AD8
AA9 B26 H6 AD11

2
C134 C762 C776 C135 VCC[052] VCCA VSS[058] VSS[139]
AA10 VCC[053]
Place C28 H21 VSS[059] VSS[140] AD13
22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 AA12 near PIN B26 H24 AD16
VCC[054] VSS[060] VSS[141]
AA13 VCC[055] VID[0] AD6 CPU_VID0 31 J2 VSS[061] VSS[142] AD19
AA15 VCC[056] VID[1] AF5 CPU_VID1 31 J5 VSS[062] VSS[143] AD22
AA17 AE5 VCC_CORE J22 AD25
VCC[057] VID[2] CPU_VID2 31 VSS[063] VSS[144]
AA18 VCC[058] VID[3] AF4 CPU_VID3 31 J25 VSS[064] VSS[145] AE1
AA20 VCC[059] VID[4] AE3 CPU_VID4 31 K1 VSS[065] VSS[146] AE4
AB9 VCC[060] VID[5] AF2 CPU_VID5 31 K4 VSS[066] VSS[147] AE8
AC10 VCC[061] VID[6] AE2 CPU_VID6 31 K23 VSS[067] VSS[148] AE11
AB10 R555 K26 AE14
VCC[062] 100/F_4 VSS[068] VSS[149]
AB12 VCC[063] L3 VSS[069] VSS[150] AE16
AB14 VCC[064] L6 VSS[070] VSS[151] AE19
AB15 AF7 VCCSENSE L21 AE23
VCC[065] VCCSENSE VCCSENSE 31 VSS[071] VSS[152]
AB17 VCC[066] L24 VSS[072] VSS[153] AE26
AB18 AE7 VSSSENSE M2 AF3
VCC[067] VSSSENSE VSSSENSE 31 VSS[073] VSS[154]
M5 VSS[074] VSS[155] AF6
PZ47903-2741-01 M22 AF8
22uF 0805 X6S->105 degree C Route VCCSENSE and VSSSENSE Place PU & PD within M25
VSS[075]
VSS[076]
VSS[156]
VSS[157] AF11
8 inside cavity north side secondary layer, 8 inside cavity traces at 27.4ohms with 50mil R556 N1 AF13
100/F_4 1 inch of CPU N4
VSS[077] VSS[158]
AF16
south side secondary layer, 6 inside cavity north side spacing. Place PU and PD VSS[078] VSS[159]
within 0.5 inch of CPU. N23 VSS[079] VSS[160] AF19
primary layer, 6 inside cavity south side primary layer. N26 VSS[080] VSS[161] AF21
P3 VSS[081] VSS[162] AF24

PZ47903-2741-01

VCCP_+1.05V
1

C745 C755 C749 C743 C754 C746

.1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4

2

PROJECT : ZB3

CPU Size Document Number

Quanta Computer Inc.
Yanah CPU(Power/NC)-2
Rev
1A

Date: Monday, April 03, 2006 Sheet 4 of 37

A
 5 4 3 2 1

+3V
CLK_VDD
L43 BK1608HS220 L42 +3V
SBK160808T-301Y-S
CLK_VDDA
D 22 ohm/1A D
C494 C490 C491 C489 C496 C502 C501 C495
22U/6.3V_8 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 C492 C581
.1U_4 22U/6.3V_8

CLK_VDD
CLK_NBCLK# 8
1- PLACE ALL THE SERIES TERMINATION U13 ICS951413CGLFT CLK_NBCLK 8
RESISTORS AS CLOSE AS U16 AS POSSIBLE CLK_CPU_BCLK# 3
CLK_CPU_BCLK 3
2- ROUTE ALL CPUCLK/#, NBCLK/# AND 45 VDDCPU VDDA 39
ITPCLK/# AS DIFFERENT PAIR RULE 35 VDD_SRC VSSA 38
32 VDD_SRC1
3- PUT DECOUPLING CAPS CLOSE TO U16 +3V L45 CLK_VDD_USB 21 47 ITPCLK_R 1 2 RP33 1 2 RP28
SBK160808T-301Y-S VDD_SRC2 CPUT0 ITPCLK#_R *33X2_4 *49.9X2_4
POWER PIN 14 VDD_SRC3 CPUC0 46 3 4 3 4
3 43 CPUCLK_R 1 2 RP32 1 2 RP27
VDD_48 CPUT1 CPUCLK#_R 33X2_4 49.9X2_4
51 VDD_PCI CPUC1 42 3 4 3 4
300ohm/200mA 56 41 NBCLK_R 1 2 RP31 1 2 RP26
C507 C503 VDD_REF CPUT2 NBCLK#_R 33X2_4 49.9X2_4
CPUC2 40 3 4 3 4
1U_4 .1U_4 44 VSS_CPU ALINKCLK_R RP30 RP25
36 VSS_SRC SRCT0 34 1 2 1 2
31 33 ALINKCLK#_R 3 4 33X2_4 3 4 49.9X2_4
VSS_SRC1 SRCC0 NBSRCCLK_R RP29 RP24
26 VSS_SRC2 SRCST0 30 1 2 1 2
+3V 20 29 NBSRCCLK#_R 3 4 33X2_4 3 4 49.9X2_4
VSS_SRC3 SRCSC0 CLK_PCIE_VGA_R RP34 RP42
15 VSS_SRC4 SRCST1 27 3 4 3 4
5 28 CLK_PCIE_VGA#_R 1 2 33X2_4 1 2 49.9X2_4
C VSS_48 SRCSC1 C
49 24 SBSRCCLK_R 3 4 RP35 3 4 RP43
Reserved VSS_PCI SRCT1 SBSRCCLK#_R 33X2_4 49.9X2_4
R283 Parallel Resonance Crystal 55 VSS_REF SRCC1 25
22 CLK_PCIE_MINI_R
1
3
2
4 RP36
1
3
2
4 RP44
*4.7K_4 C509 22P_4 SRCT2 CLK_PCIE_MINI#_R 33X2_4 49.9X2_4
SRCC2 23 1 2 1 2
1 18 CLK_PCIE_LAN_R 3 4 RP37 3 4 RP45
XIN SRCT3 CLK_PCIE_LAN#_R 33X2_4 49.9X2_4
SRCC3 19 1 2 1 2
3

2
2 16 3 4 RP38 3 4 RP40
Q16 Y3 R313 XOUT SRCT4 33X2_4 49.9X2_4
SRCC4 17 1 2 1 2
*CH2507S *1M_4 12 3 4 RP39 3 4 RP41
C510 22P_4 SRCT5 33X2_4 49.9X2_4
6,11,15,21,24 ALINK_RST# 1 13 1 2 1 2

1
SRCC5
14.31818MHZ 10 MINI_CLKREQ3# 22
2

R289 0_4 CLK_EN# CLKREQ0 ALINKCLK 7

31 CLK_EN# 6 VTTPWRGD#/PD CLKREQ1 11 ALINKCLK# 7
11 STP_CPU# EXT_CPU_STP# 48 CPU_STP# R290 10K_4 NBSRCCLK 7
PCIF0/CK410# 50 NBSRCCLK# 7
+3V USBCLK_R CLK_PCIE_VGA 15
USB_48 4 CLK_PCIE_VGA# 15
SMBCK 7
10 SMBCK SCLK SBSRCCLK 11
SMBDT 8
10 SMBDT SDATA SBSRCCLK# 11
FSC 9 CLK_PCIE_MINI 22
REF1/FSB 53 CLK_PCIE_MINI# 22
37 IREF REF0/FSA 54 CLK_PCIE_LAN 23
Q21 R307 R308 Ioh = 5 * Iref 52
REF2 CLK_PCIE_LAN# 23
2

2N7002E 10K_4 10K_4 (2.32mA) R288

Voh = 0.71V @ 60 ohm 475/F_4 R304 22_4
SMBDT USBCLK 12
12,22 PDAT_SMB 3 1
R309 *22_4
B 48MCLK 25 B
Edison -- 01/03 Modify
Edison 10/31--- Update FSC R306 4.7K/F_4 BSEL2
+3V FSB R287 4.7K/F_4 BSEL1
FSA R295 4.7K/F_4 BSEL0
Q22
2

2N7002E R296 33/F_4 SB_OSCIN

OSC14M_R R298 33/F_4 SB_OSCIN 8,12
SMBCK OSC14M 8
12,22 PCLK_SMB 3 1

SB_OSCIN
VCCP_+1.05V

R297
*22_4
R312 R284 R291 CK410 FREQUENCY SELECT TABLE(MHZ)
*1K_4 *1K_4 *1K_4

R311 0_4 FSC FSB FSA CPU SRC PCI REF CY28RS400 and ICS951413
BSEL2
FSC C493
3 CPU_HBSEL2 BSEL2 8 BSEL2 BSEL1 BSEL0 are fully pin compatible and *10P_4
R285 0_4
FSB can be interchanged without
BSEL1 1 0 1 100 100 33 14.31 any hardware modification.
3 CPU_HBSEL1 BSEL1 8
R293 0_4 0 0 1 133 100 33 14.31
BSEL0
FSA
A 3 CPU_HBSEL0 BSEL0 8 A
0 1 1 166 100 33 14.31
R310 R286 R292 0 1 0 200 100 33 14.31
*0_4 *0_4 *0_4
0 0 0 266 100 33 14.31 PROJECT : ZB3
1 0 0 333 100 33 14.31

CLK 1
1
1
1
0
1
400
Resv
100
100
33
33
14.31
14.31
Size

Date:
Document Number
Quanta Computer Inc.
CLOCK GENERATOR
Monday, April 03, 2006 Sheet 5 of 37
Rev
1A

5 4 3 2 1
 5 4 3 2 1

MA[17..0] U30C MDQ[63..0] U30A

10 MA[17..0] MDQ[63..0] 10 H_A#[3..16] PART 1 OF 6 H_D#[0..63]
MA0 AK27 AJ16 MDQ0 3 H_A#[3..16] H_D#[0..63] 3
MA1 MEM_A0 PART 3 OF 6 MEM_DQ0 MDQ1 H_A#3 H_D#0
AJ27 MEM_A1 MEM_DQ1 AH16 G28 CPU_A3# CPU_D0# E28
MA2 AH26 AJ19 MDQ2 H_A#4 H26 D28 H_D#1
MA3 MEM_A2 MEM_DQ2 MDQ3 H_A#5 CPU_A4# CPU_D1# H_D#2
AJ26 MEM_A3 MEM_DQ3 AH19 G27 CPU_A5# CPU_D2# D29
MA4 AH25 AH15 MDQ4 H_A#6 G30 C29 H_D#3
MA5 MEM_A4 MEM_DQ4 MDQ5 H_A#7 CPU_A6# CPU_D3# H_D#4
AJ25 MEM_A5 MEM_DQ5 AK16 G29 CPU_A7# CPU_D4# D30
MA6 AH24 AH18 MDQ6 H_A#8 G26 C30 H_D#5
MA7 MEM_A6 MEM_DQ6 MDQ7 H_A#9 CPU_A8# CPU_D5# H_D#6
D AH23 MEM_A7 MEM_DQ7 AK19 H28 CPU_A9# CPU_D6# B29 D

DATA GROUP 0
MA8 AJ24 AF13 MDQ8 H_A#10 J28 C28 H_D#7
MA9 MEM_A8 MEM_DQ8 MDQ9 H_A#11 CPU_A10# CPU_D7# H_D#8

ADDR. GROUP 0
AJ23 MEM_A9 MEM_DQ9 AF14 H25 CPU_A11# CPU_D8# C26
MA10 AH27 AE19 MDQ10 H_A#12 K28 B25 H_D#9
MA11 MEM_A10 MEM_DQ10 MDQ11 H_A#13 CPU_A12# CPU_D9# H_D#10
AH22 MEM_A11 MEM_DQ11 AF19 H29 CPU_A13# CPU_D10# B27
MA12 AJ22 AE13 MDQ12 H_A#14 J29 C25 H_D#11
MA13 MEM_A12 MEM_DQ12 MDQ13 H_A#15 CPU_A14# CPU_D11# H_D#12
AF28 MEM_A13 MEM_DQ13 AG13 K24 CPU_A15# CPU_D12# A27
MA14 AJ21 AF18 MDQ14 H_REQ#[0..4] H_A#16 K25 C24 H_D#13
MEM_A14 MEM_DQ14 3 H_REQ#[0..4] CPU_A16# CPU_D13#
MA15 AG27 AE17 MDQ15 H_REQ#0 F29 A24 H_D#14
MA16 MEM_A15 MEM_DQ15 MDQ16 H_REQ#1 CPU_REQ0# CPU_D14# H_D#15
AJ28 MEM_A16 MEM_DQ16 AF20 G25 CPU_REQ1# CPU_D15# B26
MA17 AH21 AF21 MDQ17 H_REQ#2 F26 C27
M_DM[7..0] MEM_A17 MEM_DQ17 CPU_REQ2# CPU_DBI0# H_DINV#0 3
AG23 MDQ18 H_REQ#3 F28 A28
10 M_DM[7..0] MEM_DQ18 CPU_REQ3# CPU_DSTB0N# H_DSTBN#0 3
M_DM0 AJ17 AF24 MDQ19 H_REQ#4 E29 B28
MEM_DM0 MEM_DQ19 T38 CPU_REQ4# CPU_DSTB0P# H_DSTBP#0 3
M_DM1 AG15 AG19 MDQ20 H27
MEM_DM1 MEM_DQ20 3 H_ADSTB#0 H_A#[17..31] CPU_ADSTB0#
M_DM2 AE20 AG20 MDQ21 3 H_A#[17..31] C19 H_D#16
M_DM3 MEM_DM2 MEM_DQ21 MDQ22 H_A#17 CPU_D16# H_D#17
AF25 MEM_DM3 MEM_DQ22 AG22 M28 CPU_A17# CPU_D17# C23
M_DM4 Y27 AF23 MDQ23 H_A#18 K29 C20 H_D#18
M_DM5 MEM_DM4 MEM_DQ23 MDQ24 H_A#19 CPU_A18# CPU_D18# H_D#19
AB28 MEM_DM5 MEM_DQ24 AD25 K30 CPU_A19# CPU_D19# C22
M_DM6 R26 AG25 MDQ25 H_A#20 J26 B22 H_D#20
M_DM7 MEM_DM6 MEM_DQ25 MDQ26 H_A#21 CPU_A20# CPU_D20# H_D#21
R28 MEM_DM7 MEM_DQ26 AE27 L28 CPU_A21# CPU_D21# B23
AD27 MDQ27 H_A#22 L29 C21 H_D#22
MEM_DQ27 CPU_A22# CPU_D22#

DATA GROUP 1
AJ29 AE23 MDQ28 H_A#23 M30 B24 H_D#23
10 M_RAS# MEMB_RAS# MEM_DQ28 MDQ29 H_A#24 CPU_A23# CPU_D23# H_D#24

ADDR. GROUP 1
10 M_CAS# AG28 MEMB_CAS# MEM_DQ29 AD24 K27 CPU_A24# CPU_D24# E21
AH30 AE26 MDQ30 H_A#25 M29 B21 H_D#25
10 M_WE# MEMB_WE# MEM_DQ30 MDQ31 H_A#26 CPU_A25# CPU_D25# H_D#26
MEM_DQ31 AD26 K26 CPU_A26# CPU_D26# B20
M_DQS[7..0] AA25 MDQ32 H_A#27 N28 G19 H_D#27
10 M_DQS[7..0] MEM_DQ32 CPU_A27# CPU_D27#
M_DQS0 AJ18 Y26 MDQ33 H_A#28 L26 F21 H_D#28
M_DQS1 MEM_DQS0P MEM_DQ33 MDQ34 H_A#29 CPU_A28# CPU_D28# H_D#29
C AE14 MEM_DQS1P MEM_DQ34 W24 N25 CPU_A29# CPU_D29# B19 C
M_DQS2 AF22 U25 MDQ35 H_A#30 L25 E20 H_D#30
M_DQS3 MEM_DQS2P MEM_DQ35 MDQ36 H_A#31 CPU_A30# CPU_D30# H_D#31
AE25 MEM_DQS3P MEM_DQ36 AA26 T39 N24 CPU_A31# CPU_D31# D21
M_DQS4 W27 Y25 MDQ37 L27 A21
MEM_DQS4P MEM_DQ37 3 H_ADSTB#1 CPU_ADSTB1# CPU_DBI1# H_DINV#1 3
M_DQS5 AB29 V26 MDQ38 D22
MEM_DQS5P MEM_DQ38 CPU_DSTB1N# H_DSTBN#1 3
M_DQS6 P25 W25 MDQ39 3 H_ADS# F25 E22
MEM_DQS6P MEM_DQ39 CPU_ADS# CPU_DSTB1P# H_DSTBP#1 3
M_DQS7 R29 AC28 MDQ40 3 H_BNR# F24
M_DQS#[7..0] MEM_DQS7P MEM_DQ40 MDQ41 CPU_BNR# H_D#32
10 M_DQS#[7..0] MEM_DQ41 AC29 3 H_BPRI# E23 CPU_BPRI# CPU_D32# C18
M_DQS#0 AH17 AA29 MDQ42 3 H_DEFER# E25 F19 H_D#33
M_DQS#1 MEM_DQS0N MEM_DQ42 MDQ43 CPU_DEFER# CPU_D33# H_D#34
AF15 MEM_DQS1N MEM_DQ43 Y29 3 H_DRDY# G24 CPU_DRDY# CPU_D34# E19
M_DQS#2 AE22 AD30 MDQ44 3 H_DBSY# F23 A18 H_D#35
M_DQS#3 MEM_DQS2N MEM_DQ44 MDQ45 CPU_DBSY# CPU_D35# H_D#36
AF26 MEM_DQS3N MEM_DQ45 AD29 3 H_DPWR# G22 CPU_DPWR# CPU_D36# D19
M_DQS#4 MDQ46 H_D#37
MEM_B I/F

W26 MEM_DQS4N MEM_DQ46 AA30 3 H_LOCK# E27 CPU_LOCK# CPU_D37# B18

CONTROL
M_DQS#5 AB30 Y28 MDQ47 3 H_TRDY# F22 C17 H_D#38
M_DQS#6 MEM_DQS5N MEM_DQ47 MDQ48 +1.8VSUS CPU_TRDY# CPU_D38# H_D#39
R25 MEM_DQS6N MEM_DQ48 U27 3 H_HITM# E24 CPU_HITM# CPU_D39# B17

DATA GROUP 2
M_DQS#7 R30 T27 MDQ49 3 H_HIT# D26 E17 H_D#40
MEM_DQS7N MEM_DQ49 MDQ50 H_RS#0 CPU_HIT# CPU_D40# H_D#41
MEM_DQ50 N26 E26 CPU_RS0# CPU_D41# B16
AC26 M27 MDQ51 H_RS#1 G23 C15 H_D#42
10 M_CLKOUT#0 MEM_CK0N MEM_DQ51 CPU_RS1# CPU_D42#

AGTL+ I/F
AC25 U26 MDQ52 R447 H_RS#2 D23 A15 H_D#43
10 M_CLKOUT0 MEM_CK0P MEM_DQ52 MDQ53 D6 SW1010C 27K_6 CPU_RS2# CPU_D43# H_D#44
10 M_CLKOUT#1 AF16 MEM_CK1N MEM_DQ53 T26 3 H_RS#[2..0] CPU_D44# B15
AE16 P27 MDQ54 3 H_BR0# D25 F16 H_D#45
10 M_CLKOUT1 MEM_CK1P MEM_DQ54 MDQ55 RESERVED0 CPU_D45# H_D#46
V29 MEM_CK2N MEM_DQ55 P26 12,24 SUS_STAT# 1 2 3 H_RESET# C11 CPU_CPURST# CPU_D46# G18
V30 U29 MDQ56 F18 H_D#47
MEM_CK2P MEM_DQ56 MDQ57 D4 SW1010C CPU_D47#
10 M_CLKOUT#3 AC24 MEM_CK3N MEM_DQ57 T29 CPU_DBI2# C16 H_DINV#2 3
AC23 P29 MDQ58 5,11,15,21,24 ALINK_RST# 1 2 E11 D18
10 M_CLKOUT3 MEM_CK3P MEM_DQ58 T41 RESERVED1 CPU_DSTB2N# H_DSTBN#2 3
AG17 N29 MDQ59 AH14 E18
10 M_CLKOUT#4 MEM_CK4N MEM_DQ59 SUS_STAT# CPU_DSTB2P# H_DSTBP#2 3
AF17 U28 MDQ60 A3
10 M_CLKOUT4 MEM_CK4P MEM_DQ60 MDQ61 SYSRESET# H_D#48
B W29 MEM_CK5N MEM_DQ61 T28 8,28 NB_PWRGD E3 POWERGOOD CPU_D48# E16 B
W28 P28 MDQ62 D16 H_D#49
MEM_CK5P MEM_DQ62 MDQ63 R481 49.9/F_4 CPU_COMP_P CPU_D49# H_D#50
MEM_DQ63 N27 B11 CPU_COMP_P CPU_D50# C14
AH20 +1.8VSUS B14 H_D#51
10 M_CKE0 MEM_CKE0 MEM_COMPN R475 61.9/F_6 R480 24.9/F_4 CPU_COMP_N CPU_D51# H_D#52
10 M_CKE1 AJ20 MEM_CKE1 MEM_COMPN AE29 VCCP_+1.05V D11 CPU_COMP_N CPU_D52# E15
AE24 AJ15 MEM_COMPP R444 61.9/F_6 VCCP_+1.05V D15 H_D#53
10 M_CKE2 MEM_CKE2 MEM_COMPP L19 CPU_D53# H_D#54
10 M_CKE3 AE21 MEM_CKE3 CPU_D54# C13
N30 C709 .47U_4 +1.8V CPVDD H21 E14 H_D#55
MEM_CAP2 CPVDD CPU_D55#

DATA GROUP 3
AH29 SBK160808T-301Y-S F13 H_D#56

MISC.
10 M_CS#0 MEM_CS0# C667 .47U_4 R148 C246 C200 1U_4 CPU_D56# H_D#57
10 M_CS#1 AG29 MEM_CS1# MEM_CAP1 AJ14 H20 CPVSS CPU_D57# B13
AH28 49.9/F_4 10U_8 Place close to NB A12 H_D#58
10 M_CS#2 MEM_CS2# CPU_D58# H_D#59
10 M_CS#3 AF29 MEM_CS3# MEM_VREF AB27 CPU_D59# C12
NB_GTLREF H22 E12 H_D#60
R476 1K_4 CPU_VREF CPU_D60# H_D#61
10 M_ODT0 AG30 MEM_ODT0 MEM_VMODE AD28 +1.8VSUS CPU_D61# D13
AE28 C192 220P_4 D12 H_D#62
10 M_ODT1 MEM_ODT1 L24 R149 C194 CPU_D62# H_D#63
10 M_ODT2 AC30 MEM_RSRV2 MPVDD AB26 +1.8V T64 AH13 THERMALDIODE_P CPU_D63# B12
Y30 AA27 SBK160808T-301Y-S 100/F_6 1U_4 AJ13 E13
10 M_ODT3 MEM_RSRV3 MPVSS T63 THERMALDIODE_N CPU_DBI3# H_DINV#3 3
CPU_DSTB3N# F15 H_DSTBN#3 3
RC410ME C274 Place close to NB, C4 G15
TESTMODE CPU_DSTB3P# H_DSTBP#3 3
1U_4 Use 10/10 width/space

RC410ME
R473 1.8K/F_6
+1.8VSUS MPVSS need to connect to GND plane
immediately through
a dedicated VIA +1.8V +1.8VSUS
A A
C254 R186
.1U_4 1K/F_6

MEM_VREF C275 C704

.1U_4 .1U_4 PROJECT : ZB3
C220 R160

NB-1 .1U_4 1K/F_6

Size

Date:
Document Number
Quanta Computer Inc.
RC410MB-AGTL+ I/F
Monday, April 03, 2006 Sheet 6 of 37
Rev
1A

5 4 3 2 1
 5 4 3 2 1

EXT VGA Stuff

0.1u Capacitors place at
15 GMCHEXP_RXP[0..15]
U30B first 1/3 of trace GMCHEXP_TXP[0..15] 15
GMCHEXP_RXP0 GMCHEXP_TXP0
GMCHEXP_RXP1 GMCHEXP_RXP0 J5 PART 2 OF 6 N1 CGMCHEXP_TXP0 C668 [email protected]_4GMCHEXP_TXP0 GMCHEXP_TXP1
GMCHEXP_RXP2 GMCHEXP_RXN0 GFX_RX0P GFX_TX0P CGMCHEXP_TXN0 C666 [email protected]_4GMCHEXP_TXN0 GMCHEXP_TXP2
J4 GFX_RX0N GFX_TX0N N2
GMCHEXP_RXP3 GMCHEXP_RXP1 K4 P2 CGMCHEXP_TXP1 C663 [email protected]_4GMCHEXP_TXP1 GMCHEXP_TXP3
GMCHEXP_RXP4 GMCHEXP_RXN1 GFX_RX1P GFX_TX1P CGMCHEXP_TXN1 C659 [email protected]_4GMCHEXP_TXN1 GMCHEXP_TXP4
D L4 GFX_RX1N GFX_TX1N R2 D
GMCHEXP_RXP5 GMCHEXP_RXP2 L6 R1 CGMCHEXP_TXP2 C656 [email protected]_4GMCHEXP_TXP2 GMCHEXP_TXP5
GMCHEXP_RXP6 GMCHEXP_RXN2 GFX_RX2P GFX_TX2P CGMCHEXP_TXN2 C655 [email protected]_4GMCHEXP_TXN2 GMCHEXP_TXP6
L5 GFX_RX2N GFX_TX2N T1
GMCHEXP_RXP7 GMCHEXP_RXP3 M5 T2 CGMCHEXP_TXP3 C653 [email protected]_4GMCHEXP_TXP3 GMCHEXP_TXP7
GMCHEXP_RXP8 GMCHEXP_RXN3 GFX_RX3P GFX_TX3P CGMCHEXP_TXN3 C650 [email protected]_4GMCHEXP_TXN3 GMCHEXP_TXP8
M4 GFX_RX3N GFX_TX3N U2
GMCHEXP_RXP9 GMCHEXP_RXP4 N4 V2 CGMCHEXP_TXP4 C661 [email protected]_4GMCHEXP_TXP4 GMCHEXP_TXP9
GMCHEXP_RXP10 GMCHEXP_RXN4 GFX_RX4P GFX_TX4P CGMCHEXP_TXN4 C658 [email protected]_4GMCHEXP_TXN4 GMCHEXP_TXP10
P4 GFX_RX4N GFX_TX4N V1
GMCHEXP_RXP11 GMCHEXP_RXP5 P6 W1 CGMCHEXP_TXP5 C651 [email protected]_4GMCHEXP_TXP5 GMCHEXP_TXP11
GMCHEXP_RXP12 GMCHEXP_RXN5 GFX_RX5P GFX_TX5P CGMCHEXP_TXN5 C649 [email protected]_4GMCHEXP_TXN5 GMCHEXP_TXP12
P5 GFX_RX5N GFX_TX5N W2
GMCHEXP_RXP13 GMCHEXP_RXP6 R5 Y2 CGMCHEXP_TXP6 C654 [email protected]_4GMCHEXP_TXP6 GMCHEXP_TXP13
GMCHEXP_RXP14 GMCHEXP_RXN6 GFX_RX6P GFX_TX6P CGMCHEXP_TXN6 C652 [email protected]_4GMCHEXP_TXN6 GMCHEXP_TXP14
R4 GFX_RX6N GFX_TX6N AA2 GMCHEXP_TXN[0..15] 15
GMCHEXP_RXP15 GMCHEXP_RXP7 T4 AA1 CGMCHEXP_TXP7 C646 [email protected]_4GMCHEXP_TXP7 GMCHEXP_TXP15
15 GMCHEXP_RXN[0..15] GFX_RX7P GFX_TX7P
GMCHEXP_RXN7 T3 AB1 CGMCHEXP_TXN7 C643 [email protected]_4GMCHEXP_TXN7
GMCHEXP_RXN0 GMCHEXP_RXP8 GFX_RX7N GFX_TX7N CGMCHEXP_TXP8 C648 [email protected]_4GMCHEXP_TXP8 GMCHEXP_TXN0
U6 GFX_RX8P GFX_TX8P AB2
GMCHEXP_RXN1 GMCHEXP_RXN8 U5 AC2 CGMCHEXP_TXN8 C644 [email protected]_4GMCHEXP_TXN8 GMCHEXP_TXN1
GMCHEXP_RXN2 GMCHEXP_RXP9 GFX_RX8N GFX_TX8N CGMCHEXP_TXP9 C629 [email protected]_4GMCHEXP_TXP9 GMCHEXP_TXN2
V5 GFX_RX9P GFX_TX9P AD2
GMCHEXP_RXN3 GMCHEXP_RXN9 V4 AD1 CGMCHEXP_TXN9 C617 [email protected]_4GMCHEXP_TXN9 GMCHEXP_TXN3
GMCHEXP_RXN4 GMCHEXP_RXP10 GFX_RX9N GFX_TX9N CGMCHEXP_TXP10 C640 [email protected]_4GMCHEXP_TXP10 GMCHEXP_TXN4
W4 GFX_RX10P GFX_TX10P AE1
GMCHEXP_RXN5 GMCHEXP_RXN10 W3 AE2 CGMCHEXP_TXN10 C630 [email protected]_4GMCHEXP_TXN10 GMCHEXP_TXN5
GMCHEXP_RXN6 GMCHEXP_RXP11 GFX_RX10N GFX_TX10N CGMCHEXP_TXP11 C612 [email protected]_4GMCHEXP_TXP11 GMCHEXP_TXN6
Y6 GFX_RX11P GFX_TX11P AF2
GMCHEXP_RXN7 GMCHEXP_RXN11 Y5 AG2 CGMCHEXP_TXN11 C607 [email protected]_4GMCHEXP_TXN11 GMCHEXP_TXN7
GMCHEXP_RXN8 GMCHEXP_RXP12 GFX_RX11N GFX_TX11N CGMCHEXP_TXP12 C613 [email protected]_4GMCHEXP_TXP12 GMCHEXP_TXN8
AA5 GFX_RX12P GFX_TX12P AG1
C GMCHEXP_RXN9 GMCHEXP_RXN12 CGMCHEXP_TXN12 C611 [email protected]_4GMCHEXP_TXN12 GMCHEXP_TXN9 C
AA4 GFX_RX12N GFX_TX12N AH1
GMCHEXP_RXN10 GMCHEXP_RXP13 AB4 AH2 CGMCHEXP_TXP13 C602 [email protected]_4GMCHEXP_TXP13 GMCHEXP_TXN10
GMCHEXP_RXN11 GMCHEXP_RXN13 GFX_RX13P GFX_TX13P CGMCHEXP_TXN13 C600 [email protected]_4GMCHEXP_TXN13 GMCHEXP_TXN11
AB3 GFX_RX13N GFX_TX13N AJ2
GMCHEXP_RXN12 GMCHEXP_RXP14 AC6 AJ3 CGMCHEXP_TXP14 C605 [email protected]_4GMCHEXP_TXP14 GMCHEXP_TXN12
GMCHEXP_RXN13 GMCHEXP_RXN14 GFX_RX14P GFX_TX14P CGMCHEXP_TXN14 C601 [email protected]_4GMCHEXP_TXN14 GMCHEXP_TXN13
AC5 GFX_RX14N GFX_TX14N AJ4
GMCHEXP_RXN14 GMCHEXP_RXP15 AD5 AK4 CGMCHEXP_TXP15 C599 [email protected]_4GMCHEXP_TXP15 GMCHEXP_TXN14
GMCHEXP_RXN15 GMCHEXP_RXN15 GFX_RX15P GFX_TX15P CGMCHEXP_TXN15 C596 [email protected]_4GMCHEXP_TXN15 GMCHEXP_TXN15
AD4 GFX_RX15N GFX_TX15N AJ5
Edison 10/31--- Update
AF8 AJ8 MINI_PCIE_TXP0_R C624 .1U_4
22 MINI_PCIE_RXP0 GPP_RX0P GPP_TX0P MINI_PCIE_TXP0 22
AG8 AJ9 MINI_PCIE_TXN0_R C625 .1U_4
22 MINI_PCIE_RXN0 GPP_RX0N GPP_TX0N MINI_PCIE_TXN0 22
AG6 AE6 LAN_PCIE_TXP1_R C622 .1U_4
23 LAN_PCIE_RXP1 GPP_RX1P GPP_TX1P LAN_PCIE_TXP1 23
AG7 AF6 LAN_PCIE_TXN1_R C623 .1U_4 LAN_PCIE_TXN1
23 LAN_PCIE_RXN1 GPP_RX1N GPP_TX1N 23
AK7 GPP_RX2P GPP_TX2P AJ6
AJ7 GPP_RX2N GPP_TX2N AK6
Edison 0112- Delete Test Point for PCI-E AG4 GPP_RX3P GPP_TX3P AE4 Edison 0112- Delete Test Point for PCI-E
AH4 GPP_RX3N GPP_TX3N AF4

11 A_RX0P AG9 AJ10 A_TX0P_C C664 .1U_4 A_TX0P 11

SB_RX0P SB_TX0P A_TX0N_C C665 .1U_4
11 A_RX0N AG10 SB_RX0N SB_TX0N AJ11 A_TX0N 11
11 A_RX1P AE9 AK9 A_TX1P_C C657 .1U_4 A_TX1P 11
B
SB_RX1P SB_TX1P A_TX1N_C C660 .1U_4 B
11 A_RX1N AF10 SB_RX1N SB_TX1N AK10 A_TX1N 11

5 ALINKCLK K2 AK13 PCE_TXSET R436 8.25K/F_6

SB_CLKP PCE_TXSET
5 ALINKCLK# L2 SB_CLKN
AJ12 PCE_ISET R423 10K_4
PCE_ISET
5 NBSRCCLK M2 GFX_CLKP
5 NBSRCCLK# M1 AH12 PCE_PCAL R421 150/F_4
GFX_CLKN PCE_PCAL

8,11 BMREQ# H2 AG12 PCE_NCAL R435 82.5/F_4 +1.2V_PCIE

BMREQ# PCE_NCAL

RC410ME

A
PROJECT : ZB3 A

NB-2 Size Document Number

Quanta Computer Inc.
RC410MB-PCIE LINK I/F
Rev
1A

Date: Monday, April 03, 2006 Sheet 7 of 37

5 4 3 2 1

+3V
+3V
 5 4 3 2 1

+3V L26
+1.8V L76 AVDDQ SBK160808T-301Y-S
SBK160808T-301Y-S AVDD_NB NB_VDDR
300 ohm /200mA
C707 C319 C329
C702 C703 10U_8 1U_4 .1U_4
10U_8 1U_4

+3V
D D
AVDD_NB U30D
PLVDD PUT AVDD_NB, AVDDDI, L21 BK1608HS220
+1.8V L22 AVDDQ, PLVDD DECOUPLING G5 PART 4 OF 6 B4
SBK160808T-301Y-S VDDR3_1 TXOUT_U0N
CAPS ON THE BOTTOM SIDE, 22 ohm /1A G4 VDDR3_2 TXOUT_U0P A4
CLOSE TO BALLS TXOUT_U1N B5
C819 +1.8V C253 C9 C6
100U/6.3V_3528 .1U_4 AVDD TXOUT_U1P
TXOUT_U2N B6
C249 C306 C10 A6
10U_8 1U_4 AVSSN TXOUT_U2P
TXOUT_U3N B7
TXOUT_U3P A7 INT VGA Stuff
C160 C271 D8
AVDDQ 1U_4 .1U_4 AVDDDI TXLOUT0-SB R271 *INT@0_4
Edison --April/3 TXOUT_L0N E5 TXLOUT0- 17,20
C8 F5 TXLOUT0+SB R272 *INT@0_4 TXLOUT0+ 17,20
Add C819 100uF (1.8V) AVSSDI TXOUT_L0P
D5 TXLOUT1-SB R263 *INT@0_4
TXOUT_L1N TXLOUT1- 17,20
capacitor for CRT TXOUT_L1P C5 TXLOUT1+SB R264 *INT@0_4 TXLOUT1+ 17,20
flicker issue.Close L21. B8 E6 TXLOUT2-SB R274 *INT@0_4 TXLOUT2- 17,20
C701 AVDDQ TXOUT_L2N TXLOUT2+SB R273 *INT@0_4
TXOUT_L2P D6 TXLOUT2+ 17,20
1U_4 B9 E7 L25 +1.8V
AVSSQ TXOUT_L3N SBK160808T-301Y-S
TXOUT_L3P E8
PLVDD NB_LPVDD
H10 PLLVDD LPVDD J8
C305 C322
C265 C297 H9 J7 .1U_4 1U_4 L23
.1U_4 .1U_4 PLLVSS LPVSS SBK160808T-301Y-S
H8 NB_LVDDR18A
LVDDR18A_1
T66 J2 TMDS_HPD LVDDR18A_2 H7
C INT VGA Stuff H3 C294 C267 C281 C
T67 DDC_DATA .1U_4 .1U_4 4.7U_6
15,18,20 VSYNC R261 *INT@0_4 N_VSYNC B3 G9
R262 *INT@0_4 N_HSYNC DACVSYNC LVSSR_1
15,18,20 HSYNC C3 DACHSYNC LVSSR_2 G8
RSET resistor need 10mils trace with at least LVSSR_3 G7
10mils spacing. R477 715/F_6 B10
RSET
Also need to connect GND at AVSSQ HF cap. LVDDR18D C7
C270 INT VGA Stuff
15,20 VGA_RED R399 *INT@0_4 N_VGA-R F10 1U_4
R401 *INT@0_4 N_VGA-G RED LCD_PON R243 *INT@0_4
15,20 VGA_GRN E10 GREEN LVDS_DIGON E2 LCD_POWER_ON 17,20

CRT
15,20 VGA_BLU R400 *INT@0_4 N_VGA-B D10 G3 LVDS_BLON
BLUE LVDS_BLON
LVDS_BLEN F2 T43
R174 *INT@150/F_4 N_VGA-R F8
TXCLK_UP

CLK. GEN.
R178 *INT@150/F_4 N_VGA-G 5 OSC14M OSC14M G1 F7
R184 *INT@150/F_4 N_VGA-B OSCIN TXCLK_UN TXLCLKOUT+SB R269 *INT@0_4
TXCLK_LP F6 TXLCLKOUT+ 17,20
G6 TXLCLKOUT-SB R268 *INT@0_4 TXLCLKOUT- 17,20
TXCLK_LN
5 CLK_NBCLK J1 CPU_CLKP
PLACE CLOSE TO RC410 R459 5 CLK_NBCLK# K1 CPU_CLKN
*22_4
C D9 PLACE CLOSE TO RC410

SVID
R462 10K_6 G2 F9
TVCLKIN Y
EMI--11/08
5,12 SB_OSCIN R465 *22_4 F1 E9 DAC_SCL is totem-pole output
+3V C688 OSCOUT COMP
*10P_4 B2 SCL_STRAP R260 *INT@0_4 DDCCLK 15,20
U8 DACSCL R259 *INT@0_4
INT VGA Stuff DACSDA C2 DDCDAT 15,20
B *INT@TC7SH08FU B
5

LVDS_BLON 1 R472 *[email protected]_6 +3V

4 R241 *INT@0_4 BLON 17,20 15,20 PHL_CLK R251 *INT@0_4 I2C_CLK D2 R197 4.7K_6
I2C_CLK STRP_DATA
6,28 NB_PWRGD 2 STRP_DATA D1 +3V
15,20 PHL_DATA R229 *INT@0_4 I2C_DAT C1
3

I2C_DATA STRP_DATA : Debug strap

R196 DEFAULT:1
RC410ME *0_4 0: MEMORY CHANNEL STRAPING
1: E2PROM STRAPING
Edison-11/07-- Internal : STUFF

+3V VCCP_+1.05V
R474 4.7K_6
+3V VCCP_+1.05V SCL_STRAP +3V
R282
R280 4.7K_4 R468
R281 4.7K_4 +3V VCCP_+1.05V Q29 4.7K_6 DAC_SCL: CPU VCC
2

R276 4.7K_4 R279 Q15 MMBT3904 DEFAULT:0

3
4.7K_4 4.7K_4 MMBT3904 0: MOBILE CPU
2

R270 Q12 N_HSYNC 3 1 BSEL1 5 2 Q7 1: DESKTOP CPU

4.7K_4 MMBT3904 R451 MMBT3904

3
N_VSYNC 3 1 BSEL0 5 R458 4.7K_4 R195 1K_6

1
R277 4.7K_4 2 EC_PWRGD 3,12,28
*4.7K_4
2

R266 R453

1
A *4.7K_4 4.7K_4 A
7,11 BMREQ# 3 1 BSEL2 5
Q27
R455 MMBT3904
*4.7K_4
PROJECT : ZB3

NB-3 Size

Date:
Document Number
Quanta Computer Inc.
RC410MB-VIDEO & CLKGEN
Monday, April 03, 2006 Sheet 8 of 37
Rev
1A

5 4 3 2 1
 5 4 3 2 1

U30F +1.2V
80 ohm(4A) U30E RC410ME +1.8VSUS
W5 M14 L36 +1.2V_CORE
VSSA#U5 PART 6 OF 6 VSS#M15 FBJ3216HS800 PART 5 OF 6
W6 VSSA#U6 VSS#G14 AC14 U16 VDD_CORE#M12 VDD_MEM#AB30 Y24
AB5 AG16 +1.2V_CORE M13 AC21
VSSA#Y5 VSS#G18 VDD_CORE#M13 VDD_MEM#AJ21 C371
AB6 VSSA#Y6 VSS#G27 A22 M15 VDD_CORE#M14 VDD_MEM#AK21 AD21
D V8 A2 C277 C295 C338 C320 M17 AC13 100U/6.3V_3528 C282 C327 C293 D
VSSA#P8 VSS#G3 1U_4 1U_4 1U_4 .1U_4 VDD_CORE#M17 VDD_MEM#AC13 .1U_4 .1U_4 .1U_4
V7 VSSA#P7 VSS#H13 D27 R16 VDD_CORE#M18 VDD_MEM#AC14 AD23
AA8 VSSA#U8 VSS#H14 AG26 V15 VDD_CORE#M19 VDD_MEM#AC15 AC16
AA7 VSSA#U7 VSS#H18 H18 N12 VDD_CORE#N12 VDD_MEM#AC18 AD19
AD7 VSSA#Y7 VSS#H23 A16 T15 VDD_CORE#N13 VDD_MEM#AC21 AD22

1
AD8 A9 C424 N14 V23
VSSA#Y8 VSS#H4 C289 C301 C335 C364 VDD_CORE#N14 VDD_MEM#AD10 C360 C346 C355 C373
R8 VSSA#L8 VSS#J23 AD17 + N16 VDD_CORE#N17 VDD_MEM#AD13 AD13
N8 J24 .1U_4 .1U_4 1U_4 .1U_4 N18 AD16 .1U_4 .1U_4 .1U_4 .1U_4
VSSA#K7 VSS#J24 220U/2.5V_3528 VDD_CORE#N18 VDD_MEM#AD15

CORE POWER
R7 R27 M19 AC19

2
VSSA#AD7 VSS#J30 VDD_CORE#N19 VDD_MEM#AD18
N7 VSSA#A2 VSS#K27 D24 R12 VDD_CORE#P12 VDD_MEM#AD21 AB24
AF7 VSSA#AF5 VSS#V30 T30 P13 VDD_CORE#P13 VDD_MEM#AE15 AK24
AE8 VSSA#AC6 VSS#U19 U19 P15 VDD_CORE#P14 VDD_MEM#AE18 T24
AG5 M16 C353 .1U_4 C315 C278 P17 AK28
VSSA#AC5 VSS#M16 .1U_4 C296 .1U_4 .1U_4 VDD_CORE#P17 VDD_MEM#AE21
T6 VSSA#P6 VSS#AD11 AD11 P19 VDD_CORE#P19 VDD_MEM#AG27 AB23
T5 H15 U12 Y23 C326 C348 C336 C339
VSSA#P5 VSS#M30 VDD_CORE#U12 VDD_MEM#AJ30 .1U_4 .1U_4 .1U_4 .1U_4
N6 VSSA#L6 VSS#N15 N15 T13 VDD_CORE#U13 VDD_MEM#AK18 AK21
N5 VSSA#L5 VSS#N16 N19 U14 VDD_CORE#U14 VDD_MEM#AK24 T23
AH5 VSSA#H6 VSS#N23 D3 T17 VDD_CORE#U17 VDD_MEM#AK9 V24
K5 A25 C260 C248 C332 C311 U18 AC22
VSSA#H5 VSS#N27 VDD_CORE#U18 VDD_MEM#W23

POWER
AH3 F3 .1U_4 .1U_4 1U_4 .1U_4 T19
VSSA#P4 VSS#G5 VDD_CORE#U19 VCCP_+1.05V
AH8 VSSA#AE3 VSS#P15 R15 V13 VDD_CORE#V13 VDD_CPU#H17 H11
AH7 P16 R14 H13

MEM POWER
VSSA#AD3 VSS#P16 D3 D5 VDD_CORE#V14 VDD_CPU#H19
AH6 VSSA#AC3 VSS#P23 G10 V17 VDD_CORE#V17 VDD_CPU#K23 G20
AD3 VSSA#AA3 VSS#P24 M24 +3V 2 1 2 1 R18 VDD_CORE#V18 VDD_CPU#L23 L23
AC3 VSSA#Y3 VSS#R12 M12 V19 VDD_CORE#V19 VDD_CPU#L24 L24

2
AA3 R13 SW1010C SW1010C W12 P23 C261 C290 C239 C250 C237
C VSSA#V3 VSS#R13 D7 VDD_CORE#W12 VDD_CPU#M23 22U/6.3V_8 .1U_4 .1U_4 .1U_4 .1U_4 C
Y3 VSSA#U3 VSS#R14 P12 W14 VDD_CORE#W14 VDD_CPU#M24 N23
V3 VSSA#R3 VSS#R15 P14 Power sequence requirement SW1010C W16 VDD_CORE#W17 VDD_CPU#T23 H17
U3 VSSA#P3 VSS#R16 U13 W18 VDD_CORE#W18 VDD_CPU#U23 G17
R3 R17 L34 BLM18PG330SN1D H14

1
VSSA#M3 VSS#R17 VDD18 VDD_CPU#U24
P3 VSSA#L3 VSS#R18 V18 +1.8V J9 VDD_18 VDD_CPU#V23 F17
M3 R19 AB22 G14 C273 C264 C259 C247
VSSA#J3 VSS#R19 C303 C240 C393 C309 VDD_18#AF26 VDD_CPU#V24 .1U_4 .1U_4 .1U_4 .1U_4
L3 VSSA#H3 VSS#R23 R23 33 ohm (3000mA) AB9 VDD_18#AF9 VDD_CPU#G16 A10
AF5 R24 1U_4 1U_4 1U_4 1U_4 J22 H16
GND

CPU IF POWER
VSSA#F3 VSS#R24 VDD_18#J26 VDD_CPU#G15
AF3 VSSA#N3 VSS#R30 J30 VDD_CPU#F22 H23
AF9 VSSA#AG3 VSS#T12 T12 Y8 VDDA_18#U8 VDD_CPU#F19 H12
AH9 VSSA#AE9 VSS#T13 N13 U8 VDDA_18#AD8 VDD_CPU#F16 F12
AH10 VSSA#AH7 VSS#T14 T14 AB8 VDDA_18#W6 VDD_CPU#F15 G12
AC20 P18 Y7 F11 C206 C241 C232 C242 C299
VSS#A15 VSS#T15 VDDA_18#AA8 VDD_CPU#E15 .1U_4 .1U_4 .1U_4 .1U_4
J23 VSS#A24 VSS#T16 T16 U7 VDDA_18#AA7 VDD_CPU#A16 P24
A29 U17 L30 BLM18PG330SN1D AE11 H19 100U/6.3V_3528
VSS#A29 VSS#T17 VDDA18 VDDA_18#AE7 VDD_CPU#H16
W30 VSS#AA23 VSS#T18 T18 +1.8V AC9 VDDA_18#AD7 VDD_CPU#H15 G11

PCIE IF
W23 VSS#AA24 VSS#T19 W19 AD10 VDDA_18#AC8 VDD_CPU#G22 H24
AA28 J27 33 ohm (3000mA) C370 C383 C391 C388 C395 AC10 G16
VSS#AA30 VSS#T27 1U_4 1U_4 1U_4 1U_4 VDDA_18#AC7 VDD_CPU#G21
AJ30 VSS#AB27 VSS#U15 U15 AG11 VDDA_18#AG6 VDD_CPU#G19 G13
AC12 N17 100U/6.3V_3528 AF11
VSS#AC12 VSS#U16 VDDA_18#AF6
AC15 VSS#AC16 VSS#V15 M18 VDDA_12#N8 AC8
K8 VSS#AC8 VSS#V16 V16 H5 VDDA_12#K6 VDDA_12#C3 K6
AD12
AD15
VSS#AD12 VSS#W16 W17
M26
H4
P8
VDDA_12#K4 PCIE POWERVDDA_12#R7 M8
T8
VSS#AD16 VSS#W27 VDDA_12#F6 VDDA_12#R8
AD18 VSS#AD19 VSS#V12 V12 P7 VDDA_12#F5 VDDA_12#U7 T7
AC17 W13 L7 M7 +1.2V_PCIE +1.2V
B VSS#AD23 VSS#W13 VDDA_12#B3 VDDA_12#B2 L37 B
AE30 VSS#AD30 VSS#V14 V14 L8 VDDA_12#A3 VDDA_12#K8 W8
AD14 W15 J6 W7 TI321611U330
VSS#AD8 VSS#W15 VDDA_12#B4 VDDA_12#L7
AC11 VSS#AD9 VSS#Y23 U23 AC7 VDDA_12#M8 VDDA_12#L8 AD9
AF12 VSS#AE12 VSS#Y24 U24 AB7 VDDA_12#W5 33 ohm(6A)
AF27 VSS#AE27 VSS#C19 A13
AC18 V28 C386 C337 C412 C363 C342 C427 C422 C374 C439
VSS#AC19 VSS#C17 1U_4 .1U_4 1U_4 1U_4 1U_4 1U_4 1U_4 100U/6.3V_3528
AG14 VSS#AG12 VSS#AH26 AG24
F4 AA24 *100U/6.3V_3528
VSS#AF7 VSS#AH25 +1.2V_PCIE
AG18 VSS#AG18 VSS#AG25 AA23
AG21 VSS#AG21 VSS#F30 F30
AK25 VSS#AG9 VSS#F25 K23
V27 D20 C400 C413 C349 C331
VSS#AH28 VSS#D27 1U_4 1U_4 1U_4 1U_4
AJ1 VSS#AJ1 VSS#D25 A19
AD20 VSS#AK10 VSS#D23 D17
AK12 VSS#AK13 VSS#D20 D14
AK15 VSS#AK16 VSS#D17 F27
AK18 VSS#AK19 VSS#C3 D4
AK2 VSS#AK2 VSS#C28 M23
AH11 VSS#AH11 VSS#B30 B30
J3 VSS#AJ11 VSS#B1 B1
AC27 VSS#AK25 VSS#AK29 AK29
VSS#AK22 AK22

RC410ME

A A

PROJECT : ZB3
Quanta Computer Inc.
NB-4 5 4 3 2
Size

Date:
Document Number
RC410MB-POWER
Monday, April 03, 2006 Sheet
1
9 of 37
Rev
1A
 A B

+1.8VSUS +0.9V_VTER
Edison --01/09 Delete R225. +0.9V_REF +1.8VSUS

+1.8VSUS +1.8VSUS +1.8VSUS +1.8VSUS +1.8VSUS

1
C182
R222 R223 + C177 C255
C443 CN23 *0_4 C420 1K/F_6 CN24
.1U_4 DDR2_SODIMM_H4_STD .1U_4 DDR2_SODIMM_H8_STD *220U/2.5V_3528 100U/6.3V_3528 *100U/6.3V_3528

2
DDR_VREF 1 2 DDR_VREF 1 2
VREF VSS46 MDQ11 VREF VSS46 MDQ11
3 VSS47 DQ4 4 3 VSS47 DQ4 4
MDQ15 5 6 MDQ10 MDQ15 5 6 MDQ10
C442 MDQ12 DQ0 DQ5 C421 R224 MDQ12 DQ0 DQ5
7 DQ1 VSS15 8 7 DQ1 VSS15 8
.1U_4 9 10 M_DM1 .1U_4 1K/F_6 9 10 M_DM1
M_DQS#1 VSS37 DM0 M_DQS#1 VSS37 DM0
11 DQS#0 VSS5 12 11 DQS#0 VSS5 12
M_DQS1 13 14 MDQ8 M_DQS1 13 14 MDQ8 +0.9V_VTER
DQS0 DQ6 MDQ13 DQS0 DQ6 MDQ13
15 VSS48 DQ7 16 15 VSS48 DQ7 16
MDQ14 17 18 MDQ14 17 18 RP15 56X2_4
MDQ9 DQ2 VSS16 MDQ1 MDQ9 DQ2 VSS16 MDQ1 MA10 C180 .1U_4
19 DQ3 DQ12 20 19 DQ3 DQ12 20 2 1 +1.8VSUS
21 22 MDQ4 21 22 MDQ4 MA1 4 3
MDQ5 VSS38 DQ13 MDQ5 VSS38 DQ13 C204 .1U_4
23 DQ8 VSS17 24 23 DQ8 VSS17 24
MDQ0 25 26 M_DM0 MDQ0 25 26 M_DM0 RP18 56X2_4
DQ9 DM1 DQ9 DM1 MA8
27 VSS49 VSS53 28 27 VSS49 VSS53 28 2 1
M_DQS#0 29 30 M_CLKOUT1 M_DQS#0 29 30 M_CLKOUT4 MA9 4 3
DQS#1 CK0 M_CLKOUT1 6 DQS#1 CK0 M_CLKOUT4 6
M_DQS0 31 32 M_CLKOUT#1 M_DQS0 31 32 M_CLKOUT#4
DQS1 CK0# M_CLKOUT#1 6 DQS1 CK0# M_CLKOUT#4 6
33 34 33 34 RP11 56X2_4
MDQ7 VSS39 VSS41 MDQ6 MDQ7 VSS39 VSS41 MDQ6 M_WE# C235 .1U_4
35 DQ10 DQ14 36 35 DQ10 DQ14 36 2 1 +1.8VSUS
MDQ2 37 38 MDQ3 MDQ2 37 38 MDQ3 MA15 4 3
DQ11 DQ15 DQ11 DQ15 C175 .1U_4
39 VSS50 VSS54 40 39 VSS50 VSS54 40
RP16 56X2_4
A
41 VSS18 VSS20 42 41 VSS18 VSS20 42 2 1 A
MDQ16 43 44 MDQ20 MDQ16 43 44 MDQ20 MA3 4 3 C179 .1U_4 +1.8VSUS
MDQ17 DQ16 DQ20 MDQ21 MDQ17 DQ16 DQ20 MDQ21
45 DQ17 DQ21 46 45 DQ17 DQ21 46
47 48 47 48 RP14 56X2_4 C236 .1U_4
PC4800 DDR2 SDRAM

PC4800 DDR2 SDRAM

M_DQS#2 VSS1 VSS6 M_DQS#2 VSS1 VSS6 MA2
49 DQS#2 NC3 50 49 DQS#2 NC3 50 2 1
M_DQS2 51 52 M_DM2 M_DQS2 51 52 M_DM2 MA0 4 3
DQS2 DM2 DQS2 DM2
53 VSS19 VSS21 54 53 VSS19 VSS21 54
MDQ19 55 56 MDQ22 MDQ19 55 56 MDQ22 RP10 56X2_4
MDQ23 DQ18 DQ22 MDQ18 MDQ23 DQ18 DQ22 MDQ18 M_RAS# C173 .1U_4
57 DQ19 DQ23 58 57 DQ19 DQ23 58 2 1 +1.8VSUS
M_CS#0
SO-DIMM (200P)

SO-DIMM (200P)
59 VSS22 VSS24 60 59 VSS22 VSS24 60 4 3
MDQ25 61 62 MDQ29 MDQ25 61 62 MDQ29 C188 .1U_4
MDQ24 DQ24 DQ28 MDQ28 MDQ24 DQ24 DQ28 MDQ28 RP9 56X2_4
63 DQ25 DQ29 64 63 DQ25 DQ29 64
65 66 65 66 M_ODT1 2 1
M_DM3 VSS23 VSS25 M_DQS#3 M_DM3 VSS23 VSS25 M_DQS#3 MA13
67 DM3 DQS#3 68 67 DM3 DQS#3 68 4 3
69 70 M_DQS3 69 70 M_DQS3
NC4 DQS3 NC4 DQS3 RP22 56X2_4
71 VSS9 VSS10 72 71 VSS9 VSS10 72
MDQ27 73 74 MDQ26 MDQ27 73 74 MDQ26 MA17 2 1 C243 .1U_4 +1.8VSUS
MDQ31 DQ26 DQ30 MDQ30 MDQ31 DQ26 DQ30 MDQ30 M_CKE3
75 DQ27 DQ31 76 75 DQ27 DQ31 76 4 3
77 78 77 78 C219 .1U_4
M_CKE0 VSS4 VSS8 M_CKE1 M_CKE2 VSS4 VSS8 M_CKE3 RP13 56X2_4
6 M_CKE0 79 CKE0 CKE1 80 M_CKE1 6 6 M_CKE2 79 CKE0 CKE1 80 M_CKE3 6
81 82 81 82 MA16 2 1
VDD7 VDD8 VDD7 VDD8 M_CS#2
83 NC1 A15 84 83 NC1 A15 84 4 3
MA17 85 86 MA14 MA17 85 86 MA14
A16_BA2 A14 A16_BA2 A14 RP8 56X2_4
87 VDD9 VDD11 88 87 VDD9 VDD11 88
MA12 89 90 MA11 MA12 89 90 MA11 M_ODT0 2 1 C187 .1U_4 +1.8VSUS
MA9 A12 A11 MA7 MA9 A12 A11 MA7 M_CS#1
91 A9 A7 92 91 A9 A7 92 4 3
MA8 93 94 MA6 MA8 93 94 MA6 C185 .1U_4
A8 A6 A8 A6 RP23 56X2_4
95 VDD5 VDD4 96 95 VDD5 VDD4 96
MA5 97 98 MA4 MA5 97 98 MA4 MA11 2 1
MA3 A5 A4 MA2 MA3 A5 A4 MA2 M_CKE2
99 A3 A2 100 99 A3 A2 100 4 3
MA1 101 102 MA0 MA1 101 102 MA0
A1 A0 A1 A0 RP20 56X2_4
103 VDD10 VDD12 104 103 VDD10 VDD12 104
MA10 105 106 MA16 MA10 105 106 MA16 MA5 2 1 C203 .1U_4 +1.8VSUS
MA15 A10/AP BA1 M_RAS# MA15 A10/AP BA1 M_RAS# MA12
107 BA0 RAS# 108 M_RAS# 6 107 BA0 RAS# 108 M_RAS# 6 4 3
M_WE# 109 110 M_CS#0 M_WE# 109 110 M_CS#2 C230 .1U_4
6 M_WE# WE# S0# M_CS#0 6 6 M_WE# WE# S0# M_CS#2 6
111 112 111 112 RP21 56X2_4
M_CAS# VDD2 VDD1 M_ODT0 M_CAS# VDD2 VDD1 M_ODT1 M_CKE1
6 M_CAS# 113 CAS# ODT0 114 M_ODT0 6 6 M_CAS# 113 CAS# ODT0 114 M_ODT1 6 2 1
M_CS#1 115 116 MA13 M_CS#3 115 116 MA13 M_CKE0 4 3
6 M_CS#1 S1# A13 6 M_CS#3 S1# A13
117 VDD3 VDD6 118 117 VDD3 VDD6 118
M_ODT2 119 120 M_ODT3 119 120 RP7 56X2_4
6 M_ODT2 ODT1 NC2 6 M_ODT3 ODT1 NC2
121 122 121 122 M_ODT2 2 1 C226 .1U_4 +1.8VSUS
MDQ32 VSS11 VSS12 MDQ34 MDQ32 VSS11 VSS12 MDQ34 M_CAS#
123 DQ32 DQ36 124 123 DQ32 DQ36 124 4 3
MDQ37 125 126 MDQ39 MDQ37 125 126 MDQ39 C196 .1U_4
DQ33 DQ37 DQ33 DQ37 RP12 56X2_4
127 VSS26 VSS28 128 127 VSS26 VSS28 128
M_DQS#4 129 130 M_DM4 M_DQS#4 129 130 M_DM4 M_CS#3 2 1
M_DQS4 DQS#4 DM4 M_DQS4 DQS#4 DM4 M_ODT3
131 DQS4 VSS42 132 131 DQS4 VSS42 132 4 3
133 134 MDQ33 133 134 MDQ33
MDQ38 VSS2 DQ38 MDQ36 MDQ38 VSS2 DQ38 MDQ36 RP19 56X2_4
135 DQ34 DQ39 136 135 DQ34 DQ39 136
MDQ35 137 138 MDQ35 137 138 MA14 2 1 C231 .1U_4 +1.8VSUS
DQ35 VSS55 MDQ45 DQ35 VSS55 MDQ45 MA7
139 VSS27 DQ44 140 139 VSS27 DQ44 140 4 3
MDQ41 141 142 MDQ44 MDQ41 141 142 MDQ44 C233 .1U_4
MDQ40 DQ40 DQ45 MDQ40 DQ40 DQ45 RP17 56X2_4
143 DQ41 VSS43 144 143 DQ41 VSS43 144
145 146 M_DQS#5 145 146 M_DQS#5 MA4 2 1
M_DM5 VSS29 DQS#5 M_DQS5 M_DM5 VSS29 DQS#5 M_DQS5 MA6
147 DM5 DQS5 148 147 DM5 DQS5 148 4 3
149 VSS51 VSS56 150 149 VSS51 VSS56 150
MDQ43 151 152 MDQ46 MDQ43 151 152 MDQ46
MDQ42 DQ42 DQ46 MDQ47 MDQ42 DQ42 DQ46 MDQ47
153 DQ43 DQ47 154 153 DQ43 DQ47 154
155 VSS40 VSS44 156 155 VSS40 VSS44 156
MDQ48 157 158 MDQ52 MDQ48 157 158 MDQ52
MDQ53 DQ48 DQ52 MDQ55 MDQ53 DQ48 DQ52 MDQ55
159 DQ49 DQ53 160 159 DQ49 DQ53 160
161 VSS52 VSS57 162 161 VSS52 VSS57 162
163 164 M_CLKOUT0 163 164 M_CLKOUT3
NCTEST CK1 M_CLKOUT0 6 NCTEST CK1 M_CLKOUT3 6
165 166 M_CLKOUT#0 165 166 M_CLKOUT#3
VSS30 CK1# M_CLKOUT#0 6 VSS30 CK1# M_CLKOUT#3 6 +1.8VSUS
M_DQS#6 167 168 M_DQS#6 167 168
M_DQS6 DQS#6 VSS45 M_DM6 M_DQS6 DQS#6 VSS45 M_DM6
169 DQS6 DM6 170 169 DQS6 DM6 170
171 VSS31 VSS32 172 171 VSS31 VSS32 172
MDQ51 173 174 MDQ50 MDQ51 173 174 MDQ50
DQ50 DQ54 DQ50 DQ54

1
MDQ49 175 176 MDQ54 MDQ49 175 176 MDQ54 C700
DQ51 DQ55 DQ51 DQ55
B 177 178 177 178 + 220U/2.5V_3528 C227 C221 C176 C197 C178 C717 C193 C181 C225 C234 B
MDQ61 VSS33 VSS35 MDQ60 MDQ61 VSS33 VSS35 MDQ60 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4
179 DQ56 DQ60 180 179 DQ56 DQ60 180
MDQ57 181 182 MDQ56 MDQ57 181 182 MDQ56

2
DQ57 DQ61 DQ57 DQ61
183 VSS3 VSS7 184 183 VSS3 VSS7 184
M_DM7 185 186 M_DQS#7 M_DM7 185 186 M_DQS#7
DM7 DQS#7 M_DQS7 DM7 DQS#7 M_DQS7
187 VSS34 DQS7 188 187 VSS34 DQS7 188
MDQ63 189 190 MDQ63 189 190 DE-COUPLING FOR SODIMM2
MDQ59 DQ58 VSS36 MDQ62 MDQ59 DQ58 VSS36 MDQ62
191 DQ59 DQ62 192 191 DQ59 DQ62 192
193 194 MDQ58 193 194 MDQ58
SMBDT VSS14 DQ63 SMBDT VSS14 DQ63 +1.8VSUS
5 SMBDT 195 SDA VSS13 196 5 SMBDT 195 SDA VSS13 196
SMBCK 197 198 SMBCK 197 198 R133 4.7K/F_4
5 SMBCK SCL SA0 5 SMBCK SCL SA0
199 200 R131 4.7K/F_4 199 200 R130 4.7K/F_4
+3V VDD(SPD) SA1 +3V +3V VDD(SPD) SA1 +3V

1
C168
SMbus address A0 + 220U/2.5V_3528 C202 C186 C218 C705 C222 C198 C224 C714 C706 C708
SMbus address A0 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4
CLOCK 3,4
CLOCK 0,1

2
MDQ[63..0] CKE 2,3
CKE 0,1 MDQ[63..0] 6
MA[17..0] (NORMAL) DE-COUPLING FOR SODIMM 1
(NORMAL) MA[17..0] 6
M_DM[7..0]
M_DM[7..0] 6
M_DQS[7..0]
M_DQS[7..0] 6 PROJECT : ZB3
M_DQS#[7..0]
M_DQS#[7..0] 6

DDRII Size

Date:
Document Number
Quanta Computer Inc.
DDR2 SO-DIMM
Monday, April 03, 2006 Sheet 10 of 37
Rev
1A

A B
 5 4 3 2 1

+3VSUS

C17 .1U_4 R44 8.2K_4

5
1 U35A Reserved For EMI
5,6,15,21,24 ALINK_RST#
U1
4
2 AG10
SB460 SB 27x27mm U2 PCI_MINI R552 33_4 PCLK_MINI PCLK_MINI C772 22P_4
A_RST# PCICLK0 PCLK_MINI 14,22
TC7SH08FU Part 1 of 4 T2 PCI_591 R547 33_4 PCLK_591 PCLK_591 C771 22P_4

PCI CLKS
PCLK_591 14,28

3
PCICLK1 PCI_PCM R554 33_4 PCLK_PCM PCLK_PCM C773 22P_4
5 SBSRCCLK J24 PCIE_RCLKP PCICLK2 U1 PCLK_PCM 14,24
J25 V2 PCI_SIO R560 33_4 PCLK_SIO PCLK_SIO C778 22P_4
5 SBSRCCLK# PCIE_RCLKN PCICLK3 PCLK_SIO 14
W3 PCI_CLK4 R60 22_4 PCICLK4 PCICLK4 C38 22P_4
PCICLK4 PCICLK4 14
C86 .1U_4 A_RX0P_C P29 U3 PCI_LAN R557 33_4 PCLK_LAN PCLK_LAN C774 22P_4
7 A_RX0P PCIE_TX0P PCICLK5 PCLK_LAN 14
R35 *0_6 C79 .1U_4 A_RX0N_C P28 V1 PCI_CLK6 R558 22_4 PCICLK6 PCICLK6 C777 22P_4
7 A_RX0N PCIE_TX0N PCICLK6 PCICLK6 14
C97 .1U_4 A_RX1P_C M29 T1 SPDIF_RR R548 0_4
D 7 A_RX1P PCIE_TX1P SPDIF_OUT/PCICLK7/GPIO41 SB_SPDIF_OUT 14 D
C91 .1U_4 A_RX1N_C M28
7 A_RX1N PCIE_TX1N
K29 AJ9 PCIRST#_C
T86 PCIE_TX2P PCIRST#
T85 K28 PCIE_TX2N Edison --Feb/27__ The EMI
H29 AD[0..31]
T82
H28
PCIE_TX3P
W7 AD0
AD[0..31] 14,22,24 recommend to install
T83 PCIE_TX3N AD0/ROMA18
AD1/ROMA17 Y1 AD1 decupling capas for the

PCI EXPRESS INTERFACE

SB CALIBRATION RESISITOR VALUE T25 W8 AD2 PCI Clock.
7 A_TX0P PCIE_RX0P AD2/ROMA16
T26 W5 AD3
7 A_TX0N PCIE_RX0N AD3/ROMA15 Richard 3/8 -- From 33P_4
SB600 SB460 T22 AA5 AD4
7 A_TX1P PCIE_RX1P AD4/ROMA14 +3V
7 A_TX1N T23 PCIE_RX1N AD5/ROMA13 Y3 AD5 Change to 22P_4
562 OHM 1% 150 OHM 1% M25 AA6 AD6 C790 *.1U_4
R541 T4 PCIE_RX2P AD6/ROMA12 AD7
T5 M26 PCIE_RX2N AD7/ROMA11 AC5
2.05K 1% 150 OHM 1% M22 AA7 AD8
R543 T8 PCIE_RX3P AD8/ROMA9

5
M23 AC3 AD9 PCIRST#_C 1
T10 PCIE_RX3N AD9/ROMA8
0 ohm 4.12K 1% AC7 AD10 4
R540 R541 150/F_6 PCIE_CALRP AD10/ROMA7 AD11 U38
PCIRST# 22,24,28
E29 PCIE_CALRP AD11/ROMA6 AJ7 2
R543 150/F_6 PCIE_CALRN E28 AD4 AD12 *TC7SH08FU
PCIE_VDDR

3
PCIE_CALRN AD12/ROMA5 AD13 C788 R584 C791
AD13/ROMA4 AB11
+1.8V L13 R540 4.12K/F_6 PCIE_CALI E27 AE6 AD14 *82P_4 82P_4
SBK160808T-301Y-S PCIE_CALI AD14/ROMA3 AD15 8.2K_4
AD15/ROMA2 AC9
PCIE_PVDD U29 AA3 AD16
PCIE_PVDD AD16/ROMD0 AD17 R586 0_6
AD17/ROMD1 AJ4
C107 C66 C67 U28 AB1 AD18
PCIE_PVSS AD18/ROMD2 AD19
PCIE Power AD19/ROMD3 AH4
10U_8 1U_4 .1U_4 F27 AB2 AD20 +3V
PCIE_VDDR_1 AD20/ROMD4 AD21
F28 PCIE_VDDR_2 AD21/ROMD5 AJ3
F29 AB3 AD22 PCI_LOCK# R20 8.2K_4
PCIE_VDDR_3 AD22/ROMD6 AD23 INTE# R13 8.2K_4
G26 PCIE_VDDR_4 AD23/ROMD7 AH3
G27 AC1 AD24 INTF# R571 8.2K_4
PCIE_VDDR_5 AD24

PCI INTERFACE
Change to 0 ohm for system halt issue--Arec 0113 G28 AH2 AD25 INTG# R24 8.2K_4 C18
C +1.8V PCIE_VDDR_6 AD25 AD26 INTH# R23 8.2K_4 C
G29 PCIE_VDDR_7 AD26 AC2 .1U_4
L12 PCIE_VDDR J27 AH1 AD27
0_8 PCIE_VDDR_8 AD27 AD28
J29 PCIE_VDDR_9 AD28 AD2
L25 AG2 AD29
PCIE_VDDR_10 AD29 AD30
L26 PCIE_VDDR_11 AD30 AD1
C119 C100 C120 C108 C117 C83 C116 C115 C94 C98 L29 AG1 AD31
PCIE_VDDR_12 AD31 +3V
N29 PCIE_VDDR_13 CBE0#/ROMA10 AB9 CBE0# 22,24
.1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 AF9
CBE1#/ROMA1 CBE1# 22,24
CBE2#/ROMWE# AJ5 CBE2# 22,24
22U/6.3V_8 AG3 SERIRQ R51 8.2K_4
CBE3# CBE3# 22,24
AA2 FRAME#
FRAME# FRAME# 22,24
AH6 DEVSEL# RN2 8.2KX4_4
DEVSEL#/ROMA0 DEVSEL# 22,24
AG5 IRDY# PERR# 2 1 C21
IRDY# IRDY# 22,24
ATi Recommend AA1 TRDY# TRDY# 4 3 .1U_4
TRDY#/ROMOE# TRDY# 22,24
Vendor: NSK AF7 PAR FRAME# 6 5
PAR/ROMA19 PAR 22,24
Part Number: NXG 32.768KAE12FUD 16 PPM. Y2 STOP# STOP# 8 7
STOP# STOP# 22,24
AG8 PERR#
PERR# PERR# 22,24
32K_X1 AC11 SERR# RN5 8.2KX4_4
SERR# SERR# 22,24
AJ8 REQ0# DEVSEL# 2 1
Y1 32.768KHZ REQ0# REQ1# REQ3#
REQ1# AE2 4 3
1 4 32K_X2 AG9 REQ2# REQ0# 6 5
REQ2# REQ2# 22
2 3 AH8 REQ3# REQ2# 8 7
REQ3#/GPIO70 REQ3# 24
REQ4#

RTC REQ4#/GPIO71 AH5

AD11 GNT0# RN1 *8.2KX4_4
R103 R93 20M_4 GNT0# GNT1# GNT0#
GNT1# AF2 2 1
20M_4 AH7 GNT2# GNT1# 4 3
GNT2# GNT2# 22
D28 RB751 C112 C111 AB12 GNT3# GNT2# 6 5
GNT3#/GPIO72 GNT3# 24
+3VPCU 2 1 VCCRTC 18P_4 18P_4 AG4 GNT4# GNT3# 8 7
GNT4#/GPIO73 CLKRUN#
CLKRUN# AG7 CLKRUN# 22,24,28
R509 AF6 PCI_LOCK# RN6 8.2KX4_4
B 1K_4 D27 RB751 LOCK# REQ1# B
2 1
RTC_N02 2 1 AD3 INTE# IRDY# 4 3
VCCP_+1.05V INTE#/GPIO33 INTE# 24
AF1 INTF# REQ4# 6 5
INTF#/GPIO34 INTF# 22
2

AF4 INTG# SERR# 8 7

INTG#/GPIO35 INTG# 22,24
JP9 32K_X1 D2 AF3 INTH#
X1 INTH#/GPIO36 INTH# 24
C757 C756 *Clear_PAD R59
1U_4 *1K_4 C24
XTAL
.1U_4
1

GNT4# R21 *8.2K_4 .1U_4

32K_X2 C1
R512 X2 LAD0 PAR R22 8.2K_4
LAD0 AG24 LAD0/FWH0 28
100/F_6 AC26 AG25 LAD1
3H_PWRGD CPU_PG/LDT_PG LAD1 LAD1/FWH1 28
3 H_INTR W26 AH24 LAD2 LAD3 R29 100K_4
INTR/LINT0 LAD2 LAD2/FWH2 28
LAD3

LPC
3 H_NMI W24 NMI/LINT1 LAD3 AH25 LAD3/FWH3 28
3 H_INIT# W25 AF24 LFRAME#/FWH4 LAD2 R583 100K_4
INIT# LFRAME# LFRAME#/FWH4 14,28
Q35 3 H_SMI# AA24 AJ24 LDRQ#0
SMI# LDRQ0# LDRQ#1 LAD1 R34 100K_4
MMBT3904 T2 AA23 SLP#/LDT_STP# LDRQ1#/GNT5#/GPIO68 AH26
3VRTC 1 3 RTC_N01 R507 3K_6 3 H_IGNNE# AA22 W22 BMREQ#
+5VSUS IGNNE#/SIC BMREQ#/REQ5#/GPIO65 BMREQ# 7,8
3 H_A20M# AA26 AF23 SERIRQ LAD0 R38 100K_4
A20M#/SID SERIRQ SERIRQ 22,24,28
CPU

3 H_FERR# Y27 FERR#

R508 3 H_STPCLK# AA25 D3 BMREQ# R559 *8.2K_4
STPCLK#/ALLOW_LDTSTP RTCCLK RTC_CLK 14
4.7K/F_6 CPU_STP#_SB AH9 F5
CPU_STP#/DPSLP_3V# RTC_IRQ#/GPIO69 AUTO_ON# 14
1

RTC

B24 RN4 10KX4_4

T80
2

CN25 RTC_N03 DPSLP_OD#/GPIO37

3,31 DPRSLPVR W23 DPRSLPVR VBAT E1 VCCRTC 2 1
BAT_CON AC25 D1 LDRQ#0 4 3
LDT_RST#/DPRSTP#/PROCHOT# RTC_GND CLKRUN# 6 5
2

R510 C764 LDRQ#1

RTC holder 15K/F_6 SB460
8 7
1U_4

A +3V A
Item56 C814 .1U_4
H_DPSLP# 3
Correct C3 timing issue by ATI recommand-- Arec 0215
3
5

STP_CPU# R605 CPU_STP#_SB R606 220K_6 2 4 2

5 STP_CPU# PROJECT : ZB3
SB-1 C815
4.7K_4 D29
1 2 C816
U40
NC7SZ14 Q38
Quanta Computer Inc.
3

33P_4 330P_4 2N7002E

1

SDM10K45 Size Document Number Rev

Custom SB450M PCIE/PCI/CPU/LPC I/F 1A

Date: Monday, April 03, 2006 Sheet 11 of 37

5 4 3 2 1
 5 4 3 2 1

R513 *22_4 C744 *10P_4 R514 *22_4 C742 *10P_4

SB_OSCIN

U35D USB power use S3 power,But

R518 0_6
SB460 SB 27x27mm USBCLK 5 Over current signal datasheet
is S5 only,But ATI FAE say use
PME#
S3 is ok
22,23,24 PME# A3 PCI_PME#/GEVENT4# Part 4 of 4 USBCLK A17 SB_48M_X1 R530 *0_6
PU/PD RI# B2
24 RI# RI#/EXTEVNT0#
SUSB# F7 A14 USB_RCOMP R519 11.8K/F_6
28 SUSB# SLP_S3# USB_RCOMP

ACPI / WAKE UP
SUSC# A5
28 SUSC# SLP_S5# +3V_S5
DNBSWON# E3 A11
28 DNBSWON# PWR_BTN# USB_ATEST1 T78
3,8,28 EC_PWRGD B5 PWR_GOOD USB_ATEST0 A10 T79
B3 KBSMI# R522 4.7K/F_4
+3V_S5 6,24 SUS_STAT# SUS_STAT#
F9 TEST2 USB_HSDP9+ H12 T17
D R92 10K_4 E9 G12 RP46 10KX2_4 D
T14

EVENTS
R88 10K_4 TEST1 USB_HSDM9- MONITOR_PLUG# C147
G9 TEST0 1 2
CPU_PROCHOT# R115 *10K_4 GATEA20 AF26 E12 SCI# 3 4 .1U_4
28 GATEA20 GA20IN USB_HSDP8+ T19

USB INTERFACE
RCIN# AG26 D12 T9
28 RCIN# KBRST# USB_HSDM8-
SWI# D7
28 SWI# LPC_PME#/GEVENT3#
EXTEVNT1# C25 E14 USBP7+ 22
SUSB# R127 4.7K_4 CPU_PROCHOT# LPC_SMI#/EXTEVNT1# USB_HSDP7+ +3VSUS
3,28,31 CPU_PROCHOT# D9 S3_STATE/GEVENT5# USB_HSDM7- D14 USBP7- 22
SUSC# R524 4.7K_4 GPM7# F4 RP47 *10KX2_4
DNBSWON# R121 4.7K_4 PCIE_WAKE# SYS_RESET#/GPM7# USB_OCP8#
22 PCIE_WAKE# E7 WAKE#/GEVENT8# USB_HSDP6+ G14 USBP6+ 22 1 2
EMAIL_LED# C2 H14 USB_OCP9# 3 4
29 EMAIL_LED# BLINK/GPM6# USB_HSDM6- USBP6- 22
PME# R526 4.7K_4 3 SB_THERMTRIP# SB_THERMTRIP# G7
SWI# R116 10K_4 SMBALERT#/THRMTRIP#/GEVENT2# RN3 10KX4_4
USB_HSDP5+ D16 T76
Delay 20ms after S5 powerOK E16 T20 USB_OCP3# 2 1
EMAIL_LED# R528 10K_4 RSMRST# USB_HSDM5- USB_OCP6#
28 RSMRST# E2 RSMRST# 4 3
Need mounted it -- Arec-0215 (Item55) C145 OSC / RST D18 USBP4+ 22 USB power USB_OCP4# 6 5
.1U_4 R520 0_4 SB_14M_X1 USB_HSDP4+ USB_OCP7#
5,8 SB_OSCIN B23 14M_OSC USB_HSDM4- E18 USBP4- 22 8 7
RI# R527 10K_4
GPIO10 C28 G16 AVDD_USB L14 +3VSUS
SATA_IS0#/GPIO10 USB_HSDP3+ T16
GPIO1 A26 H16 T11 TI201209G121
GPM7# R122 10K_4 GPIO6 ROM_CS#/GPIO1 USB_HSDM3-
B29 GHI#/SATA_IS1#/GPIO6
PCIE_WAKE# R117 4.7K_4 GPIO7 A23 G18 USBP2+ 22
RST_HDD# WD_PWRGD/GPIO7 USB_HSDP2+
21 RST_HDD# B27 SMARTVOLT/SATA_IS2#/GPIO4 USB_HSDM2- H18 USBP2- 22
MAX6648_AL# R76 10K_4 GPIO5 D23 C143 C140 C124 C122
PCSPK SHUTDOWN#/GPIO5 1U_4 .1U_4 .1U_4
26 PCSPK B26 SPKR/GPIO2 USB_HSDP1+ D19 USBP1+ 20
PCLK_SMB C27 E19 USBP1- 20
5,22 PCLK_SMB SCL0/GPOC0# USB_HSDM1-

GPIO
Edison--01/03 Modify PDAT_SMB B28 22U/6.3V_8
+3V 5,22 PDAT_SMB SDA0/GPOC1#
C3 SCL1/GPOC2# USB_HSDP0+ G19 USBP0+ 22
F3 SDA1/GPOC3# USB_HSDM0- H19 USBP0- 22
BOARD_ID1 D26
BOARD_ID0 DDC1_SCL/GPIO9
C26 DDC1_SDA/GPIO8
GPIO0 A27 B9
SSMUXSEL/SATA_IS3#/GPIO0 AVDDTX_0 AVDD_USB
SB_LLB# A4 B11
SB_THERMTRIP# R118 10K_4 LLB#/GPIO66 AVDDTX_1
C AVDDTX_2 B13 C
B16 C121 C123 11/28-Arec C131
USB_OCP9# AVDDTX_3 .1U_4 .1U_4 .1U_4
C6 USB_OC9#/SLP_S2/GPM9# AVDDTX_4 B18
EXTEVNT1# R106 4.7K_4 USB_OCP8# C5 A9
GPIO5 R119 4.7K_4 C9 USB_OCP7# USB_OC8#/AZ_DOCK_RST#/GPM8# AVDDRX_0
C4 USB_OC7#/GEVENT7# AVDDRX_1 B10
RST_HDD# R533 4.7K_4 .1U_4 USB_OCP6# B4 B12
PCLK_SMB R537 2.2K_4 AZ_RST# R523 0_4 USB_OC6#/GEVENT6# AVDDRX_2
B6 USB_OC5#/DDR3_RST#/GPM5# AVDDRX_3 B14
PDAT_SMB R534 2.2K_4 USB_OCP4# A6 B17 +3.3V_AVDDC L78
USB_OC4#/GPM4# AVDDRX_4

USB OC
USB_OCP3# C8 SBK160808T-301Y-S
SB_LLB# R525 *10K_4 MONITOR_PLUG# USB_OC3#/GPM3#
20 MONITOR_PLUG# C7 USB_OC2#/GPM2# AVDDC A12
AZ_RST# R517 *10K_4 28 SCI# SCI# B8
KBSMI# USB_OC1#/GPM1#
28 KBSMI# A8 USB_OC0#/GPM0# AVSSC A13
C750 C753 C748
GPIO7 R521 10K_4 A16 2.2U_6 1U_4 .1U_4
RCIN# R42 10K_4 AZ_BITCLK AVSS_USB_1
N2 C9

AZALIA
AZ_SDOUT AZ_BITCLK AVSS_USB_2
M2 AZ_SDOUT AVSS_USB_3 C10
GPIO10 R536 10K_4 K2 C11
GPIO13 R12 10K_4 T81 AZ_SYNC AZ_SDIN3/GPIO46 AVSS_USB_4
L3 AZ_SYNC AVSS_USB_5 C12

USB PWR
GPIO14 R66 10K_4 K3 C13
GPIO31 R48 10K_4 T12 AZ_RST# AVSS_USB_6
AVSS_USB_7 C14
AC_BITCLK_R L1 C16
GPIO1 R531 10K_4 T84 AC_SDOUT AC_BITCLK/GPIO38 AVSS_USB_8
14 AC_SDOUT L2 AC_SDOUT/GPIO39 AVSS_USB_9 C17
GPIO3 R124 10K_4 26 CD_SDIN0 CD_SDIN0 L4 C18 +3V
GPIO0 R532 *10K_4 AZ_SDIN1 ACZ_SDIN0/GPIO42 AVSS_USB_10
26 AZ_SDIN1 J2 ACZ_SDIN1/GPIO43 AVSS_USB_11 C19

AC97
GPIO6 R535 10K_4 AC_SDIN2 J4 C20 R109 *10K_4 BOARD_ID0 R112 10K_4
T13 AC_SYNC_R ACZ_SDIN2/GPIO44 AVSS_USB_12
T87 M3 AC_SYNC/GPIO40 AVSS_USB_13 D11
Edison--01/03 Modify AC_RST# L5 D21 R101 *10K_4 BOARD_ID1 R102 10K_4
T6 AC_RST#/GPIO45 AVSS_USB_14
AVSS_USB_15 E11
R83 10K_4 E21 Edison--11/08- Adding
+3V_S5 AVSS_USB_16
PCSPK R108 10K_4 F11
GPIO3 AVSS_USB_17
T74 E23 NC1 AVSS_USB_18 F12
AC_SDIN2 R90 10K_4 GPIO31 AC21 F14
AZ_SDIN1 R529 10K_4 GPIO13 NC2 AVSS_USB_19
AD7 NC3 AVSS_USB_20 F16 Edison--Mar/01_Add board ID "0 0" is PATA H.D.D.
B CD_SDIN0 R84 10K_4 AE7 F18 B
AC_BITCLK_R R542 10K_4 T104 GPIO14 AA4
NC4 AVSS_USB_21
F19
board ID " 0 1" is SATA H.D.D.
AZ_RST# R511 10K_4 MAX6648_AL# NC5 AVSS_USB_22
3 MAX6648_AL# T4 NC6 AVSS_USB_23 F21
AZ_SYNC R80 10K_4 3 H_CPUSLP# D4 G11
AZ_SDOUT R544 10K_4 NC7 AVSS_USB_24 Board ID
AB19 NC8 AVSS_USB_25 G21 ID1 ID0
AZ_BITCLK R545 10K_4 T1
AVSS_USB_26 H11
AVSS_USB_27 H21 PATA_H.D.D
AVSS_USB_28 J11 00 0 0
AVSS_USB_29 J12 SATA_H.D.D
AVSS_USB_30 J14 01 0 1
AVSS_USB_31 J16
AVSS_USB_32 J18 10
AVSS_USB_33 J19
11

SB460

Edison --11/03 to modify

R81 39_4
26 CD_BITCLKA_MDC
R85 39_4
26 CD_SYNC_MDC C101 R539 39_4 R516 39_4
*22P_4 26 CD_SDOUTA_MDC 26 CD_RESET#_MDC
C93 *22P_4
C769 *22P_4 C740 *22P_4
R87 39_4 AZ_SYNC R546 39_4 AZ_BITCLK
26 AZ_SYNCA 26 AZ_BITCLKA
R538 39_4 AZ_SDOUT R515 39_4 AZ_RST#
C770 26 AZ_SDOUTA 26 AZ_RESET#
C104 *22P_4 *22P_4
C768 *22P_4 C741 *22P_4

A A

SB-2 PROJECT : ZB3

Quanta Computer Inc.
Size Document Number Rev
Custom 1A
SB460 ACPI/GPIO/USB/AC97
Date: Monday, April 03, 2006 Sheet 12 of 37
5 4 3 2 1
 5 4 3 2 1

PDD[0..15]
PDD[0..15] 21
L11 U35C
U35B FBJ3216HS800
VDDQ_3V
C12 *.1U_4 SATA_TX0+_C AH21
+3V
80ohm/4A
A25 VDDQ_1 SB4600 SB 27x27mm
VSS_1 A1
21 SATA_TXP0
C13 *.1U_4 SATA_TX0-_C AJ21 SATA_TX0+ SB460 SB 27x27mm AB29 C80
A28
C29
VDDQ_2
Part 3 of 4
VSS_2 A20
A21
21 SATA_TXN0 SATA_TX0- IDE_IORDY PHDRDY 21 VDDQ_3 VSS_3
Part 2 of 4 AA28 C40 C88 C29 C81 C59 D24 A29
IDE_IRQ IRQ14 21 VDDQ_4 VSS_4
21 SATA_RXN0 AH20 AA29 100U/6.3V_3528 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 L9 B1
SATA_RX0- IDE_A0 PDA0 21 VDDQ_5 VSS_5
21 SATA_RXP0 AJ20 SATA_RX0+ IDE_A1 AB27 PDA1 21 L21 VDDQ_6 VSS_6 B7
IDE_A2 Y28 PDA2 21 M5 VDDQ_7 VSS_7 B25
T98 AH18 SATA_TX1+ IDE_DACK# AB28 PDDACK# 14,21 P3 VDDQ_8 VSS_8 C21
T99 AJ18 SATA_TX1- IDE_DRQ AC27 PDDREQ 21 P9 VDDQ_9 VSS_9 C22
D AC29 C58 C52 C96 C87 C76 C68 T5 C24 D
IDE_IOR# PDIOR# 21 VDDQ_10 VSS_10
AH17 AC28 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 V9 D6
T100 SATA_RX1- IDE_IOW# PDIOW# 21 VDDQ_11 VSS_11
T94 AJ17 SATA_RX1+ IDE_CS1# W28 PDCS1# 21 W2 VDDQ_12 VSS_12 E24
IDE_CS3# W27 PDCS3# 21 W6 VDDQ_13 VSS_13 F2

SERIAL ATA

ATA 66/100
T93 AH13 SATA_TX2+ PDD[0..15] 21 W21 VDDQ_14 VSS_14 F23
AH14 AD28 PDD0 W29 G1
T101 SATA_TX2- IDE_D0/GPIO15 VDDQ_15 VSS_15
AD26 PDD1 C63 C129 C31 C118 C99 C78 AA12 J1
IDE_D1/GPIO16 PDD2 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 VDDQ_16 VSS_16
T103 AH16 SATA_RX2- IDE_D2/GPIO17 AE29 AA16 VDDQ_17 VSS_17 J8
AJ16 AF27 PDD3 AA19 L6
T102 SATA_RX2+ IDE_D3/GPIO18 VDDQ_18 VSS_18
AG29 PDD4 AC4 L8
IDE_D4/GPIO19 PDD5 L15 VDDQ_19 VSS_19
T95 AJ11 SATA_TX3+ IDE_D5/GPIO20 AH28 AC23 VDDQ_20 VSS_20 M9
AH11 AJ28 PDD6 FBJ3216HS800 AD27 M12
T92 SATA_TX3- IDE_D6/GPIO21 VDDQ_21 VSS_21
AJ27 PDD7 +1.8V VDD_1.8V AE1 M15
IDE_D7/GPIO22 PDD8 VDDQ_22 VSS_22
T97 AH12 SATA_RX3- IDE_D8/GPIO23 AH27 80ohm/4A AE9 VDDQ_23 VSS_23 M18
AJ13 AG27 PDD9 AE23 N13
T96 SATA_RX3+ IDE_D9/GPIO24 VDDQ_24 VSS_24
AG28 PDD10 C148 C142 C144 C92 C89 C82 AH29 N17
R52 *1K/F_4 SATA_CAL IDE_D10/GPIO25 PDD11 22U/6.3V_8 1U_4 1U_4 1U_4 1U_4 VDDQ_25 VSS_25
AF12 SATA_CAL IDE_D11/GPIO26 AF28 AJ2 VDDQ_26 VSS_26 P1
AF29 PDD12 100U/6.3V_3528 AJ6 P6
SATA_X1 IDE_D12/GPIO27 PDD13 VDDQ_27 VSS_27
AD16 SATA_X1 IDE_D13/GPIO28 AE28 AJ26 VDDQ_28 VSS_28 P21
AD25 PDD14 R12
SATA_X2 IDE_D14/GPIO29 PDD15 VSS_29
AD18 SATA_X2 IDE_D15/GPIO30 AD29 M13 VDD_1 VSS_30 R15
C95 C73 C72 C71 C70 C75 M17 R18
R39 *0_4 SATA_ACT# .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 VDD_2 VSS_31
21,29 IDELED# AC12 SATA_ACT#/GPIO67 N12 VDD_3 VSS_32 T6
N15 VDD_4 VSS_33 T9
PLLVDD_ATA AD14 PLLVDD_SATA_1 N18 VDD_5 VSS_34 U13
AJ10 J3 R13 U17
SATA Power PLLVDD_SATA_2 SPI_DI/GPIO12
J6 R17
VDD_6 VSS_35
V3

SPI ROM
SPI_DO/GPIO11 C90 C84 VDD_7 VSS_36
XTLVDD_ATA AC16 XTLVDD_SATA SPI_CLK/GPIO47 G3 U12 VDD_8 VSS_37 V8
G2 .1U_4 .1U_4 U15 V12
SPI_HOLD#/GPIO31 VDD_9 VSS_38
+1.8V_ATA AE14 AVDD_SATA_1 SPI_CS#/GPIO32 G6 U18 VDD_10 VSS_39 V15
C +1.8V L4 XTLVDD_ATA AE16 V13 V18 C
*SBK160808T-301Y-S_6 AVDD_SATA_2 VDD_11 VSS_40
AE18 AVDD_SATA_3 LAN_RST#/GPIO13 C23 V17 VDD_12 VSS_41 V21
AE19 G5 L16 W1
AVDD_SATA_4 ROM_RST#/GPIO14 SB_S5_3V VSS_42
AF19 AVDD_SATA_5 +3V_S5 A2 S5_3.3V_1 VSS_43 W9
AF21 M4 C146 A7 Y29

POWER
C23 C62 AVDD_SATA_6 FANOUT0/GPIO3 SBK160808T-301Y-S S5_3.3V_2 VSS_44
AG22 AVDD_SATA_7 FANOUT1/GPIO48 T3 F1 S5_3.3V_3 VSS_45 AA11
*22U/6.3V_8 *1U_4 AG23 V4 C105 C110 C103 C127 C130 J5 AA14
AVDD_SATA_8 FANOUT2/GPIO49 10U_8 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 S5_3.3V_4 VSS_46
AH22 AVDD_SATA_9 J7 S5_3.3V_5 VSS_47 AA18

SERIAL ATA POWER

AH23 AVDD_SATA_10 FANIN0/GPIO50 N3 K1 S5_3.3V_6 VSS_48 AC6
AJ12 P2 L80 AC24
AVDD_SATA_11 FANIN1/GPIO51 SB_S5_1.8V VSS_49
AJ14 AVDD_SATA_12 FANIN2/GPIO52 W4 +1.8V_S5 G4 S5_1.2V_1 VSS_50 AD9
+1.8V L5 PLLVDD_ATA AJ19 H1 AD23
*SBK160808T-301Y-S_6 AVDD_SATA_13 SBK160808T-301Y-S C765 C766 C106 C767 S5_1.2V_2 VSS_51
AJ22 P5 H2 AE3

HW MONITOR
AVDD_SATA_14 TEMP_COMM 10U_8 .1U_4 .1U_4 .1U_4 S5_1.2V_3 VSS_52
AJ23 AVDD_SATA_15 TEMPIN0/GPIO61 P7 H3 S5_1.2V_4 VSS_53 AE27
P8 +1.8VUSB_PHY AG6
TEMPIN1/GPIO62 VSS_54
AB14 AVSS_SATA_1 TEMPIN2/GPIO63 T8 A18 USB_PHY_1.2V_1 VSS_55 AJ1
C25 C55 AB16 T7 A19 AJ25
*22U/6.3V_8 *1U_4 AVSS_SATA_2 TEMPIN3/TALERT#/GPIO64 USB_PHY_1.2V_2 VSS_56
AB18 AVSS_SATA_3 +1.8VUSB_PHY B19 USB_PHY_1.2V_3 VSS_57 AJ29
AC14 AVSS_SATA_4 VIN0/GPIO53 V5 B20 USB_PHY_1.2V_4
AC18 L7 C138 C126 C125 B21
AVSS_SATA_5 VIN1/GPIO54 .1U_4 .1U_4 .1U_4 C69 .1U_4 USB_PHY_1.2V_5
AC19 AVSS_SATA_6 VIN2/GPIO55 M8 PCIE_VSS_1 D27
+1.8V L2 +1.8V_ATA AD12 V6 D28
*TI201209G121_8 AVSS_SATA_7 VIN3/GPIO56 PCIE_VSS_2
AD19 AVSS_SATA_8 VIN4/GPIO57 M6 VCCP_+1.05V AA27 CPU_PWR PCIE_VSS_3 D29
AD21 AVSS_SATA_9 VIN5/GPIO58 P4 PCIE_VSS_4 F26
AE12 M7 +5V R9 1K_4 V5_VREF AE11 G23
AVSS_SATA_10 VIN6/GPIO59 V5_VREF PCIE_VSS_5
AE21 AVSS_SATA_11 VIN7/GPIO60 V7 PCIE_VSS_6 G24
C20 C34 C54 C53 C37 C32 C35 AF11 A24 G25
*22U/6.3V_8 *.1U_4 *.1U_4 *.1U_4 *.1U_4 *.1U_4 *.1U_4 AVSS_SATA_12 C19 C57 AVDDCK_3.3V PCIE_VSS_7
AF14 AVSS_SATA_13 +3V 2 1 PCIE_VSS_8 H27
AF16 1U_4 .1U_4 Arec-11/03 A22 J23
AVSS_SATA_14 D1 SW1010C AVDDCK_1.2V PCIE_VSS_9
AF18 AVSS_SATA_15 AVDD N1 PCIE_VSS_10 J26
B AG11 B22 J28 B
AVSS_SATA_16 AVSSCK PCIE_VSS_11
AG12 AVSS_SATA_17 AVSS M1 Change to 0 ohm for system halt issue--Arec 0113 PCIE_VSS_12 K27
AG13 AVSS_SATA_18 V29 PCIE_VSS_42 PCIE_VSS_13 L22
R31 0_6 AG14 L79 AVDD_CK_1.8V V28 L23
XTLVDD_ATA AVSS_SATA_19 PCIE_VSS_41 PCIE_VSS_14
AG16 0_6 V27 L24
R33 0_6 AVSS_SATA_20 PCIE_VSS_40 PCIE_VSS_15
PLLVDD_ATA AG17 AVSS_SATA_21 +1.8V V26 PCIE_VSS_39 PCIE_VSS_16 L27
AG18 AVSS_SATA_22 V25 PCIE_VSS_38 PCIE_VSS_17 L28
R26 0_6 +1.8V_ATA AG19 V24 M21
AVSS_SATA_23 C747 C752 C751 PCIE_VSS_37 PCIE_VSS_18
AG20 AVSS_SATA_24 V23 PCIE_VSS_36 PCIE_VSS_19 M24
AG21 2.2U_6 1U_4 .1U_4 V22 M27
AVSS_SATA_25 PCIE_VSS_35 PCIE_VSS_20
AH10 AVSS_SATA_26 U27 PCIE_VSS_34 PCIE_VSS_21 N27
AH19 AVSS_SATA_27 T29 PCIE_VSS_33 PCIE_VSS_22 N28
11/28-Arec T28 PCIE_VSS_32 PCIE_VSS_23 P22
T27 PCIE_VSS_31 PCIE_VSS_24 P23
T24 PCIE_VSS_30 PCIE_VSS_25 P24
SB460 T21 P25
PCIE_VSS_29 PCIE_VSS_26
P27 PCIE_VSS_28 PCIE_VSS_27 P26

SATA clock Option SB460

Edison --01/03 Modify
+1.8VSUS
+3V +1.8V_S5 +1.8VUSB_PHY

C784 R577 L81 R128 0_6

*27P_4 *15K/F_4 Y7 *BLM11A121S_6
SATA_X1 R_3COM_25ML 3 4 VCC_Y6 R609 *0_4
OUT VCC
1

1 2 C786 C22 Q3 *FDC653N

A Y8 R570 R578 OE VSS *.1U_4 *.1U_4 A
6
C779 *10M_4 0_4 *25MHZ_OSC 5 4
*27P_4 *25MHZ_SATA 2
2

SATA_X2 1

R129

3
34 SUSD PROJECT : ZB3
*0_4 C155 C139

SB-3 *.1U_4 22U/6.3V_8

Size
Custom

Date:
Document Number
Quanta Computer Inc.
SB450M HDD/POWER/DECOUPLING
Monday, April 03, 2006 Sheet 13 of 37
Rev
1A

5 4 3 2 1
 5 4 3 2 1

+3V +3V_S5 +3V +3V +3V +3V

+3V_S5 +3V +3V +3V +3V +3V

R94 R123 R46 R56 R67 R74

*10K_4 10K_4 *10K_4 *10K_4 *10K_4 10K_4 R126 R72 R64 R53 R62 R50
10K_4 *10K_4 *10K_4 10K_4 10K_4 10K_4
12 AC_SDOUT
11 AUTO_ON#
D 11 RTC_CLK D
11 SB_SPDIF_OUT
11 PCICLK4
11,24 PCLK_PCM
11 PCICLK6
11 PCLK_SIO
11,22 PCLK_MINI
11 PCLK_LAN
11,28 PCLK_591
11,28 LFRAME#/FWH4

R95 R99 R41 R57 R68 R75

10K_4 *10K_4 10K_4 10K_4 10K_4 *10K_4 R125 R549 R65 R54 R63 R49
*10K_4 10K_4 10K_4 *10K_4 *10K_4 *10K_4

PCLK_MINI PCLK_591
AUTO_ON# SB_SPDIF_OUTPCLK_PCM PCLK_SIO PCLK_LAN LFRAME#
AC_SDOUT RTC_CLK PCI_CLK4 PCI_CLK6 PCI_CLK0 PCI_CLK1
ROM TYPE: ACPWRON SPDIF_OUT PCI_CLK2 PCI_CLK3 PCI_CLK5 LFRAME#
C
REQUIRED PULL
HIGH
USE
DEBUG
INTERNAL
RTC
USE INT.
PLL48
CPU IF=K8
H, H = PCI ROM
C

PULL MANUAL SIO 24MHz XTAL MODE USB PHY PCIE_CM_SET ENABLE
STRAPS STRAPS
DEFAULT
H, L = LPC TYPE I ROM
DEFAULT
HIGH PWR ON NOT
POWERDOWN
DISABLE
LOW THERMTRIP#
L, H = LPC TYPE II ROM SUPPORTED
DEFAULT DEFAULT DEFAULT DEFAULT
PULL IGNORE EXTERNAL USE EXT. CPU IF=P4 L, L = FWH ROM
LOW DEBUG RTC 48MHZ NOTE:FOR SB460,PCICLK[8:7]
ARE CONNECTED TO SUBSTRATE PULL AUTO SIO 48MHz 48MHZ OSC USB PHY PCIE_CM_SET DISABLE
STRAPS HIGH
DEFAULT DEFAULT DEFAULT BALLS PCICLK[1:0] LOW PWR MODE POWERDOWN THERMTRIP#
ON ENABLE
DEFAULT DEFAULT

Edison-11/07-- Modify

+3V +3V +3V +3V +3V +3V +3V

R561 R568 R11 R565 R14 R563 R19

10K_4 *10K_4 *10K_4 *10K_4 *10K_4 *10K_4 *10K_4

13,21 PDDACK#
B B
11,22,24 AD28

11,22,24 AD27

11,22,24 AD26

11,22,24 AD25

11,22,24 AD24

11,22,24 AD23

R562 R569 R7 R566 R15 R564 R18

*10K_4 *10K_4 10K_4 10K_4 10K_4 10K_4 *10K_4

DEBUG
STRAPS PDACK# PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23

PULL USE Reserved BYPASS BYPASS ACPI BYPASS IDE USE EEPROM
HIGH LONG PCI PLL BCLK PLL PCIE STRAPS Reserved
A RESET A

DEFAULT

PULL USE USE PCI USE ACPI USE IDE USE DEFAULT
LOW SHORT PLL BCLK PLL PCIE STRAPS
PROJECT : ZB3

SB-4 RESET
DEFAULT DEFAULT DEFAULT DEFAULT
Size
Custom

Date:
Document Number
Quanta Computer Inc.
SB450M STRAPS
Monday, April 03, 2006 Sheet 14 of 37
Rev
1A

5 4 3 2 1
 5 4 3 2 1

NOTE: some of the PCIE testpoints will +3V

MEMORY CLOCK SPREAD SPECTRUM
be available trought via on traces. 7
7
GMCHEXP_TXP[0..15]
GMCHEXP_TXN[0..15]
7 GMCHEXP_RXP[0..15] S0: H = -2.5%
7 GMCHEXP_RXN[0..15] S0: X = -0.6% (Default)
R392
U29A *EV@10K_4 S0: L = -1.8% U26
PART 1 OF 7 XT_IN XT_OUT L62 EV@BLM18PG181SN1D_6
1 XIN XOUT 8
GMCHEXP_TXP15 AJ31 AK27 V_GMCHEXP_RXP15 C462 [email protected]_4 GMCHEXP_RXP15 2 7
PCIE_RX0P PCIE_TX0P VSS VDD +3V
GMCHEXP_TXN15 AH31 AJ27 V_GMCHEXP_RXN15 C456 [email protected]_4 GMCHEXP_RXN15 1726_S0 3 6 MK_PD
PCIE_RX0N PCIE_TX0N OSC_SPREADR389 EV@33_4 1726_CKO SRS PD MK_27M 27MOUT
4 SSCLK REF 5
R387 EV@0_4 C595 C598
GMCHEXP_TXP14 AH30 PCIE_RX1P
P PCIE_TX1P AJ25 V_GMCHEXP_RXP14 C455 [email protected]_4 GMCHEXP_RXP14 EV@CY25819 R390 [email protected]_4 EV@22U_8
GMCHEXP_TXN14 AG30 PCIE_RX1N C PCIE_TX1N AH25 V_GMCHEXP_RXN14 C445 [email protected]_4 GMCHEXP_RXN14 R394 MK1726-8 EV@121/F_4 *EV@10K_4
*EV@10K_4 27M_IN R388
D
I D
GMCHEXP_TXP13 AG32 AH28 V_GMCHEXP_RXP13 C444 [email protected]_4 GMCHEXP_RXP13 C594
GMCHEXP_TXN13 PCIE_RX2P - PCIE_TX2P V_GMCHEXP_RXN13 C441 [email protected]_4 GMCHEXP_RXN13 R386
AF32 PCIE_RX2N PCIE_TX2N AG28
E EV@10P/50V_4
X [email protected]/F_4
GMCHEXP_TXP12 AF31 AG27 V_GMCHEXP_RXP12 C440 [email protected]_4 GMCHEXP_RXP12
GMCHEXP_TXN12 PCIE_RX3P P PCIE_TX3P V_GMCHEXP_RXN12 C431 [email protected]_4 GMCHEXP_RXN12
AE31 AF27
PCIE_RX3N
R
PCIE_TX3N PUT THEM CLOSE TO X'TAL
GMCHEXP_TXP11 AE30 E AF25 V_GMCHEXP_RXP11 C428 [email protected]_4 GMCHEXP_RXP11
GMCHEXP_TXN11 PCIE_RX4P PCIE_TX4P V_GMCHEXP_RXN11 C426 [email protected]_4 GMCHEXP_RXN11
AD30 PCIE_RX4N S PCIE_TX4N AE25
S U29B
GMCHEXP_TXP10 AD32 AE28 V_GMCHEXP_RXP10 C423 [email protected]_4 GMCHEXP_RXP10 PART 2 OF 7
GMCHEXP_TXN10 PCIE_RX5P PCIE_TX5P V_GMCHEXP_RXN10 C419 [email protected]_4 GMCHEXP_RXN10
AC32 PCIE_RX5N I PCIE_TX5N AD28 TXCM AL9
Integrated AM9
N TXCP
TMDS
GMCHEXP_TXP9 AC31 AD27 V_GMCHEXP_RXP9 C417 [email protected]_4 GMCHEXP_RXP9 AK10
GMCHEXP_TXN9 PCIE_RX6P T PCIE_TX6P V_GMCHEXP_RXN9 C411 [email protected]_4 GMCHEXP_RXN9 TX0M
AB31 PCIE_RX6N PCIE_TX6N AC27 AG8 GPIO_34 TX0P AL10
E TP10
AH7 GPIO_33
TP13
R AG9 GPIO_32 TX1M AL11
GMCHEXP_TXP8 V_GMCHEXP_RXP8 C409 [email protected]_4 GMCHEXP_RXP8 TP9
AB30 PCIE_RX7P F PCIE_TX7P AC25
TP7
AH8 GPIO_31 V TX1P AM11
GMCHEXP_TXN8 AA30 AB25 V_GMCHEXP_RXN8 C396 [email protected]_4 GMCHEXP_RXN8 AJ8
PCIE_RX7N
A
PCIE_TX7N TP14
AH9
GPIO_30 I AL12
TP16 GPIO_29 TX2M
C TP12
AG10 GPIO_28
D TX2P AM12
GMCHEXP_TXP7 AA32 AB28 V_GMCHEXP_RXP7 C394 [email protected]_4 GMCHEXP_RXP7 AF10
GMCHEXP_TXN7 Y32
PCIE_RX8P
E PCIE_TX8P
AA28 V_GMCHEXP_RXN7 C387 [email protected]_4 GMCHEXP_RXN7 TP2
AH6
GPIO_27 E AK9

Expand GPIO
PCIE_RX8N PCIE_TX8N TP15 GPIO_26 O TX3M
AF8 GPIO_25 TX3P AJ9
TP1
AF7 GPIO_24
GMCHEXP_TXP6 V_GMCHEXP_RXP6 C385 [email protected]_4 GMCHEXP_RXP6 TP8
Y31 PCIE_RX9P PCIE_TX9P AA27 AE9 GPIO_23 TX4M AK11
GMCHEXP_TXN6 V_GMCHEXP_RXN6 C379 [email protected]_4 GMCHEXP_RXN6 TP3 &
W31 PCIE_RX9N PCIE_TX9N Y27 AE10 GPIO_22 TX4P AJ11
TP4
AG7 GPIO_21
TP11
AF9 GPIO_20 TX5M AK12
GMCHEXP_TXP5 W30 Y25 V_GMCHEXP_RXP5 C372 [email protected]_4 GMCHEXP_RXP5 TP6
AF13 M AJ12 +TPVDD L65 +2.5V
GMCHEXP_TXN5 PCIE_RX10P PCIE_TX10P V_GMCHEXP_RXN5 C366 [email protected]_4 GMCHEXP_RXN5 TP5 GPIO_19 TX5P EV@BLM18PG181SN1D_6
V30 PCIE_RX10N PCIE_TX10N W25
TP17
AE13 GPIO_18 U
AM8
L TPVDD
GMCHEXP_TXP4 V32 W28 V_GMCHEXP_RXP4 C365 [email protected]_4 GMCHEXP_RXP4 T AL8 C626 C620
GMCHEXP_TXN4 PCIE_RX11P PCIE_TX11P V_GMCHEXP_RXN4 C354 [email protected]_4 GMCHEXP_RXN4 TPVSS [email protected]_6 EV@22U_8
C U32 V28 C
PCIE_RX11N PCIE_TX11N I AJ6
TXVDDR_1
AK4 NC_DVOVMODE_0
M TXVDDR_2 AK6
GMCHEXP_TXP3 U31 V27 V_GMCHEXP_RXP3 C352 [email protected]_4 GMCHEXP_RXP3 AL4 AL6 TXVDDR
GMCHEXP_TXN3 T31
PCIE_RX12P PCIE_TX12P
U27 V_GMCHEXP_RXN3 C341 [email protected]_4 GMCHEXP_RXN3 NC_DVOVMODE_1 E TXVDDR_3
AM6 +2.5V
PCIE_RX12N PCIE_TX12N D TXVDDR_4 L64
AF2 DVPCNTL_0
AF1 I EV@BLM18PG181SN1D_6
GMCHEXP_TXP2 V_GMCHEXP_RXP2 C340 [email protected]_4 GMCHEXP_RXP2 DVPCNTL_1
GMCHEXP_TXN2
T30 PCIE_RX13P PCIE_TX13P U25
V_GMCHEXP_RXN2 GMCHEXP_RXN2
VRAM TYPE STRAP PINS AF3 DVPCNTL_2 A TXVSSR_1 AJ7
R30 T25 C325 [email protected]_4 AG1 AK7 C606 C618 C639
PCIE_RX13N PCIE_TX13N DVPCLK TXVSSR_2
18 MEMTYP_0 AG2 DVPDATA_0 TXVSSR_3 AL7
18 MEMTYP_1 AG3 AM7 EV@22U_8 EV@1U_4 [email protected]_4
GMCHEXP_TXP1 V_GMCHEXP_RXP1 C308 [email protected]_4 GMCHEXP_RXP1 DVPDATA_1 TXVSSR_4
R32 PCIE_RX14P PCIE_TX14P T28 18 MEMTYP_2 AH2 DVPDATA_2 TXVSSR_5 AK8
GMCHEXP_TXN1 P32 R28 V_GMCHEXP_RXN1 C318 [email protected]_4 GMCHEXP_RXN1 AH3
PCIE_RX14N PCIE_TX14N DVPDATA_3
AJ2 DVPDATA_4
AJ1 AK24 VGA_RED_V EV@0_4 R409
DVPDATA_5 R VGA_RED 8,20
GMCHEXP_TXP0 P31 R27 V_GMCHEXP_RXP0 C307 [email protected]_4 GMCHEXP_RXP0 AK2 DAC / CRT AM24 VGA_GRN_V EV@0_4 R411 VGA_RED_V R420 EV@150/F_4
PCIE_RX15P PCIE_TX15P DVPDATA_6 G VGA_GRN 8,20

VIP Host/External TMDS

GMCHEXP_TXN0 N31 P27 V_GMCHEXP_RXN0 C292 [email protected]_4 GMCHEXP_RXN0 AK1 AL24 VGA_BLU_V EV@0_4 R410 VGA_GRN_V R416 EV@150/F_4
PCIE_RX15N PCIE_TX15N DVPDATA_7 B VGA_BLU 8,20
AK3 VGA_BLU_V R415 EV@150/F_4
DVPDATA_8 HSYNC_V EV@0_4 R240
AL2 DVPDATA_9 HSYNC AJ23 HSYNC 8,18,20
Clock Calibration AL3 DVPDATA_10 VSYNC AJ22 VSYNC_V EV@0_4 R239
VSYNC 8,18,20 PLACE CLOSE TO ASIC
5 CLK_PCIE_VGA AL28 PCIE_REFCLKP AM3 DVPDATA_11 GENERICA AK22
5 CLK_PCIE_VGA# AK28 PCIE_REFCLKN AE6 DVPDATA_12
AE24 GFX_CALRN R202 EV@2K/F_4 +1.2V_PCIE 18 DC_Strap2 AF4 AF23 GENERICB R244 VGA_ALERT#
PCIE_CALRN GFX_CALRP R214 EV@562/F_4 DVPDATA_13 GENERICB *M56@0_4
PCIE_CALRP AD24 18 DC_Strap3 AF5 DVPDATA_14
18 DC_Strap4 AG4 AL22 RSET R408
GFX_CALI R204 [email protected]/F_4 DVPDATA_15 RSET EV@499_4 AVDD_VGA +2.5V
5,6,11,21,24 ALINK_RST# AG24 PERSTB PCIE_CALI AB24 T61 AJ3 DVPDATA_16
T60 AH4 DVPDATA_17 AVDD_1 AL25
AA24 R414 EV@0_4 LCD_DAT AJ4 AM25 AVDD_VGA L39
PCIE_TEST 8,20 PHL_DATA DVPDATA_18 AVDD_2
R242 EV@0_4 LCD_CLK AG5 EV@BLM18PG181SN1D_6
8,20 PHL_CLK DVPDATA_19
T59 AH5 AK23 C454 C453 C467
DVPDATA_20 AVSSQ EV@1U_4 [email protected]_4 EV@22U_8
T45 AF6 DVPDATA_21 AVSSN_1 AK25
PERRSTB_MSK AF24 Tie To VSS
T44 AE7 AJ24 +VDDDI +2.5V
PERSTB_MASK DVPDATA_22 AVSSN_2
T47 AG6 DVPDATA_23
AM23 L72
EV@M52(M54) GPU_GPIO0 VDD1DI EV@BLM18PG181SN1D_6
18 GPU_GPIO0 AD4 GPIO_0
R218 GPU_GPIO1 AD2 General AL23
18 GPU_GPIO1 GPIO_1 Purpose VSS1DI
EV@10K_4 GPU_GPIO2 AD1 C451 C452 C473
18 GPU_GPIO2 GPIO_2 I/O
GPU_GPIO3 AD3 AK15 EV@1U_4 [email protected]_4 EV@22U_8
B 18 GPU_GPIO3 GPIO_3 R2 B
GPU_GPIO4 AC1 DAC2 (TV/CRT2) AM15
18 GPU_GPIO4 GPIO_4 G2
GPU_GPIO5 AC2 AL15
18 GPU_GPIO5 GPIO_5 B2
GPU_GPIO6 AC3
18 GPU_GPIO6 GPIO_6
GPU_GPIO7 AB2 AF15
T65 GPU_GPIO8 GPIO_7_BLON H2SYNC
18 GPU_GPIO8 AC6 GPIO_8 V2SYNC AG15

VGA H/W MONITOR

GPU_GPIO9 AC5
18 GPU_GPIO9 GPIO_9
GPU_GPIO10 AC4 AJ15
18 GPU_GPIO10 GPIO_10 Y
POWERPLAY GPU_GPIO11 AB3 AJ13
18 GPU_GPIO11 GPIO_11 C
+3V HI: LOW CORE VOLTAGE FOR BATTERY MODE GPU_GPIO12 AB4 AH15 R235
18 GPU_GPIO12 GPIO_12 COMP
LO: HIGH CORE VOLTAGE FOR PERFORMANCE MODE GPU_GPIO13 AB5 EV@715/F_4 +2.5V
18 GPU_GPIO13 GPIO_13
+3V R2SET
15 MIL 30 VGA_PWR_SW
AD5
AB8
GPIO_14
GPIO_15
R2SET AK14
+A2VDD L67
L40 3V_THM1 R258 OSC_SPREAD AA8 AM16 EV@BLM18PG181SN1D_6
R253 R254 R255 10K_4 VGA_ALERT# GPIO_16 A2VDD_1 C642 C627
AB7 GPIO_17 A2VDD_2 AL16
EV@BLM18PG181SN1D_6 C478 +3V R256 EV@499_4 R252 EV@0_4 AB6 C628 EV@22U_8
EV@10K_4 [email protected]_4 [email protected]_4 NC_AB6 EV@1U_4 +A2VDDQ
A2VSSN_1 AM17
[email protected]_4 R257 EV@499_4 VREFG AC8 AL17 L66 +2.5V
+2.5V PVDD VREFG A2VSSN_2 [email protected]_4 *EV@BLM18PG181SN1D_6
U12 L69 VGATHRM+ AG12 DPLUS NC_A2VDDQ AL14
1 6 VGA_ALERT# EV@BLM18PG181SN1D_6 Thermal
VGATHRM- VCC ALERT# VTHM_DAT VGATHRM- Diode C631 C614 C621
3 DXN SDA 7 AH12 DMINUS A2VSSQ AK13
2 8 VTHM_CLK +VDD2DI L68 +2.5V *EV@1U_4 *[email protected]_4 *EV@22U/6.3V_8
C597 DXP SCLK VGA_CORE C463 C466 C470 PVDD
10 mil trace / 5 GND OVERT# 4 VGA_THERM# 29 AJ14 PVDD PLL & VDD2DI AJ16
EV@BLM18PG181SN1D_6
10 mil space EV@2200P_4 EV@MAX6657/GMT-781-1 MPVDD PVSS AH14 XTAL AJ17 C459 C447
VGATHRM+ L20 EV@22U_8 [email protected]_4 EV@1U_4 PVSS VSS2DI EV@1U_4 [email protected]_4 C464
MPVDD A6 EV@22U_8
EV@BLM18PG181SN1D_6 MPVSS MPVDD
Close to pin ASIC C201 C207 C199
A5 MPVSS Monitor AF11
SLAVE ADDRESS: 9A [email protected]_4 EV@1U_4 27M_IN AL26 Interface HPD1
27M_O XTALIN
AM26 XTALOUT
EV@22U_8 AH22 DDCDAT_V R245 EV@0_4
DDC1DATA DDCDAT 8,20
AG14 AH23 DDCCLK_V R246 EV@0_4
T46 PLLTEST DDC1CLK DDCCLK 8,20
R417 *33_4
Edison -0111-- +3V C632 XT_IN R213 TESTEN AG22 AH13
TESTEN DDC2DATA
Detele resistor EV@1K_4 Test
DDC2CLK AG13
EV@22P_4
XT_OUT

A R267,R278 Q11 R419 AC7 ROMCSb DDC3DATA AE12 GPU_THM_DAT R232 *EV@0_4 VTHM_DAT A
2

EV@2N7002 Y6 *33_4 ROM AF12 GPU_THM_CLK R233 *EV@0_4 VTHM_CLK

R418 DDC3CLK
VTHM_DAT 1 3 MBDATA MBDATA 28,35
EV@1M_4 External AE23
GENERICC GENERICC 18
AK17 LVSSR_1
SSC
AJ19 LVSSR_2 LVDS PLL LPVSS AE18
C633 AF18
VTHM_CLK MBCLK EV@27MHZ LVSSR_3 and I/O
1 3 AH17 LVSSR_4 GND
MBCLK 28,35 EV@22P_4 AG17 AF22
LVSSR_5 LVDS PLL LVSSR_10
AG19 AF17
EV@2N7002 AH19
LVSSR_6 and I/O LVSSR_9
AF21 PROJECT : ZB3
2

Q14 LVSSR_7 GND LVSSR_8

+3V
EV@M52(M54) Quanta Computer Inc.
Size Document Number Rev
M52-P_MAIN_PCIE (1 of 4) 00

Date: Thursday, April 06, 2006 Sheet 15 of 37

5 4 3 2 1
 5 4 3 2 1

RV410 MEMORY CHANNELS A and B

U29F
Channel B Channel A Part 6 of 7
U29D U29C
19 MDA[0..63] AH27 AD16
MAA[0..15] 19 PCIE_VSS_1 VSS_38
Part 4 of 7 Part 3 of 7 AC23 AA6
PCIE_VSS_2 VSS_39
AL27 PCIE_VSS_3 VSS_40 P7
MDA0 MAA0
MDA1
B12
C12
DQB_0 MAB_0 G4
E6 MAA1 MAIN TRUNK: Z= 35 ohm M31
M30
DQA_0 MAA_0 D26
F28
R23
P25
PCIE_VSS_4 VSS_41 P5
M3
MDA2 DQB_1 MAB_1 MAA2 DQA_1 MAA_1 PCIE_VSS_5 VSS_42
Z= 50 ohm MDA3
B11
C11
DQB_2 MAB_2 E4
H4 MAA3 BRACHES: Z= 55 ohm L31
L30
DQA_2 MAA_2 D28
D25
R25
T26
PCIE_VSS_6 VSS_43 M9
L7
MDA4 DQB_3 MAB_3 MAA4 DQA_3 MAA_3 PCIE_VSS_7 VSS_44
C8 DQB_4 MAB_4 J5 H30 DQA_4 MAA_4 E24 U26 PCIE_VSS_8 VSS_45 M7

MEMORY INTERFACE A
MDA5 B7 G5 MAA5 G31 E26 W26 AD17
MDA6 DQB_5 MAB_5 MAA6 DQA_5 MAA_5 PCIE_VSS_9 VSS_46

MEMORY INTERFACE B
C7 DQB_6 MAB_6 F4 G30 DQA_6 MAA_6 D27 Y26 PCIE_VSS_10 VSS_47 AH11
MDA7 B6 H6 MAA7 F31 F25 AB26 A8
D
MDA8 DQB_7 MAB_7 MAA8 DQA_7 MAA_7 PCIE_VSS_11 VSS_48 D
F12 DQB_8 MAB_8 G3 M27 DQA_8 MAA_8 C26 AC26 PCIE_VSS_12 VSS_49 U7
MDA9 D12 G2 MAA9 M29 B26 AD25 C10
MDA10 DQB_9 MAB_9 MAA10 DQA_9 MAA_9 PCIE_VSS_13 VSS_50
E11 DQB_10 MAB_10 D4 L28 DQA_10 MAA_10 D29 AE26 PCIE_VSS_14 VSS_51 E9
MDA11 F11 F2 MAA11 L27 B27 AF26 F3
MDA12 DQB_11 MAB_11 MAA12 DQA_11 MAA_11 PCIE_VSS_15 VSS_52
F9 DQB_12 MAB_12 F5 J27 DQA_12 MAA_12 E27 AD26 PCIE_VSS_16 VSS_53 J9
MDA13 D8 D5 MAA13 H29 E29 AG25 N7
MDA14 DQB_13 MAB_13 MAA14 DQA_13 MAA_13 PCIE_VSS_17 VSS_54
D7 DQB_14 MAB_14 H2 G29 DQA_14 MAA_14 B25 AH26 PCIE_VSS_18 VSS_55 N3
MDA15 F7 H3 MAA15 G27 C25 AC28 Y5
DQB_15 MAB_15 -DQMA[0..7] 19 DQA_15 MAA_15 PCIE_VSS_19 VSS_56
MDA16 G12 M26 Y28 AM13
MDA17 DQB_16 DQA_16 PCIE_VSS_20 VSS_57
G11 DQB_17 L26 DQA_17 U28 PCIE_VSS_21 VSS_58 AC10
MDA18 -DQMA0
MDA19
H12
H11
DQB_18 DQMBb_0 B8
D9 -DQMA1 Z= 50 ohm M25
L25
DQA_18 DQMAb_0 H31
J29
P28
AH29
PCIE_VSS_22 VSS_59 Y6
U6
MDA20 DQB_19 DQMBb_1 -DQMA2 DQA_19 DQMAb_1 PCIE_VSS_23 VSS_60
H9 DQB_20 DQMBb_2 G9 J25 DQA_20 DQMAb_2 J26 AF28 PCIE_VSS_24 VSS_61 E5
MDA21 E7 K7 -DQMA3 G28 G23 V29 AL13
MDA22 DQB_21 DQMBb_3 -DQMA4 DQA_21 DQMAb_3 PCIE_VSS_25 VSS_62
F8 DQB_22 DQMBb_4 M5 H27 DQA_22 DQMAb_4 E21 AC29 PCIE_VSS_26 VSS_63 A11
MDA23 G8 V2 -DQMA5 H26 B15 W27 U8
MDA24 DQB_23 DQMBb_5 -DQMA6 DQA_23 DQMAb_5 PCIE_VSS_27 VSS_64
G6 DQB_24 DQMBb_6 W4 F26 DQA_24 DQMAb_6 D14 AB27 PCIE_VSS_28 VSS_65 U9

PCI-Express GND
MDA25 G7 T9 -DQMA7 G26 J17 V26 U10
MDA26 DQB_25 DQMBb_7 DQA_25 DQMAb_7 PCIE_VSS_29 VSS_66
H8 DQB_26 RDQSA[0..7] 19 H25 DQA_26 AJ26 PCIE_VSS_30 VSS_67 R6
MDA27 J8 H24 AJ32 AD6
MDA28 DQB_27 DQA_27 PCIE_VSS_31 VSS_68
K8 DQB_28 H23 DQA_28 AK29 PCIE_VSS_32 VSS_69 V6
MDA29 RDQSA0
MDA30
L8
K9
DQB_29 QSB_0 B9
D10 RDQSA1 Z= 50 ohm H22
J23
DQA_29 QSA_0 J31
K29
P26
P29
PCIE_VSS_33 VSS_70 AD14
AD13
MDA31 DQB_30 QSB_1 RDQSA2 DQA_30 QSA_1 PCIE_VSS_34 VSS_71
L9 DQB_31 QSB_2 H10 J22 DQA_31 QSA_2 K25 R29 PCIE_VSS_35 VSS_72 D11
MDA32 K5 K6 RDQSA3 E23 F23 T29 J12
DQB_32 QSB_3 DQA_32 QSA_3 PCIE_VSS_36 VSS_73

read strobe
MDA33 L4 N4 RDQSA4 D22 D20 U29 K12
DQB_33 QSB_4 DQA_33 QSA_4 PCIE_VSS_37 VSS_74

read strobe
MDA34 K4 U2 RDQSA5 D23 B16 W29 A13
MDA35 DQB_34 QSB_5 RDQSA6 DQA_34 QSA_5 PCIE_VSS_38 VSS_75
L5 DQB_35 QSB_6 U4 E22 DQA_35 QSA_6 D16 Y29 PCIE_VSS_39 VSS_76 F13
MDA36 N5 V8 RDQSA7 E20 H15 AA29 E13
DQB_36 QSB_7 WDQSA[0..7] 19 DQA_36 QSA_7 PCIE_VSS_40 VSS_77
MDA37 N6 F20 AB29 F15
MDA38 DQB_37 DQA_37 PCIE_VSS_41 VSS_78
P4 DQB_38 D19 DQA_38 AD29 PCIE_VSS_42 VSS_79 K16
MDA39 WDQSA0
MDA40
R4
P2
DQB_39 QSB_0B B10
E10 WDQSA1 Z= 50 ohm D18
B19
DQA_39 QSA_0B K31
K28
AE29
AF29
PCIE_VSS_43 VSS_80 J21
H16
MDA41 DQB_40 QSB_1B WDQSA2 DQA_40 QSA_1B PCIE_VSS_44 VSS_81
R2 G10 B18 K26 AG29 T15
write strobe

write strobe
MDA42 DQB_41 QSB_2B WDQSA3 DQA_41 QSA_2B PCIE_VSS_45 VSS_82
T3 DQB_42 QSB_3B J7 C17 DQA_42 QSA_3B G24 AJ29 PCIE_VSS_46 VSS_83 V17
MDA43 T2 M4 WDQSA4 B17 D21 AK26 C15
MDA44 DQB_43 QSB_4B WDQSA5 DQA_43 QSA_4B PCIE_VSS_47 VSS_84
W3 DQB_44 QSB_5B U3 C14 DQA_44 QSA_5B C16 AK30 PCIE_VSS_48 VSS_85 C4
C MDA45 W2 V4 WDQSA6 B14 D15 AG26 U14 C
MDA46 DQB_45 QSB_6B WDQSA7 DQA_45 QSA_6B PCIE_VSS_49 VSS_86
Y3 DQB_46 QSB_7B V9 C13 DQA_46 QSA_7B J15 N30 PCIE_VSS_50 VSS_87 P15
MDA47 Y2 B13 R31 A16
MDA48 DQB_47 DQA_47 PCIE_VSS_51 VSS_88
T4 DQB_48 ODTB D6 ODTA0 19 D17 DQA_48 ODTA F29 AF30 PCIE_VSS_52 VSS_89 E16
MDA49 R5 J4 E18 D24 AC30 G13
DQB_49 ODTB1 ODTA1 19 DQA_49 ODTA1 PCIE_VSS_53 VSS_90
MDA50 T5 E17 V31 G16
MDA51 DQB_50 DQA_50 PCIE_VSS_54 VSS_91
T6 DQB_51 F17 DQA_51 P30 PCIE_VSS_55 VSS_92 P17
MDA52 V5 B4 E15 D31 AA31 R16
DQB_52 CLKB0 M_CLKA0 19 DQA_52 CLKA0 PCIE_VSS_56 VSS_93
MDA53
MDA54
W5
W6
DQB_53 CLKB0b B5 -M_CLKA0 19 Z= 100 ohm E14
F14
DQA_53 CLKA0b E31 U30
AD31
PCIE_VSS_57 VSS_94 R14
W16
MDA55 DQB_54 DQA_54 PCIE_VSS_58 VSS_95
Y4 DQB_55 CKEB0 C2 CKEA 19 D13 DQA_55 CKEA0 B30 AK32 PCIE_VSS_59 VSS_96 C18
MDA56 R8 H18 AJ28 F16
+1.8V MDA57 DQB_56 DQA_56 PCIE_VSS_60 VSS_97
T8 DQB_57 RASB0b E2 -RASA 19 H17 DQA_57 RASA0b B28 Y30 PCIE_VSS_61 VSS_98 W18
MDA58 R7 G18 AJ30 U18
MDA59 DQB_58 DQA_58 PCIE_VSS_62 VSS_99
T7 DQB_59 CASB0b D3 -CASA 19 G17 DQA_59 CASA0b C29 AK31 PCIE_VSS_63 VSS_100 AE16
MDA60 V7 G15 AA23 AE17
MDA61 DQB_60 DQA_60 PCIE_VSS_64 VSS_101
R482 MDA62
W7
W8
DQB_61 WEB0b B2 -WEA 19 Z= 55 ohm G14
H14
DQA_61 WEA0b B31 AG31
N24
PCIE_VSS_65 VSS_102 A19
H32
EV@100/F_4 MDA63 DQB_62 DQA_62 PCIE_VSS_66 VSS_103
W9 DQB_63 CSB0b_0 D2 -CSA0 19 J14 DQA_63 CSA0b_0 B29 AB23 PCIE_VSS_67 VSS_104 F19
CSB0b_1 E3 CSA0b_1 C28 P24 PCIE_VSS_68 VSS_105 G19
R24 PCIE_VSS_69 VSS_106 N8
VRAM_REF0 C31 T24 Y7
MVREFD_0 PCIE_VSS_70 VSS_107
CLKB1 N2 M_CLKA1 19 C30 MVREFS_0 CLKA1 B20 U24 PCIE_VSS_71 VSS_108 T19
B3 MVREFD_1 CLKB1b P3 -M_CLKA1 19 CLKA1b C19 V24 PCIE_VSS_72 VSS_109 V19
R483 C715 C3 W24 G21
EV@100/F_4 [email protected]_4 MVREFS_1 PCIE_VSS_73 VSS_110
CKEB1 L3 CKEA1 19 CKEA1 C22 Y24 PCIE_VSS_74 VSS_111 C21
AC24 PCIE_VSS_75 VSS_112 F21
AA3 DRAM_RST RASB1b J2 -RASA1 19 RASA1b B24 AH24 PCIE_VSS_76 VSS_113 AE14
V25 PCIE_VSS_77 VSS_114 AK16
TEST_MCLK AA5 L2 B22 AA25 U5
TEST_MCLK CASB1b -CASA1 19 CASA1b PCIE_VSS_78 VSS_115
+1.8V R26 F22
TEST_YCLK PCIE_VSS_79 VSS_116
AA2 TEST_YCLK WEB1b M2 -WEA1 19 WEA1b B21 AA26 PCIE_VSS_80 VSS_117 F18
T27 PCIE_VSS_81 VSS_118 K30
AA7 MEMTEST CSB1b_0 K2 -CSAb0 19 CSA1b_0 B23 AE27 PCIE_VSS_82 VSS_119 C24
R162 K3 C23 L31 F24
EV@100/F_4 CSB1b_1 CSA1b_1 VSS_120
W23 PCIE_PVSS VSS_121 M24
EV@BLM18PG181SN1D_6 A25
EV@M52(M54) EV@M52(M54) VSS_122
B
B1 VSS_1 VSS_123 D30 B
VRAM_REF1 H1 E25
VSS_2 VSS_124
L1 VSS_3 VSS_125 G25
P1 VSS_4 VSS_126 G20
R176 C223 U1 G22
EV@100/F_4 [email protected]_4 VSS_5 VSS_127
Y1 F27
R208 R449 R205 AD7
AE8
VSS_6
VSS_7
VSS_8
CORE GND VSS_128
VSS_129
VSS_130
E28
H21
[email protected]_4 [email protected]_4 EV@243/F_4 AL1 C27
VSS_9 VSS_131
A2 VSS_10 VSS_132 E32
AM2 VSS_11 VSS_133 H28
AD10 VSS_12 VSS_134 J30
E8 VSS_13 VSS_135 K17
H5 VSS_14 VSS_136 K27
K10 VSS_15 VSS_137 M32
M8 VSS_16 VSS_138 A22
T10 VSS_17 VSS_139 C20
E12 VSS_18 VSS_140 E19
AC9 VSS_19 VSS_141 H20
AF14 VSS_20 VSS_142 J24
AD8 VSS_21 VSS_143 M28
C5 VSS_22 VSS_144 J28
F10 VSS_23 VSS_145 J16
J3 VSS_24 VSS_146 F30
L6 VSS_25 VSS_147 L29
M6 VSS_26 VSS_148 A31
P6 VSS_27 VSS_149 B32
AA4 VSS_28 VSS_150 E30
AG11 VSS_29 VSS_151 AE15
V3 VSS_30 VSS_152 AG23
AG16 VSS_31 VSS_153 AD9
R3 VSS_32 VSS_154 AF16
C6 VSS_33 VSS_155 AH10
C9 VSS_34 VSS_156 AJ10
F6 VSS_35 VSS_157 AD15
H7 VSS_36 VSS_158 AH16
J6 VSS_37
VSS_159 K23
A A
EV@M52(M54)

PROJECT : ZB3
Quanta Computer Inc.
Size Document Number Rev
M52-P_MEM_GND (2 of 4) 00

Date: Monday, April 03, 2006 Sheet 16 of 37

5 4 3 2 1
 5 4 3 2 1

U29E +1.2V_PCIE

+1.8V PART 5 OF 7
C1 V23 PCIE_PVDD_12 L28
VDDR1_1 PCIE_PVDD_12_1 EV@BLM18PG181SN1D_6
J1 VDDR1_2 PCIE_PVDD_12_2 N23
C438 C279 M1 P23
C262 C272 C208 C713 C298 C263 C169 C215 VDDR1_3 PCIE_PVDD_12_3 C359 C369 C334 C347
R1 VDDR1_4 PCIE_PVDD_12_4 U23
EV@22U_8 EV@22U_8 EV@1U_4 EV@1U_4 EV@1U_4 EV@1U_4 V1 [email protected]_4 [email protected]_4 EV@1U_4 EV@22U_8
EV@1U_4 EV@1U_4 EV@1U_4 EV@1U_4 VDDR1_5
AA1 VDDR1_6 PCIE_VDDR_12_10 N29
A3 VDDR1_7 PCIE_VDDR_12_11 N28
P9 VDDR1_8 PCIE_VDDR_12_12 N27
J10 N26 PCIE_VDDR_A_12 L27
D VDDR1_9 PCIE_VDDR_12_13 EV@BLM18PG181SN1D_6 D
N9 VDDR1_10 PCIE_VDDR_12_14 N25
C183 C174 C216 C229 C284 C291 P10
EV@1U_4 [email protected]_4 [email protected]_4 VDDR1_11 C312 C313 C314 C302 C317
A9 VDDR1_12 PCIE_VDDR_12_1 AL31

PCI-Express
C280 C209 C252 EV@22U_8 EV@1U_4 [email protected]_4 Y10 AM31 [email protected]_4 [email protected]_4 [email protected]_4 EV@1U_4
VDDR1_13 PCIE_VDDR_12_2 EV@22U_8
P8 VDDR1_14 PCIE_VDDR_12_3 AM30
EV@1U_4

EV@1U_4

EV@1U_4

R9 VDDR1_15 PCIE_VDDR_12_4 AL32

Y9 VDDR1_16 PCIE_VDDR_12_5 AL30
J11 VDDR1_17 PCIE_VDDR_12_6 AM28
C316 C343 C287 C170 C285 C268 C266 A21 AL29 PCIE_VDDR_B_12 L71
[email protected]_4 [email protected]_4 [email protected]_4 VDDR1_18 PCIE_VDDR_12_7 EV@BLM18PG181SN1D_6
M10 VDDR1_20 PCIE_VDDR_12_8 AM29

Memory I/O
EV@22U_8 [email protected]_4 [email protected]_4 [email protected]_4 N10 AM27
VDDR1_21 PCIE_VDDR_12_9 C634 C637 C635 C638 C636 C616
Y8 VDDR1_22
J18 [email protected]_4 [email protected]_4 [email protected]_4 EV@1U_4 EV@1U_4 EV@22U_8
VDDR1_23
J19 VDDR1_24 VDDC_1 AC11
K21 VDDR1_25 VDDC_2 AC12
A12 P14 VGA_CORE
C276 C269 C333 C382 C288 C321 C310 C172 C436 VDDR1_26 VDDC_3
H13 VDDR1_27 VDDC_4 U15
[email protected]_4 [email protected]_4 [email protected]_4 [email protected]_4 A15 W14
[email protected]_4 [email protected]_4 [email protected]_4 [email protected]_4 [email protected]_4 VDDR1_28 VDDC_5
J20 VDDR1_29 VDDC_6 W15
J13 VDDR1_30 VDDC_7 R17
K11 VDDR1_31 VDDC_8 R15
K19 V15 C357 C375 C367 C345 C398 C380 C381 C410 C615
VDDR1_32 VDDC_9 [email protected]_4 [email protected]_4 [email protected]_4 EV@1U_4 EV@22U_8
A18 VDDR1_33 VDDC_10 V16
L23 T16 [email protected]_4 [email protected]_4 EV@1U_4 EV@1U_4
VDDR1_34 VDDC_11
K20 VDDR1_35 VDDC_12 U16
K24 VDDR1_36 P VDDC_13 T17

Core
L24 VDDR1_37 VDDC_14 U17
+3V
H19 VDDR1_38 O VDDC_15 V14
C351 C368 C358 C401 C344 C324 C330 C323 C645
A24 VDDR1_39 VDDC_16 R18
K13 VDDR1_40
W VDDC_17 T18 [email protected]_4 [email protected]_4 [email protected]_4 EV@1U_4
R265 *0_6 J32 V18 [email protected]_4 [email protected]_4 EV@1U_4 EV@1U_4
A30
VDDR1_41
VDDR1_42
E VDDC_18
VDDC_19 P18
C32 P19
Q13 F32
VDDR1_43 R VDDC_20
R19 EV@22U_8
AO3403 VDDR1_45 VDDC_21
L32 VDDR1_46 VDDC_22 W19
VDDC_23 AD11
1 3 GPU_VDDR3 +2.5V
C C

VDD25_1 AC13
C471 C407 C384 C406 C405 C392 AC16
2

EV@22U_8 EV@1U_4 EV@1U_4 [email protected]_4 [email protected]_4 [email protected]_4 VDD25_2 +1.2V_PCIE

VDD25_3 AC18
R275 100K_4 C389 C399 C404

I/O Internal
AB9 AC15 +1.2V_VDDPLL L29 EV@1U_4 EV@1U_4 EV@22U_8
VDDR3_1 VDDPLL EV@BLM18PG181SN1D_6
AB10 VDDR3_2
AA9 VDDR3_3 VDDCI_1 W10
VDDR4 for DVPDATA[12..23] +VDDR4 AC19 T14 C403 C390 C377
+1.8V VDDR3_4 VDDCI_2 [email protected]_4 EV@1U_4 EV@22U_8
AD18 VDDR3_5 VDDCI_3 W17
3

L63 AC20 P16

EV@BLM18PG181SN1D_6 VDDR3_6 VDDCI_4 VGA_CORE
AD19 VDDR3_7 VDDCI_5 T23
2 Q10 AD20 K14
PDTC143TT C610 C619 C641 VDDR3_8 VDDCI_6 VDDCI L32
VDDCI_7 U19

I/0
EV@22U_8 EV@1U_4 [email protected]_4 EV@BLM18PG181SN1D_6
1

AJ5 +2.5V C350 C356 C328 C376 C361

VDDR4_1 [email protected]_4 EV@1U_4 EV@22U_8
AM5 VDDR4_2
+VDDR5 AL5 AE19 +2.5V_LPVDD L70 [email protected]_4 EV@1U_4
VDDR4_3 LPVDD/VDDL0 EV@BLM18PG181SN1D_6
VDDR5 for DVPDATA[0..11] AK5 VDDR4_4
L35 AF20 C472
EV@BLM18PG181SN1D_6 LVDDR/VDDL0_1 C414 C450 EV@22U_8
AE2 VDDR5_1 LVDDR/VDDL0_2 AE20
AE3 AF19 [email protected]_4 EV@1U_4
C418 C425 C429 VDDR5_2 LVDDR/VDDL0_3

LVDS PLL, I/O

AE4 VDDR5_3
EV@22U_8 EV@1U_4 [email protected]_4 AE5 VDDR5_4 +2.5V
LVDDR/VDDL1_1 AC21
+1.8V AC22
LVDDR/VDDL1_2 +2.5V_LVDDR L38
A27 VDDRH0 LVDDR/VDDL1_3 AD22

Clock
I/O
Memory
L17 +1.8V_VDDRH F1 AE21 +2.5V EV@BLM18PG181SN1D_6
EV@BLM18PG181SN1D_6 VDDRH1 LVDDR/VDDL2_1
LVDDR/VDDL2_2 AD21
C205 C244 C245 C217 AE22 LVDDR L33
C195 C184 EV@1U_4 EV@1U_4 [email protected]_4 [email protected]_4 LVDDR/VDDL2_3 EV@BLM18PG181SN1D_6 C448 C460 C415
A28 VSSRH0
EV@22U_8 EV@22U_8 E1 EV@1U_4 EV@1U_4 [email protected]_4
VSSRH1 C416 C397 C408 C378
EV@1U_4 [email protected]_4 EV@1U_4 EV@22U_8
EV@M52(M54)
C465
EV@22U_8
B B

U29G
PART 7 OF 7
Forward Control and External SSC AD12 BLON_VGA R234 EV@0_4
VARY_BL BLON 8,20
EV@: STUFF WHEN USE EXTERNAL VGA AE11 LCD_POWER_ON_VGA R231 EV@0_4
Compatibility DIGON LCD_POWER_ON 8,20
AD23 GENERICD
M56@: STUFF WHEN USE M56 UNSTUFF WHEN USE M54 OR M52 GENERICD

TXCLK_UP AJ21
R194 *M56@0_4 BBN_M56 Y23 AK21 R209
BBN_4 TXCLK_UN EV@10K_4
K15 BBN_3 TXOUT_U3P AH21
VGA_CORE R10 AG21
BBN_2 TXOUT_U3N
AC17 BBN_1 TXOUT_U2P AG20
R203 *M56@0_6 BBP_M56 AC14 AH20
BBP_4 TXOUT_U2N
M23 BBP_3 TXOUT_U1P AK20
C362 C283 C402 V10 AJ20
*M56@22U/6.3V_8 *[email protected]_4 *M56@1U_4 BBP_2 LVDS channel TXOUT_U1N
K18 BBP_1 TXOUT_U0P AG18
TXOUT_U0N AH18

AK19 TXLOUT0-_VGA R395 EV@0_4

TXOUT_L0N TXLOUT0- 8,20
AL19 TXLOUT0+_VGA R396 EV@0_4
TXOUT_L0P TXLOUT0+ 8,20
+2.5V L10 AL20 TXLOUT1-_VGA R406 EV@0_4
VDD25_4 TXOUT_L1N TXLOUT1- 8,20
K22 AM20 TXLOUT1+_VGA R407 EV@0_4
VDD25_5 TXOUT_L1P TXLOUT1+ 8,20
L73 +2.5V_VDDR25 AA10 AL21 TXLOUT2-_VGA R398 EV@0_4
VDD25_6 TXOUT_L2N TXLOUT2- 8,20
EV@BLM18PG181SN1D_6 AM21 TXLOUT2+_VGA R397 EV@0_4
TXOUT_L2P TXLOUT2+ 8,20
TXOUT_L3N AK18
C430 C286 C304 AJ18
EV@22U_8 [email protected]_4 EV@1U_4 TXOUT_L3P TXLCLKOUT-_VGA R402 EV@0_4
TXCLK_LN AL18 TXLCLKOUT- 8,20
AM18 TXLCLKOUT+_VGA R403 EV@0_4
TXCLK_LP TXLCLKOUT+ 8,20

EV@M52(M54)
A A

PROJECT : ZB3
Quanta Computer Inc.
Size Document Number Rev
M52-P_Power_LVDS(3 of 4) 00
Date: Monday, April 03, 2006 Sheet 17 of 37
5 4 3 2 1
 1 2 3 4 5 6 7 8

OPTION STRAPS
+3V
M56-P Strap
GPU_GPIO0 R433 EV@10K_4 STRAPS PIN DESCRIPTION Board
15 GPU_GPIO0
DEFAULT
Overlap pads to save space
TX_PWRS_ENB GPIO0 1
and to prevent assembly of 15 GPU_GPIO1
GPU_GPIO1 R432 EV@10K_4 Transmitter Power Saving Enable 0:
(Internal 50% Tx output swing 1.full Tx
both resistors. pull-down) output swing
A A
GPU_GPIO2 R422 *EV@10K_4 TX_DEEMPH_EN GPIO1 Transmitter De-emphasis Enable 0: 1
15 GPU_GPIO2
Layout Tx de-emphasis disabled 1.Tx
(Internal de-emphasis enabled
GPU_GPIO3
pull-down)
R431 *EV@10K_4
15 GPU_GPIO3

Ground High logic voltage GPIO(3:2) RSVD

Signal (Internal
GPU_GPIO4 R434 *EV@10K_4 pull-down)
15 GPU_GPIO4

GPU_GPIO5 R437 EV@10K_4 GPIO4 0

15 GPU_GPIO5
Add Text "Populate to Enable Debug" DEBUG_ACCESS Strap to set the debug muxes to bring out DEBUG signals even if
GPIO5 MUST PULL UP (Internal pull-down) registers are inaccessible
Beside JU23 on Silkscreen.
GPU_GPIO6 R441 *EV@10K_4
15 GPU_GPIO6

GPIO5
RSVD
Vendor P/N QCI P/N Size GPU_GPIO13 GPU_GPIO12 MEMTYP_1 MEMTYP_0 GPU_GPIO8 R215 *EV@10K_4 (Internal pull-down)
15 GPU_GPIO8

HYB18T256161AFL25AKD5JG-T^08 16M*16 *4pcs 0 0 0 0 Memory Size strap GPIO6 RSVD

(128MB) GPU_GPIO9 R219 *EV@10K_4
15 GPU_GPIO9 (Internal pull-down)
HY5PS561621AFP-25AKD5JG-TW12
(Default setting)
K4N56163QG-ZC25 AKD5JG-T514 Force_ GPIO8 Force chip to get to compliance state quickly for Tester purposes 0
Compliance
B 32M*16 *2pcs GPU_GPIO11 R445 *EV@10K_4 (Internal pull-down) B
15 GPU_GPIO11
HYB18T512161BF-25AKD5FG-T^00 (128MB) 0 0 1 1 If no ROM attached, comtrols chip IDis. If rom attached identifies ROM type
ROMIDCFG(3:0) GPIO(9,13,12,11) 000x - No ROM, MEM_AP_SIZE=00 128M
001x - No Rom, MEM_AP_SIZE=01 256M 000
HY5PS121621BFP-25AKD5FG-TW14 GPU_GPIO12 R217 *EV@10K_4 (Internal 010x - No Rom, MEM_AP_SIZE=10 64M
15 GPU_GPIO12
32M*16 *4pcs 0 1 0 1 pull-down) 011x - No ROM,MEM_AP_SIZE=11 Reserved
K4N51163QC-ZC25 AKD5FGBT501 (256MB) 1000 - Parallel ROM, chip IDis from ROM
GPU_GPIO13 R212 *EV@10K_4 1001 - Serial AT25F1024 ROM (Atmel), chip IDis from ROM
15 GPU_GPIO13
1010 - Serial AT45DB011 ROM (Atmel), chip IDis from ROM
1011 - Serial M25P10 ROM (ST), chip IDis from ROM
Memory Aperture Size Select 000x - No ROM, MEM_AP_SIZE=00 128MB 1100 - Serial M25P05 ROM (ST), chip IDis from ROM
When no ROM is attached, GPIO_9 is set to 0 1100 - Serial NX25F011B ROM (ISSI), chip IDis from ROM
GPIO_[13:12] is used to select the memory aperture size. 001x - No Rom, MEM_AP_SIZE=01 256M & 512MB
GPIO_[13:12] = 00: 128M memory aperture, same as ROM strap 00
010x - No Rom, MEM_AP_SIZE=10 64MB Indicates if any slave VIP host devices drove this pin low
GPIO_[13:12] = 01: 256M memory aperture, same as ROM strap 01 No
GPIO_[13:12] = 10: 64M memory aperture, same as ROM strap 10 VIP_DEVICE
during reset. 0- Slave VIP host port deviced present.
011x - No ROM,MEM_AP_SIZE=11 Reserved VSYNC default
GPIO_[13:12] = 11: reserved, same as ROM strap 11 1-No slave VIP port devices reporting presence during
reset
Default: 128M memory aperture.
GPIO_[13:12] = 01 (256M memory aperture) recommended R247 *10K_4 H2SYNC,
for designs with 256MB or 512MB of physical memory. 8,15,20 VSYNC
V2SYNC, RSVD
GENERICC

VSYNC RSVD
R248 *10K_4
8,15,20 HSYNC
HSYNC RSVD
Memory identification for BIOS
PCIE_TEST RSVD
00 - DDR2 16X16X4pcs 128MB
01 - DDR2 32X16X4pcs 256MB
Memory Q'ty ID
C C
10 - DDR2 16X16X2pcs 64MB
R236 *10K_4
11 - DDR2 32X16X2pcs 128MB 00
R238 10K_4
15 MEMTYP_0
R237 *10K_4
Board Straps REV. 0.3
STRAPS PIN DESCRIPTION VALUE
R230 10K_4
15 MEMTYP_1
MEMTYPE(1:0) DVPDATA(1:0) Memory identification for BIOS
00 - DDR2 16X16X4pcs 128MB
R249 *10K_4 01 - DDR2 32X16X4pcs 256MB
10 - DDR2 16X16X2pcs 64MB
R250 *10K_4 11 - DDR2 32X16X2pcs 128MB
15 MEMTYP_2

RESERVE FOR MEMORY ID DC_Strap1 GPIO(10) Internal TMDS Enabled

0 - Disabled
1 - Enabled
1
R210 EV@10K_4
15 GENERICC
R206 EV@10K_4 DC_Strap2 DVPDATA13 Video Capture Enabled 0
0 - Disabled
1 - Not detected

DC_Strap3 DVPDATA14 HDTV out detect 1

0 - Detected
1 - Enabled
ATI FAE: ALL N/A

+1.8V +3V +1.8V DC_Strap4, DVPDATA15 Video capture enable

DEMUX_SEL 00 - DAC2 Off 01
R425 *EV@10K_4 R429 *EV@10K_4 01 - DAC2 On as CRT
R427 *EV@10K_4 R216 *EV@10K_4 10 - DAC2 On as TVOUT
D 11 - DAC2 On as TVOUT and CRT D

PAL/NTSC LCDDATA(18) TVO Standard Default (Resistor pull-up and switch short to GND) 1
DC_Strap4 15 15 DC_Strap3 0 - PAL (on board resistor pull-down and switch closed)
DC_Strap2 15 15 GPU_GPIO10 1 -NTSC (on board resistor pull-up)

R428 *EV@10K_4 R211 *EV@10K_4

R426 *EV@10K_4 R430 *EV@10K_4
PROJECT : ZB3
Quanta Computer Inc.
Size Document Number Rev
M52-P_Straps (4 of 4) 00
Date: Monday, April 03, 2006 Sheet 18 of 37
1 2 3 4 5 6 7 8
 5 4 3 2 1

MDA[0..63] 16 +1.8V
MAA[0..15] 16
-DQMA[0..7] 16
CHAN A DDR2 84BGA 16MX16 MEMORY
RDQSA[0..7] 16
WDQSA[0..7] 16
U33 U28 C670 C662 C729 C434 C158 C166 C695
EV@10U_6 EV@10U_6 [email protected]_4 [email protected]_4 EV@4700P_4 EV@4700P_4
BA0 L2 B9 MDA4 BA0 L2 B9 MDA44 EV@1U_4
BA1 BA0 DQ15 MDA3 BA1 BA0 DQ15 MDA43
L3 BA1 DQ14 B1 L3 BA1 DQ14 B1
D9 MDA7 D9 MDA46
MMA12_14 DQ13 MDA1 MMA12_14 DQ13 MDA40
R2 A12 DQ12 D1 R2 A12 DQ12 D1
MAA11 P7 D3 MDA0 MAA11 P7 D3 MDA41
MAA10 A11 DQ11 MDA6 MAA10 A11 DQ11 MDA47 +1.8V
M2 A10/AP DQ10 D7 M2 A10/AP DQ10 D7
MAA9 P3 C2 MDA2 MAA9 P3 C2 MDA42
MAA8 A9 DQ9 MDA5 MAA8 A9 DQ9 MDA45
P8 A8 DQ8 C8 P8 A8 DQ8 C8
MAA7 P2 F9 MDA20 MAA7 P2 F9 MDA37
MAA6 A7 DQ7 MDA18 MAA6 A7 DQ7 MDA34 C214 C710 C712 C684 C711 C161 C679
N7 A6 DQ6 F1 N7 A6 DQ6 F1
D MAA5 N3 H9 MDA21 MAA5 N3 H9 MDA39 EV@4700P_4 EV@4700P_4 D
MAA4 A5 DQ5 MDA19 MAA4 A5 DQ5 MDA33 EV@10U_6 EV@10U_6 [email protected]_4 [email protected]_4 EV@1U_4
N8 A4 DQ4 H1 N8 A4 DQ4 H1
MAA3 N2 H3 MDA17 MAA3 N2 H3 MDA35
MAA2 A3 DQ3 MDA22 MAA2 A3 DQ3 MDA36
M7 A2 DQ2 H7 M7 A2 DQ2 H7
MAA1 M3 G2 MDA16 MAA1 M3 G2 MDA32
MAA0 A1 DQ1 MDA23 MAA0 A1 DQ1 MDA38
M8 A0 DQ0 G8 M8 A0 DQ0 G8
VMEM_VTT
16 -M_CLKA0 K8 CK VDDQ1 A9 16 -M_CLKA1 K8 CK VDDQ1 A9
16 M_CLKA0 J8 C1 16 M_CLKA1 J8 C1 MAA14R4781 2 EV@0_4 BA0 MAA0 R180 EV@56_4
CK VDDQ2 CK VDDQ2 MAA15R1831
VDDQ3 C3 VDDQ3 C3 2 EV@0_4 BA1 MAA1 R155 EV@56_4
16 CKEA K2 C7 16 CKEA1 K2 C7 MAA12R4791 2 EV@0_4 MMA12_14 MAA2 R154 EV@56_4
CKE VDDQ4 CKE VDDQ4 MAA3 R161 EV@56_4
VDDQ5 C9 VDDQ5 C9
E9 E9 MAA4 R163 EV@56_4
VDDQ6 +1.8V VDDQ6 +1.8V MAA5 R165 EV@56_4
VDDQ7 G1 VDDQ7 G1
16 -CSA0 L8 G3 16 -CSAb0 L8 G3 MAA6 R152 EV@56_4
CS VDDQ8 CS VDDQ8 MAA7 R150 EV@56_4
VDDQ9 G7 VDDQ9 G7
16 -WEA K3 G9 16 -WEA1 K3 G9 MAA8 R158 EV@56_4
WE VDDQ10 WE VDDQ10 MAA9 R166 EV@56_4
16 -RASA K7 A1 16 -RASA1 K7 A1 MAA10 R153 EV@56_4
RAS VDD1 RAS VDD1 MAA11 R151 EV@56_4
VDD2 E1 VDD2 E1
16 -CASA L7 CAS VDD3 J9 16 -CASA1 L7 CAS VDD3 J9
M9 L77 M9 L75
-DQMA2 VDD4 EV@BLM18PG181SN1D_6 -DQMA4 VDD4 EV@BLM18PG181SN1D_6 BA0 R181 EV@56_4
F3 LDM VDD5 R1 F3 LDM VDD5 R1
-DQMA0 B3 -DQMA5 B3 BA1 R182 EV@56_4
UDM VDDL0 UDM VDDL1 MMA12_14 R159 EV@56_4
VDDL J1 VDDL J1
VSSDL J7 VSSDL J7
16 ODTA0 K9 C728 C159 16 ODTA1 K9 C693 C696 16 ODTA0 R134 EV@56_4
ODT ODT EV@1U_4 R172 EV@56_4
16 ODTA1
EV@1U_4
RDQSA2 F7 RDQSA4 F7 16 CKEA R135 EV@56_4
+1.8V WDQSA2 LDQS [email protected]_4 +1.8V WDQSA4 LDQS [email protected]_4 R170 EV@56_4
E8 LDQS VSSQ1 A7 E8 LDQS VSSQ1 A7 16 CKEA1
VSSQ2 B2 VSSQ2 B2
B8 B8 16 -CSA0 R136 EV@56_4
VSSQ3 VSSQ3 R171 EV@56_4
C VSSQ4 D2 VSSQ4 D2 16 -CSAb0 C
R503 RDQSA0 B7 D8 R469 RDQSA5 B7 D8
[email protected]/F_4 WDQSA0 UDQS VSSQ5 [email protected]/F_4 WDQSA5 UDQS VSSQ5 R139 EV@56_4
A8 UDQS VSSQ6 E7 A8 UDQS VSSQ6 E7 16 -WEA
F2 F2 16 -WEA1 R168 EV@56_4
VSSQ7 VSSQ7
VSSQ8 F8 VSSQ8 F8
VMREFA0 J2 H2 VMREFA1 J2 H2 16 -CASA R137 EV@56_4
VREF VSSQ9 VREF VSSQ9 R173 EV@56_4
VSSQ10 H8 VSSQ10 H8 16 -CASA1
(SSTL-1.8) VREF = .5*VDDQ A2 (SSTL-1.8) VREF = .5*VDDQ A2
R502 C727 NC#A2 R471 C699 NC#A2 R138 EV@56_4
E2 NC#E2 VSS1 A3 E2 NC#E2 VSS1 A3 16 -RASA
L1 E3 [email protected]_4 L1 E3 16 -RASA1 R169 EV@56_4
[email protected]_4 NC#L1 VSS2 NC#L1 VSS2
R3 NC#R3 VSS3 J3 R3 NC#R3 VSS3 J3
[email protected]/F_4 R7 N1 R7 N1 FOR M56P AT DDR2 MEMORY SPEEDS ABOVE 350MHZ
NC#R7 VSS4 NC#R7 VSS4
R8 NC#R8 VSS5 P9 R8 NC#R8 VSS5 P9 MEMORY CONTROL SIGNALS WE,CAS,RAS,CS,CKE,ODT
[email protected]/F_4
AND MEMORY ADDRESS SIGNALS REQUIRE 55 OHM PULLUP
TO A VTT RAIL (50% OF VDDQ)
EV@VRAM-16M*16-Infineon EV@VRAM-16M*16-Infineon U7
EV@G2996
U5
BA0 MDA10
U9 28,30,31,32,33,34 MAINON 2 SD VREF 4
L2 BA0 DQ15 B9
BA1 L3 B1 MDA12 BA0 L2 B9 MDA48 +1.8V 5
BA1 DQ14 MDA11 BA1 BA0 DQ15 MDA55 VDDQ
DQ13 D9 L3 BA1 DQ14 B1
MMA12_14 R2 D1 MDA15 D9 MDA49 6 3
MAA11 A12 DQ12 MDA14 MMA12_14 DQ13 MDA54 AVIN VSENSE
P7 A11 DQ11 D3 R2 A12 DQ12 D1

TGND
MAA10 M2 D7 MDA8 MAA11 P7 D3 MDA53 8

GND
A10/AP DQ10 A11 DQ11 VTT VMEM_VTT
MAA9 P3 C2 MDA13 MAA10 M2 D7 MDA51 +1.8V 7
MAA8 A9 DQ9 MDA9 MAA9 A10/AP DQ10 MDA52 PVIN
P8 A8 DQ8 C8 P3 A9 DQ9 C2
MAA7 P2 F9 MDA28 MAA8 P8 C8 MDA50 C228

9
MAA6 A7 DQ7 MDA27 MAA7 A8 DQ8 MDA59 C211 C213 C238
N7 A6 DQ6 F1 P2 A7 DQ7 F9
MAA5 N3 H9 MDA31 MAA6 N7 F1 MDA60 [email protected]_4 EV@10U_6
MAA4 A5 DQ5 MDA24 MAA5 A6 DQ6 MDA56 EV@10U_6 [email protected]_4
N8 A4 DQ4 H1 N3 A5 DQ5 H9
MAA3 N2 H3 MDA26 MAA4 N8 H1 MDA63
MAA2 A3 DQ3 MDA29 MAA3 A4 DQ4 MDA62
M7 A2 DQ2 H7 N2 A3 DQ3 H3
B MAA1 M3 G2 MDA25 MAA2 M7 H7 MDA58 B
MAA0 A1 DQ1 MDA30 MAA1 A2 DQ2 MDA61
M8 A0 DQ0 G8 M3 A1 DQ1 G2
MAA0 M8 G8 MDA57
A0 DQ0
16 -M_CLKA1 16 M_CLKA0
16 -M_CLKA0 K8 CK VDDQ1 A9
16 M_CLKA0 J8 CK VDDQ2 C1 16 -M_CLKA1 K8 CK VDDQ1 A9 16 M_CLKA1 16 -M_CLKA0
VDDQ3 C3 16 M_CLKA1 J8 CK VDDQ2 C1
16 CKEA K2 CKE VDDQ4 C7 VDDQ3 C3
C9 16 CKEA1 K2 C7 R448 R450 R501 R500
VDDQ5 CKE VDDQ4 EV@56_4 EV@56_4 EV@56_4 EV@56_4
VDDQ6 E9 VDDQ5 C9
G1 +1.8V E9
VDDQ7 VDDQ6 +1.8V
16 -CSA0 L8 CS VDDQ8 G3 VDDQ7 G1
VDDQ9 G7 16 -CSAb0 L8 CS VDDQ8 G3
16 -WEA K3 WE VDDQ10 G9 VDDQ9 G7
16 -WEA1 K3 WE VDDQ10 G9
16 -RASA K7 A1 C676 C725
RAS VDD1 EV@470P_4 EV@470P_4
VDD2 E1 16 -RASA1 K7 RAS VDD1 A1
16 -CASA L7 CAS VDD3 J9 VDD2 E1
M9 L18 16 -CASA1 L7 J9
-DQMA3 VDD4 CAS VDD3 L74
F3 LDM VDD5 R1 VDD4 M9
-DQMA1 B3 EV@BLM18PG181SN1D_6 -DQMA7 F3 R1 +1.8V
UDM VDDL2 -DQMA6 LDM VDD5 EV@BLM18PG181SN1D_6
VDDL J1 B3 UDM
J7 J1 VDDL3
ODTA0 VSSDL C191 C190 VDDL
K9 ODT VSSDL J7
ODTA1 K9 C690 C687 C437 C669 C432 C680 C435 C157 C300
EV@1U_4 ODT EV@1U_4
RDQSA3 F7 EV@10U_6 EV@10U_6 [email protected]_4 [email protected]_4 EV@4700P_4 EV@4700P_4 EV@1U_4
+1.8V WDQSA3 LDQS [email protected]_4 RDQSA7
E8 LDQS VSSQ1 A7 F7 LDQS
B2 +1.8V WDQSA7 E8 A7 [email protected]_4
VSSQ2 LDQS VSSQ1
VSSQ3 B8 VSSQ2 B2
VSSQ4 D2 VSSQ3 B8
R157 RDQSA1 B7 D8 D2 +1.8V
[email protected]/F_4 WDQSA1 UDQS VSSQ5 R457 RDQSA6 VSSQ4
A8 UDQS VSSQ6 E7 B7 UDQS VSSQ5 D8
F2 [email protected]/F_4 WDQSA6 A8 E7
VSSQ7 UDQS VSSQ6
A VSSQ8 F8 VSSQ7 F2 A
VMREFA2 J2 H2 F8 C156 C730 C165 C724 C726 C433 C167
VREF VSSQ9 VMREFA3 VSSQ8
VSSQ10 H8 J2 VREF VSSQ9 H2
(SSTL-1.8) VREF = .5*VDDQ A2 H8 EV@10U_6 EV@10U_6 [email protected]_4 [email protected]_4 EV@4700P_4 EV@4700P_4 EV@1U_4
R156 C189 NC#A2 (SSTL-1.8) VREF = .5*VDDQ VSSQ10
E2 NC#E2 VSS1 A3 A2 NC#A2
L1 E3 R460 C694 E2 A3
[email protected]_4 NC#L1 VSS2 NC#E2 VSS1
R3 NC#R3 VSS3 J3 L1 NC#L1 VSS2 E3
[email protected]/F_4 R7 N1 [email protected]_4 R3 J3
NC#R7 VSS4 [email protected]/F_4 NC#R3 VSS3
R8 P9 R7 N1
NC#R8 VSS5
R8
NC#R7
NC#R8
VSS4
VSS5 P9 PROJECT : ZB3
Quanta Computer Inc.
EV@VRAM-16M*16-Infineon
EV@VRAM-16M*16-Infineon Size Document Number Rev
VRAM DDR2 1A

Date: Monday, April 03, 2006 Sheet 19 of 37

5 4 3 2 1
 5 4 3 2 1

CRT +5V_CRT2
C540 .1U_4 ZB1
12 MONITOR_PLUG#
LVDS
CRT PORT
D21 SSM14
2 1 +5V_CRT2
25 MIL INVCC INVCC
D +5V D
CN12 Close CN10

16
Edison --FEB/27 to change bead for EMI Solution. CRT_DFDS15FR0G6 +3V
Close CN10
6 D20 1SS355 C547 C556 R303 2.2K_4 PHL_DATA
VGA_RED L48 FBM-10-160808-600_6 CRT_R1 1 11 1 2 C553
8,15 VGA_RED
7 .1U_6 10U/25V_1210 1000P_4
VGA_GRN L49 FBM-10-160808-600_6 CRT_G1 2 12 CRTDDAT R305 2.2K_4 PHL_CLK
8,15 VGA_GRN
8
VGA_BLU L50 FBM-10-160808-600_6 CRT_B1 3 13 CRTHSYNC
8,15 VGA_BLU
9
4 14 CRTVSYNC
C535 C534 C533 10
R351
150/F_4
C530
10P_4
R349
150/F_4
C531
10P_4
R350
150/F_4
C532
10P_4 10P_4 10P_4 10P_4
5 15 CRTDCLK ZB1
LCD Connector

17
C543 1U_4
Edison --01/05 Add CRT DETECT Function. R604 C528 1U_4 CN10
28 DETECT_CRT +3V
+5V 1 2 +3V
U21 CM2009 *10K_4
+5V_CRT2 VSYNC1 L53 FBM-10-160808-600_6 LCD3V 3 4 VADJ L57 BK1608LL121_6
1 VCC_SYNC SYNC_OUT2 16 LCD3V 5 6 CONTRAST 28
HSYNC1 L54 FBM-10-160808-600_6 DISPON 7 8
+5V 7 VCC_DDC SYNC_OUT1 14 9 10
VIN R365 0_8 INVCC C557 .1U_4
C 11 12 C
ESD_8KV 8 15 VSYNC INVCC
BYP SYNC_IN2 VSYNC 8,15,18 13 14
+5V_CRT2 C536 C539
HSYNC 10P_4 10P_4 15 16
+5V 2 VCC_VIDEO SYNC_IN1 13 HSYNC 8,15,18 17 18
C813 TXLCLKOUT+ TXLCLKOUT+ 8,17
CRT_R1 DDCCLK PHL_DATA 19 20 TXLCLKOUT-
.22U_4 3 VIDEO_1 DDC_IN1 10 DDCCLK 8,15 8,15 PHL_DATA 21 22 TXLCLKOUT- 8,17
R339 R340 8,15 PHL_CLK PHL_CLK
CRT_G1 DDCDAT 2.7K_4 2.7K_4 TXLOUT0+ 23 24 TXLOUT1+
4 VIDEO_2 DDC_IN2 11 DDCDAT 8,15 8,17 TXLOUT0+ 25 26 TXLOUT1+ 8,17
8,17 TXLOUT0- TXLOUT0- TXLOUT1- TXLOUT1- 8,17
CRT_B1 CRTDCLK_R R348 33_6 27 28
5 VIDEO_3 DDC_OUT1 9 29 30
8,17 TXLOUT2+ TXLOUT2+ R607 *0_4
CRTDDAT_R R347 33_6 TXLOUT2- 31 32
6 GND DDC_OUT2 12 8,17 TXLOUT2- 33 34 L84
35 36 USBP1+PC
37 38 1 1 2 2 USBP1+ 12
+3V USBP1-PC 4 3 USBP1- 12
C537 C538 C818 *1U_4 39 40 4 3
Edison --01/05 increase capability of ESD, from +-4KV improve to +-8KV.
10P_4 10P_4 CL-2M2012-900JT
LVDS_CONN R608 *0_4
Reserved for wire solution
Edison_Feb/24 -- Add PC camera function.

+3V
+3V U23 W:80 mil W:80 mil LCD3V
B R359 EV@10K_4 B
6 1 LCDVCC R366 0_8
R360 IN OUT
10K_4 C544 4 2 C545 C555 C554 C552
D24 1SS355 .1U_4 IN GND
8,17 BLON 1 2 3 5 .1U_4 .1U_4 .01U_4 10U_8
ON/OFF GND
D23 1SS355
1 2 AAT4280_3
28 EC_FPBACK#
8,17 LCD_POWER_ON

+3VPCU

DSC Pinout : pin1 -- VCC(+3V)

R357 pin2 -- USB-
10K_4 pin3 -- USB+
D22 1SS355 pin4 -- GND
1 2 DISPON
pin5 -- Shielding
the connector is JST SM05B-SSR-H-TB
LID# R356 1K_4
LID591# 28

C541
A A
CN11 .1U_4
1
2

LID_CONN

PROJECT : ZB3
ZB1
Quanta Computer Inc.
Size Document Number Rev
1A
VGA Ports, LID, & HOLES
Date: Monday, April 03, 2006 Sheet 20 of 37
5 4 3 2 1
 1 2 3 4

13 PDD[0..15] PDD8 Edison-- Feb/21_Change CN27

IDE PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
-RST_HDD0
PDD7
HDD CONN
CN28
PH@HDD_CON
1
3
2
4
PDD8
ZL9
ODD CONN
CN27
connector That Footprint
.same with ZL9 for factory
recommend.

PDD15 PDD6 PDD9 ODD_CONN

PDD0 PDD5 5 6 PDD10
PDD1 PDD4 7 8 PDD11 1 2
PDD2 PDD3 9 10 PDD12 -RST_HDD0 3 4 PDD8
A PDD3 PDD2 11 12 PDD13 PDD7 5 6 PDD9 A
PDD4 PDD1 13 14 PDD14 PDD6 7 8 PDD10
PDD5 PDD0 15 16 PDD15 PDD5 9 10 PDD11
PDD6 17 18 PDD4 11 12 PDD12
PDD7 19 20 PDD3 13 14 PDD13
13 PDDREQ 21 22 15 16
PDD2 PDD14
13 PDIOW# 23 24 17 18
PDD1 PDD15
13 PDIOR# 25 26 19 20
PHDRDY PSEL R595 470_4 PDD0 PDDREQ
13 PHDRDY 27 28 21 22 PDDREQ 13
PDIOR#
13,14 PDDACK# 29 30 23 24 PDIOR# 13
IRQ14 PDIOW#
13 IRQ14 31 32 13 PDIOW# 25 26
-PDIAG R597 *10K_4 +5V PHDRDY PDDACK#
13 PDA1 33 34 13 PHDRDY 27 28 PDDACK# 13,14
IRQ14
13 PDA0 35 36 PDA2 13 13 IRQ14 29 30
PDA1 -PDIAG
13 PDCS1# 37 38 HDD_VCC PDCS3# 13 13 PDA1 31 32
IDELED# PDA0 PDA2
13,29 IDELED# 39 40 13 PDA0 33 34 PDA2 13 RBAYVCC +5V
HDD_VCC R3 0_8 +5V PDCS1# PDCS3#
41 42 13 PDCS1# IDELED# 35 36 PDCS3# 13
C806 43 44 37 38
RBAYVCC 39 40
*100P_4 C805 C809 C5 + C4 R6 0_8
.1U_4 1000P_4 .1U_4 *100U/6.3V_3528 41 42
43 44
ZB1 +5V R588 *10K_4 RCSEL_R 45
47
46
48 C801 C803 C804 C802 + C6

51
52
R590 *22_4 R589 49 50 *100U/6.3V_3528
RST_HDD# -RST_HDD0 Reserve Slave for PATA 1000P_4 .1U_4 .1U_4 .1U_4

51
52
12 RST_HDD# *SATA@470_4
R591 22_4
Reserve Master for SATA
B
ALINK_RST#
CLOSE IDE SIDE B
5,6,11,15,24 ALINK_RST#
R596 *10K_4 IRQ14
+3V +5V +3V
PDD7 R592 *10K_4

Q36
2

*DTC144EUA R593 PDDREQ R594 *5.6K_4

*10K_4

ALINK_RST# 1 3

PAD19 PAD15 PAD9 PAD16 PAD20 PAD7 PAD6 PAD3 PAD13 PAD8 PAD4 PAD18 PAD17 PAD2 PAD5 PAD1 PAD12 PAD11 PAD14
CN29
*EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD *SATA_HDD

1
1

1
GND1
RXP 2 SATA_TXP0 13
RXN 3 SATA_TXN0 13
GND2 4
5 SATA_RXN0_C C14 *[email protected]_4
TXN SATA_RXN0 13 1 2
6 SATA_RXP0_C C15 *[email protected]_4
HOLE18 TXP SATA_RXP0 13
C HOLE3 HOLE27 HOLE21 HOLE24 HOLE1 HOLE31 HOLE17 HOLE25 HOLE4 HOLE13 HOLE23 7 2 1 C
*H-C276D118P2 *H-C276D118P2 *H-C276D118P2 *H-C276D118P2 *H-C276D118P2 *H-C276D118P2 *H-C276D118P2 *H-C276D118P2 *H-C276I158D118P2 *H-C276I158D118P2 *H-C276D118P2 *H-C276I158D118P2 GND3

RST
GND
8 +3.3VSATA R1 +3V
3.3V *SATA@0_8
3.3V 9
3.3V 10
1

11
1

1
GND
GND 12
GND 13
14 HDD_VDD R2 +5V
20
HOLE7 HOLE14 HOLE10 HOLE26 HOLE30 HOLE19 5V *SATA@0_8
*H-C276I158D118P2 *H-C276D118P2 MINI-CARD VGA HEATSINK 5V 15
*H-C276I158D118P2
*H-C276I158D118P2
*H-C276I158D118P2 *H-C276D118P2 16
HOLE28 HOLE29 HOLE16 HOLE11 5V
GND 17
H-TC197BC98D59P2 H-TC197BC98D59P2 EV@H-C276I182D142P2 18 +3.3VSATA
EV@H-C276I182D142P2 RSVD C3
GND 19

GND
20 *[email protected]_8
12V C2 C1
1

21

X
1

12V *[email protected]_8 *[email protected]_4

12V 22
43 44 44 43
1

Edison 0106 - Delete PAD22 ~ PAD24. Edison 0112 - To modify the C3 connect to HDD_VDD.

D D
CPU NUT FIX PAD
NB HEATSINK MDC PAD10 PAD21
HOLE22 HOLE15 HOLE12 HOLE6 HOLE5 HOLE8 HOLE9 HOLE2
H-C197D63P2 H-C197D63P2 H-C197D63P2 H-C236D142P2 H-C236I182D142P2 H-C236D142P2 H-C236I182D142P2 H-C217D118P2 FIX_PAD FIX_PAD PROJECT : ZB3
Quanta Computer Inc.
1

Size Document Number Rev

1

1
1

HDD & CDROM , HOLES 1A

Date: Monday, April 03, 2006 Sheet 21 of 37

1 2 3 4
 1 2 3 4 5 6 7 8

+5VSUS
ID Select : AD20 MINI-PCI U20 TPS2061DGNR
2 USBPWR0
+3V +5V IN1 OUT3 8
Interrupt Pin : INTF# , INTG# MINIPCI
3 IN2 OUT2 7
CN18
R337 0_4 OUT1 6
Request Indicate : REQ2# +3V
1 TIP RING 2 28 USBON# 4 EN#
3 LAN1 LAN2 4 1 GND
Grant Indicate : GNT2# 5 LAN3 LAN4 6 9 GND-C OC# 5 R338 *6.34K/F_4
7 8 C546 C558 C575 C587 C506 C508
LAN5 LAN6 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4
9 LAN7 LAN8 10
WIRELESS_LED R364 0_4 11 12
29 WIRELESS_LED LED_GP LED_YP
1 2 13 14 +3V
28 RF_EN LED_GN LED_YN +5VSUS
D25 1SS355 15 16
NC1 NC2 U19 TPS2061DGNR
A 11 INTF# 17 -INTB +5V 18 +5V A
19 20 +3V 2 USBPWR2
+3V -INTA INTG# 11,24 IN1 OUT3 8
21 R(IRQ3) R(IRQ4) 22 3 IN2 OUT2 7
23 GND +3VAUX 24 +3VSUS OUT1 6

2
PCLK_MINI 25 26 PCIRST# 4
11,14 PCLK_MINI PCICLK -RST PCIRST# 11,24,28 EN#
27 28 Q18 1
GND +3V *DTC144EUA GND
11 REQ2# 29 -REQ -GNT 30 GNT2# 11 9 GND-C OC# 5 R345 *6.34K/F_4
31 +3V GND 32
33 34 M_PME# R302 *0_4 1 3PME#
11,24 AD31 AD31 -PME PME# 12,23,24
11,24 AD29 35 AD29 (V) 36
37 GND AD30 38 AD30 11,24
39 40 +5VSUS
11,14,24 AD27 AD27 +3V
41 42 U22 TPS2061DGNR
11,14,24 AD25 AD25 AD28 AD28 11,14,24
43 44 2 USBPWR4
(V) AD26 AD26 11,14,24 IN1 OUT3 8
11,24 CBE3# 45 -CBE3 AD24 46 AD24 11,14,24 3 IN2 OUT2 7
47 48 R299 150_4 AD20
11,14,24 AD23 AD23 IDSEL OUT1 6
49 GND GND 50 4 EN#
11,24 AD21 51 AD21 AD22 52 AD22 11,24 1 GND
53 54 AD20 R358 9 5 R361 *6.34K/F_4
11,24 AD19 AD19 AD20 AD20 11,24 GND-C OC#
55 56 *0_4
GND PAR PAR 11,24
11,24 AD17 57 AD17 AD18 58 AD18 11,24
11,24 CBE2# 59 -CBE2 AD16 60 AD16 11,24
11,24 IRDY# 61 -IRDY GND 62
63 64 L46
+3V -FRAME FRAME# 11,24
65 66 FBM2125HM330_8
11,24,28 CLKRUN# -CLKRUN -TRDY TRDY# 11,24
67 68 USBPWR0 USB1POWER
11,24 SERR# -SERR -STOP STOP# 11,24
69 GND +3V 70 33ohm/4A
71 72 + C523 100U/6.3V_3528
11,24 PERR# -PERR -DEVSEL DEVSEL# 11,24
11,24 CBE1# 73 -CBE1 GND 74
B 75 76 CN14 B
11,24 AD14 AD14 AD15 AD15 11,24
77 78 L52 USB_DFHD04MR671
GND AD13 AD13 11,24
79 80 CL-2M2012-900JT
11,24 AD12 AD12 AD11 AD11 11,24 1 5
81 82 1 1 BUSBP2-
11,24 AD10 AD10 GND 12 USBP2- 2 2 BUSBP2+ 2 6
83 GND AD9 84 AD9 11,24 12 USBP2+ 4 4 3 3 3 7
11,24 AD8 85 AD8 -CBE0 86 CBE0# 11,24 4 8
11,24 AD7 87 AD7 +3V 88 Edison--Mar/02__Add EMI
89 +3V AD6 90 AD6 11,24 solution install L52, and
11,24 AD5 91 AD5 AD4 92 AD4 11,24
93 (V) AD2 94 AD2 11,24
also delete R354,R355.
95 96 L47
11,24 AD3 AD3 AD0 AD0 11,24
97 98 USBPWR2 USB3POWER
+5V +5V (V) FBM2125HM330_8
11,24 AD1 99 AD1 SERIRQ 100 SERIRQ 11,24,28
101 102 + C524 100U/6.3V_3528
GND GND
103 SYNC M66EN 104
105 106 CN13
SDIN0 SDOUT L51 USB_DFHD04MR671
107 BITCLK SDIN1 108
109 110 CL-2M2012-900JT
-AC_PRIMARY -RESET BUSBP0- 1 5
111 BEEP -MPCICACK 112 12 USBP0- 1 1 2 2 2 6
113 114 4 4 BUSBP0+
AGND AGND 12 USBP0+ 3 3 3 7
115 +MIC +SPK 116 4 8
117 -MIC -SPK 118 Edison--Mar/22__Add EMI
119 AGND AGND 120 solution install L51/L56, and
121 -RI NC4 122
+5V 123 +5VA +3VAUX 124 +3VSUS
also delete R352,R353,R362,R363.
L55
GND

GND

USBPWR4 USB5POWER
PCLK_MINI R368 *22_4 C548 *10P_4 FBM2125HM330_8
+ C542 100U/6.3V_3528
125

126

C C
R446 *0_6 CN17
+3V +3VSUS L56 USB
D26 CL-2M2012-900JT
BUSBP4- 1 5
+1.8V 12 USBP4- 1 1 2 2 2 6
4 3 BUSBP4+
12 USBP4+ 4 3 3 7
*1N5819 4 8
CN22
51 Reserved +3.3V 52
49
47
Reserved GND 50
48
Edison -0104-- Modify
Reserved +1.5V R442 *0_4 BT_LED
Edison ---Feb/22_ Delete 45 Reserved LED_WPAN# 46
43 44 MINICARD_LED
the C673, C674 capacitor 41
Reserved LED_WLAN#
42 T62
MINICARD_LED 29
for PCI-E of Minicard. Reserved LED_WWAN# +3VSUS
39 Reserved GND 40
37 38 BT_POWERON# 28
Reserved USB_D+ USBP7+ 12

2
35 36 R602 0_4 Q37
GND USB_D- USBP7- 12 CN30
33 34 AO3403 L82 33ohm/1A
7 MINI_PCIE_TXP0 PETp0 GND
31 32 1 3 BT_PWR_R BT_POWER
7 MINI_PCIE_TXN0 PETn0 SMB_DATA PDAT_SMB 5,12 1
29 30 L83 BK2125HS330_8 C810 10U_8
GND SMB_CLK PCLK_SMB 5,12 2
27 28 4 3 BUSBP6+
GND +1.5V 12 USBP6+ 4 3 3
25 26 1 2 BUSBP6-
7 MINI_PCIE_RXP0 PERp0 GND 12 USBP6- 1 2 4
23 24 BT_LED
7 MINI_PCIE_RXN0 PERn0 +3.3Vaux 29 BT_LED 5
21 22 PCIRST# *DLW21HN900SQ2L
GND PERST# RF_EN R601 0_4 C811 6
19 Reserved Reserved 20 7
.01U_4
17 Reserved GND 18 Edison -0111-- Delete Resistor 8
+3VSUS 15 16 R439,R440,R438 PTWO_MINIUSB_BT
GND Reserved
5 CLK_PCIE_MINI 13 REFCLK+ Reserved 14
D 5 CLK_PCIE_MINI# 11 REFCLK- Reserved 12 D
2

R220 *0_4 9 10 +1.8V +3V +3VSUS

12 PCIE_WAKE# GND Reserved
R467 0_4 7 8
5 MINI_CLKREQ3# CLKREQ# Reserved
T68 5 6
T69 Reserved +1.5V

USB
3 4
GND

GND

PME# R221 0_4 Reserved GND

3 1 1 2
WAKE# +3.3V C212 C675 C672 PROJECT : ZB3
Q26 *MINIPCI_EXP_50P_H9 .1U_4 .1U_4 .1U_4
53

54

*DTC144EUA

MPC Close Minicard connector Size

Date:
Document Number
Quanta Computer Inc.
MINI PCI&PCI-E,USB PORT
Monday, April 03, 2006 Sheet 22 of 37
Rev
1A

1 2 3 4 5 6 7 8
 5 4 3 2 1

+3V_S5

+1.2V_LAN +2.5V_LAN +3V_S5 R375 R374 +2.5V_LAN

4.7K/F_4 4.7K/F_4
U25 M24LC08

5 1 L41 U27
SDA A0 BK1608HS220 NS0013
A1 2
6 SCL A2 3
MDI1+ 1 16 RJ45_MX1+
RD+ RX+
7 WP VCC 8
D 4 MDI1- 2 14 MCT1 D
GND RD- CT

1
+2.5V_LAN C580
.1U_4 V_DAC 3 15 RJ45_MX1-
CT RX-

2
MDI0+ RJ45_MX0-

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33
U24 7 TD+ TX- 9

MDI0- 8 11 MCT0

VMAIN_AVAL

TESTMODE

VDDO_TTL

VDDO_TTL
VDD

VDD

SMDATA

SMCLK

VPD_DATA

VDD

VPD_CLK

SPI_CLK

SPI_CS

SPI_DI

SPI_DO

VDD
C561 .1U_4 LAN_RXP1 TD- CMT
7 LAN_PCIE_RXP1 49 TX_P AVDDL 32
6 10 RJ45_MX0+
C562 .1U_4 LAN_RXN1 CT TX+
7 LAN_PCIE_RXN1 50 TX_N MDIN[3] 31
R404 R393
51 30 C477 C476 75/F_4 75/F_4
AVDDL MDIP[3] .1U_4 .01U_4
52 AVDDL TSTPT 29

53 28

RJ45_TER
7 LAN_PCIE_TXN1 RX_N AVDDL

7 LAN_PCIE_TXP1 54 RX_P MDIN[2] 27 LAN CHIP LAYOUT GUIDE:

A minimum of 9 vias are required to stitch Edison-01/05--Delete CN8
55 26
5 CLK_PCIE_LAN REFCLKP MDIP[2] the ground island to the PCB's GND layer
56 25 and the via grid should be 1-2mm and the RINGL
5 CLK_PCIE_LAN# REFCLKN HSDACN
drill size should be 0.3mm. These vias
57 24 CN21 C678
AVDDL HSDACP should be distributed equally. MDC 470PF/3KV_C
58 VDD AVDD 23 2 CN20
LED_ACT# 59

60
LED_LNK/ACTn Yukon 88E8038 AVDDL 22

21 MDI1-
1 C677
470PF/3KV_C 15
RJ-45&RJ-11
RING
LED_LINK10/100n MDIN[1] TIPL 14 TIP
C 61 20 MDI1+ C
VDDO_TTL MDIP[1] LED_LINK# 9 LED_GREEN
62 LED_LINK1000n AVDDL 19
R405 220_4 10
+3V_S5 LED_P_A1

VDDO_TTL_MAIN
LED_LINK# 63 18 MDI0-

LOM_DISABLEn
LED_LINKn MDIN[0]

SWITCH_VAUX
11

SWITCH_VCC

VAUX_AVLBL
MDI0+ LED_ORANGE
64 17
VDDO_TTL

VDD25 MDIP[0] R384 220_4

+3V_S5 12 LED_YELLOW
PERSTn
CTRL12

CTRL25

WAKEn

XTALO

XTALI

RSET
LED_ACT# 13
VDD

VDD

VDD
LED_P_A2
R380 R379 R378 R377
49.9/F_4 49.9/F_4 49.9/F_4 49.9/F_4 RJ45_MX0+ 1
1

10

11

12

13

14

15

16
88E8038 TX+/0+
RJ45_MX0- 2
+3V_S5 TX-/0-

LAN_XOUT
RJ45_MX1+

LAN_XIN
3 RX+/1+
LAN_RSET C481 C482 C480 C479 RJ45_MX2- 4 16
.1U_4 1000P_4 .1U_4 1000P_4 R391 *75/F_4 NC1/2+ GND
5 NC2/2- GND 17
R381
R376 *1M_6 RJ45_TER RJ45_MX1-
TRACE <1" CTRL_12
2K/F_4 6 RX-/1-
Near LAN chipset RJ45_MX3-
R370
WIDTH > 25MILS CTRL_25 Y5 R385 *75/F_4
7 NC/3+ C647 R294
*10K_4 1 2 25MHZ_LAN 8 1M_6
NC4/3-

R372 *0_4 R369 0_4 LAN_PERST# C579 C586

12,22,24 PME# 28 LANRST#
22P_4 22P_4
LAN_PME# R371 0_4 LAN_PME_WAKE# +3V_S5
B 28 LAN_PME# B
1000P/3KV_4520

+3V_S5
C569 C486 C488 C487 C572 C567
LOM_DISABLE# R373 4.7K/F_4 10U_8 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4

C576
*.1U_4
+2.5V_LAN
LOM_DISABLE# COME FROM EC GPIO.
IT DELAY 250mS WHEN 3VLAN AVAILABLE.
C485 C583 C564 C484 C483 C585 C584 C565 C563 C568
.1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4
+3V_S5

L44 BK1608HS220 AVDD33_LAN

+1.2V_LAN
C551 C550 C504 R367 C500 C498 C559 R300
22U/6.3V_8 4.7U_8 .1U_4 4.7K/F_4 22U/6.3V_8 4.7U_8 .1U_4 4.7K/F_4

Q23 +1.2V_LAN Q17 +2.5V_LAN

3

BCP69T1 BCP69T1 C577 C573 C582 C574 C570 C566 C571 C578
.1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4
E

A CTRL_12 1 CTRL_25 1 A
B B
C 4 C 4
C

TRACE <1" TRACE <1"

30MILS 30MILS
2

WIDTH > 25MILS WIDTH > 25MILS

C549 C560 C505 C497

4.7U_8 .1U_4 4.7U_8 .1U_4 PROJECT : ZB3

LAN Size

Date:
Document Number
Quanta Computer Inc.
LAN RTL8110SBL/8100CL
Monday, April 03, 2006 Sheet 23 of 37
Rev
1A

5 4 3 2 1
 8 7 6 5 4 3 2 1

ID Select : AD17
A_VCC
Interrupt Pin : INTE#/INTG#(share)/INTH#
Request Indicate : REQ3# CARDBUS SLOT
ZB1 Near Slot
Grant Indicate : GNT3# C604 C609
CN19 .1U_4 .1U_4

U10B PCI7412
1 GND1 SKTA/VCC1 17 A_VCC
C10 A_CAD31 A_CAD0 2 51
CAD31 A_CAD30 A_CAD1 SKTAAD0/D3 SKTA/VCC2
D CAD30 A10 3 SKTAAD1/D4 D
F11 A_CAD29 A_CAD3 4 18
CAD29 SKTAD3/D5 SKTA/VPP1 A_VPP
E11 A_CAD28 A_CAD5 5 52
CAD28 A_CAD27 A_CAD7 SKTAD5/D6 SKTA/VPP2
CAD27 C11 6 SKTAAD7/D7
B13 A_CAD26 A_CC/BE0# 7
CAD26 A_CAD25 A_CAD9 -SKTACBE0/CE1#
U10A CAD25 C13 8 SKTAAD9/A10
A14 A_CAD24 A_CAD11 9 C608 C603
GNT3# CAD24 A_CAD23 A_CAD12 SKTABAD11/OE# .1U_4 .1U_4
11 GNT3# L2 GNT# XI R19 CAD23 B14 10 SKTAAD12/A11 GND5 69
REQ3# L3 R18 B15 A_CAD22 A_CAD14 11 70
11 REQ3# REQ# XO CAD22 SKTAAD14/A9 GND6
AD17 R188 100/F_6 IDSEL N5 E14 A_CAD21 A_CC/BE1# 12 71
FRAME# IDSEL CAD21 A_CAD20 A_CPAR -SKTACBE1/A8 GND7
11,22 FRAME# R6 FRAME# R0 T18 CAD20 A16 13 SKTAPAR/A13 GND8 72
IRDY# V5 T19 D19 A_CAD19 A_CPERR# 14
11,22 IRDY# IRDY# R1 CAD19 -SKTAPERR/A14
DEVSEL# U6 R12 E17 A_CAD18 A_CGNT# 15
11,22 DEVSEL# DEVSEL# CPS CAD18 -SKTAGNT/WE#
TRDY# W5 P12 F15 A_CAD17 A_CINT# 16
11,22 TRDY# TRDY# TEST0 CAD17 -SKTAINT/RDY
SERR# W6 R17 H19 A_CAD16
11,22 SERR# SERR# VSSPLL CAD16

1394 Interface
STOP# V6 J17 A_CAD15 UPPER PIN
11,22 STOP# STOP# CAD15
PERR# R7 V14 J15 A_CAD14 A_CCLK1 19
11,22 PERR# PERR# TPA0P CAD14 SKTAPCLK/A16
PAR U7 W14 J18 A_CAD13 A_CIRDY# 20
11,22 PAR PAR TPA0N CAD13 -SKTAIRDY/A15
R13 K15 A_CAD12 A_CC/BE2# 21
TPBIAS0 CAD12 A_CAD11 A_CAD18 -SKTACBE2/A12
11,22 CBE3# P2 CBE3 TPB0P V13 CAD11 K17 22 SKTAAD18/A7
U5 W13 K18 A_CAD10 A_CAD20 23
11,22 CBE2# CBE2 TPB0N CAD10 SKTAAD20/A6
V7 L15 A_CAD9 A_CAD21 24
11,22 CBE1# CBE1 CAD09 SKTAAD21/A5
W10 V16 L18 A_CAD8 A_CAD22 25
11,22 CBE0# CBE0 TPA1P CAD08 SKTAAD22/A4
W16 L19 A_CAD7 A_CAD23 26
PCLK_PCM TPA1N CAD07 A_CAD6 A_CAD24 SKTAAD23/A3
L1 W17 M17 27

CardBus Interface
11,14 PCLK_PCM PCLK TPBIAS1 CAD06 SKTAAD24/A2
V15 M18 A_CAD5 A_CAD25 28
PCIRST# TPB1P CAD05 A_CAD4 A_CAD26 SKTAAD25/A1
11,22,28 PCIRST# K3 PRST# TPB1N W15 CAD04 N19 29 SKTAAD26/A0
GRST#_7412 K5 M15 A_CAD3 A_CAD27 30
GRST# +3V CAD03 SKTAAD27/D0
11,14,22 AD[0..31]
AD[0..31] PCI Interface VDDPLL15 P15 CAD02 N17 A_CAD2 A_CAD29 31 SKTAAD29/D1
AD0 R11 P17 N18 A_CAD1 A_CRSVD/D2 32
AD1 AD00 PHY_TEST_MA CAD01 A_CAD0 A_CCLKRUN# SKTARSVD/D2
P11 AD01 CAD00 P19 33 -SKTACLKRUN/WP
AD2 U11 U12 +3V 34
C AD02 PC0_RSVD GND2 C
AD3 V11 V12 R461 E13 A_CC/BE3#
AD4 AD03 PC1_RSVD 10K_4 CCBE3 A_CC/BE2#
W11 AD04 PC2_RSVD W12 CCBE2 E18 35 GND3
+3V AD5 R10 H18 A_CC/BE1# A_CCD1# 36
AD6 AD05 D2 *SW1010C CCBE1 A_CC/BE0# A_CAD2 -SKTACD1/CD1#
U10 AD06 AGND_00 U13 CCBE0 L17 37 SKTAAD2/D11

2
AD7 V10 U14 2 1 A_CAD4 38
AD07 AGND_01 SUS_STAT# 6,12 SKTAD4/D12
AD8 R9 R14 Q30 B10 A_CRSVD/D2 A_CAD6 39
AD9 AD08 AGND_02 R191 *0_4 DTC144EUA RSVD_04/D2 A_CCD1# A_RSVD/D14 SKTAAD6/D13
U9 AD09 RI# 12 CCD1#/CD1# N15 40 SKTARSVD/D14
R187 AD10 V9 J5 B11 A_CCD2# A_CAD8 41
22K_6 AD11 AD10 SUSPEND# R192 0_4 CCD2#/CD2# A_CAD10 SKTAAD8/D15
W9 AD11 RI_OUT# L5 1 3 PME# 12,22,23 42 SKTAAD10/CE2#
AD12 V8 H3 PCMSPK A13 A_CVS1# A_CVS1# 43
AD12 SPKROUT PCMSPK 26 CVS1/VS1# -SKTAVS1/VS1#
AD13 U8 C15 A_CRST# A_CAD13 44
AD14 AD13 CRST# A_CBLOCK# A_CAD15 SKTAAD13/IORD#
R8 AD14 VR_EN# K2 CBLOCK# H15 45 SKTAAD15/IOWR#
GRST#_7412 R466 *0_4 PCIRST# AD15 W7 E10 C14 A_CREQ# A_CAD16 46
AD15 USB_EN CREQ#/INPACK# SKTAAD16/A17
Miscellaneous

AD16 W4 C12 A_CSERR# A_CRSVD/A18 47

AD17 AD16 SCL_CARD CSERR#/WAIT# A_CDEVSEL# A_CBLOCK# -SKTRSVD/A18
T2 AD17 SCL G2 CDEVSEL# F19 48 -SKTALOCK/A19
C258 AD18 T1 G3 SDA_CARD E19 A_CFRAME# A_CSTOP# 49
AD19 AD18 SDA CFRAME# A_CGNT# A_CDEVSEL# -SKTASTOP/A20
R3 AD19 CGRANT# G17 50 -SKTADEVSEL/A21
.1U_4 AD20 P5 G1 INTE# E12 A_CINT#
AD20 MFUNC0 INTE# 11 CINT#
AD21 R2 H5 R193 0_4 B16 A_CVS2# LOWER PIN
AD21 MFUNC1 INTG# 11,22 CVS2/VS2#
AD22 R1 H2 INTH# G19 A_CPERR# A_CTRDY# 53
AD22 MFUNC2 INTH# 11 CPERR# -SKTATRDY/A22
AD23 P3 H1 SERIRQ G18 A_CSTOP# A_CFRAME# 54
AD23 MFUNC3 SERIRQ 11,22,28 CSTOP# -SKTAFRAME/A23
AD24 N3 J1 3VSP R190 4.7K/F_4 F17 A_CIRDY# A_CAD17 55
AD24 MFUNC4 +3V CIRDY SKTAAD17/A24
AD25 N2 J2 T40 G15 A_CTRDY# A_CAD19 56
AD26 AD25 MFUNC5 CLKRUN# CTRDY# A_CVS2# SKTAAD19/A25
Near Chipset N1 AD26 MFUNC6 J3 CLKRUN# 11,22,28 57 -SKTAVS2VS2#
AD27 M5 H17 A_CRSVD/A18 A_CRST# 58
PCLK_PCM AD28 AD27 TPS_LATCH RSVD_02/A18 A_RSVD/D14 A_CSERR# -SKTARST/RESET
M6 AD28 LATCH/VD3/VPPD0 C9 RSVD_01/D14 M19 59 0SKTASERR/WAIT#
AD29 M3 A9 TPS_CLOCK A_CREQ# 60
AD30 AD29 CLOCK/VD1/VCCD0# TPS_DATA A_CCLKRUN# A_CC/BE3# -SKTAREQ/INPACK#
M2 AD30 DATA/VD2/VPPD1 B9 CCLKRUN# A11 61 -SKTACBE3/REG#
AD31 M1 C4 R463 10K_4 H14 A_CPAR A_CAUDIO 62
AD31 RSVD_03/VD0/VCCD1#/PS_MODE +3V CPAR SKTAAUDIO/BVD2
R470 A15 A_CSTSCHG 63
VCCCA_01 A_VCC -SKTASTSCHG/BVD1
B *22_4 PCI7412 PCMSPK SERIRQ J19 A_CAD28 64 B
VCCCA_00 A_CSTSCHG A_CAD30 SKTAAD28/D8
CSTSCHG A12 65 SKTAAD30/D9
B12 A_CAUDIO A_CAD31 66
+3V C256 CAUDIO A_CCLK A_CCLK1 A_CCD2# SKTAAD31/D10
CCLK F18 67 -SKTACD2/CD2#
C698
+3V Plane Near Chipset R177 *10P_4
R424
68 GND4
10K_4
*10P_4 47_4

C671 C686 C685 C457 C697 C681 C682 C692 C683 C691 CARD_BUS
10U_8 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4

U10D
Cardbus EEPROM Cardbus power switch A_VCC +5V
Near TPS2210A Near TPS2210A
C257 .1U_4 J6 +3V
VCC33_00
K1 1.5V_00 VCC33_01 L6
K19 1.5V_01 VCC33_02 P6
+3V U19 P8 C446 C449
VDDPLL33 VCC33_03 +5V +5V .1U_4 10U_8 C475 C474
VCC33_04 P10
L14 U11 TPS2220APWP 10U_8 .1U_4
Power/GND

VCC33_05 +3V
H6 GND_00 VCC33_06 J14
K6 F14 C210 .1U_4 1 24
GND_01 VCC33_07 5V_0 5V_2
N6 GND_02 VCC33_08 F12 2 5V_1 NC_3 23
P7 F9 TPS_DATA 3 22
GND_03 VCC33_09 TPS_CLOCK DATA NC_2 A_VPP +3V
P9 GND_04 VCC33_10 F6 4 CLOCK SHDN# 21
M14 R164 R175 2K bit TPS_LATCH 5 20 Near TPS2210A Near TPS2210A
GND_05 U6 LATCH 12V_1
K14 GND_06 AVDD33_00 P13 +3V 6 NC_0 BVPP/BVCORE 19
G14 P14 2.2K_4 2.2K_4 8 1 T48 7 18
GND_07 AVDD33_01 VCC A0 12V_0 BVCC1
F13 GND_08 AVDD33_02 U15 7 NC A1 2 A_VPP 8 AVPP/AVCORE BVCC0 17
A F10 SCL_CARD 6 3 9 16 C469 C468 C461 C458 A
GND_09 SCL A3 A_VCC AVCC0 NC_1
F7 P1 +3V SDA_CARD 5 4 10 15 .1U_4 10U_8 10U_8 .1U_4
GND_10 VCCP_00 SDA GND AVCC1 OC#
VCCP_01 W8 11 GND 3.3VIN0 14 +3V
R167 R185

NC
5,6,11,15,21 ALINK_RST# 12 RESET# 3.3VIN1 13
PCI7412 24LC02BT
*220_4 *220_4

25
PROJECT : ZB3

CARD Bus Size

Date:
Document Number
Quanta Computer Inc.
PCI7412-PCMCIA CONTROLLE
Monday, April 03, 2006 Sheet 24 of 37
Rev
1A

8 7 6 5 4 3 2 1
 A B C D E

Reserve for XD identification (Arec-11/23)

+5V +3V
DO NOT INSERT SD/MMC, MEMORYSTICK AND XD SIMULTANEOUSLY.
4 4
U10C R456 R454

F2 *0_4 0_4 VCC_FM

SC_OC# CN5 VCC_FM
SC_PWR_CTRL G5
G6 SC_VCC VCC_FM P10
SC_VCC5 SM_ALE MS_SDIO(DAT0)/SD_DAT0/SM_D0 SD-VCC
SD_CMD/SM_ALE/SC_GPIO2 C5 P3 SD-DAT0 XD-VCC 18
A4 SM_RE# R199 100K_4 MS_DAT1/SD_DAT1/SM_D1 P2
SD_CLK/SM_RE#/SC_GPIO1 SM_CLE MS_DAT2/SD_DAT2/SM_D2 SD-DAT1 XD_CD#
SM_CLE/SC_GPIO0 B4 P20 SD-DAT2 XD-CD 1
D1 MS_DAT3/SD_DAT3/SM_D3 P18 2 SM_R/B#
SM_R/B#/SC_RFU SM_PHYS_WP#/SC_FCB T42 MS_CLK/SD_CLK/SM_EL_WP# SD-DAT3 XD-R/B SM_RE#
SM_PHYS_WP#/SC_FCB E3 Reserve for cost down (Arec-11/22) P7 SD-CLK XD-RE 3
E2 MS_BS/SD_CMD/SM_WE# P15 4 SD_WP/SM_CE#
SC_CLK R189 *0_4 +3V SD_CD# SD-CMD XD-CE SM_CLE
FlashMedia Interface

SC_RST F5 P21 SD-CD XD-CLE 5

SC_DATA E1 48MCLK 5 Y2 48MHz Clock SD_WP/SM_CE# P1 SD-WP XD-ALE 6 SM_ALE
P22 7 MS_BS/SD_CMD/SM_WE#
CLK48M SD-WP/SDIO GND XD-WE MS_CLK/SD_CLK/SM_EL_WP#
CLK_48 F1 3 OUT VDD 4 P23 SD-CD/SDIO GND XD-WP-IN 8
P4 SD-GND XD-GND 9
F3 2 1 C689 VCC_FM P12 10 MS_SDIO(DAT0)/SD_DAT0/SM_D0
SC_CD# SD_CD# GND OE SD-GND XD-D0 MS_DAT1/SD_DAT1/SM_D1
SD_CD# E9 XD-D1 11
A8 MS_CD# 48MHZ_OSC .01U_4 P17 12 MS_DAT2/SD_DAT2/SM_D2
MS_CD# MS_SDIO(DAT0)/SD_DAT0/SM_D0 MS-VCC XD-D2 MS_DAT3/SD_DAT3/SM_D3
SM_CD# B8 P9 MS-DATA0 XD-D3 13
MS_DAT1/SD_DAT1/SM_D1 P8 14 SM_D4
XD_CD# VCC_FM MS_DAT2/SD_DAT2/SM_D2 MS-DATA1 XD-D4 SM_D5
XD_CD#/SM_PHYS_WP# A3 P11 MS-DATA2 XD-D5 15
MS_DAT3/SD_DAT3/SM_D3 P14 16 SM_D6
MC_PWR_CTRL_0# MS_CLK/SD_CLK/SM_EL_WP# MS-DATA3 XD-D6 SM_D7
MC_PWR_CTRL_0 C8 P16 MS-SCLK XD-D7 17

GND_PAD
F8 SM_R/B# R198 10K_4 MS_CD# P13
MC_PWR_CTRL_1/SM_R/B# MS_BS/SD_CMD/SM_WE# R201 100K_4 MS_BS/SD_CMD/SM_WE# MS-INS
MS_BS/SD_CMD/SM_WE# E8 P6 MS-BS XD-GND 19
A7 R207 47_6 MS_CLK/SD_CLK/SM_EL_WP# P19
MS_CLK/SD_CLK/SM_EL_WP# MS-GND
P5 MS-GND
3 B7 MS_SDIO(DAT0)/SD_DAT0/SM_D0 3
MS_SDIO(DATA0)/SD_DATA0/SM_D0 MS_DAT1/SD_DAT1/SM_D1 CARD_READER_TTN
C7

P24
MS_DATA1/SD_DATA1_SM_D1 MS_DAT2/SD_DAT2/SM_D2
MS_DATA2/SD_DATA2_SM_D2 A6
B6 MS_DAT3/SD_DAT3/SM_D3
MS_DATA3/SD_DATA3_SM_D3
E7 SD_WP/SM_CE# R200 100K_4
SD_WP/SM_CE#
C6 SM_D4
SD_DAT0/SM_D4/SC_GPIO6 SM_D5
A5
SD_DAT1/SM_D5/SC_GPIO5
SD_DAT2/SM_D6/SC_GPIO4
SD_DAT3/SM_D7/SC_GPIO3
B5
E6
SM_D6
SM_D7 5 IN1 CARD READER
PCI7412

VCC_FM VCC_FM
CN6
6 SD-VCC XD-VCC 43
MS_SDIO(DAT0)/SD_DAT0/SM_D0 9 42
MS_DAT1/SD_DAT1/SM_D1 SD-DAT0 XD-VCC XD_CD#
10 SD-DAT1 XD-CD 25
MS_DAT2/SD_DAT2/SM_D2 2 26 SM_R/B#
VCC_FM MS_DAT3/SD_DAT3/SM_D3 SD-DAT2 XD-R/B SM_RE#
3 SD-DAT3 XD-RE 27
VCC_FM CLOSE CONN MS_CLK/SD_CLK/SM_EL_WP# 7 28 SD_WP/SM_CE#
MS_BS/SD_CMD/SM_WE# SD-CLK XD-CE SM_CLE
4 SD-CMD XD-CLE 29
SD_CD# 1 30 SM_ALE
SD_WP/SM_CE# SD-CD XD-ALE MS_BS/SD_CMD/SM_WE#
11 SD-WP XD-WE 31
2 R505 VCC_FM MS_CLK/SD_CLK/SM_EL_WP# 2
XD-WP-IN 32
C720 C718 C163 C171 C733 13 33
.1U_4 .1U_4 .1U_4 .1U_4 2.2U_6 150K_6 MS_SDIO(DAT0)/SD_DAT0/SM_D0 18 MS-VCC XD-GND MS_SDIO(DAT0)/SD_DAT0/SM_D0
MS-DATA0 XD-D0 34
MS_DAT1/SD_DAT1/SM_D1 19 35 MS_DAT1/SD_DAT1/SM_D1
MS_DAT2/SD_DAT2/SM_D2 MS-DATA1 XD-D1 MS_DAT2/SD_DAT2/SM_D2
17 MS-DATA2 XD-D2 36
MS_DAT3/SD_DAT3/SM_D3 15 37 MS_DAT3/SD_DAT3/SM_D3
MS_CLK/SD_CLK/SM_EL_WP# MS-DATA3 XD-D3 SM_D4
14 MS-SCLK XD-D4 38
MS_CD# 16 39 SM_D5
MS_BS/SD_CMD/SM_WE# MS-INS XD-D5 SM_D6
20 MS-BS XD-D6 40
+3V 41 SM_D7
XD-D7
5 SD-GND
8 SD-GND
12 MS-GND GND 24
21 MS-GND GND 22
44 SDIO GND GND 23
C251 U31 TPS2061DGNR
2 VCC_FM *CARD_READER_PRO
.1U_4 IN1 OUT3 8
3 IN2 OUT2 7
R179 OUT1 6 C716
4 EN#
1 GND
10K_4 9 5 10U_8
MC_PWR_CTRL_0# GND-C OC#

1 1

PROJECT : ZB2
Quanta Computer Inc.
Size Document Number Rev
00
PCI7412-CARD READER
Date: Monday, April 03, 2006 Sheet 25 of 37
A B C D E
 1 2 3 4 5 6 7 8

ADO MDC CN1

MODEM
MODEM +3V_S5

1 2 C808
GND RSV .1U_4
12 CD_SDOUTA_MDC 3 AC_SDO RSV 4
VREFOUT 5 6
VDDA GND 3.3V
12 CD_SYNC_MDC 7 AC_SYNC GND 8
A AC97_VREF R599 22_4 9 10 A
12 CD_SDIN0 AC_SDI GND
12 CD_RESET#_MDC 11 AC_RST# AC_BCLK 12 CD_BITCLKA_MDC 12
R79 10K_4 13 14
VDDA GND GND
15 GND GND 16

1
27 AOUTL 17 GND GND 18
C74 C807
27 AOUTR
10U_8 *10P_4

2
36

35

34

33

32

31

30

29

28

27

26

25
AUDGND AUDGND Edison --0111 delete resistor R598

Sense B

VREF
FRONT-L
FRONT-R

DCVOL

LINE2-VREFO

MIC2-VREFO
MIC1-VREFO-R

LINE1-VREFO-L

MIC1-VREFO-L

AVSS1

AVDD1
VREFOUT

37 24 LINEINR_AMP R70
LINE1-VREFO-R LINE1-R 4.7K/F_4
LINEINL_AMP L10
LINE IN
VDDA 38 AVDD2 LINE1-L 23
BK1608LL121_6 C50
39 22 MIC C49 1U_4 MIC1 MIC_R 1U_4
SURR-L MIC1-R LINEINL_AMP LINEINL_R R28 0_6 LINEINL
R98 20K/F_4 40 21 C48 1U_4
JDREF/NC MIC1-L C56 LINEINR_AMP C51 LINEINR_R R45 0_6 LINEINR
AUDGND
41 20 CD_R C47 .1U_4 47P_4

42
SURR-R
ALC883(ALC260) CD-R
19 CD_GND C46 .1U_4
AUDGND
1U_4
L7 L8
AVSS2 CD-GND AUDGND
AUDGND R43 R27 *BK1608LL121_6 *BK1608LL121_6
R97 *0_4 43 18 CD_L C45 .1U_4 AUDGND *0_4 *0_4
B
27 CODAC_MUTE# SURR-VREFO-L(GPIO0) CD-L B
44 17 MIC2_R C44 .1U_4 AUDGND
SURR-VREFO-R(GPIO1) MIC2-R C30 C33
+3V 45 16 MIC2_L C43 .1U_4 *1500P_4 *1500P_4
MIC2-VREFO-R MIC2-L AUDGND
AUDGND AUDGND
46 15 LINE2_R C42 .1U_4 AUDGND
LINE2-VREFO-R LINE2-R AUDGND AUDGND
R96 47 14 LINE2_L C41 .1U_4 AUDGND
SPDIFI/EAPD LINE2-L
GPIO0 (GPIO2)

GPIO1 (GPIO3)

*10K_4
SPDIF_OUT
SDATA-OUT

48 SPDIFO Sense A 13
SDATA-IN

PCBEEP
RESET#
+5V
BIT-CLK

ZB1
DVDD1

DVDD2
DVSS1

DVSS2

SYNC

L1 C8
BK2125HS330_8 .1U_4
U2 +5V_TP Mirror connector
ALC883
1

10

11

12

C64 .1U_4 BEEP R8 R16 20

R82 0_4 10K_4 10K_4 20
19 19
AZ_RESET# 12 +3V 18 18
+3V 17
AZ_SYNCA 12 17
R69 33_4 AZ_SDIN1 L3 LZA10-2ACB104MT_6 TP_DATA 16
AZ_SDIN1 12 28 TBDATA 16
+3V TP_CLK 15
+3V AC_BITCLKA R77 10_4 AZ_BITCLKA 28 TBCLK L6 15
AZ_BITCLKA 12 14 14
LZA10-2ACB104MT_6 SPDIF_O 13
AZ_SDOUTA 12 13
C10 C16 12
C
12 C
11 11
C85 *.1U_4 10
C77 C65 C102 C109 10P_4 10
9 9
.1U_4 .1U_4 .01U_4 10U_8 *.1U_4 AUDGND 8
SPKL 8
27 SPKL 7 7
SPKR 6
27 SPKR 6
LINEINL 5
CN2 LINEINR 5
4 4
MIC_R 3
INT_MIC 3
1 2 2
2 1 1

HPPLG#
INT_MIC T/P&AUDIO_20PIN
C11 +5V CN3
BEEP 22P_4
Audio Power Q1 R61 2.2K_4

1
2N7002E

2
RESERVE BYPASS PATH (ZB2) AUDGND AUDGND Q2 Edison 0109-- Delete
+3V 2N7002E
VDDA L9 +5V R111 *0_4 PC_BEEP-1 Edison -- Fbe/21_Change CN2 2 3 1
*TI321611U330_1206
U4 connector That Footprint and
TC7SH86FU P/N.
5

U36 +3V 1 same with CN21. HPS

PCMSPK 24 HPS 27

3
VDDA 4 3 4 SPDIF_OUT
OUT IN
2 PCSPK 12
D 2 D
3

GND
5

C60 C113 C61 C114 R104 2.2K_4 1

10U_8 .1U_4 1000P_4 .1U_4 R553 5 1 BEEP PCBEEP 4
SET SHDN
2 SYSSPKOFF# 28 PROJECT : ZB3
1

28.7K/F_6 MAX8863 C39 C36

3

C128 R107 U3
R550 10U_8 .1U_4 .1U_4 2.2K_4 TC7SH08FU
Quanta Computer Inc.
2

AUDGND 10K/F_4

Size Document Number Rev

AUDGND
AUDGND CODEC & LINE IN & MIC 1A

Date: Monday, April 03, 2006 Sheet 26 of 37

1 2 3 4 5 6 7 8
 5 4 3 2 1

AVDD +5V

AVDD AVDD R581 0_8

R580 0_8

C781 C780 C792 C794

10U_8 .1U_4 10U_8 .1U_4
D D

C783 C795 AUDGND

.1U_4 C800 .1U_4
R585
AUDGND 1U_4 1K_6
AUDGND AUDGND

R582 U39

25

15

10
8

7
*100K_6
R579 0_4 AOUTL_R C789 1U_4 2 20 HPS HPS 26

C1P
VDD

HPVDD

C1N
CPVDD
26 AOUTL INL HPS
R576 0_4 AOUTR_R C785 1U_4 28 14 SPKL
26 AOUTR INR HPL SPKL 26
R572 1 13 SPKR
NC HPR SPKR 26
*100K_6
27 4 INSPKL+
+5V AVDD NC OUTL+ INSPKL-
OUTL- 5
AUDGND 17 INSPKR-
GAIN1 OUTR- INSPKR+
24 GAIN_SEL OUTR+ 18
C782 .1U_4 AVDD
U37 R573 23 6
C
5
*10K_4 GND PVDDL C
28 AMP_MUTE# 1 PGNDL 3
MUTE

CPGND
4 22 16

CPVSS
/SHDN PVDDR
2 19

GND
GND
26 CODAC_MUTE#

VSS
PGNDR
21
3

TC7SH08FU VBIAS
R567 C787 MAX9755AETI C793 C796 C797 C798

29
26

11
12
10K_4 10U_8 .1U_4 10U_8
1U_4
.1U_4

AUDGND
AUDIO DJ
AVDD AUDGND AUDGND C799 Edison 01/03 delete
1U_4

R574
1K_4
AUDGND
GAIN1

R575 R30 0_6

*1K_4
B R551 0_6 AUDGND B

AUDGND R10 0_6 C588 C589

47P_4 47P_4 SPEAKER CON.
AUDGND R4 0_6 CN9 R_L_SPEAKERS
INSPKR+ L58 BK1608LL121_6 INSPKR+N
R37 0_6 INSPKR- L59 BK1608LL121_6 INSPKR-N 4 R382 0_6
GAIN1 SPKR HP C28 .01U_4 INSPKL+ L60 BK1608LL121_6 INSPKL+N 36 R383 0_6
R78 0_6 INSPKL- L61 BK1608LL121_6 INSPKL-N 25 C592 .1U_4
MODE MODE 1
C7 .01U_4 C593 1000P_4
R5 0_6
0 10.5 3 AUDGND C591 C590
AUDGND 47P_4 47P_4 AUDGND

1 9 0 AUDGND AUDGND

A A

PROJECT : ZB3

AMP Size

Date:
Document Number
Quanta Computer Inc.
AUDIO AMP
Monday, April 03, 2006 Sheet 27 of 37
Rev
1A

5 4 3 2 1
 5 4 3 2 1

+3VPCU +3VPCU

+5V ENV1 R315 10K_4

C512 C519 C521 C522 C526

C812 +3VPCU VCCRTC BADDR0 R316 *10K_4 I/O Address
10U_8 .1U_4 .1U_4 .1U_4 .1U_4 R314
.1U_4
C513 C518 BADDR1 R317 *10K_4 BADDR1-0 Index Data
C511 0_6
For EMI request .1U_4 .1U_4 .1U_4
BT_POWERON# R326 *10K_4 0 0 2E 2F
+3V
C529 *10P_4 R342 *22_4 PCLK_591 C527 SHBM R318 10K_4 0 1 4E 4F

123
136
157
166

161
.1U_4

16

34
45

95
D D
U16 SHBM=1: Enable shared memory with host BIOS (HCFGBAH, (HCFGBAH,
1 0

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VDD

AVCC

VBAT
HCFGBAL) HCFGBAL)+1

1 1 Reserved
+3VPCU SERIRQ 7 81 TEMP_MBAT
11,22,24 SERIRQ SERIRQ AD0 TEMP_MBAT 35
8 82 T57
LFRAME#/FWH4 LDRQ AD1 T56
11,14 LFRAME#/FWH4 9 LFRAME AD2 83
R346 LAD0/FWH0 15 84 T55
11 LAD0/FWH0 LAD0 Host interface AD3
LAD1/FWH1 14 87 WIRELESS_SW#
11 LAD1/FWH1 LAD1 IOPE0AD4 WIRELESS_SW# 29
470K_4 LAD2/FWH2 13 88 BLUETOOTH_SW#
11 LAD2/FWH2 LAD2 IOPE1/AD5 BLUETOOTH_SW# 29
LAD3/FWH3 10 89 SUSC#
11 LAD3/FWH3 LAD3 AD Input IOPE2/AD6 SUSC# 12
D14 PCLK_591 18 90 SUSB#
11,14 PCLK_591 LCLK IOPE3/AD7 SUSB# 12
2 1 19 93 +3V
1SS355 LREST DP/AD8
12 KBSMI# 2 1 1SS355 22 SMI DN/AD9 94
D19 2 1 23
12 SWI# PWUREQ
D18 *MTW355 99 CC-SET WIRELESS_SW# R320 4.7K/F_4
DA0 CC-SET 35
D17 100 CV-SET
DA1 CV-SET 35
2 11SS355 31 DA output 101 CONTRAST BLUETOOTH_SW# R319 4.7K/F_4
12 SCI# IOPD3/ECSCI DA2 CONTRAST 20 +3VPCU
102 VFAN
DA3 VFAN 29
D16 1SS355
GATEA20 2 1 5 32 8724CELLS 35
12 GATEA20 GA20/IOPB5 IOPA0/PWM0
6 KBRST/IOPB6 IOPA1/PWM1 33 NB_PWRGD 6,8
RCIN# 2 1 36 SYSSPKOFF# 26
12 RCIN# PWM IOPA2/PWM2
D15 1SS355 37 R335 R334
or PORTA IOPA3/PWM3 AMP_MUTE# 27
MX0 71 38 HWPG_591 4.7K/F_4 4.7K/F_4
29 MX0 KBSIN0 IOPA4/PWM4
MX1 72 39 +3VPCU
29 MX1 KBSIN1 IOPA5/PWM5
MX2 73 40 Edison --01/05 Add CRT DETECT Function.
29 MX2 KBSIN2 IOPA6/PWM6
MX3 74 43
29 MX3 KBSIN3 IOPA7/PWM7 U18
MX4 77
29 MX4 KBSIN4
MX5 78 153 DETECT_CRT MBCLK 6 1
29 MX5 KBSIN5 IOPB0/URXD DETECT_CRT 20 SCL A0
MX6 79 154 TX_551 MBDATA 5 2
29 MX6 KBSIN6 Key matrix scan IOPB1/UTXD T58 SDA A1
MX7 80 162 LID591# 3
29 MX7 KBSIN7 IOPB2/USCLK LID591# 20 A2
163 MBCLK
PORTB IOPB3/SCL1 MBCLK 15,35
C MY0 49 164 MBDATA 7 8 C
29 MY0 KBSOUT0 IOPB4/SDA1 MBDATA 15,35 WP VCC
MY1 50 165 PCIRST# 4 U14
29 MY1 KBSOUT1 IOPB7/RING/PFAIL PCIRST# 11,22,24 GND
MY2 51 AMD-29LV081B/SST39VF080
29 MY2 KBSOUT2
MY3 52 168 591_PME# M24LC08
29 MY3 KBSOUT3 IOPC0
MY4 53 169 MBCLK_CPU ENV0 21 25 D0
29 MY4 KBSOUT4 IOPC1/SCL2 MBCLK_CPU 3 A0 D0 +3VPCU
MY5 56 170 MBDATA_CPU D8 ENV1 20 26 D1
29 MY5 KBSOUT5 IOPC2/SDA2 MBDATA_CPU 3 A1 D1
MY6 57 171 1 2 BADDR0 19 27 D2
29 MY6 KBSOUT6 PORTC IOPC3/TA1 DNBSWON# 12 A2 D2
MY7 58 172 FANSIG BADDR1 18 28 D3
29 MY7 KBSOUT7 IOPC4/TB1/EXWINT22 FANSIG 29 A3 D3
MY8 59 175 EC_FPBACK# 1SS355 TRIS 17 32 D4 R301
29 MY8 KBSOUT8 IOPC5/TA2 EC_FPBACK# 20 +3VPCU A4 D4
MY9 60 176 SHBM 16 33 D5 10K_4
29 MY9 KBSOUT9 IOPC6/TB2/EXWINT23 CPU_PROCHOT# 3,12,31 A5 D5
MY10 61 1 PWROK_1 R343 0_6 A6 15 34 D6
29 MY10 KBSOUT10 IOPC7/CLKOUT EC_PWRGD 3,8,12 A6 D6
MY11 64 A7 14 35 D7
29 MY11 KBSOUT11 A7 D7
MY12 65 26 A8 8
29 MY12 KBSOUT12 PORTD-1 IOPD0/RI1/EXWINT20 A8
MY13 66 29 ACIN A9 7 10 VCC1_PWROK
29 MY13 KBSOUT13 IOPD1/RI2/EXWINT21 ACIN 35 A9 RESET#/NC
MY14 67 30 R332 R333 A10 36 12
29 MY14 KBSOUT14 IOPD2/EXWINT24 A10 RY/BY#/NC T49

1
MY15 68 10K_4 10K_4 A11 6 29 C499
29 MY15 KBSOUT15 A11 NC1
2 NBSWON# A12 5 38 .1U_4
IOPE4/SWIN NBSWON# 29 A12 NC2
105 44 MBCLK_CPU A13 4 11
T53

2
TINT PORTE IOPE5/EXWINT40 MBDATA_CPU A14 A13 NC3
T51 106 TCK IOPE6/LPCPD/EXWIN45 24 3 A14
107 25 R344 0_4 A15 2 31 +3VPCU
T50 TDO JTAG debug port IOPE7/CLKRUN/EXWINT46 CLKRUN# 11,22,24 A15 VCC
108 A16 1 30
T52 TDI +3V_S5 A16 VCC
109 124 ENV0 +3VPCU A17 40
T54 TMS IOPH0/A0/ENV0 A17

1
125 ENV1 A18 13
IOPH1/A1/ENV1 BADDR0 A19 A18 C817
110 PSCLK1/IOPF0 IOPH2/A2/BADDR0 126 37 A19
111 127 BADDR1 23 1U/10V_6

2
PSDAT1/IOPF1 IOPH3/A3/BADDR1 GND

2
114 128 TRIS R331 R336 CS# 22 39
PSCLK2/IOPF2 PORTH IOPH4/A4/TRIS SHBM *4.7K_4 10K_4 RD# CE# GND
115 PSDAT2/IOPF3 IOPH5/A5/SHBM 131 24 OE#
TBCLK 116 PS2 interface 132 A6 WR# 9
26 TBCLK PSCLK3/IOPF4 IOPH6/A6 WE#
TBDATA 117 133 A7
26 TBDATA PSDAT3/IOPF5 IOPH7/A7
CAPSLED# 118 591_PME# 3 1
29 CAPSLED# PSCLK4/IOPF6 LAN_PME# 23
NUMLED# 119 138 D0
29 NUMLED# PSDAT4/IOPF7 IOPI0/D0
139 D1 Q20
IOPI1/D1 D2 PDTC143TT
IOPI2/D2 140
141 D3
591_32KX1 PORTI IOPI3/D3 D4
158 32KX1/32KCLKOUT IOPI4/D4 144
B 145 D5 B
R325 20M_6 591_32KX2 IOPI5/D5 D6
160 32KX2 IOPI6/D6 146
147 D7
Y4 IOPI7/D7
4 1 R323 121K/F_6 150 RD#
+3VPCU PORTJ-1 IOPJ0/RD WR# U15 *PLCC32
3 2 IOPJ1/WR0 151
12 13 D0
R324 10K_4 A0 D0 D1
Edison--11/11- Modify SELIO 152 11 A1 D1 14
32.768KHZ 10 15 D2
C514 C515 A2 D2 D3
29 PWRLED# 62 IOPJ2/BST0 IOPD4 41 9 A3 D3 17
30,32 VGA_MAINON 63 42 8 18 D4
10P_4 10P_4 IOPJ3/BST1 PORTD-2 IOPD5 D/C# A4 D4 D5
22 USBON# 69 IOPJ4/BST2 IOPD6 54 D/C# 35 7 A5 D5 19
70 PORTJ-2 55 BL/C# 6 20 D6
29 SUSLED# IOPJ5/PFS IOPD7 BL/C# 35 A6 D6
29 BATLED0# 75 5 21 D7
IOPJ6/PLI A8 A7 D7
29 BATLED1# 76 IOPJ7/BRKL_RSTO IOPK0/A8 143 27 A8
142 A9 26
IOPK1/A9 A10 A9 A18
22 RF_EN 148 IOPM0/D8 IOPK2/A10 135 23 A10 VPP 1
BT_POWERON# 149 PORTK 134 A11 25
22 BT_POWERON# IOPM1/D9 IOPK3/A11 A11
155 130 A12 4
12 RSMRST# IOPM2/D10 IOPK4/A12 A12
23 LANRST# LANRST# 156 PORTM 129 A13 28
VRON IOPM3/D11 IOPK5/A13/BE0 A14 A13
31 VRON 3 IOPM4/D12 IOPK6/A14/BE1 121 29 A14
MAINON 4 120 A15 3 +3VPCU
19,30,31,32,33,34 MAINON IOPM5/D13 IOPK7/A15/CBRD A15
SUSON 27 2
33,34 SUSON IOPM6/D14 A16
S5_ON 28 113 A16 30 32
33,34 S5_ON IOPM7/D15 IOPL0/A16 A17 VCC
112 A17
CS# PORTL IOPL1/A17 A18 CS# C516
173 SEL0 IOPL2/A18 104 22 CE#
174 103 A19 RD# 24
+3V SEL1 IOPL3/A19 WR# OE# *.1U_4
250 mS 47 CLK IOPL4/WR1 48 31 WE# GND 16
EC_PWRGD ===> LANRST#(keep 5mS)
AGND
GND1
GND2
GND3
GND4
GND5
GND6
GND7

R341
NC10

Marvell LAN
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9

10K_6 BIU configuration should match flash speed used

D12 1SS355 PC97551
17
35
46
122
159
167
137

96

11
12
20
21
85
86
91
92
97
98

1 2
A
34 HWPG_SYS
D9 1SS355
FWH A

33 HWPG_1.8V 1 2
C525
D11 1SS355 FOR 97551 ONLY
1 2 1U_4
32 HWPG_1.2V
D13 1SS355
1 2
31 IMVP_PWRGD PROJECT : ZB3
D10 EV@1SS355
1 2 HWPG_591 DIRECTLY 50 mS
30 HWPG_VGA Quanta Computer Inc.
KBC 5
HWPG_591 ===> NB_PWRGD ===> EC_PWRGD

4
NORTH BRIDGE SOUTH BRIDGE

3 2
Size

Date:
Document Number
PC97551 & FLASH
Monday, April 03, 2006
1
Sheet 28 of 37
Rev
1A
 5 4 3 2 1

ZB1
INT K/B Edison --01/03 Modify FAN CONTROL
CN4
MX0 PTWO_KB
28 MX0
MX1 MX7 Edison --01/04 Modify for pin swap
28 MX1 25
MX2 MX6
28 MX2 24 +3VSUS
MX3 MX5
28 MX3 23 +5V
MX4 MY0
28 MX4 22
MX5 MY1 RP3 10KX8 CA5 *220PX4 CA4 *220PX4
28 MX5 21
MX6 MY2 10 1 MY3 MY1 7 8 7 8 MY7 +3V
28 MX6 20
D MX7 MX4 MX7 9 2 MX4 MY2 5 6 5 6 MY6 D
28 MX7 19 MY3 MX6 8 3 MY2 MX4 3 4 3 4 MY5
MY15 18 MY4 MX5 MY1 MY3 MY4
28 MY15 17 7 4 1 2 1 2 R330
MY14 MY5 MY0 6 5 R329
28 MY14 16
MY13 MY6 *10K_4 10K_6
28 MY13 15
MY12 MY7
28 MY12 14
MY11 MY8 CA1 *220PX4 CA3 *220PX4 CN16
28 MY11 13 28 FANSIG
MY10 MX3 RP1 10KX8 MY12 7 8 7 8 MX2 R328 0_4 U17 G995 FAN-CONN
28 MY10 12 3 MAX6648_OV#
MY9 MY9 10 1 MX0 MY13 5 6 5 6 MY9 2 3 TH_FAN_POWER
28 MY9 11 VIN VO 1 4
MY8 MX2 MY12 MY11 MY14 MX3
28 MY8
MY7 10 MX1 MY13
9
8
2
3 MY10 MY15
3
1
4
2
3
1
4
2 MY8 15 VGA_THERM# R327 0_4 1
GND 5
6
30 MIL 2
28 MY7 9 FON GND 3 5
MY6 MY10 MY14 7 4 MX1 7 C520 C517
28 MY6 8 GND
MY5 MY11 MY15 6 5 4 8 2.2U_6
28 MY5 7 28 VFAN VSET GND
MY4 MX0
28 MY4 6
MY3 MY12 CA2 *220PX4 CA6 *220PX4 .01U_4
28 MY3 5
MY2 MY13 MX1 7 8 7 8 MY0
28 MY2 4
MY1 MY14 RP2 10KX8 MY10 5 6 5 6 MX5
28 MY1 3
MY0 MY15 10 1 MY7 MY11 3 4 3 4 MX6
28 MY0 2 MY8 9 2 MY6 MX0 1 2 1 2 MX7
1 MX3 MY5
8 3
MY9 7 4 MY4
MX2 6 5

C
KBC THM C

Edison --01/04 Modify Check color

BT1 SW1 SWITCH ZB1 +3VPCU +3V
28 MX0 3 2 MY10 28 22 WIRELESS_LED
LED9
1 4
5 R600 330_4 1 SUSLED# 28
6 -SUSLED 3 R412 Q24 LED6 R413

2
2 10K_6 2N7002E LED_Orange 330_4
PWRLED# 28

BT2 SW2 SWITCH Edison --01/04 Adding MINICARD LED 1 3 -WIRELESS_LED 1 2

3 2 LED_G/Y
28 MX1
1 4
5 R443 0_4
22 MINICARD_LED +3V
6
LED8
SW3 SWITCH R587 330_4 22 BT_LED
BT3 -BATLED1
1 BATLED1# 28
28 MX2 3 2 3
1 4 2 R452 Q28 LED7 R464
BATLED0# 28

2
5 10K_6 2N7002E LED_Blue 330_4
6
LED_G/Y 1 3 -BT_LED 1 2
BT4 SW4 SWITCH
28 MX3 3 2
1 4
B 5 B
6
+3V +3V
Exchange Layout position
SW5 SWITCH Q9 Q25 LED1
NBSWON# 3 2 DTA114YUA DTA114YUA LED_G
28 NBSWON#
1 4
5 R227 R228 CAPSLED 2 1
6 1 3 NUMLED 1 3 IDE_LED
47K

47K
330_4 330_4 LED4
10K

10K
LED_G
EMAIL_LED 2 1
2

2
Edison --01/03 Modify
NUMLED# IDELED# LED5
28 NUMLED# 13,21 IDELED# +3V R321 200_4 LED_G
SW6 PWRLED2 2 1
SLIDE_SWITCH_BT
Edison --01/03 Modify
WIRELESS_SW# 1 4 +3V_S5 +3V LED3
28 WIRELESS_SW#
LED_G
Q19 Q8 IDE_LED 2 1
2
3

DTA114YUA DTA114YUA

SWITCH R322 R226 LED2

SW7 1 3 EMAIL_LED 1 3 CAPSLED LED_G
47K

47K

SLIDE_SWITCH_BT NUMLED

LED
2 1
330_4 330_4
10K

10K
BLUETOOTH_SW# 1 4
28 BLUETOOTH_SW#
A A
2
3

EMAIL_LED# CAPSLED#
12 EMAIL_LED# 28 CAPSLED#
PROJECT : ZB3

Switch Size Document Number

Quanta Computer Inc.
T/P,FAN,SWITCH,LED,K/B
Rev
1A

Date: Monday, April 03, 2006 Sheet 29 of 37

5 4 3 2 1
 5 4 3 2 1

+5VPCU
VIN_1993
PL13
EV@BLM21PG220SN1D(22/6A)
D D
PR145 EV@22_6
VGA_P_VCC
VIN
+3V

1
PC137

1
PC138
PC144 PC143 PC140 PD22 EV@1U/10V_6 EV@1U/10V_6

2
[email protected]_6 EV@2200P_6 PC142
2

2
EV@SW1010CPT
Edison--11/07 modify

19

24

22
VIN_1993

VGA_BST
PR142
EV@10U/25V/X6S_1210 EV@10U/25V/X6S_1210 PR149 EV@100K/F_6 Edison -0110 -- change the VGA power enble,

VDD

OVP/UVP

VCC
5
EV@0_6 14
PQ32 1993_BST
17 BST
V+ from MAINON to VGA_MAINON
VGA_CORE
Allen--02/21 modify EV@NTMFS4707N 4 1993PG PR141 EV@0_4
POK HWPG_VGA 28
4 1993_DH 15 DH
15A LSAT 3

1
Allen--02/22 modify PC139

3
2
1
[email protected]_6 23 1993_SHDN# PR83 EV@0_4
SHDN VGA_MAINON 28,32
PL14 EV@1UH

2
1993_LX 16 21 1993_GATE PR148 EV@0_4
LX GATE VGA_PWR_SW 15
PQ33 7 VGA_REFIN PR92 [email protected]/F_6
VGA_P_REF PC136
REFIN
1

EV@NTMFS4119N PU11 *.1U_6

5
PC148 + + 1993_DL 18 DL

1
[email protected]_6 EV@MAX1993ETG+
2

PR146 PC82
2

PR151 4 20 EV@56K/F_6 EV@470P_4

2
EV@698/F_6 GND
8 1993_OD VGA_PWR_SW M52

3
2
1
PC145 PC147 OD
11 CSP
C EV@470U/2V_7343
EV@470U/2V_7343 LO 1.0V PR92 change to 61.9K C
1 2 PD23 1993_TON PR146 change to 56K
EV@1N5819 12 CSN
PR147 HI 0.95V PR147 change to 5.9K
PC149 TON 1 PR143 *0_6 [email protected]/F_6 PR89 change to 0
VGA_CSP 10 OUT

FBLANK
[email protected]_6 6 VGA_P_REF PR89
VGA_OUT PR150 EV@0_6VGA_OUT_R REF EV@0_6
9

SKIP

ILIM
FB 1993_OD_1 Allen--03/01 modify

1
PR90 PC135

13

5
EV@330K/F_6 EV@1U/10V_6

2
L / RL( DCR ) = Cqe * Rqe 1993_ILIM

1993_SKIP#
Chock DCR = 0.003 Chock Rdcr = 3mOhm

1
1u / 0.003 = 0.47u * Rqe PC81 PR144 ILOAD * Rdcr * 10 = ILIM
EV@470P_4EV@100K/F_6

2
Rqe = 709(698) 15 * 3m * 10 = 0.45V

+2.5v delay 1ms for VGA power-up sequence --Arec 0113

B B

PU6
PR73 10K_6 4215_EN 1 5
19,28,31,32,33,34 MAINON NC0 NC2
2 6 VTT_SRC +2.5V
EN VO
+3VSUS 3 8
PC56 VIN GND0
1A
.1U_6 4 NC1
ADJ

PC63 PC60 PC66

10U_8 + .1U_6
7

PC61 PC62 *150U/4V_3528

2

10U_8 .1U_6 SC4215

0.8V VTT-ADJ
R1
2

PR75
21.5K/F_6
PR71 Vo=0.8(R1+R2)/R2
10K/F_6 R2
1

A A

PROJECT : ZB3
Quanta Computer Inc.
VGA CORE Size

Date:
Document Number
VGA CORE
Monday, April 03, 2006 Sheet 30 of 37
Rev
1A

5 4 3 2 1
 5 4 3 2 1

8736VCC +5VPCU
VCCP_+1.05V
Edison --11/09 Modify VIN_8736_1 VIN
PL2
BLM21PG220SN1D(22/6A)
2 1 CPU_VID0 PR166
D PR33 10_6 D
*100K_4
2 1 CPU_VID1
PR35 PC171 PC28
*100K_4 2.2U_8 2.2U_8 PD10 PC177

21

30
2 1 CPU_VID2 <Voltage> <Voltage> SW1010CPT .1U_6
PR37 PR38 <Voltage>

VCC

VDD
*100K_4 178K/F_6
2 1 CPU_VID3 8736_OSC 14 25 8736_BST1
2 1 8736_BST1_1
PR41 OSC BST1
*100K_4 PR27 0_6 PC22 PC176

5
2 1 CPU_VID4 8736_TIME 15 PC26 PQ37 .1U_8 .1U_6 PC21
PR43 PR36 TIME .22U_6 NTMFS4707N <Voltage> 10U/25V/X6S_1210 PC20 PC19
*100K_4 71.5K/F_6 <Voltage> PC179 PC178 10U/25V/X6S_1210 10U/25V/X6S_1210
2 1 CPU_VID5 8736_CCV 17 27 8736_DH1 2 1 8736_DH1_1 4
PR45 PC30 CCV DH1 2200P_4 2200P_4 Edison 0112 - Delete PC183 for M/E issue
*100K_4 2200P_4 PR172 0_6

1
2
3
2 1 CPU_VID6 8736_ILIM16 VCC_CORE
PR46 PR34 ILIM
*100K_4 510K_4
8736_REF 19 REF 8736_LX1
LX1 26 VCC_CORE 4
PC29 36A
.22U_6 8736_TRC
18 PL20
TRC

1
<Voltage> PR30 *0.36UH

1
2K/F_6 PQ39 PQ38 + + +
34 NTMFS4108N NTMFS4108N PD5
4 CPU_VID0 D0
SSM24PT-LF PL21 PC5

2
35 32 8736_DL1 4 4 0.5UH .1U/10V_4PC2
4 CPU_VID1 D1 DL1 .01U_6

2
4 CPU_VID2 36

1
2
3

1
2
3
D2
C C
37 PC180
4 CPU_VID3 D3 *100P_4
38 PC39 PC193 PC194
4 CPU_VID4 D4
31 470U/2V_7343 470U/2V_7343 470U/2V_7343
PGND
4 CPU_VID5 39 D5

4 CPU_VID6 40 D6
6 8736_CSP1 +5VPCU VIN_8736_2 VIN
CSP1 PR16 NTC_10K_6-B4.25K PR17
PR165 8736EN 4 PC169 8736_PN1 3.4K/F_6 PL1
28 VRON SHDN
100K_4 5 8736_CSN1 .22U_4
CSN1 PR15 5.23K/F_6 *HI0805R800R-00_8
PC36 PR13 0_4
100P_4 PC35
4700P_4 8736VCC
DRSKP# PR32 *0_4 33 PR54 0_4 PC25 PC16 PC187 PC190 PC14
DRSKP# DRSKP

1
28 8736_PWM2 PU2 *2.2U_8 PD9 *.1U_8 *.1U_6 *.1U_6
PWM2 <Voltage> *SW1010CPT <Voltage> <Voltage>

VCC

5
PR31 PQ41 PC15 PC12
*100K_4 8736_DRSKP# 8 8736_CSP2 4 8552_BST
10 2 1 *NTMFS4707N
8552_BST_1 *2200P_4 *2200P_4 PC13
CSP2 PR2 *NTC_10K_6-B4.25K PR5 GND BST PR26
PR164 0_48736_DPRSLPVR
3 DPRSLPVR PC32 8736_PN2 *2.94K/F_6 *0_6 4
3,11 DPRSLPVR
7 8736_CSN2 *.22U_4 PC175
CSN2 PR3 *5.11K/F_6 PR6 *.22U_6

1
2
3
PR161 *0_4 8552_DLY
5 DLY 98552_DH
2 1 8552_DH1 *10U/25V/X6S_1210 *10U/25V/X6S_1210
*100K_4 PC38 PR23 DH
*4700P_4 *5.1K/F_4 PR24 *0_6 <Voltage>
+3V PR48 0_48736_PSI#
2 VCC_CORE
3 H_PSI# PSI
PWM3 29
PR19 8552_EN7 8 8552_LX VCC_CORE 4
PR56 *0_4 EN LX PL22
B B

5
PR170 *100K_4 10 8736_CSP3 DRSKP# *0.36UH
CSP3 8736VCC

1
1.91K/F_4 PR20
PR169 0_48736_IMVPOK
24 IMVPOK PR47 0_4 *0_4 + +
28 IMVP_PWRGD

1
9 2 8552_DL 4 4
CSN3 DL PD1 PC4 PC3

2
8552_PWM
6 PWM *SSM24PT-LF .1U/10V_4.01U_6

1
2
3

1
2
3
PR51 PR21 PC192
100K_4 *0_4 *100P_4

2
PR49 0_48736_CLKEN#
1 CLKEN 3
5 CLK_EN# PGND
11 8736_GNDS PC1 PC40
GNDS PR53 470U/2V_7343 470U/2V_7343
PC34 10_4
PR173 PQ44 PQ45
*100K_4 20 1000P_6 PR162 *MAX8552EUB+ *NTMFS4108N *NTMFS4108N
PR28 0_48736_VR_HOT# GND *27.4_4
3,12,28 CPU_PROCHOT# 22 VR_HOT

PR42
PC27 13 8736_VPS
*100P_4 VPS PR163 *100_4
15.8K/F_4 PR52
8736_THRM 23 12 8736_FBS
PR29 THRM FBS
1K_4 MAX8736ETL+ 10_4 0.15A
PU3 PC33 PR39 PU4
VSSSENSE 4
PR171 PC172 1000P_6 PR167 2 1923_SHDN# 1 4
VCCSENSE 4 19,28,30,32,33,34 MAINON SHDN VO +1.5V_RUN
*10K_6 100P_4 *27.4_4
0_6 2
PR168 *100_4 GND
VCC_CORE 2 1 923_VIN 3 5
+3V VIN SET PC168
A PR40 0_6 G923-330T1U PR58 10U_8 A
21K/F_6
Allen--11/28 modify PC31
10U_8
923_SET

PROJECT : ZB3
PR57
100K/F_6
Quanta Computer Inc.
CPU CORE Size Document Number
CPU CORE
Rev
1A

Date: Monday, April 03, 2006 Sheet 31 of 37

5 4 3 2 1
 1 2 3 4 5 6 7 8

VIN-1.2V
PL6
VIN
HI0805R800R-8

2
Alan --11/17 Modify +5VSUS PC86
PR96 .1U_6 PC85 PC84
Reserve for VGA sequence

1
10U/25V_1206 10U/25V_1206

2
10_6

5
6
7
8
A PR136 PC134 PD21 A

1
PR135 *0_6 1M_6 PC88 PQ30
*.1U_6 BAS316 FDS6612A
28,30 VGA_MAINON
4.7U/10V_8 4

2
1470_BST
PU10 Allen --11/16 Modify

2
PR139 0_6 SC1470
1470_EN 1 14 PC133 7.5A+3.5A for
19,28,30,31,33,34 MAINON EN/PSV BST
+3V .1U_6

3
2
1
1470_VIN 2 13 DH-1.2V PL12 VCCP_+1.05V
VIN DH 1.5UH-MSCDR1-104R
1470_VOUT 3 12 1470_LX
VOUT LX PR140 +1.2V
PR137 1470_VCCA 4 11 1470_ILIM
VCCA ILIM

5
6
7
8
10K_6
5 10 22K/F_6 PQ31
FBK VDDP

1
PR138 0_6 FDS6690AS

1
1470_PGOOD
6 PGOOD 9 DL-1.2V 4 + PR74 PC57
28 HWPG_1.2V DL PD15 PC141
7 8 Change *EC10QS04 10U_8 14K/F_6 1000P_6 Allen--02/21 modify

2
GND PGND
Allen 1.2V_FB

2
02/21 PC146

3
2
1
2

PC131 PC130 470U/2V_7343 PR72

PC132 10K/F_6
.1U_6 1000P_6 .47U_6
1

Allen--02/21 modify
B B

VOUT=(1+R2/R3)*0.5

+1.2V

VCCP_+1.05V

PC166 +3V
.1U_6
C Allen--02/21 modify PC163 C
1

PQ46 10U/25V_1206
3.5A
AO4404
1 8 PR68
2 7 PU14 100K_4
3 6
5 G9338_ADJ
6 DRV PGD 3 HWPG_1.2V 28
1

4
1

PC173 + PR44 Rg
.01U_6 PC174 11K/F_6 4 1992SHDN# PR154 0_4
EN MAINON 19,28,30,31,33,34
PC170 5
2

470U/2V_7343 ADJ +5VPCU

GND

VCC 1
Edison --01/03 Modify
10U/25V/X6S_1210
2

PR182
0_6 PC195
Rh .1U_6
1

PR50
10K/F_4
PC196
0.01U/50V/X7R_6

D D

Vout1 = (1+Rg/Rh)*0.5

PROJECT : ZB3
Quanta Computer Inc.
Size Document Number Rev
DISCHAGE&+1.8V 1A

Date: Monday, April 03, 2006 Sheet 32 of 37

1 2 3 4 5 6 7 8
 5 4 3 2 1

RL1=(Ilim x Rdson-h)/IOC(31uA)

6.532K=(15 x 13.5m)/31u
VIN_NCP5214
PC73 *.1U/25V_6 Mount Allen 02/21 PL4
5214_OCDDQ
VIN
PU7 HI0805R800R-8
D
NCP5214 D

2
PR79 0_65214_VDDQEN
1 VDDQEN 16 PR81 6.65K/F_6
28,34 SUSON OCDDQ PC75
+3VSUS PR78 0_65214_VTIEN
2 VTIEN 20 PD14 +5VSUS .1U_6 PC76 PC77
19,28,30,31,32,34 MAINON

1
VCCP CH551H-30PT 10U/25V_1206 10U/25V_1206

1
PR76 0_65214_FPWM
3 FPWM 17 5214_BOOST
1 2 PC71
28,34 SUSON BOOST
PR82
5214_SS4 4.7U/10V_8 PQ3

2
100K_6 SS

5
PC58 47nF_6 PC67
5214_PGOOD 15 NTMFS4707NT1G
28 HWPG_1.8V PGOOD .22U/25V_6 15A
+0.9V_REF 14 18 +1.8_DH 4
VTTREF TGDDQ +1.8VSUS
0.1A

1
2
3
PC74 A11en-11/15- Modify PL5 EV@1UH
47nF_6 19 5214_SWDDQ
SWDDQ

5214_FBDDQ_1
+0.9V_VTER 5214_VTT 6 21 +1.8_DL
VTT BGDDQ PQ4 PC78
8 FBVTT
22 PR87
PGND

1
2A PC55 PC52 PC64 100PF_6 NTMFS4119NT1G 4.7nF_6
22U/16V_1206 22U/16V_1206 12 5214_COMP + + 4.3K/F_6
COMP

1
5 VTTGND
Allen--02/21 modify Allen--02/21 modify

2
5214_VCCA 11 PD16 PR86
VCCA 5214_COMP_1 EC10QS04
13 4

THPAD
FBDDQ

AGND
PR77 10 130_6

2
DDQREF PC65 2.2UF_8 PR80 10K/F_6
7

1
2
3
C VTTI C
+5VSUS
10_6 PC53 PC83 PC69 PC70

23
PC59 560U/4V 560U/4V 10U_8 PR184
10U/16V_1206 PR85 47/F_6
1U_8
3.4K/F_6
5214_FBDDQ

PC54
10U/16V_1206
Allen--03/01 modify

+1.8VSUS 5214_DDQREF

B
DDR Power & NB Power B
+1.8VSUS

5
6
7
8
6.5A
PR175 0_4
PQ14_MAIND4 PQ36
34 MAIND AO4418

PC181
Edison-11/10- Modify *.1U/10V_4

3
2
1
Allen--11/15 modify
+1.8V

2
+1.8V_S5
PC182
PR91 PU8 10U_8

1
28,34 S5_ON 1 2965_EN 1 EN VO 3
GND 7
0_6
GND 6 1
1

8 PC72 + PC68 Edison 0112 -- To change the PC182 from 0.1U to 10uF_0805
GND
ADJ

+3VPCU 2 5
VIN GND .1U/50V_6 10U/10V_8
2

G965_18
4
1

PC79 PC80
PR88
4.7U/6.3V_8 .1U/50V_6 965_ADJ2 1
2

A A
*0_6

PR84
0_6 PROJECT : ZB3
Quanta Computer Inc.
Size Document Number Rev
SMDDR_VTERM&+1.2V&+1.8VSUS 1A

Date: Monday, April 03, 2006 Sheet 33 of 37

5 4 3 2 1
 A B C D E

PC127 PR127
PD20 VIN1999 VIN1 PL7 VIN
*100P_6 *3.32K/F_6 PR125 PQ23 BLM21PG220SN1D(22/6A)
1999_SHT#_1
2 1 1 2 SI4914DY

4.7_1206 PC101 PC116 PC115

1
ZD5.6V PC112 PC113 PC114
PR108 .1U_8 1000P_6 .1U_6

D1

D1
S2

G2
0_6 PC105 PC100 *10U/25V_1206 .1U_8

2
PR106 .1U_8 4.7U/25V/X6S_1210
12K/F_6
10U/25V/X6S_1210
4 1999DH3 4

S1/D2
3 1999_SHT#

G1
PL8
1.5UH_SIL104R-1R5_10A/8.1mohm

8
SI4914DY Rds on = 27mOhm 1999LX3
+3VPCU
PC93 .22U/25V_6
ILOAD * Rds on * 10 = ILIM 2 1 5.5A

ILIM3 = 1.485V Current limit 5.5A VL 1999DL3

PR107 100K/F_6
ILIM5 = 1.377V Current limit 5.1A PC118 PC122 + + PC117 PC120
PC107 1U/10V_6

1999_SHT#
.1U_6
1 2
PR126 PC102
47_6 .1U_6
10U/25V_1206
REF2V PU9 330U/6.3V_7343 EV@330U/6.3V_7343
1999VCC 17 22
VCC OUT3
1 2 REF2V 8 REF DH3 26 VIN1
PC94 1U/10V_6 Allen--02/21 modify
PR130 PR131 ILIM3 5 27
33K/F_6 39K/F_6 ILIM3 LX3
Edison -- 0403_Add PC117 330uF
ILIM5 11 28 1999BST3 PQ24
ILIM3 ILIM5 ILIM5 BST3 SI4914DY PC111 PC104 PC126 capacitor for CRT flicker issue.

1
1999_FB3 7 24
FB3 DL3 VL .1U_8
2

D1

D1
S2

G2
+3VPCU VL 1999_FB5 9 6
FB5 SHDN PD17
PR105 PR109 PR119 3
100K/F_6 100K/F_6 0_6 3VON VIN1999 CHP202U 10U/25V/X6S_1210 10U/25V/X6S_1210
3 ON3 V+ 20
1

1
PR104 0_6 5VON 4 18
PR114 ON5 LDO5 PC128

S1/D2
3 3
23 10 1999_PRO# PC106 .1U_6

G1
2
*100K/F_6 GND PRO 4.7U/10V_8
1999VCC 12 19

8
PR124 *0_6 SKIP DL5
1999_PGOOD 2 14 1999BST5
28 HWPG_SYS PGOOD BST5
1 15 1999LX5 PL11 3R8UH 5.1A
N.C. LX5 +5VPCU
PC103 1999_LDO3 25
1U/10V_6 16 1999DH5
PR110 0_6 LDO3 DH5
1999VCC 13 21 +
TON OUT5 1999DL5 + PC109
SKIP_SEL .1U_6
MAX1999EEI+
3

+5VPCU PR128 *100K/F_6 2 PR123 PC97 PC110 PC96

10U/25V_1206 330U/6.3V_7343 *330U/6.3V_7343
0_6
3

PQ19
*2N7002E Allen--02/21 modify
1

2 PQ25 PD18
33 MAIND
*2N7002E CHN217 VIN +1.8VSUS +3VSUS +5VSUS 15V

+5VPCU-1 PR115 0_6

2 +5VPCU
PC124
1

+5VPCU +3VPCU 1999DL3 1993DL3-1 PR99 PR95 PR93 PR97 PR94

3 1M_6 22_8 22_8 22_8 1M_6 Edison --11/09 Modify
.1U_6 10V-1
1
SUSON_2N7002 SUSD
SUSD 13
1
8

3
2 PC95 2

3
1U/10V_6
2

28,33 SUSON 2 2 2 2 2

PR98 PC87
PQ9 1M_6 PQ7 PQ5 PQ8 PQ6 *2200P_6 Allen --11/16 Modify

1
PQ22 PQ11 DTC144EU 2N7002E 2N7002E 2N7002E 2N7002E

1
AO4812-LF AO4812-LF +3VPCU
PD19
1

CHN217

SUSD SUSD 10V-2 PR118 0_6 10V-1 VIN +3V_S5 15V

2 PQ12
MAIND MAIND PC125

8
7
6
5
+5V +3V 1999DL3 1993DL3-2 PC121 AO4422-LF
3 .1U_6
3.5A
+5VSUS +3VSUS .1U_6 15V-1 PR113 0_6
1 15V
PC99 PC89 PR100 PR102 PR112 4
3A PC108 PC90 1M_6 22_8 1M_6
1

.1U_6 .1U_6 2.1A .1U_6 .1U_6

1.0A PC98
1U/10V_6
2

S5_ON_2N7002

1
2
3
3

3
3
S5_ON_2N7002_1

2 PR101 2 2
28,33 S5_ON PC92 +3V_S5
1M_6 PQ13 PQ14
PQ10 2N7002E 2N7002E *2200P_6

1
VIN +1.2V +0.9V_VTER +1.8V +2.5V +1.5V_RUN VGA_CORE +3V +5V 15V DTC144EU

1
PC91

.1U_6
1 PR122 PR121 PR134 PR132 PR116 PR103 PR117 PR111 PR129 PR133 1
1M_6 22_8 22_8 22_8 22_8 22_8 22_8 22_8 22_8 1M_6

MAINON_2N7002 MAIND
MAIND 33
3

3
3

SYSTEM 19,28,30,31,32,33 MAINON 2

PR120
2 2 2 2 2 2 2 2 2
PC129
PROJECT : ZB3
PQ20 1M_6 PQ21 PQ29 PQ27 PQ17 PQ15 PQ18 PQ16 PQ26 PQ28 *2200P_6 Quanta Computer Inc.
3V & 5V
1

DTC144EU 2N7002E 2N7002E 2N7002E 2N7002E 2N7002E 2N7002E 2N7002E 2N7002E 2N7002E
Size Document Number Rev
1

SYSTEM POWER MAX1632 1A

Date: Thursday, April 06, 2006 Sheet 34 of 37

A B C D E
 8 7 6 5 4 3 2 1

REF3V

0.01_3720 PR160
VA PR70 Allen--11/21 modify
CN15 PC119 PC123 PL10
SIT_2DC-G026-102 .1U_6 .1U_6 HI0805R800R-8
1 DC19V-IN 1 2 100K_6
2

2
3 CELLR-SET PR159 0_6
8724CELLS 28
PL9 PC49 PC50 PC51 PC48

1P

2P
HI0805R800R-8

1
.1U/25V_8 .1U/25V_8 2200P_4 .1U/25V_8 PR59
5
4
D D

100K_6

VA_MOS

2
PD4 VH
SW1010C

1 PL3

5
6
7
8
VAD VA_1040 3 PR178
2 HI0805R800R-00_8 47K_6 PQ2
PD13 SPL1040PT AO4414L
VAON PR176 4.7K_6 4

PD2

2
DA204U
PR8 PC157
10K_6 2 1U_8 PC164 10U/25V_1206

1
PC7 CSSP CSSN 2 1

3
2
1
VH_C

+
3
PC45 PC44 CELLR-SET VH_G
VIN
.01U/50V_6 1 VH
6

VA_4914
PC165 .1U/25V_8
PQ1 PC8 PC41
IMZ2 REF3V *.1U/50V_6 *.1U/50V_6 PR60 33_6

4
3
2
1
IMD .1U/25V_8 .1U/25V_8
PU5 PQ40

27
26

2
MAX8724 AO4411
1

PQ41_2

CSSN
CSSP
C 1 17 PC46 PC159 C

1
Allen--11/21 modify DCIN CELLS 1U/10V_6 1U/10V_6 PL18
PC43
LDO 28724LDO HI0805R800R-8
PD3

5
6
7
8
.1U/25V_6
DLOV 22 8724_DLVO PD24 PR174 PL19
PD25 SW1010CPT 8724LDO PR61 10 8 G1 D1 1 PL17 0.015_3720 HI0805R800R-8
VAD ACIN
SW1010CPT 0_6
BST 24 8724BST 1 2 10UH-MSCDR1-104R PC185
PU12_8 PC42 7 S1/D2 D1 2 BAT-V1 2 100U/25V MBAT
VIN
PR158 8724_VCTL
15 SW1010C
PC191 28 CV-SET *0_6 VCTL .1U/25V_8 G2
6 3

1
PR7 13 25 8724DH

1P

2P
.1U/25V_8 28 CC-SET ICTL DHI S2 +
5 4 + +
47K_6 PC161 PC160 12 23 8724LX PC189
REFIN LX PQ35 .01U/50V_6

2
1000P_4 1000P_4 11 21 SI4914DY
PR4 47K_6 ACOK DLO
9 20 8724DL
ICHG PGND PC186 PC184
PU13A 28 19 CSIP 10U/25V_1206 10U/25V_1206
IINP CSIP
8

LM393 PR62 18 CSIN

PU12_3 8724LDO 8724_SHDN# 8 CSIN
+ 3 SHDN
PU12_1 1
2 PU12_2 0_6 16 MBAT
- PR10 8724_CCV BATT
7 CCV
4 8724REF VCSL=4.096*R2/(R1+R2)
4

PR1 10K_6 REF

VCLS=2.577V
8724_CCI 6 ISOURCE_MAX=(VCLS/VREF)*(0.075/R3)
22K_6 CCI 8724_CLS
PR67 11.5K/F_6
CLS 3 4.72A=(2.577/4.096)*(0.075/0.01)
8724_CCS 5 CN26

GND
GND
CCS MBAT+
1
8724_CCV_1

8724_CCS_1
8724_CCI_1

2
PC6 OSC PR64 PR65 PR66 PR156 PC155 TEMP_MBAT
TEMP_MBAT 28

14
29
3

PC188
200KHz 10K/F_6 BATTERY_CLK

PC23
B B
8 4

PD6
220P_4 1K/F_6 0_6 0_6 1U/10V_6 BATTERY_DATA

1
9 5

1
6

1
VIN 7

.1U_6

ZD5.6V
PC152 PC153 PC154 PC24 PC17

2
VL SUYIN_BATTERY 47P_4 47P_4

2
47P_4
.1U/25V_6 .01U/50V_6 .01U/50V_6 Allen--03/09 modify
Change PR67 from 5.9K/F to 11.5K/F_6
PR177
PR14
for 65W Adapter
220K_6 CURRNT LIMIT POINT = REF3V PR22
22K_6 4.74Ax0.95=4.72 330_4
PU13B PR25
REF3V 5 PR179 330_4
+ PU12_7 VAON MBCLK 15,28
7 1 3 28 ACIN
6 -
10K_6 PR18 MBDATA MBDATA 15,28
PQ43 10K/F_6

1
LM393 PR11 DTC144EU

1
PU12_6 PR181 PD26 PD8
2

PR9 220K_6 6.8K_6 1 2 ACIN_ZD TEMP_MBAT ZD5.6V

VAD PD7
3

D/C#
180K/F_6 D/C# 28 ZD5.6V

1
ZD12V

2
PR180 PC18

2
2 BL/C# 10K_6 .01U_6
BL/C# 28

2
PQ42
2N7002E
1

CLOSE TO BATTERY CON

VL REF3V +3VPCU
PU1 PR183
A 1 5 REF3V A
Vin Vout
2 0_6
GND Allen--02/21 modify
PC10 3 4 914_BP
SD BP
*10U/10V_8 PR12 *G914D PC9

*1K/F_6 PC11 .1U/25V_6 PROJECT : ZB3

*.1U/25V_6

CHARGER 914_SD
Allen--02/21 modify
Size

Date:
Document Number
Quanta Computer Inc.
BATTERY CHARGER
Monday, April 03, 2006 Sheet 35 of 37
Rev
1A

8 7 6 5 4 3 2 1