COMPUTER ARCHITECTURE

16 Marks
1. Explain Non-Recursive algorithms with suitable examples

 Explain the algorithms

 Max element

 General Plan

 Unique Elements

 Matrix Multiplication

 Binary Representation

2. Explain Recursive algorithms with suitable examples

 Explain the algorithms

• Factorial

• General Plan

• Towers of Hanoi

• Binary Representation

3. Discuss about the empirical analysis of algorithms

 Explain

• General Plan

• Pseudo random numbers

4. Discuss briefly about Algorithmic visualization

 Explain

• Static algorithm visualization

• Dynamic algorithm visualization

5. Discuss about the Fibonacci numbers

Explain about

 Explicit formula

 Computation

 Iterative algorithm

2 Marks
1.What is cache memory?

The small and fast RAM units are called as caches. When the execution of an instruction calls for data
located in the main memory, the data are fetched and a copy is placed in the cache. Later if the same data is
required it is read directly from the cache.

2. What is the function of ALU?

Most of the computer operations (arithmetic and logic) are performed in ALU.The data required for
the operation is brought by the processor and the operation is performed by the ALU.

3. What is the function of CU?

The control unit acts as the nerve center, that coordinates all the computer operations. It issues timing
signals that governs the data transfer.

4. What are basic operations of a computer?

The basic operations are READ and WRITE.

5. What are the registers generally contained in the processor?

MAR-Memory Address Register

MDR-Memory Data Register

IR-Instruction Register

R0-Rn-General purpose Registers

PC-Program Counter

6. What are the steps in executing a program?

1.Fetch
 2.Decode

3.Execute

4.Store

7. Define interrupt and ISR?

An interrupt is a request from an I/O device for service by the processor. The processor provides the
requested service by executing the interrupt service routine.

8. Define Bus?

A group of lines that serves as a connecting path for several devices is called a bus.

9. What is the use of buffer register?

The buffer register is used to avoid speed mismatch between the I/O device and the processor.

10. Compare single bus structure and multiple bus structure?

A system that contains only one bus(i.e only one transfer at a time) is called as a single bus structure.
A system is called as multiple bus structure if it contains multiple buses.

11. What is a compiler?

A system software program called a compiler translates the high-level language program into a
suitable machine language program containing instructions such as the Add and Load instructions.

12. What is System Software? Give an example?

It is a collection of programs that are executed as needed to perform functions such as

• Receiving and interpreting user commands

• Entering and editing application programs and storing them as files in secondary storage devices. Ex:
Assembler, Linker, Compiler etc

13.What is Application Software? Give an example?

Application programs are usually written in a high-level programming language, in which the
programmer specifies mathematical or text-processing operations. These operations are described in a format
that is independent of the particular computer used to
execute the program.

Ex: C, C++, JAVA

14. What is text editor?

It is used for entering and editing application programs. The user of this program interactively
executes command that allow statements of a source program entered at a keyboard to be accumulated in a file.

15. Discuss about OS as system software?

OS is a large program,or actually a collection of routines,that is used to control the sharing of and
interaction among various computer units as they execute application programs.The OS routines perform the
tasks required to assign computer resources to individual application programs.

16. What is multiprogrraming or multitasking?

  The operating system manages the concurrent execution of several application programs to make the
best possible uses of computer resources.this pattern of concurrent execution is called multiprogrraming or
multitasking.

17.What is elapsed time of computer system?

The total time to execute the total program is called elapsed time.it is affected by the speed of the
processor,the disk and the printer.

18. What is processor time of a program?

The periods during which the processor is active is called processor time of a programIt depends on
the hardware involved in the execution of individual machine instructions.

19. Define clock rate?

The clock rate is given by,

R=1/P,where P is the length of one clock cycle.

20. Write down the basic performance equation?

T=N*S/R

T=processor time

N=no of instructions
 S=no of steps

R=clock rate

21.What is pipelining?

The overlapping of execution of successive instructions is called pipelining.

22. What is byte addressable memory?

The assignment of successive addresses to successive byte locations in the memory is called byte
addressable memory.

23. What is big endian and little endian format?

The name big endian is used when lower byte addresses are used for the more significiant of the word.
The name little endian is used for the less significiant bytes of the word.

24. What is a branch instruction?

Branch instruction is a type of instruction which loads a new value into the program counter.

25. What is branch target?

As a result of branch instructions , the processor fetches and executes the instruction at a new address
called branch target, instead of the instruction at the location that follows the branch instruction in sequential
address order.

26.What are condition code flags?

The processor keep track of information about the results of various operations for use by subsequent
conditional branch instructions. This is accomplished by recording the required information in individual bits,
often called condition code flags.

27.Define addressing mode.

The different ways in which the location of an operand is specified in an instruction are referred to as
addressing modes.

28.Define various addressing modes.

The various addressing modes are

 1.Absolute addressing mode

2.Register addressing mode

3.Indirect addressing mode

4.Index addressing mode

5.Immediate addressing mode

6.Relative addressing mode

7.Autoincrement addressing mode

8.Autodecrement addressing mode

29. What are the basic functional units of a computer?

Input ,memory,arithmetic and logic unit,output and control units are the basic functional units of a
computer

30. Define Response time and Throughput.

Response time is the time between the start and the completion of the event. Also referred to as
execution time or latency.Throughput is the total amount of work done in a given amount of time

31. How will you compute the SPEC rating?

SPEC stands for system performance Evaluation Corporation

Running time on the reference computer

SPEC rating= _________________________________

Running time on the computer under test

32.Give the symbol of a full adder circuit for a single stage addition

33.Give the representation for n bit ripple carry adder

34. Write down the Booth’s algorithm

Multiplier Version of Multiplicand selected by bit i

 Bit i Bit i-1

000xM

0 1 +1 x M

1 0 -1 x M

110xM

35.What are the 2 ways to detect overflow in an n-bit adder?

Overflow can occur when the signs of two operands are the same. Overflow occurs when the carry
bits Cn and Cn-1 are different.

36.What is the delay encountered for Cn-1, Sn-1 and Cn in the FA for a single stage

Cn-1 – 2(n-1)

Sn-1 – 2(n-1)+1

Cn – 2n

37.What is the delay encountered for all the sum bits in n-bit binary addition/subtraction logic unit?

The gate delays with and without overflow logic are 2n+2 and 2n respectively

38.Write down the basic generate and propagate functions for stage i

Gi = XiYi, Pi=Xi xor with Yi

39.Write down the general expression for Ci+1 using first level generate and propagate function

Ci+1 = Gi+PiGi-1+PiPi-1Gi-2+…+PiPi-1…P1G0+PiPi-1…P0G0

40.What are the two approaches to reduce delay in adders

• Fastest electronic technology in implementing the ripple carry logic design

• Augmented logic gate network

 
41.What is the delay encountered in the path in an n x n array multiplier

 The delay encountered in the path in an n x n array multiplier is 6(n-1)-1

42.What is skipping over of one’s in Booth decoding?

The Transformation 011… 110= +100…0 – 10 is called skipping over one’s.In his case multiplier has
its ones grouped into a few contiguous blocks.

43.What are the two attractive features of Booth algorithm

• It handles both positive and negative multipliers uniformly

• It achieves some efficiency in the number of additions required when the multiplier has a few large
blocks of ones

44. Give an example for the worst case of Booth algorithm

The worst case is shown as below

010101010

  +1-1+1-1+1-1+1-1+1

  In the worst case each bit of the multiplier selects the summands. This results in more number of
summands.

45. What are the two techniques for speeding up the multiplication operation?

• Bit Pair recoding

• CSA

46. How bit pair recoding of multiplier speeds up the multiplication process?

It guarantees that the maximum number of summands that must be added is n/2 for nbit operands.

47. How CSA speeds up multiplication?

It reduces the time needed to add the summands. Instead of letting the carries ripple along the rows,
they can be saved and introduced into the next row, at the correct waited position.

48. Write down the levels of CSA steps needed to reduce k summands to two vectors in CSA
 The number of levels can be shown by 1.7log2k-1.7

49.What is the advantage of non restoring over restoring division?

Non restoring division avoids the need for restoring the contents of register after

an successful subtraction.

  

50. Write down the steps for restoring division and non-restoring division Non-Restoring:

Step1: Do the following n times

1.If the sign of A is 0, shift A and Q left one bit position and subtract M from A otherwise shift A and Q left
and add M to A.

2.Now if the sign of A is 0, set Q0 to 1; otherwise set Q0 to 0

  Step 2: If the sign of A is 1, add M to A

Restoring:

• Shift A and Q left one binary position

• Subtract M from A

• If the sign of A is one , set Q0 to 0, add M back to A otherwise set Q0 to 1

51.What is the need for adding binary 8 value to the true exponential in floating point numbers?

This solves the problem of negative exponent.Due to this the magnitude of the

numbers can be compared.The excess-x representation for exponents enables efficient

comparison of the relative sizes of the two floating point numbers.

52.Briefly explain the floating point representation with an example?

The floating point representation has 3 fields

1.sign bit

2.significiant bits

3.exponent

For example consider 1.11101100110 x 10^5,

Mantissa=11101100110

Sign=0
Exponent=5

53.What are the 2 IEEE standards for floating point numbers?

1.single

2.double

  

54.What is overflow, underflow case in single precision(sp)?

Underflow-In SP it means that the normalized representation requires an exponent

less than -126.

Overflow- In SP it means that the normalized representation requires an exponent

greater than +127.

55.What are the exceptions encounted for FP operation?

The exceptions encounted for FP operation are overflow,underflow,/0,inexact and invalid values.

56.What is guard bits?

Guard bits are extra bits which are produced during the intermediate steps to yield maximum accuracy
in the final results.

57.What are the ways to truncate guard bits?

1.Chopping

2.Von Neumann rounding

3.Rounding procedure

16 Marks
1.Explain the various types of hazards in pipelining?

• Instruction hazard

• Data hazard
• Structural hazard

• Control hazard

2. Write notes on super scalar operation?

• Explanation

• Diagram

3. Explain the multiple bus organization?

• Explanation

• Diagram

4. Explain the techniques used to overcome the various hazards.

• Structural hazard

• Duplicating resources

• Stalling

• Data hazards

o Stalling

o Duplicating

• Control hazard.

• Predicted taken branch scheme

• Predicted untaken branch scheme

• Flush or freeze technique

• Delayed branch scheme.

5.Explain the classification of data hazards in pipelining?

• RAW - Read After Write (also known as True Data Dependency)

• WAW - Write After Write (also known as Output Dependency)

• WAR - Write After Read (also known as Anti Data Dependency)

2 MARKS 
1. What is the maximum size of the memory that can be used in a 16-bit computer and 32 bit computer?

The maximum size of the memory that can be used in a 16-bit computer is 216=64K memory locations.

The maximum size of the memory that can be used in a 32-bit computer is

232 =4G memory locations.

2. Define memory access time?

The time required to access one word is called the memory access time. Or it is the time that elapses between
the initiation of an operation and the completion of that operation.

3. Define memory cycle time?

It is the minimum time delay required between the initiation of two successive memory operations. Eg. The
time between two successive read operations.

4. When is a memory unit called as RAM?

A memory unit is called as RAM if any location can be accessed for a read or write operation in some fixed
amount of time that is independent of the location’s address.

5. What is MMU?

MMU is the Memory Management Unit. It is a special memory control circuit used for implementing the
mapping of the virtual address space onto the physical memory.

 6. Define memory cell?

A memory cell is capable of storing one bit of information. It is usually organized in the form of an array.

7. What is a word line?

In a memory cell, all the cells of a row are connected to a common line called as word line.

8. Define static memories?

Memories that consists of circuits capable of retaining their state as long as power

is applied is called Static memories.

 
9.What are the Characteristics of semiconductor RAM memories?

They are available in a wide range of speeds.•

Their cycle time range from 100ns to less than 10ns.•

They replaced the expensive magnetic core memories.•

They are used for implementing memories.•

10.Why SRAMs are said to be volatile?

Because their contents are lost when power is interrupted. So SRAMs are said to be volatile.

11.What are the Characteristics of SRAMs?

• SRAMs are fast.

• They are volatile.

• They are of high cost.

• Less density.

12.What are the Characteristics of DRAMs?

• Low cost.

• High density.

• Refresh circuitry is needed.

13.Define Refresh Circuit?

It is a circuit which ensures that the contents of a DRAM are maintained when each row of cells are accessed
periodically.

14.Define Memory Latency?

It is used to refer to the amount of time it takes to transfer a word of data to or from the memory.

15.what are asynchronous DRAMs?

In asynchronous DRAMs, the timing of the memory device is controlled asynchronously. A specialised
memory controller circuit provides the necessary control signals RAS and CAS that govern the timing.The
processor must take into account the delay in the response of the memory. such memories are asynchronous
DRAMs .

16.what are synchronous DRAMs?

Synchronous DRAMs are those whose operation is directly synchronized with a clock signal.

17.Define Bandwidth?

When transferring blocks of data, it is of interest to know how much time is needed to transfer an entire block.
since blocks can be variable in size it is useful to define a performance measure in terms of number of bits or
bytes that can be transferred in one second. This measure is often referred to as the memory bandwidth.

18. What is double data rate SDRAMs?

Double data rates SDRAMs are those which can transfer data on both edges of the clock and their bandwidth is
essentially doubled for long burst transfers.

19.What is motherboard?

Mother Board is a main system printed circuit board which contains the processor. It will occupy an
unacceptably large amount of space on the board.

20.What are SIMMs and DIMMs?

SIMMs are Single In-line Memory Modules. DIMMs are Dual In-line Memory Modules. Such modules are an
assembly of several memory chips on a separate small board that plugs vertically into a single socket on the
motherboard.

21.What is memory Controller?

A memory controller is a circuit which is interposed between the processor and the dynamic memory. It is used
for performing multiplexing of address bits.It provides RAS-CAS timing. It also sends R/W and CS signals to
the memory. When used with DRAM chips , which do not have self refreshing capability , the memory
controller has to

provide all the information needed to control the refreshing process.

22. Differentiate static RAM and dynamic RAM?

Static RAM Dynamic RAM

They are fast They are slow

They are very expensive They are less expensive

They retain their state indefinitely They do not retain their state indefinitely

They require several transistors They require less no transistors.

Low density High density

23. What is Ram Bus technology?

The key feature of Ram bus technology is a fast signaling method used to transfer information between chips.
Instead of using signals that have voltage levels of either 0 or V supply to represent the logic values, the
signals consist of much smaller voltage swings around a reference voltage, vref. Small voltage swings make it
possible to have short transition times, which allows for a high speed of transmission.

24.What are RIMMs?

RDRAM chips can be assembled in to larger modules called RIMMs. It can hold upto 16 RDRAMs.

25. What are RDRAMs?

RDRAMs are Rambus DRAMs. Rambus requires specially designed memory chips. These chips use cell
arrays based on the standard DRAM technology. Multiple banks of cell arrays are used to access more than
one word at atime. Circuitry needed to interface to the Rambus channel is included on the chip. Such chips are
known as RDRAMs.

26.What are the special features of Direct RDRAMs?

It is a two channel Rambus..•

It has 18 data lines intended to transfer two bytes of data at a time.•

There are no separate address lines.•

27. Define ROM?

It is a non-volatile memory. It involves only reading of stored data.

28.What are the features of PROM?

They are programmed directly by the user.•

Faster•

Less expensive•

More flexible.•

29.Why EPROM chips are mounted in packages that have transparent window?

Since the erasure requires dissipating the charges trapped in the transistors of memory cells. This can be done
by exposing the chip to UV light .

30.What are the disadvantages of EPROM?

The chip must be physically removed from the circuit for reprogramming and its entire contents are erased by
the ultraviolet light.

31.What are the advantages and disadvantages of using EEPROM?

The advantages are that EEPROMs do not have to be removed for erasure.Also it is possible to erase the cell
contents selectively. The only disadvantage is that different voltages are needed for erasing, writing and
reading the stored data.

32.What is cache memory?

It is a small, fast memory that is inserted between the larger, slower main memory and the processor. It reduces
the memory access time.

33. Differentiate flash devices and EEPROM devices.

Flash devices EEPROM devices

It is possible to read the contents

of a single cell, but it is only possible to write an entire block of cells. It is possible to read and write the
contents of a single cell.

Greater density which leads to higher capacity. Relatively lower density

Lower cost per bit.

Relatively more cost.

Consumes less power in their operation and makes it more attractive for use in portable equipments that is
battery driven. Consumes more power.

34.Define flash memory?

It is an approach similar to EEPROM technology. A flash cell is based on a single transistor controlled by
trapped charge just like an EEPROM cell.

35. What is locality of reference?

Analysis of programs shows that many instructions in localized areas of the program are executed repeatedly
during some time period., and the remainder of the program is accessed relatively infrequently. This is referred
to as locality of reference. This property leads to the effectiveness of cache mechanism.

36. What are the two aspects of locality of reference?. Define them.

Two aspects of locality of reference are temporal aspect and spatial aspect. Temporal aspect is that a recently
executed instruction is likely to be executed again very

soon. The spatial aspect is that instructions in close proximity to a recently executed instruction are also to be
executed soon.

37. Define cache line.

Cache block is used to refer to a set of contiguous address locations of some size. Cache block is also referred
to as cache line.

38.What are the two ways in which the system using cache can proceed for a write

operation?

Write through protocol technique.

Write-back or copy back protocol technique.

39. What is write through protocol?

For a write operation using write through protocol during write hit: the cache location and the main memory
location are updated simultaneously. For a write miss: For a write miss, the information is written directly to
the main memory.

40.When does a readmiss occur?

When the addressed word in a read operation is not in the cache, a read miss

occur.

41. What is write-back or copy back protocol?

For a write operation using this protocol during write hit: the technique is to update only the cache location and
to mark it as updated with an associated flag bit, often called the dirty or modified bit. The main memory
location of the word is updated later, when the block containing this marked word is to be removed from the
cache to make room for a new block. For a write miss: the block containing the addressed word is first brought
into the cache, and then the desired word in the cache is overwritten with the new information.

42.What is load-through or early restart?

When a read miss occurs for a system with cache the required word may be sent to the processor as soon as it
is read from the main memory instead of loading in to the cache. This approach is called load through or early
restart and it reduces the processor’s waiting period.

43.What are the mapping technique?

• Direct mapping

• Associative mapping

• Set Associative mapping

44.What is a hit?

A successful access to data in cache memory is called hit.

45.Define hit rate?

The number of hits stated as a fraction of all attempted access .

46.What are the two ways of constructing a larger module to mount flash chips on a small card?

• Flash cards

• Flash drivers.

47.Describe the memory hierarchy?

48.Define miss rate?

It is the number of misses stated as a fraction of attempted accesses.

49.Define miss penalty?

The extra time needed to bring the desired information into the cache.
 

50.Define access time for magnetic disks?

The sum of seek time and rotational delay is called as access time for disks. Seek time is the time required to
move the read/write head to the proper track. Rotational delay or latency is the amount of time that elapses
after the head is positioned over the correct track until the starting position of the addressed sector passes under
the read/write head.

51.What is phase encoding or Manchestor encoding?

It is one encoding technique for combining clocking information with data. It is a scheme in which changes in
magnetization occur for each data bit. It s disadvantage is poor bit-storage density.

52.What is the formula for calculating the average access time experienced by the processor?

tave=hc +(1-h)M

Where

h =Hit rate

M=miss penalty

C=Time to access information in the cache.

53. What is the formula for calculating the average access time experienced by the processor in a system with
two levels of caches?

tave =h1c1(1-h1)h2c2+(1-h1)(1-h2)M

where

h1=hit rate in L1 cache

h2=hit rate in L2 cache

C1=Time to access information in the L1 cache.

C2=Time to access information in the L2 cache.

54.What are prefetch instructions?

Prefetch Instructions are those instructions which can be inserted into a program either by the programmer or
by the compiler.

 
55.Define system space?

Management routines are part of the operating system of the computer.It is convenient to assemble the OS
routines into a virtual address space.

56.Define user space?

The system space is separated from virtual address space in which the user application programs reside. The
letter space is called user space.

57.What are pages?

All programs and data are composed of fixed length units called pages.each consists of blocks of words that
occupies contiguous locations in main memory.

58.What is replacement algorithm?

When the cache is full and a memory word that is not in the cache is referenced, the cache control hardware
must decide which block should be removed to create space for the new block that contains the reference
word .The collection of rules for making this decision constitutes the replacement algorithm.

59.What is dirty or modified bit?

The cache location is updated with an associated flag bit called dirty bit.

60.What is write miss?

During the write operation if the addressed word is not in cache then said to be write miss.

61.What is associative research?

The cost of an associative cache is higher than the cost of a direct mapped cache because of the need to search
all 128 tag patterns to determine whether a given block is in the cache. A search of this kind is called an
associative search.

62.What is virtual memory?

Techniques that automatically move program and datablocks into the physical main memory when they are
required for execution are called as virtual memory.

63.What is virtual address?

The binary address that the processor used for either instruction or data called as virtual address.

64.What is virtual page number?

Each virtual address generated by the processor whether it is for an instruction fetchis interpreted as a virtual
page.

65.What is page frame?

An area in the main memory that can hold one page is called as page frame.

66.What is Winchester technology?

The disk and the read/write heads are placed in a sealed air-filtered enclosure called Winchester technology.

67.What is a disk drive?

The electromechanical mechanism that spins the disk and moves the read/write heads called disk drive.

68.What is disk controller?

The electronic circuitry that controls the operation of the system called as disk controller.

69.What is main memory address?

The address of the first main memory location of the block of words involved in the transfer is called as main
memory address.

70.What is word count?

The number of words in the block to be transferred.

71.What is Error checking?

It computes the error correcting code (ECC)value for the data read from a given sector and compares it with
the corresponding ECC value read from the disk.

72.What is booting?
When the power is turned on the OS has to be loaded into the main memory which takes place as part of a
process called booting.To initiate booting a tiny part of main memory is implemented as a nonvolatile ROM.

73.What are the two states of processor?

Supervisor state•

User state.•

74.What is lockup-free?

A cache that can support multiple outstanding misses is called lockup-free.

75.Draw the static RAM cell?

16 Marks
1. Explain the various types of computer systems.

2. Explain how protection is provided for the hardware resources by the operating system.

3. What are the system components of an operating system and explain them?

4. Define system calls. Write about the various system calls.

5. What are the various process scheduling concepts

6. Explain about interprocess communication.

7. Explain the essential properties of the following types of Operating System.

i) Multiprogrammed Systems

ii) Time-sharing Systems

8. Explain the following:

i) Real-time Systems

ii) Distributed Systems

9. What is a process? Explain the process control block and the various process states.

10. Explain process creation and process termination

11. What are the important issue involved in the Design and Implementation of operating systems?

12. Discuss the design issues of distributed operating system.

13. Distinguish between multiprogramming (multi-tasking) and multiprocessing.

14. What are operating system services? Explain each one of them.

15. Explain Co-operating process with example.

16 Marks
1. Give an overview about threads.

2. Explain in detail about the threading issues.

3. a) Write about the various CPU scheduling algorithms.

b) Explain the various scheduling criteria used for comparing CPU scheduling algorithms.

4. Write notes about multiple-processor scheduling and real-time scheduling.

5. What is critical section problem and explain two process solutions and multiple process solutions?

6. Explain what semaphores are, their usage, implementation given to avoid busy waiting and binary
semaphores.

7. Explain the classic problems of synchronization.

8. Write about critical regions and monitors.

9. Explain about Dining Philosopher’s problem of Synchronization

Explain- Dinning philosopher Problem, algorithm

10. Explain about Producer Consumer Problem

Explain- Producer Consumer Problem, algorithm.

11. What is the job of a scheduling algorithm? State the objective of a good scheduling algorithm. Explain
round robin, priority and shortest job first scheduling algorithms.

12. a) Explain the criteria for scheduling.

b) Describe in detail the Multi-level feedback queue scheduling.

13. What is the advantage of having different time-quantum size at different levels in Multi-level Feedback
Queue (MFQ) based scheduling.

14. Explain the various CPU scheduling techniques with Gantt charts clearly as indicated by (process name,
arrival time, process time) for the following

(A, 0, 4), (B, 2, 7), (C, 3, 2) and (D, 3, 2) for FCFS,SJF,SRT,RR with quantum 1 and 2.

15. .. While running, a process priority change at rate A system uses the following preemptive priority-
scheduling algorithm (processes with larger priority numbers have high priority). Processes enter the system
with a priority of 0. While waiting on the ready queue, a process priority changes at rate

(1). What is the algorithm that results from >>0?

(2). What is the algorithm that results from <<0?

Justify your statement.

16. a) Explain process scheduler.

b) What is context switching? Explain briefly.

17. What are p-threads? Explain with the code.

16 Marks
1. What is demand paging and what is its use?

2. Explain the various page replacement strategies.

3. What is thrashing and explain the methods to avoid thrashing?

4. Explain about Access Methods.

5. What are files and explain the access methods for files?

6. Explain the schemes for defining the logical structure of a directory.

7. Write notes about the protection strategies provided for files.

8. Explain in detail the WS clock page replacement algorithm.

9. What is page fault? Explain the procedure for handling the page fault using Demand paging?

10. Explain I/O Interlock.

11. Explain the following Page Replacement Algorithms:

i. Optimal Algorithm

ii. LRU approximation Algorithm

iii. Page Buffering Algorithm

iv. Counting Algorithm

12. Explain in thrashing in detail.

13. Explain Allocation of frames.

14. Give references to the following pages by a program,

0,9,0,1,8, 1,8,7,8,7, 1,2,8,2,7, 8,2,3,8,3.

 
How many page faults will occur if the program has three page frames available to it and uses:

(a). FIFO replacement? (8 Faults)

(b). LRU replacement? (9 Faults)

(c). Optimal replacement? (7 Faults)

15. Consider the following page reference string:

1, 2, 3, 4, 2, 1, 5, 6, 2, 1, 2, 3, 7, 6, 3, 2, 1, 2, 3, 6.

How many page faults would occur for the following replacement algorithms, assuming one, two, three, four,
five, six, or seven frames? Remember all frames are initially empty, so your first unique pages will all cost one
fault each.

(a). LRU replacement

(b). FIFO replacement

(c). Optimal replacement

Answer:

Number of frames LRU FIFO Optimal

1 20 20 20

2 18 18 15

3 15 16 11

4 10 14 8

5 8 10 7

6 7 10 7

7777

16. A page-replacement algorithm should minimize the number of page faults. We can do this minimization by
distributing heavily used pages evenly over all of memory, rather than having them compete for a small
number of page frames. We can associate with each page frame a counter of the number of pages that are
associated with that frame. Then, to replace a page, we search for the page frame with the smallest counter.

(a). Define a page-replacement algorithm using this basic idea. Specifically address the problems of (1) what
the initial value of the counters is, (2) when counters are increased,(3) when counters are decreased, and (4)
how the page to be replaced is selected.

 
(b). How many page faults occur for your algorithm for the following reference string, for four page frames?

1, 2, 3, 4, 5, 3, 4, 1, 6, 7, 8, 7, 8, 9, 7, 8, 9, 5, 4, 5, 4, 2.

(c). What is the minimum number of page faults for an optimal page-replacement strategy for the reference
string in part b with four page frames?

Answer:

(a). Define a page-replacement algorithm addressing the problems of:

i. Initial value of the counters—0.

ii. Counters are increased—whenever a new page is associated with that frame.

iii. Counters are decreased—whenever one of the pages associated with that frame

is no longer required.

iv. How the page to be replaced is selected—find a frame with the smallest counter. Use FIFO for breaking
ties.

(b). 14 page faults

(c). 11 page faults

16 Marks
1)      Explain in detail the critical characteristics of information

2)      Explain the components of an Information System.

3)      Explain How components are secured in an information system?

4)      Explain in detail the various phases of System Development Life Cycle(SDLC)?

5)      Explain in detail the Security System Development Life Cycle(SecSDLC)

6)      Explain the history of information security

7)      Explain the approaches used for implementing information security

8)      Explain the critical characrteristics of information

9)      Explain NSTISSC Security model

10)  Describe the information security roles to be played by various professionals in a typical organization

11)  Write a note on balancing Security and Access

12)  Explain with examples various threats to Information Security.

16 Marks
1. For a given mechanical or electrical or electromechanical system

Derive the transfer Function.

2.Determination of the overall transfer function using Block diagram

Reduction technique.

Reduction of block diagram

Determination of Transfer function

3. Determination of the overall transfer function from the given signal flow

Graph using Mason’s gain formula.

Reduction of signal flow graph

Apply masons gain formula

4. Explain the working of Synchro transmitter and receiver.

. Diagram

. Working principle

5.Explain ac and dc servomotors

6.Write the procedure for constructing the block diagram of a given

Mechanical or electrical or electromechanical system.

Write the differential equation

Develop block diagram

7.Find the electrical analogical variables of a mechanical rotational

System.

Write the differential equation

Draw the equivalent electrical network

 
16 Marks
1.. Derive the expressions of the time domain specifications for a second

order system with unit step input.

. Time response of second order system

. Rise time

. Peak time

. Peak overshoot

. Settling time

2. Find the time response of a first order system for various standard inputs.

. Apply the input

. Solve using partial differential equation

. Apply inverse Laplace transform

3. Find the time response of a second order system for unit step input.

. Apply the input

. Solve using partial differential equation

. Apply inverse Laplace transform

4..Problems using static error coefficients or generalized error coefficients.

. Find the error coefficient

. Apply in formula

5.Obtain the unit step response of an unity feed back system whose open loop transfer function is G(s)
=5(s+20)/s(s+4.5)(s2+3.14s+16.35)

6.For a second order system whose open loop transfer function

is given to the system. Find the rise time, time constant and the settling time for an error of 7%.G(s) =4
/s(s+2). Determine the maximum overshoot, and then time to reach the maximum overshoot when a step
displacement of 18

7.For the system shown in the figure determine the values of K and Kh so that the maximum overshoot in the
unit step response is 0.2 and the peak time is 1 sec. With these values of K and Kh, obtain rise time and settling
time