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PRODUCT SPECIFICATION

Doc. Number:

ˎġ Tentative Specification
ˎġ Preliminary Specification
ˊġ Approval Specification

MODEL NO.: N156HHE

SUFFIX: GA1 Rev.C3

Customer: msi

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PRODUCT SPECIFICATION

CONTENTS
1. GENERAL DESCRIPTION ......................................................................................................... 4
1.1 OVERVIEW ..................................................................................................................4
1.2 GENERAL SPECIFICATIONS......................................................................................4
2. MECHANICAL SPECIFICATIONS ............................................................................................. 4
2.1 CONNECTOR TYPE ....................................................................................................5
3. ABSOLUTE MAXIMUM RATINGS ............................................................................................. 5
3.1 ABSOLUTE RATINGS OF ENVIRONMENT ................................................................5
3.2 ELECTRICAL ABSOLUTE RATINGS...........................................................................6
3.2.1 TFT LCD MODULE ............................................................................................... 6
4. ELECTRICAL SPECIFICATIONS ............................................................................................... 7
4.1 FUNCTION BLOCK DIAGRAM ....................................................................................7
4.2. INTERFACE CONNECTIONS.....................................................................................7
4.3 ELECTRICAL CHARACTERISTICS ............................................................................9
4.3.1 LCD ELETRONICS SPECIFICATION ................................................................... 9
4.3.2 LED CONVERTER SPECIFICATION ................................................................. 11
4.3.3 BACKLIGHT UNIT .............................................................................................. 13
4.4 DISPLAY PORT SIGNAL TIMING SPECIFICATION ..................................................14
4.4.1 DISPLAY PORT INTERFACE ............................................................................. 14
4.4.2 COLOR DATA INPUT ASSIGNMENT ................................................................. 15
4.5 DISPLAY TIMING SPECIFICATIONS ........................................................................16
4.6 POWER ON/OFF SEQUENCE ..................................................................................17
5. OPTICAL CHARACTERISTICS ............................................................................................... 20
5.1 TEST CONDITIONS...................................................................................................20
5.2 OPTICAL SPECIFICATIONS .....................................................................................20
6. RELIABILITY TEST ITEM ........................................................................................................ 24
7. PACKING .................................................................................................................................. 25
7.1 MODULE LABEL........................................................................................................25
7.2 CARTON ....................................................................................................................26
7.3 PALLET ......................................................................................................................27
7.4 UN-PACKAGING METHOD .......................................................................................28
8. PRECAUTIONS ........................................................................................................................ 29
8.1 HANDLING PRECAUTIONS ......................................................................................29
8.2 STORAGE PRECAUTIONS .......................................................................................29
8.3 OPERATION PRECAUTIONS ...................................................................................29
Appendix. EDID DATA STRUCTURE ...............................................................................30
Appendix. OUTLINE DRAWING ......................................................................................33
Appendix. SYSTEM COVER DESIGN NOTICE...............................................................35
Appendix. LCD MODULE HANDLING MANUAL .............................................................43

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PRODUCT SPECIFICATION

REVISION HISTORY

Version Date Page Description

1.0 Feb. 10, 2017 All Spec Ver.1.0 was first issued.

1.1 Feb. 20, 2017 11 Modified 4.3.2 LED CONVERTER SPECIFICATION.

- - 20 Modified 5.2 OPTICAL SPECIFICATIONS.

1.2 Mar. 08, 2017 4 Modified 1.2 GENERAL SPECIFICATIONS.

1.3 Mar. 10, 2017 9 Modified 4.3.1 LCD ELETRONICS SPECIFICATION.

1.4 Apr. 27, 2017 4 Modified 1.2 GENERAL SPECIFICATIONS.

- - 6 Modified 3.2.1 TFT LCD MODULE.

- - 9 Modified 4.3.1 LCD ELETRONICS SPECIFICATION.

- - 11 Modified 4.3.2 LED CONVERTER SPECIFICATION.

- - 16 Modified 4.5 DISPLAY TIMING SPECIFICATIONS.

- - 18-19 Modified 4.6 POWER ON/OFF SEQUENCE.

- - 33-34 Modified Appendix. OUTLINE DRAWING.

3.0 Jun. 7, 2017 ALL Spec Ver.3.0 was first issued.

- - 4 Modified 1.2 GENERAL SPECIFICATIONS.

- - 9 Modified 4.3.1 LCD ELETRONICS SPECIFICATION.

- - 11 Modified 4.3.2 LED CONVERTER SPECIFICATION.

- - 13 Modified 4.3.3 BACKLIGHT UNIT.

- - 20 Modified 5.1 TEST CONDITIONS & 5.2 OPTICAL SPECIFICATIONS.

3.1 Oct. 6, 2017 1 Modified Rev. to C3.

- - 33 Modified Appendix. OUTLINE DRAWING.

3.2 Nov. 3, 2017 33 Modified Appendix. OUTLINE DRAWING.

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PRODUCT SPECIFICATION

1. GENERAL DESCRIPTION
1.1 OVERVIEW
N156HHE-GA1 is a 15.6” TFT Liquid Crystal Display module with LED Backlight unit and 30 pins eDP
interface. This module supports 1920 x 1080 FHD mode and can display 16,777,216 colors.
1.2 GENERAL SPECIFICATIONS
Item Specification Unit Note
Screen Size 15.6” diagonal - -
Driver Element a-si TFT active matrix - -
Pixel Number 1920 x R.G.B. x 1080 pixel -
Pixel Pitch 0.17925 (H) x 0.17925 (V) mm -
Pixel Arrangement RGB vertical stripe - -
Display Colors 16,777,216 color -
Transmissive Mode Normally white - -
Surface Treatment Hard coating (3H), Anti-Glare - -
Color Gamut 94% NTSC -
Luminance, White 300 Cd/m2 -
Power Consumption Total 6.3867 W (Max.) @ Cell 2.0427 W (Max.), BL 4.344 W (Max.) (1)
Note (1) The specified power consumption (with converter efficiency) is under the conditions at VCCS =
3.3 V, fv = 120 Hz, LED_VCCS = Typ, fPWM = 200 Hz, Duty=100% and Ta = 25 ± 2 ºC, whereas mosaic
pattern is displayed.

2. MECHANICAL SPECIFICATIONS
Item Min. Typ. Max. Unit Note
Horizontal (H) 359 359.5 360 mm
Vertical (V) 206 206.5 207 mm
Module Size Vertical (V) (1)
- - 224.3 mm (2)
with PCB & Bracket
Thickness (T) - - 3.2 mm
Horizontal 347.16 347.36 347.56 mm -
Polarizer Area
Vertical 196.59 196.79 196.99 mm -
Horizontal 344.06 344.16 344.26 mm -
Active Area
Vertical 193.49 193.59 193.69 mm -
Weight - 350 360 g -
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
Note (2) Dimensions are measured by caliper.

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PRODUCT SPECIFICATION

2.1 CONNECTOR TYPE

Please refer Appendix Outline Drawing for detail design.
Connector Part No.: IPEX-20455-030E-76.
User’s connector Part No: IPEX-20453-030T-03.

3. ABSOLUTE MAXIMUM RATINGS

3.1 ABSOLUTE RATINGS OF ENVIRONMENT
Value
Item Symbol Unit Note
Min. Max.
Storage Temperature TST -20 +60 ºC (1)
Operating Ambient Temperature TOP 0 +50 ºC (1), (2)
Note (1) (a) 90 %RH Max. (Ta < 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max.
(c) No condensation.
Note (2) The temperature of panel surface should be 0 ºC min. and 60 ºC max.

Relative Humidity (%RH)

100
90
80

60
Operating

40

20
10 Storage Range

-40 -20 0 20 40 60 80

Temperature (ºC)

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PRODUCT SPECIFICATION

3.2 ELECTRICAL ABSOLUTE RATINGS

3.2.1 TFT LCD MODULE
Value
Item Symbol Unit Note
Min. Max.
Power Supply Voltage VCCS -0.3 +4.0 V
(1)
Logic Input Voltage VIN -0.3 +4.0 V
Converter Input Voltage LED_VCCS -0.3 26 V (1)
Converter Control Signal Voltage LED_PWM, -0.3 5 V (1)
Converter Control Signal Voltage LED_EN -0.3 5 V (1)
Note (1) Stresses beyond those listed in above “ELECTRICAL ABSOLUTE RATINGS” may cause
permanent damage to the device. Normal operation should be restricted to the conditions
described in “ELECTRICAL CHARACTERISTICS”.

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PRODUCT SPECIFICATION

4. ELECTRICAL SPECIFICATIONS
4.1 FUNCTION BLOCK DIAGRAM

SCAN DRIVER CIRCUIT

TIMING

Display port CONTROLLER TFT LCD PANEL

Signals
INPUT CONNECTOR

EDID
EEPROM
VCCS
DC/DC CONVERTER &
GND
REFERENCE VOLTAGE
GENERATOR DATA DRIVER IC
OD_EN

Converter LED BACKLIGHT UNIT

Input Signals CONVERTER

4.2. INTERFACE CONNECTIONS

PIN ASSIGNMENT
Pin Symbol Description Remark
1 NC No Connection (Reserved for LCD test)
2 H_GND High Speed Ground
3 ML1- Complement Signal-Lane 1
4 ML1+ True Signal-Main Lane 1
5 H_GND High Speed Ground
6 ML0- Complement Signal-Lane 0
7 ML0+ True Signal-Main Lane 0
8 H_GND High Speed Ground
9 AUX+ True Signal-Auxiliary Channel
10 AUX- Complement Signal-Auxiliary Channel
11 H_GND High Speed Ground
12 VCCS Power Supply +3.3 V (typical)
13 VCCS Power Supply +3.3 V (typical)
14 NC No Connection (Reserved for LCD test)
15 GND Ground
16 GND Ground
17 HPD Hot Plug Detect
18 BL_GND BL Ground
19 BL_GND BL Ground
20 BL_GND BL Ground
21 BL_GND BL Ground
22 LED_EN BL_Enable Signal of LED Converter
23 LED_PWM PWM Dimming Control Signal of LED Converter
24 NC No Connection (Reserved for LCD test)

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PRODUCT SPECIFICATION

25 NC No Connection (Reserved for LCD test)

26 LED_VCCS BL Power
27 LED_VCCS BL Power
28 LED_VCCS BL Power
29 LED_VCCS BL Power
30 OD_EN OD Enable Input

Note (1) The first pixel is odd as shown in the following figure.

Note (2) The setting of OD function is as follows.

Pin Enable Disable
OD_EN Hi or Open Lo
Hi = High level, Lo = Low level.

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PRODUCT SPECIFICATION

4.3 ELECTRICAL CHARACTERISTICS

4.3.1 LCD ELETRONICS SPECIFICATION
Value
Parameter Symbol Unit Note
Min. Typ. Max.
Power Supply Voltage VCCS 3.0 3.3 3.6 V (1)
High Level - 2.25 - 3.6 V (4)
HPD
Low Level - 0 - 0.4 V (4)
HPD Impedance RHPD 30K - - ohm (4)
Ripple Voltage VRP - - 100 mV (1)

OD_EN Input High Level VIHOD 1.7 - 1.9 V (4)

Voltage Low Level VILOD 0 - 0.3 V (4)
OD_EN Impedance ROD_EN 30K - - ohm (4)
Inrush Current IRUSH - - 1.5 A (1),(2)
Initial Current IIS - - 1.5 A (1),(2)
Mosaic 489 541 619 mA (3)a
Power Supply Current lcc
Black 459 515 591 mA (3)
Note (1) The ambient temperature is Ta = 25 ± 2 ºC.
Note (2) IRUSH: the maximum current when VCCS is rising
IIS: the maximum current of the first 100ms after power-on
Measurement Conditions: Shown as the following figure. Test pattern: black.
+3.3V
Q1 2SK1475

VCCS
C3
FUSE (LCD Module Input)

R1 1uF

47K

(High to Low)
(Control Signal) Q2
R2
SW 2SK1470

1K
+12V

47K C2
VR1

C1
0.01uF

1uF

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PRODUCT SPECIFICATION

VCCS rising time is 0.5ms

Note (3) The specified power supply current is under the conditions at VCCS = 3.3 V, Ta = 25 ± 2 ºC, DC
Current and f v = 60 Hz, whereas a power dissipation check pattern below is displayed.

a. Mosaic Pattern

Active Area

Note (4) The specified signals have equivalent impedances pull down to ground in the LCD module
respectively. Customers should keep the input signal level requirement with the load of LCD
module. Please refer to Note (4) of 4.3.2 LED CONVERTER SPECIFICATION to obtain more
information.

Note (5) When a source detects a low-going HPD pulse, it must be regarded as a HPD event. Thus, the
source must read the link / sink status field or receiver capability field of the DPCD and take
corrective action.

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PRODUCT SPECIFICATION

4.3.2 LED CONVERTER SPECIFICATION

Value
Parameter Symbol Unit Note
Min. Typ. Max.

Converter Input power supply voltage LED_Vccs 8 12.0 21.0 V -

Converter Inrush Current ILEDRUSH - - 1.5 A (1)

Backlight On 2.2 - 5.0 V (4)

LED_EN Control
-
Level
Backlight Off 0 - 0.6 V (4)

LED_EN Impedance RLED_EN 30K - - ohm (4)

PWM High Level 2.2 - 5.0 V (4)

PWM Control Level
PWM Low Level 0 - 0.6 V (4)
-
PWM Impedance 30K - - ohm (4)

PWM Control Duty Ratio 5 - 100 % (5)

PWM Control Permissive Ripple
VPWM_pp - - 100 mV -
Voltage
PWM Control Frequency f PWM 190 - 2K Hz (2)

LED Power Current LED_VCCS =Typ. ILED 286 342 362 mA (3)

Note (1) ILEDRUSH: the maximum current when LED_VCCS is rising,

ILEDIS: the maximum current of the first 100ms after power-on,
Measurement Conditions: Shown as the following figure. LED_VCCS = Typ, Ta = 25 ± 2 ºC, fPWM
= 200 Hz, Duty=100%.

LED_VCCS(Typ)
Q1 IRL3303

C3
FUSE (LED Converter Input)

R1 1uF

47K

(High to Low)
(Control Signal) Q2
R2
SW=24V IRL3303

1K
LED_VCCS(Typ)

47K C2
VR1

C1
0.01uF

1uF

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PRODUCT SPECIFICATION

VLED rising time is 0.5ms

0.5ms
90%

LED_VCC 0V 10%

LED_PWM 0V

100ms
LED_EN 0V
ILEDIS
ILEDRush

ILED

Note (2) If PWM control frequency is applied in the range less than 1KHz, the “waterfall” phenomenon on the
screen may be found. To avoid the issue, it’s a suggestion that PWM control frequency should follow
the criterion as below.

PWM control frequency f PWM should be in the range

( N + 0.33) ∗ f ≤ fPWM ≤ ( N + 0.66) ∗ f
N : Integer ( N ≥ 3)
f : Frame rate
Note (3) The specified LED power supply current is under the conditions at “LED_VCCS = Typ.”, Ta = 25
± 2 ºC, f PWM = 200 Hz, Duty=100%.
Note (4) The specified signals have equivalent impedances pull down to ground in the LCD module
respectively. Customers should keep the input signal level requirement with the load of LCD
module. For example, the figure below describes the equivalent pull down impedance of
LED_EN (If it exists). The rest pull down impedances of other signals (eg. HPD, PWM …) are in
the same concept.

Note (5) If the cycle-to-cycle difference of PWM duty exceeds 0.1%, especially when the PWM duty is
low, slight brightness change might be observed.

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PRODUCT SPECIFICATION

4.3.3 BACKLIGHT UNIT

Ta = 25 ± 2 ºC
Value
Parameter Symbol Unit Note
Min. Typ. Max.
LED Light Bar Power
VL 28.6 31.4 33 V
Supply Voltage
(1)(2)(Duty100%)
LED Light Bar Power
IL - 110.4 - mA
Supply Current

Power Consumption PL - 3.461 3.643 W (3)

LED Life Time LBL 15000 - - Hrs (4)
Note (1) LED current is measured by utilizing a high frequency current meter as shown below :

VL, IL

LED
Light Bar
Light Bar Feedback
Channels

Note (2) For better LED light bar driving quality, it is recommended to utilize the adaptive boost converter with
current balancing function to drive LED light-bar.

Note (3) PL = IL ×VL (Without LED converter transfer efficiency)

Note (4) The lifetime of LED is defined as the time when it continues to operate under the conditions at Ta = 25
o
±2 C and IL = 18.4 mA (Per EA) until the brightness becomes ʀ 50% of its original value.

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PRODUCT SPECIFICATION

4.4 DISPLAY PORT SIGNAL TIMING SPECIFICATION

4.4.1 DISPLAY PORT INTERFACE
Parameter Symbol Min. Typ. Max. Unit Notes
Differential Signal Common Mode
VCM 0 - 2 V (1)(4)
Voltage(MainLink and AUX)
AUX AC Coupling Capacitor C_Aux_Source 75 - 200 nF (2)
Main Link AC Coupling Capacitor C_ML_Source 75 - 200 nF (3)
Note (1) Display port interface related AC coupled signals should follow VESA DisplayPort Standard
TM
Version1. Revision 1a and VESA Embedded DisplayPort Standard Version 1.2. There are many
optional items described in eDP1.3. If some optional item is requested, please contact us.
VD+
VCM |VID|
VD-
Single Ended

0V
Note (2) Recommended eDP AUX Channel topology is as below and the AUX AC Coupling Capacitor
(C_Aux_Source) should be placed on the source device.

Note (3) Recommended Main Link Channel topology is as below and the Main Link AC Coupling
Capacitor (C_ML_Source) should be placed on the source device.

Note (4) The source device should pass the test criteria described in DisplayPortCompliance Test
Specification (CTS) 1.1.

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PRODUCT SPECIFICATION

4.4.2 COLOR DATA INPUT ASSIGNMENT

The brightness of each primary color (red, green and blue) is based on the 8-bit gray scale data input
for the color. The higher the binary input the brighter the color. The table below provides the assignment
of color versus data input.

Data Signal
Color
Red Green Blue
R7 R6 R5 R4 R3 R2 R1 R0 G7 G6 G5 G4 G3 G2 G1 G0 B7 B6 B5 B4 B3 B2 B1 B0
Black 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Green 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
Basic Blue 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
Colors Cyan 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Magenta 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
Yellow 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
White 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Red(0)/Dark 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red(1) 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Gray Red(2) 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Scale : : : : : : : : : : : : : : : : : : : : : : : : :
Of : : : : : : : : : : : : : : : : : : : : : : : : :
Red Red(253) 1 1 1 1 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red(254) 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red(255) 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Green(0)/Dark 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Green(1) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0
Gray Green(2) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0
Scale : : : : : : : : : : : : : : : : : : : : : : : : :
Of : : : : : : : : : : : : : : : : : : : : : : : : :
Green Green(253) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 0 1 0 0 0 0 0 0 0 0
Green(254) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0
Green(255) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
Blue(0)/Dark 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Blue(1) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
Gray Blue(2) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
Scale : : : : : : : : : : : : : : : : : : : : : : : : :
Of : : : : : : : : : : : : : : : : : : : : : : : : :
Blue Blue(253) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 0 1
Blue(254) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0
Blue(255) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
Note (1) 0: Low Level Voltage, 1: High Level Voltage

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PRODUCT SPECIFICATION

4.5 DISPLAY TIMING SPECIFICATIONS

The input signal timing specifications are shown as the following table and timing diagram.
Refresh rate 120Hz
Signal Item Symbol Min. Typ. Max. Unit Note
DCLK Frequency 1/Tc 283.63 285.05 286.47 MHz -
Vertical Total Time TV 1138 1142 1146 TH -
Vertical Active Display Period TVD 1080 1080 1080 TH -
Vertical Active Blanking Period TVB TV-TVD 62 TV-TVD TH -
DE
Horizontal Total Time TH 2060 2080 2100 Tc -
Horizontal Active Display Period THD 1920 1920 1920 Tc -
Horizontal Active Blanking Period THB TH-THD 160 TH-THD Tc -

INPUT SIGNAL TIMING DIAGRAM

Tv
TVD

DE

TH

DCLK
TC
THD
DE

DATA

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PRODUCT SPECIFICATION

4.6 POWER ON/OFF SEQUENCE

The power sequence specifications are shown as the following table and diagram.

Power On Power Off Restart

t11
90%
90%
-Power Supply 10% 10%
10%
for LCD, VCCS 0V t1
t12
t10
t2

-eDP Display Black Video Video from Source Black Video

t3

-HPD from Sink

0V

-AUX Channel AUX Channel Operational

t4 t7

Link
-Main Link Data Idle Valid Video Data Idle or off
Training

t5 t6 t8 t9

90% 90%
- Power Supply for
LED Converter, 10% 10%
LED_VCCS 0V
tA tB
tC tD

- LED Converter
Dimming Signal, 0V
LED_PWM
tE tF

- LED Converter
Enable Signal, 0V
LED_EN

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PRODUCT SPECIFICATION

Timing Specifications:
Reqd. Value
Parameter Description Unit Notes
By Min Max
t1 Power rail rise time, 10% to 90% Source 0.5 10 ms -
Automatic Black Video
generation prevents
Delay from LCD,VCCS to black display noise until valid
t2 Sink 0 200 ms video data is received
video generation
from the Source (see
Notes:2 and 3 below)
Sink AUX Channel
Delay from LCD,VCCS to HPD must be operational
t3 Sink 0 200 ms upon HPD high (see
high
Note:4 below )
Allows for Source to
Delay from HPD high to link
t4 Source 0 - ms read Link capability and
training initialization initialize
Dependant on Source
t5 Link training duration Source 0 - ms link training protocol
Min Accounts for
required BS-Idle
t6 Link idle Source 0 - ms pattern. Max allows for
Source frame
synchronization
Max value allows for
Sink to validate video
data and timing. At the
end of T7, Sink will
indicate the detection of
Delay from valid video data from valid video data by
t7 Sink 0 50 ms setting the
Source to video on display
SINK_STATUS bit to
logic 1 (DPCD 00205h,
bit 0), and Sink will no
longer generate
automatic Black Video
Source must assure
display video is stable
Delay from valid video data from
t8 Source 80 - ms *: Recommended by
Source to backlight on INX. To avoid garbage
image.
Source must assure
backlight is no longer
illuminated. At the end
of T9, Sink will indicate
the detection of no valid
video data by setting
the SINK_STATUS bit
Delay from backlight off to end of to logic 0 (DPCD
t9 Source 50 - ms 00205h, bit 0), and Sink
valid video data
will automatically
display Black Video.
(See Notes: 2 and 3
below)
*: Recommended by
INX. To avoid garbage
image.
Black video will be
Delay from end of valid video data displayed after
t10 Source 0 500 ms receiving idle or off
from Source to power off
signals from Source
VCCS power rail fall time, 90% to
t11 Source 0.5 10 ms -
10%

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t12 VCCS Power off time Source 500 - ms -

LED power rail rise time, 10% to
tA Source 0.5 10 ms -
90%
LED power rail fall time, 90% to
tB Source 0 10 ms -
10%
Delay from LED power rising to
tC Source 1 - ms -
LED dimming signal
Delay from LED dimming signal to
tD Source 1 - ms -
LED power falling
Delay from LED dimming signal to
tE Source 0 - ms -
LED enable signal
Delay from LED enable signal to
tF Source 0 - ms -
LED dimming signal
Note (1) Please don’t plug or unplug the interface cable when system is turned on.
Note (2) The Sink must include the ability to automatically generate Black Video autonomously. The Sink must
automatically enable Black Video under the following conditions:
- Upon LCDVCC power-on (within T2 max)
- When the “NoVideoStream_Flag” (VB-ID Bit 3) is received from the Source (at the end of T9)
Note (3) The Sink may implement the ability to disable the automatic Black Video function, as described in
Note (2), above, for system development and debugging purposes.
Note (4) The Sink must support AUX Channel polling by the Source immediately following LCDVCC
power-on without causing damage to the Sink device (the Source can re-try if the Sink is not
ready). The Sink must be able to response to an AUX Channel transaction with the time specified
within T3 max.

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5. OPTICAL CHARACTERISTICS
5.1 TEST CONDITIONS
Item Symbol Value Unit
o
Ambient Temperature Ta 25±2 C
Ambient Humidity Ha 50±10 %RH
Supply Voltage VCC 3.3 V
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
LED Light Bar Input Current IL 110.4 mA
The measurement methods of optical characteristics are shown in Section 5.2. The following items
should be measured under the test conditions described in Section 5.1 and stable environment shown in
Note (5).

5.2 OPTICAL SPECIFICATIONS

Item Symbol Condition Min. Typ. Max. Unit Note
(2),
Contrast Ratio CR 400 500 - -
(5) ,(7)
TR - 1.5 2.5 ms
Response Time TF - 3.5 5.5 ms (3) ,(7)
TG2G - 3 8 ms
(4),
Average Luminance of White LAVE 255 300 - cd/m2
(6) ,(7)
Rx θx=0°, θY =0° 0.682 -
Red Viewing Normal Angle
Ry 0.309 -
Gx 0.268 -
Green
Color Gy Typ – 0.673 Typ + -
(1) ,(7)
Chromaticity Bx 0.03 0.150 0.03 -
Blue
By 0.064 -
Wx 0.313 -
White
Wy 0.329 -
θx+ 75 85 -
Horizontal
θx- 75 85 - (1),(5) ,
Viewing Angle CR≥10 Deg.
θY+ 50 60 - (7)
Vertical
θY- 50 60 -
(5),(6) ,
White Variation δW 5p θx=0°, θY =0° 80 90 - %
(7)

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Note (1) Definition of Viewing Angle (θx, θy):

Normal
θx = θy = 0º

θy- θy+

θX- = 90º x- 12 o’clock direction

y+
θx− θy+ = 90º
θx+

6 o’clock
y- x+ θX+ = 90º
θy- = 90º

Note (2) Definition of Contrast Ratio (CR):

The contrast ratio can be calculated by the following expression.
Contrast Ratio (CR) = L255 / L0
L255: Luminance of gray level 255
L 0: Luminance of gray level 0
CR = CR (1)
CR (X) is corresponding to the Contrast Ratio of the point X at Figure in Note (6).
Note (3) Definition of Response Time (TR, TF , TG2G):

Gray Level 255 Gray Level 255

100%

90%

Optical
Response
Gray Level 0
10%

0%

Time
TR TF

66.67 ms 66.67 ms

The TG2G can be calculated by the following expression.

TG2G=Average (TN,M)
TN,M: Response time from gray level N to M.
N, M: 0, 31, 63, 95, 127, 159, 191, 223, 255

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The TN,M is processed by ODC ( Over Driving Circuit) function

Note (4) Definition of Average Luminance of White (LAVE):

Measure the luminance of gray level 255 at 5 points
LAVE = [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5
L (x) is corresponding to the luminance of the point X at Figure in Note (6)
Note (5) Measurement Setup:
The LCD module should be stabilized at given temperature for 20 minutes to avoid abrupt
temperature change during measuring. In order to stabilize the luminance, the measurement
should be executed after lighting Backlight for 20 minutes in a windless room.

LCD Module

LCD Panel

USB2000 or equivalent CS-2000T or equivalent

Center of the Screen

Light Shield Room
500 mm
(Ambient Luminance < 2 lux)
ġ

Note (6) Definition of White Variation (δW):

Measure the luminance of gray level 255 at 5 points
δW 5p = {Minimum [L (1) ~ L (5)] / Maximum [L (1) ~ L (5)]}*100%

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IJıŮŮ ķ ĸ Ĺ
ʼnİĵ

ij Ĵ

X : Test Point
ʼnİĵ

X=1 to 13
ĺ IJ IJı
ʼn
ʼnİĵ

ĵ Ķ
ʼnİĵ

IJIJ IJij IJĴ

IJıŮŮ IJıŮŮ
IJıŮŮ

Řİĵ Řİĵ Řİĵ Řİĵ

Ř
Active area
Note (7) The listed optical specifications refer to the initial value of manufacture, but the condition of
the specifications after long-term operation will not be warranted.

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6. RELIABILITY TEST ITEM

Test Item Test Condition Note

High Temperature Storage Test 60ºC, 240 hours
Low Temperature Storage Test -20ºC, 240 hours
Thermal Shock Storage Test -20ºC, 0.5hourɤɦ60ɗ, 0.5hour; 100cycles, 1hour/cycle
High Temperature Operation Test 50ºC, 240 hours (1) (2)
Low Temperature Operation Test 0ºC, 240 hours

High Temperature & High Humidity

50ºC, RH 80%, 240hours
Operation Test

150pF, 330ȟ, 1sec/cycle

ESD Test (Operation) Condition 1 : Contact Discharge, Ʋ8KV (1)
Condition 2 : Air Discharge, Ʋ15KV

220G, 2ms, half sine wave,1 time for each direction of

Shock (Non-Operating) (1)(3)
±X,±Y,±Z

1.5G / 10-500 Hz, Sine wave, 30 min/cycle, 1cycle for each

Vibration (Non-Operating) (1)(3)
X, Y, Z

Note (1) criteria: Normal display image with no obvious non-uniformity and no line defect.

Note (2) Evaluation should be tested after storage at room temperature for more than two hour

Note (3) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough
so that the module would not be twisted or bent by the fixture.

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7. PACKING
7.1 MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.

(a) Model Name: N156HHE-GA1

(b) Revision: Rev. XX, for example: C1, C2 …etc.
(c) Serial ID: X X X X X X X Y M D X N N N N

Serial No.
INX Internal Use
Year, Month, Date
INX Internal Use
Revision
INX Internal Use

(d) Production Location: MADE IN XXXX.

(e) UL logo: “XXXX” especially stands for panel manufactured by INX satisfying UL requirement.
Serial ID includes the information as below:
(a) Manufactured Date: Year: 1~9, for 2011~2019
Month: 1~9, A~C, for Jan. ~ Dec.
st st
Day: 1~9, A~Y, for 1 to 31 , exclude I , O and U
(b) Revision Code: cover all the change
(c) Serial No.: Manufacturing sequence of product

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7.2 CARTON

Figure. 7-1 Packing method

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7.3 PALLET

Figure. 7-2 Packing method

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7.4 UN-PACKAGING METHOD

Figure. 7-3 Un-Packing method

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8. PRECAUTIONS
8.1 HANDLING PRECAUTIONS
(1) The module should be assembled into the system firmly by using every mounting hole. Be careful
not to twist or bend the module.
(2) While assembling or installing modules, it can only be in the clean area. The dust and oil may cause
electrical short or damage the polarizer.
(3) Use fingerstalls or soft gloves in order to keep display clean during the incoming inspection and
assembly process.
(4) Do not press or scratch the surface harder than a HB pencil lead on the panel because the polarizer
is very soft and easily scratched.
(5) If the surface of the polarizer is dirty, please clean it by some absorbent cotton or soft cloth. Do not
use Ketone type materials (ex. Acetone), Ethyl alcohol, Toluene, Ethyl acid or Methyl chloride. It
might permanently damage the polarizer due to chemical reaction.
(6) Wipe off water droplets or oil immediately. Staining and discoloration may occur if they left on panel
for a long time.
(7) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In
case of contacting with hands, legs or clothes, it must be washed away thoroughly with soap.
(8) Protect the module from static electricity, it may cause damage to the C-MOS Gate Array IC.
(9) Do not disassemble the module.
(10) Do not pull or fold the LED wire.
(11) Pins of I/F connector should not be touched directly with bare hands.

8.2 STORAGE PRECAUTIONS

(1) High temperature or humidity may reduce the performance of module. Please store LCD module
within the specified storage conditions.
(2) It is dangerous that moisture come into or contacted the LCD module, because the moisture may
damage LCD module when it is operating.
(3) It may reduce the display quality if the ambient temperature is lower than 10 ºC. For example, the
response time will become slowly, and the starting voltage of LED will be higher than the room
temperature.

8.3 OPERATION PRECAUTIONS

(1) Do not pull the I/F connector in or out while the module is operating.
(2) Always follow the correct power on/off sequence when LCD module is connecting and operating.
This can prevent the CMOS LSI chips from damage during latch-up.
(3) The startup voltage of Backlight is approximately 1000 Volts. It may cause electrical shock while
assembling with converter. Do not disassemble the module or insert anything into the Backlight unit.

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Appendix. EDID DATA STRUCTURE

The EDID (Extended Display Identification Data) data formats are to support displays as defined in the
VESA Plug & Display and FPDI standards.
Byte # Byte # Value Value
Field Name and Comments
(decimal) (hex) (hex) (binary)
0 00 Header 00 00000000
1 01 Header FF 11111111
2 02 Header FF 11111111
3 03 Header FF 11111111
4 04 Header FF 11111111
5 05 Header FF 11111111
6 06 Header FF 11111111
7 07 Header 00 00000000
8 08 EISA ID manufacturer name ("CMN") 0D 00001101
9 09 EISA ID manufacturer name AE 10101110
10 0A ID product code (LSB) F4 11110100
11 0B ID product code (MSB) 15 00010101
12 0C ID S/N (fixed "0") 00 00000000
13 0D ID S/N (fixed "0") 00 00000000
14 0E ID S/N (fixed "0") 00 00000000
15 0F ID S/N (fixed "0") 00 00000000
16 10 Week of manufacture (fixed week code) 06 00000110
17 11 Year of manufacture (fixed year code) 1B 00011011
18 12 EDID structure version ("1") 01 00000001
19 13 EDID revision ("4") 04 00000100
20 14 Video I/P definition ("Digital") A5 10100101
21 15 Active area horizontal (“34.416cm“) 22 00100010
22 16 Active area vertical (“19.359cm“) 13 00010011
23 17 Display Gamma (Gamma = "2.2") 78 01111000
24 18 Feature support ("RGB, Non-continous") 02 00000010
25 19 Rx1, Rx0, Ry1, Ry0, Gx1, Gx0, Gy1, Gy0 89 10001001
26 1A Bx1, Bx0, By1, By0, Wx1, Wx0, Wy1, Wy0 A5 10100101
27 1B Rx=0.682 AE 10101110
28 1C Ry=0.309 4F 01001111
29 1D Gx=0.268 44 01000100
30 1E Gy=0.673 AC 10101100
31 1F Bx=0.15 26 00100110
32 20 By=0.064 10 00010000
33 21 Wx=0.313 50 01010000
34 22 Wy=0.329 54 01010100
35 23 Established timings 1 00 00000000
36 24 Established timings 2 00 00000000
37 25 Manufacturer's reserved timings 00 00000000
38 26 Standard timing ID # 1 01 00000001
39 27 Standard timing ID # 1 01 00000001
40 28 Standard timing ID # 2 01 00000001
41 29 Standard timing ID # 2 01 00000001

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42 2A Standard timing ID # 3 01 00000001

43 2B Standard timing ID # 3 01 00000001
44 2C Standard timing ID # 4 01 00000001
45 2D Standard timing ID # 4 01 00000001
46 2E Standard timing ID # 5 01 00000001
47 2F Standard timing ID # 5 01 00000001
48 30 Standard timing ID # 6 01 00000001
49 31 Standard timing ID # 6 01 00000001
50 32 Standard timing ID # 7 01 00000001
51 33 Standard timing ID # 7 01 00000001
52 34 Standard timing ID # 8 01 00000001
53 35 Standard timing ID # 8 01 00000001
54 36 Detailed timing description # 1 Pixel clock ("285.05MHz") 59 01011001
55 37 # 1 Pixel clock (hex LSB first) 6F 01101111
56 38 # 1 H active ("1920") 80 10000000
57 39 # 1 H blank ("160") A0 10100000
58 3A # 1 H active : H blank 70 01110000
59 3B # 1 V active ("1080") 38 00111000
60 3C # 1 V blank ("62") 3E 00111110
61 3D # 1 V active : V blank 40 01000000
62 3E # 1 H sync offset ("48") 30 00110000
63 3F # 1 H sync pulse width ("32") 20 00100000
64 40 # 1 V sync offset : V sync pulse width ("6 : 10") 6A 01101010
65 41 # 1 H sync offset : H sync pulse width : V sync offset : V sync width 00 00000000
66 42 # 1 H image size (“344 mm“) 58 01011000
67 43 # 1 V image size (“193 mm“) C1 11000001
68 44 # 1 H image size : V image size 10 00010000
69 45 # 1 H boarder ("0") 00 00000000
70 46 # 1 V boarder ("0") 00 00000000
# 1 Non-interlaced, Normal, no stereo, Separate sync, H/V pol
71 18 00011000
47 Negatives
72 48 Detailed timing description # 2 00 00000000
73 49 # 2 Flag 00 00000000
74 4A # 2 Reserved 00 00000000
75 4B # 2 ASCII string Model name FE 11111110
76 4C # 2 Flag 00 00000000
77 4D # 2 Character of Model name ("N") 4E 01001110
78 4E # 2 Character of Model name ("1") 31 00110001
79 4F # 2 Character of Model name ("5") 35 00110101
80 50 # 2 Character of Model name ("6") 36 00110110
81 51 # 2 Character of Model name ("H") 48 01001000
82 52 # 2 Character of Model name ("H") 48 01001000
83 53 # 2 Character of Model name ("E") 45 01000101
84 54 # 2 Character of Model name ("-") 2D 00101101
85 55 # 2 Character of Model name ("G") 47 01000111
86 56 # 2 Character of Model name ("A") 41 01000001
87 57 # 2 Character of Model name ("1") 31 00110001
88 58 # 2 New line character indicates end of ASCII string 0A 00001010

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89 59 # 2 Padding with "Blank" character 20 00100000

90 5A Detailed timing description # 3 00 00000000
91 5B # 3 Flag 00 00000000
92 5C # 3 Reserved 00 00000000
93 5D # 3 ASCII string Vendor FE 11111110
94 5E # 3 Flag 00 00000000
95 5F # 3 Character of string ("C") 43 01000011
96 60 # 3 Character of string ("M") 4D 01001101
97 61 # 3 Character of string ("N") 4E 01001110
98 62 # 3 New line character indicates end of ASCII string 0A 00001010
99 63 # 3 Padding with "Blank" character 20 00100000
100 64 # 3 Padding with "Blank" character 20 00100000
101 65 # 3 Padding with "Blank" character 20 00100000
102 66 # 3 Padding with "Blank" character 20 00100000
103 67 # 3 Padding with "Blank" character 20 00100000
104 68 # 3 Padding with "Blank" character 20 00100000
105 69 # 3 Padding with "Blank" character 20 00100000
106 6A # 3 Padding with "Blank" character 20 00100000
107 6B # 3 Padding with "Blank" character 20 00100000
108 6C Detailed timing description # 4 00 00000000
109 6D # 4 Flag 00 00000000
110 6E # 4 Reserved 00 00000000
111 6F # 4 ASCII string Model Name FE 11111110
112 70 # 4 Flag 00 00000000
113 71 # 4 Character of Model name ("N") 4E 01001110
114 72 # 4 Character of Model name ("1") 31 00110001
115 73 # 4 Character of Model name ("5") 35 00110101
116 74 # 4 Character of Model name ("6") 36 00110110
117 75 # 4 Character of Model name ("H") 48 01001000
118 76 # 4 Character of Model name ("H") 48 01001000
119 77 # 4 Character of Model name ("E") 45 01000101
120 78 # 4 Character of Model name ("-") 2D 00101101
121 79 # 2 Character of Model name ("G") 47 01000111
122 7A # 4 Character of Model name ("A") 41 01000001
123 7B # 4 Character of Model name ("1") 31 00110001
124 7C # 4 New line character indicates end of ASCII string 0A 00001010
125 7D # 4 Padding with "Blank" character 20 00100000
126 7E Extension flag 00 00000000
127 7F Checksum 1A 00011010

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Appendix. OUTLINE DRAWING

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Appendix. SYSTEM COVER DESIGN NOTICE Ver.7

0. Permanent deformation of system cover after reliability test

System cover including front and rear cover may deform during reliability test. Permanent
deformation of system front and rear cover after reliability test should not interfere with
panel. Because it may cause issues such as pooling, abnormal display, white spot, and also
cell crack.
Definition
Note: If the interference can not be avoided, please feel free to contact INX FAE Engineer
for collaboration design. We can help to verify and pass risk assessment for customer
reference.

1. Design gap A between panel & any components on system rear-cover

Gap between panel’s maximum thickness boundary & system’s inner surface components
such as wire, cable, extrusion is needed for preventing from backpack or pogo test fail.
Because zero gap or interference may cause stress concentration. Issues such as pooling,
abnormal display, white spot, and cell crack may occur.
Maximum flatness of panel and system rear-cover should be taken into account for gap
Definition
design.
Note: If the interference can not be avoided, please feel free to contact INX FAE Engineer
for collaboration design. We can help to verify and pass risk assessment for customer
reference.

2 Design gap B1 & B2 between panel & protrusions

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Gap between panel & protrusions is needed to prevent shock test failure. Because
protrusions with small gap may hit panel during the test. Issue such as cell crack, abnormal
display may occur.
The gap should be large enough to absorb the maximum displacement during the test.
Definition
Note: If the interference can not be avoided, please feel free to contact INX FAE Engineer
for collaboration design. We can help to verify and pass risk assessment for customer
reference.

3 Design gap C between system front-cover & panel surface.

Gap between system front-cover & panel surface is needed to prevent pooling or glass
broken. Zero gap or interference such as burr and warpage from mold frame may cause
pooling issue near system font-cover opening edge. This phenomenon is obvious during
swing test, hinge test, knock test, or during pooling inspection procedure.
To remain sufficient gap, design with system rib higher than maximum panel thickness is
Definition
recommended.
Note: If the interference can not be avoided, please feel free to contact INX FAE Engineer
for collaboration design. We can help to verify and pass risk assessment for customer
reference.

4 Design gap D1 & D2 between system front-cover & PCB Assembly.

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Same as point 2 and 3, but focus on PCBA side.

Definition
5 Interference examination of antenna cable and WebCam wire

Antenna cable or WebCam wire should not overlap with panel outline. Because issue such
as abnormal display & white spot after backpack test, hinge test, twist test or pogo test may
occur.
Definition Note: If the interference can not be avoided, please feel free to contact INX FAE Engineer
for collaboration design. We can help to verify and pass risk assessment for customer
reference.

6 Interference examination of antenna cable and Web Cam wire

If the antenna cable or Web Cam wire must overlap with the panel outline, both sides of the
antenna cable or Web Cam wire must have a sponge(Sponge material can not contain NH3)
and sponge require higher antenna cable or Web Cam wire.( Antenna cable or Web Cam
wire should not overlap with TCON,COF/FPC,Driver IC)
Note: If the interference can not be avoided, please feel free to contact INX FAE Engineer
for collaboration design. We can help to verify and pass risk assessment for customer
reference.

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7 System rear-cover inner surface examination

Definition Burr at logo edge, steps, protrusions or PCB board may cause stress concentration. White
spot or glass broken issue may occur during reliability test.

8 Tape/sponge design on system inner surface

Definition To prevent abnormal display & white spot after scuffing test, hinge test, pogo test, backpack
test, tape/sponge should be well covered under panel rear-cover. Because tape/sponge in
separate location may act as pressure concentration location.

9 Material used for system rear-cover

Definition System rear-cover material with high rigidity is needed to resist deformation during scuffing
test, hinge test, pogo test, or backpack test. Abnormal display, white spot, pooling issue may
occur if low rigidity material is used. Pooling issue may occur because screw’s boss
positioning for module’s bracket are deformed during open-close test.
Solid structure design of system rear-cover may also influence the rigidity of system
rear-cover. The deformation of system rear-cover should not caused interference.

10 System base unit design near keyboard and mouse pad

Definition To prevent abnormal display & white spot after scuffing test, hinge test, pogo test, backpack
test, sharp edge design in keyboard surface may damage panel during the test. We suggest
to use slope edge design, or to reduce the thickness difference of keyboard/mouse pad from

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the nearby surface.

11 Screw boss height design

Definition Screw boss height should be designed with respect to the height of bracket bottom surface
to panel bottom surface + flatness change of panel itself. Because gap will exist between
screw boss and bracket, if the screw boss height is smaller. As result while fastening screw,
bracket will deformed and pooling issue may occur.

12 Assembly SOP examination for system front-cover with Hook design

Definition To prevent panel crack during system front-cover assembly process with hook design, it is
not recommended to press panel or any location that related directly to the panel.

13 Assembly SOP examination for system front-cover with Double tape design

Definition To prevent panel crack during system front-cover assembly process with double tape
design, it is only allowed to give slight pressure (MAX 3 Kgf/50mm2) with large contact area.
This can help to distribute the stress and prevent stress concentration. We also suggest
putting the system on a flat surface stage to prevent unequal stress distribution during the
assembly.

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14 System front-cover assembly reference with Double tape design

Definition To prevent system front-cover peeling at double tape contact area, Height difference
between system front-cover assembly reference such as wall or components stack (wire,
spacer) and double tape top surface must be less than 0.05mm.

15 Touch Application : TP and LCD Module Combination for White Line Prevention

Polarizer edge to LCD AA distance can be derived by “AA~Outline” – “CF Pol~Outline”

with respect to INX 2D Outline Drawing on each side.

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Definition For using in Touch Application: to prevent White Line appears between TP and LCD module
combination, the maximum inspection angle location must not fall onto LCD polarizer edge,
otherwise light line near edge of polarizer will be appear.
Parameters such as TP VA to LCD AA distance, TP assembly tolerance, TP Ink printing
tolerance, Sponge thickness and tolerance, and Maximum Inspection/Viewing Angle, must
be considered with respect to LCD module’s Polarizer edge location and tolerance. This
consideration must be taken at all four edges separately.
The goal is to find parameters combination that allow maximum inspection angle falls inside
polarizer black margin area.
Note: Information for Polarizer edge location and its tolerance can be derived from INX 2D
Outline Drawing (“AA ~Outline“ - “CF Pol~Outline”).
Note: Please feel free to contact INX FAE Engineer. By providing value of parameters above
on each side, we can help to verify and pass the white line risk assessment for customer
reference.

16 Color of system front-cover material

Definition To prevent light leakage is seen at system front-cover due to material transparency, we
suggest using dark color material (black) for system front-cover design.

17 Inspection spec of gap E between system front-cover to LCD module surface

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Definition To maintain gap E (gap of system front-cover to LCD module) in its inspection spec,
especially at location with maximum LCD deformation (center of LCD length), we
recommend adding spacer with design gap A smaller or equal to gap E.
The allowable spacer mating location is on module metal frame outside LCD Active-Area.
Note: If the interference can not be avoided, please feel free to contact INX FAE Engineer
for collaboration design. We can help to verify and pass risk assessment for customer
reference.

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Appendix. LCD MODULE HANDLING MANUAL

ɀ This SOP is prepared to prevent panel dysfunction possibility through
incorrect handling procedure.
Purpose ɀ This manual provides guide in unpacking and handling steps.
ɀ Any person which may contact / related with panel, should follow guide stated
in this manual to prevent panel loss.
1. Unpacking

2. Panel Lifting

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3. Do and Don’t

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