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VLSI Architecture Exam Paper - M.Tech

This document contains instructions and questions for a VLSI Architecture exam. It has two parts - Part I with 10 short answer questions worth 2 marks each, and Part II with 6 longer questions worth 10 marks each. Part I is compulsory, and students must attempt 4 out of the 6 questions in Part II. The questions cover topics like ternary operators in Verilog, half adders, tasks vs functions, block statements, delta delay in VHDL, case statements, test benches, component instantiation, VHDL modeling restrictions, SR flip flops, data flow and switch flow abstraction in Verilog, VHDL programs for shift registers and priority encoders, VHDL data types, parity generators, the

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103 views1 page

VLSI Architecture Exam Paper - M.Tech

This document contains instructions and questions for a VLSI Architecture exam. It has two parts - Part I with 10 short answer questions worth 2 marks each, and Part II with 6 longer questions worth 10 marks each. Part I is compulsory, and students must attempt 4 out of the 6 questions in Part II. The questions cover topics like ternary operators in Verilog, half adders, tasks vs functions, block statements, delta delay in VHDL, case statements, test benches, component instantiation, VHDL modeling restrictions, SR flip flops, data flow and switch flow abstraction in Verilog, VHDL programs for shift registers and priority encoders, VHDL data types, parity generators, the

Uploaded by

sunil
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

YMCA UNIVERSITY OF SCIENCE & TECHNOLOGY, FARIDABAD

Under CBS Examination [Link] 3rd Sem. VLSI


Sub: VLSI Architecture E 705(A) V
Time: 3Hr Max Marks 60
Instructions to the students.
1. There is two parts in the question paper, namely Part-I and Part –II, Part –I is compulsory and in
part –II, there is six questions. Out of six, four question to be attempted.
2. In part-I there are ten questions, each question of 2 Marks and in Part-II each question is 10
Marks. And every part having equal marks.
Part-I
[Link].1 Short answer type (word limit 20-40 words only).
(a) What is ternary operator in verilog.
(b) Give the verilog code for half adder
(c) Differentiate between task and a function.
(d) Explain the block statement in verilog.
(e) Define the delta delay in VHDL.
(f) Explain the case statement in VHDL.
(g) What is test bench?
(h) What is component instantiation?
(i) Give two modeling restrictions in VHDL?
(j) Write a VHDL program for SR Flip flop.
Part-II
[Link].2 (a) Explain data flow and switch flow abstraction in verilog.
[Link].2 (b) Write a VHDL program for a 4 bit shift register.
[Link].3 (a) Discuss the data types in VHDL.
[Link].3 (b) The figure below shows the top –level diagram of a parity generator. The circuit has a 7-bit
input, a, and an 8-bit output, b. It has also a single-bit parity-selection input, called parity.
The circuit must detect the parity of a, then add an extra bit to it (on its left) to produce b,
whose parity (number of ‘1’s) must be odd if parity = ‘0’ or even if parity = ‘1’. Design this
circuit using VHDL.

[Link].4 Discuss the each component of the synthesis design flow in verilog.
[Link].5 Develop a VHDL model for a thermostat that has two 8-bit unsigned binary inputs
representing the target temperature and the actual temperature in degree Fahrenheit
(*F). Assume that both temperatures are above freezing (32*F). The detector has
two outputs: one to turn a heater on when the actual temperature is more than 5*F
below target and one to turn a cooler on when the actual temperature is more than
5*F above target. Also develop a stimulus in verilog HDL.
[Link].6 Develop a VHDL model for 4- bit priority encoder using case statements. Let the
input be represented as D and output as Y. A valid output indicator V is set to ‘1’
only when one or more of the input is equal to 1. If all the inputs are ‘0’, V is equal
to ‘0’ and two outputs of the circuit are not used.

[Link].7 Explain about the following with example:


(a) Procedure
(b) Function

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