CADENCE VIRTUOSO: ANALOG DESIGN ENVIRONMENT (ADE)

A BASIC TUTORIAL
Updated: Spring 2020
Originally Written by:
Sanja Manic, John Blatt, Diana Peterson, Tucker Kern, Lang Yang, Ming-Hao Cheng, and William Tedjo
Updated by: Ming-Hao Cheng

TABLE OF CONTENTS
TABLE OF CONTENTS .......................................................................................................................................... 1
CHAPTER I: CADENCE SETUP .............................................................................................................................. 2
1. Initial Setup (first time only) ................................................................................................................. 2
2. Running Cadence Virtuoso (every time you want to run Cadence) .................................................. 2
3. Starting a New Project .......................................................................................................................... 2
4. Exiting Cadence .................................................................................................................................... 3
CHAPTER II: COMPONENTS .................................................................................................................................. 4
1. Library Browser .................................................................................................................................... 4
2. Components in AnalogLib.................................................................................................................... 4
3. Component Setup and Examples ........................................................................................................ 5
4. Wiring and Save Schematic ................................................................................................................. 8
CHAPTER III: SIMULATION - INTRODUCTION .......................................................................................................... 9
1. ADE L Simulator.................................................................................................................................... 9
2. Single-Point DC Analysis ................................................................................................................... 10
3. Preparing Schematic for More Advanced Analyses ......................................................................... 11
4. Transient Analysis and Example ....................................................................................................... 13
5. AC Analysis and Example .................................................................................................................. 14
CHAPTER IV: SIMULATION METHODS - FUNDAMENTAL ........................................................................................ 18
1. Variable Sweeping .............................................................................................................................. 18
2. Parametric Analysis ............................................................................................................................ 20
CHAPTER V: SIMULATIONS METHODS - ADVANCED ............................................................................................. 22
1. Monte Carlo (MC) Analysis ................................................................................................................. 22

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 CHAPTER I: CADENCE SETUP
1. Initial Setup (first time only)
• Follow the link to the ENS page with instructions to connect to one of the linux server
(Remote Desktop or X2Go is recommended):
https://www.engr.colostate.edu/ens/how/connect/serverlogin-linux.html
Follow this step if you are connecting from outside of campus:
https://www.engr.colostate.edu/ens/how/connect/serverlogin-win.html
List of ENS Linux server and server load (select server with low work load):
https://www.engr.colostate.edu/ens/info/researchcomputing/linuxcompute.html
• For Remote Desktop, open a terminal by clicking this icon at the top bar of your remote window.

• In the Terminal, copy Cadence files:

cp -rT /usr/local/Cadence-2018/setup~/ECE332_Cadence
This command will copy Cadence files into your home directory inside a folder called ECE332_Cadence.
• Close the Terminal.

2. Running Cadence Virtuoso (every time you want to run Cadence)

• In the remote linux server, open a terminal , locate ECE332_Cadence folder, and make it current
directory:
cd ECE332_Cadence/
• You are now ready to start Virtuoso with the following commands:
module load virtuoso
virtuoso&
• The Main window of Cadence Virtuoso:

The main window shows warning and error messages throughout your simulation work.

3. Starting a New Project

• Create a Library (one library per lab course)

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 Insert name for your library. It is recommended to use different library for different course (e.g. ECE202,
ECE331, etc.) Do not use any special characters, empty space, or naming that starts with number,
underscore _ is permitted. Select, “Attach to an existing technology library”.

Then, attach the select tsmc and click OK.

• Create a Cellview (one Cellview per circuit schematic)

Once you have your library, select File – New – Cellview…
Name them properly (e.g. Lab1, Lab2), use schematic for View and Type. Click OK.

4. Exiting Cadence
• Save existing works, close Cellview windows, and close Cadence main windows.
• Do not close or terminate the terminal window directly.
• Do not close or terminate remote computer session directly.
• Always exit the Cadence Virtuoso Main window first. Then, terminate terminal and followed by
remote computer session.

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 CHAPTER II: COMPONENTS
1. Library Browser
Add instance: Create – Instance… Or use “I” button for shortcut to the instance library.

Select analogLib library for the ideal components.

2. Components in AnalogLib
analogLib Component
res Resistor
ind Inductor
cap Capacitor
xfmr Transformer
vdc DC voltage source
idc DC current source
vsin AC sinusoidal Voltage
isin AC sinusoidal Current
vpulse Voltage wave source
ipulse Current wave source
VCVS Voltage Controlled Voltage Source
CCVS Current Controlled Voltage Source
VCCS Voltage Controlled Current Source
CCCS Current Controlled Current Source
switch Ideal switch
gnd Common ground

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3. Component Setup and Examples
a. Resistor – res
To select a resistor, select the component Cell: res, and View: symbol (always select symbol).
Then, fill in the resistor value.
Do not type the units (“Ohm”, “V”, “F”, etc.) and empty space “ “.
You are only allowed to use prefixes (p – pico, u – micro, m – milli, k – kilo, M – mega, G – giga).
For examples: 47u (forty-seven micro), 1m (one milli), 10G (ten giga).

To modify the component’s properties after initial setup,

select component, right click – properties; or press Q (hotkey
for properties) after selecting the component to be modified.
b. Ideal Switch – switch

switch vpulse gnd

For implementing the switch, it is necessary to define open-close voltages and resistances. Pulse
generator (vpulse) controls the voltage in time across the switch.
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c. Pulse Voltage source – vpulse
Voltages that control states of switch are set up as greater than Open/Closed voltage from previous
slide. Settings of Voltage 1 and Voltage 2 controls if switch was first open and then closed or other way
around.
Period and Pulse width define the frequency and duty cycle. Rise time and Fall time should be in nano
seconds to simulate a sharp-edged square-wave, or equal to Pulse width to generate a triangular-wave.
Use vsin for pure sinusoidal wave and vdc for constant dc voltage.

d. Voltage Controlled Sources

VCVS and VCCS depend on a voltage in the circuit. This voltage needs to be connected to the pins of
the dependent source. egain and ggain, defined in instance properties, represent multiplication factor
for voltage and current source, respectively.
Controlling Voltage

VCVS VCCS

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e. Opamp Implementation with VCVS
OpAmp in theory has infinite gain. When implementing an OpAmp using VCVS, define egain to be
large – at least 1000.

f. Non-ideal Diode (tsmc18rf model)

• Select dioden in tsmc library for simulating diodes.
• This diode is not an ideal component, a model file is required to run simulations. To add the model
file, open the ADE L window, go to Setup → Model Libraries
• Add another line of model file, use the same file location:
/usr/local/Cadence-2018/lib/tsmc18rf/rf018.scs
• Select dio in the Section column.

g. Other tsmc18rf components

Attached below is the component models in rf018.scs library. Other components are not recommended
for the lab works.
You must include the Model files with the correct Section for each different model.
For an example, only one model file (Section: tt) is required for schematic containing nmos2v
and pmosv2. Multiple lines of model are required if there’s more than one type of Section.

tsmc18rf name Section Description of model

dioden dio diode
npn tt_bip NPN Bipolar Junction Transistor
vpnp tt_bip PNP Bipolar Junction Transistor
nmosv2 tt 1.8V NMOS
pmosv2 tt 1.8V PMOS
rnhpoly tt_res Polysilicon resistor
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4. Wiring and Save Schematic

“Check and save” button alerts you Button “Save” Select for wire,
if there is a mistake made in the only save your connecting your
circuit and save your schematic. schematic components in
(recommended) without checking. schematic.

Note: Errors will prevent the circuit from saving, but warnings will not. It is good practice to fix all
warnings or at least know exactly what they are from. Always check your warning and error messages
in the Cadence Main window.

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 CHAPTER III: SIMULATION - INTRODUCTION
1. ADE L Simulator
a. In the schematic window, open Analog Design Environment L (ADE L)

b. Check your model library before any simulation run. Go to Setup → Model Libraries … Set the model
file Section to tt. Model containing Section: dio is not required if you don’t have any diode in your circuit.

c. Choose type of analysis

OR

For all circuit courses at CSU, you are expected to run:

- dc – to generate outputs (current and voltage) at steady-state condition.
- tran – to generate outputs over time (in second), time domain.
- ac – to generate outputs in frequency domain.

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2. Single-Point DC Analysis
All design simulation should be started with this step.
a. Setting up a simple DC analysis – to show a steady-state node voltage and current flowing through
components, select “dc”, check “Save DC Operating Points” and “enable”, click OK.

b. Run and show the result – to run, hit the “Netlist and Run” button in the right side of ADE L window.
To show the result in your schematic, go to Results – Annotate – select “DC Node Voltage” and “DC
Operating Points”.

The schematic is now showing node voltages and current flowing through each component. Select
“Design Defaults” to remove the annotation.
For variable sweeping with the DC analysis, refer to the “Other Simulation Features” section.

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3. Preparing Schematic for More Advanced Analyses
This is required for simulation other than the “Single-Point DC Analysis” shown in 2.
a. Wire labelling
Select one of the methods below to open the wire naming window. Hit “L” for shortcut.

OR

Fill the “Names”, click “Hide”, and make sure to align your cursor (shown as a tiny yellow box) to
the wire to be named, right click.

Repeat for all important wires. The labelling would be very helpful in analyzing your simulation and
debugging your circuit.

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b. Select output to be plotted (probing)
Before running the simulation, you need to select net (to show the voltage) and/or node (to show
current). In ADE L window, Outputs – To Be Plotted – Select On Schematic.

Click on wires to select net, click on the red squares at the edge of a component to select node.
Hit “esc” button after you’re done with the process.

The example below shows VCE and VBE wires are selected to show voltage and the C node of
component Q0 (Q0/C) is selected to show current. Notice the difference between current and voltage
probing. Probing for current always shown as a circle around the red square, voltage probe does not.

The list of probed nets and nodes should show up in the Output section.
Check this list every time before running your experiment and delete any unnecessary probe,
especially if you do not recognize the name.

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4. Transient Analysis and Example
This analysis generates outputs over time (in second), or time domain analysis. To setup the transient
analysis, select “tran” and fill the “Stop Time”, check “enable”.

Stop Time unit is in second. You may use

prefixes as mentioned before, such as:
u – micro, m – milli, etc.
Do not put empty space between the value
and prefix. Do not put “s” for seconds. For
example, only type 1m for 1 milliseconds stop
time.
Adjust to appropriate simulation length.

For example:
Do not run transient for 1 (second) if you have
circuit components at kHz or more.

Instead,

Run simulation for 3m (second) to show three

cycles of waves if the frequency of your
waveform generator is 1kHz.

Transient Analysis Example:

This example shows how to implement Single Pole Double Throw (SPDT) switch in Cadence.
Given circuit: Cadence circuit:

vpulse (component V6)

switch (component W2) switch (component W3)

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5. AC Analysis and Example
This setup below generates outputs over a range of frequency, or frequency domain analysis.

First, make sure to add the AC stimulus in your circuit.

Determine the ideal source as your AC stimulus (it can
be any of the ideal sources, vdc, vsin, vpulse, etc) and
fill the “AC magnitude” with a small-signal value.
Usually, 1µ to 1m is a good starting range.

In ADE L window, Choose Analysis, select “ac”, Sweep

Variable: “Frequency”, and fill the Sweep Range.

Fill the Sweep Range from low to high frequency, units

is in Hz. Prefixes is allowed, k – kilo, M – mega, G –
giga. Do not put empty space between the value
and prefix. Do not put “Hz” for Hertz. For example,
only type 1G for 1 gigahertz frequency.

Begin with startF and stopF value that includes a wide

range of frequency. For example, 1 to 10G to capture
the whole response. Rerun the simulation with
narrower range to show only the interesting part of your
circuit’s frequency response.
Do not put 0 as your starting frequency.
AC Analysis Example: Expressing gain in decibel (dB) scale (Common Emitter – BJT)
The schematic below shows a properly labelled input and output af a simple Common Emitter Amplifier.

AC Stimulus
Even though you are allowed to use
any other ideal voltage sources, it is
recommended to use vsin to
generate a voltage AC stimulus. It’s
useful to remind you that you have a
AC sinewave in a particular place in Labels
your circuit.

Note the connection of voltage

sources. It is a vdc in series with vsin,
combining DC and AC component.

Fill in the AC magnitude as previously

explained in the previous page.

The result below was executed from 1Hz to 1GHz. This figure shows the magnitude of sinusoidal wave
over a range of frequency. The two curves are Vin (was set at 1mV as a stimulus) and Vout (amplified to

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26.7mV) in voltage scale. We can say that the signal gets amplified 26.7 times at a very low frequency
(usually called DC-gain). Notice decrease of gain towards the higher frequency.

In AC analysis, Cadence does not show the DC component / voltage biases as outputs, but it takes
account the DC component into calculations. As output results, it shows only the magnitude of AC
sinusoidal waves.
Before performing every AC analysis, it is recommended to run a Single-Point DC analysis first to
ensure correct DC voltages in your circuit. It is also possible to run multiple analyses at the same time.
At last, we are interested in the gain interpretation. Usually, amplifier gain is shown in decibel (dB) scale, a
logarithmic scale, to better represent very high gain.

• In the figure window, select Tools → Calculator

• Select Vout, then Vin from your output window. Click / button to perform division.
• At last, find and select “dB20” in function Panel to represent the value in decibel.

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• Click the “Evaluation” button to plot the expression you just created.
This figure shows only the expression for gain in decibel.

To save and reuse your gain expression, click the Send Expression button, to send the equation to ADE
L Simulation – Outputs window.

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Right click and select edit to change the name.

At last, put a check mark on your “GAIN” expression to show only the gain in dB scale automatically after
running AC analysis.

This step can be used with other expression you created in calculator and with all other type of analyses
(dc and tran). This step is a must once you are performing repetitive analysis on your circuit; it
automates the circuit design process.

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 CHAPTER IV: SIMULATION METHODS - FUNDAMENTAL
1. Variable Sweeping
Variable Sweep is useful to extract circuit characteristic based on a range of value of a component. This
method can be applied to all type of analysis (DC, AC, and trans).

A simple example below shows resistor (Rload) sweeping with DC analysis.

a. Assign variable name to a component.

Use naming convention that is specific to your component, for examples: Rload (load resistor), Cload
(load capacitor), Wn1(width of nmos number 1), etc.).
Do not use empty space and special characters, only alphabets and number are allowed. Do not
start your variable name with numbers. The variable is case sensitive.
b. Import variable and set up the nominal value in ADE L.

It is recommended to put a
value that is inside your
variable range.
For an example, Rload is
being swept from 0.5k to 1.5k,
put 1k for the initial value.

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c. Set up the analysis and sweeping range.
Again, this example is for sweeping a resistor (Rload) with DC analysis.
This method is available for AC and tran analyses and all other components (voltage in a source,
capacitor value, width of a transistor, etc).

Check “Design Variable”, click

“Select Design Variable” button,
select the variable that you want
to sweep from the list.
Avoid manually typing your
“Variable Name”.

In Sweep Range section, fill in

the start and stop value to
define the range of Rload.
Sweep Type should be kept
unchanged for most cases.

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2. Parametric Analysis
Parametric Sweep provides another dimension of sweeping. This method can be applied on top of variable
sweeping with all type of analysis (DC, AC, and trans).
An example below shows RC low pass filter using AC analysis. The goal is to varies the cutoff frequency
by varying capacitor, C1.

a. Initial Run
It is recommended to run a simple test run once, to check whether you have correct schematic and
save the schematic. It is not possible to run parametric analysis successfully if the simple test
run does not work.

Cadence uses
this value (1p)
as C1 to plot
the frequency
response.

b. Parametric Analysis
Once a the initial simulation is successfully run, select Tools – Parametric Analysis…

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 This parametric setup would set variable C1 to parametric sweeping with Range of 1pF to 1uF, Step
Mode: Decade (10x), and 1 Step/Decade. So, the simulation would run AC analysis with C1 values:
1pF, 10pF, 100pF, 1nF, 10nF, 100nF, and 1uF. This is an example, you have to select your own
value for From, To, and Step Mode according to your simulation needs.

Run button for

parametric.

Select variable for

parametric analysis.

Parametric sweeping outputs of RC filter frequency response with multiple values of C1.

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 CHAPTER V: SIMULATIONS METHODS - ADVANCED
1. Monte Carlo (MC) Analysis
MC is a statistical method to analyze the variation and mismatches due to variation in semiconductor
fabrication. MC analysis is useful to predict the characteristic of your circuit. A good example of MC
analysis is in design of precision current mirror, where current accuracy is the main objective of your
specification.

The output of MC analysis would be similar to parametric analysis, multiple output values over a range of
set variable. In this example, our variables (automatically set by MC) are small random variations of
transistors Width and Length of transistors.

The following steps are required to perform MC analysis:

Close all other ADE L window and start with a schematic window with your circuit on in.

a. Modify components
In schematic window, manually replace ALL nmo2v and pmos2v components to nmos2v_mis and
pmos2v_mis, respectively. Save and check the schematic. Select each component and add “_mis” to
its Cell name.

b. Launch ADE XL
In schematic window, Launch – ADE XL – Create a New Window. Create a new test by clicking “here” in
Tests section. Then, a window similar to ADE L should show up. It called “ADE XL Test Editor”.

Click the plus

sign to reopen,
edit, and add
tests to the
“ADE XL Test
Editor” window.

You may upload the previously saved ADE L setup file in Session – Load State... It should upload initial
variables value, analyses, and outputs. In this example, set Single-Point DC analysis (see
Simulation: Introduction – 2), remove all other type of analysis and sweeping.

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c. Adjust model library
Change section from tt to mc as shown below.

d. Modify saving options

In the same window, Output – save all… and check the correct boxes.

Click OK, you may save the state and close the ADE XL Test Editor window.
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e. Setup Monte Carlo and run
In main ADE XL window, select Monte Carlo Sampling in the pull-down menu. Then, select parameter
setting button . Set values and check the boxes as shown below.

Hit the run button to initiate MC analysis. This setup runs 100 times Single-Point DC analysis, it may
takes up to few minutes to finish. Track the progress in the Run Summary sub-window located in
bottom left.

f. Analyze result
Select the Result Browser Button . Under dcOp subfolder, find the component name, and double-
click the signal (voltage or current) to be plotted.
This is an example, you
have to select the correct
output based on your
schematic.
In this case, the selected
signal is M1.m0:d, which is
current of the drain of
transistor M1. m0 indicates
that there is only one
transistor model inside of
M1, you don’t have to worry
about this for now.

The plot shows 100 points

(by default, plotted with
continuous line). It shows
100 different value around
~50uA based on random
variations of W and L of M1.
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In order to see the significance of MC analysis, we should reformat the data to a histogram (calculator:
histo()), calculate the mean (calculator: average()), and calculate the standard deviation (calculator:
stddev()).

First, open calculator, select the original curves, use histo() function and set number of bins (nbins),
minimum and maximum value. Adjust these values as necessary. At last, evaluate the plot.

evaluate the mean by using average().

Evaluate.

mean

Repeat the process with stddev() to show the sigma (σ) value.

standard deviation or 1σ-value

These values suggest that the transistor M1 drain current has mean (µ) of 50.3µA with standard
deviation (σ) of 0.8µA. Translation to English: statistically, if you were to fabricate this transistor 1000
units, 682 (68.2%) of them would have drain current between 49.5µA and 51.1µA. The remaining 318
(31.8%) transistors would have drain current below 49.5µA and above 51.1µA.
Recall that in a normal/gaussian distribution, 1σ-value is 68.2% of area under the curve. You have to
multiply 1σ-value by 3 to get the 3σ-value, which is 99.7% area under the curve.

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