EE6502- MICROPROCESSOR AND MICROCONTROLLER

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UNIT – II: PROGRAMMING OF 8085 PROCESSOR
PART - A
1. What is the instruction format of an 8085?
The size of an 8085 instruction is 1 to 3 bytes. Each instruction has one byte opcode. The remaining
bytes are either data or address. The format is as shown below
(i) One byte instruction (opcode) (ii) Two byte instruction (opcode with 8 bit data or address)
(ii) Three byte instruction (opcode with low byte data/address and high byte data/address).

2. What is the function of stack? (M/J 13)

The stack pointer is also a 16-bit register used as a memory pointer. It points to a memory location in
R/W memory, called the stack. The beginning of the stack is defined by loading 16-bit address in the stack
pointer.

3. What are the different addressing modes of 8085? (N/D13) , (N/D 16)
(i) Direct (ii) Indirect (iii) Immediate (iv) Implied (v) Register.

4. Define addressing modes. How many addressing modes are available in 8085?
The different ways that a microprocessor can access data are referred to as addressing modes.5
addressing modes are available in 8085.

5. Define two-byte instruction with one example? (M/J 12)

In a 2-byte instruction, the first byte specifies the Opcode; the second byte specifies the operand.
Example: MVI A, D8H.

6. Write instructions to load the hexadecimal numbers 65H in register C, and 92H in the accumulator A.
Display the number 65H at PORT0 and 92H at PORT1?
MVI C, 65H
MVI A, 92H
OUT PORT1; DISPLAY 92H
MOV A, C COPY C INTO A
FOR DISPLAY OUT PORT0; DISPLAY 65H
HLT

7. What are the machine control instructions used in 8085 microprocessor?

HLT: Halt NOP: No Operation, DI- disable interrupt, EI – Enable interrupt, SIM- Set interrupt mask, RIM-
Read interrupt mask.

8. What is JNC 16-bit address?

It changes the program sequence to the location specified by the 16-bit address if the carry flag is reset.

10. Give the difference between JZ and JNZ?

JZ change the program sequence to the location specified by the 16-bit address if the zero flag is set
JNZ change the program sequence to the location specified by the 16-bit address if the zero flag is reset.

11. What is a three-byte instruction?

In a 3-byte instruction, the first byte specifies the Opcode; the second byte &third byte specifies the
operand.
Example: STA 4200H

12. What is CALL instruction? (N/D16)

CALL instruction changes the sequence to the location of a subroutine.

13. What operation can be performed by using the instruction SUB A? Specify the status of Z and CY?
The instruction SUB A will clear the accumulator. The flag status will be CY = 0 and Z = 1.

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14. Define Opcode and operand?
The operation to be performed is called Opcode. The data to be operated is called operand.

15. Define the types of branching operations?

Jump: to test the conditions Call, Return.
Restart: Change the sequence of the program.

16. State the function of given 8085 instruction: JP, JPE, JPO and JNZ.
JP – 16 bit Address – Jump on parity JPE – 16 bit Address – Jump on Even Parity JPO – 16 bit address
– Jump on Odd Parity JNZ – 16 bit address – Jump on No Zero

17. How is PUSH B instruction executed? Find the status after the execution(May/June 2016)
This instruction decrements SP by one and copies the higher byte of the register pair into the memory
location pointed by SP. Then decrements the SP again by one and copies the lower byte of the register pair into
the memory location pointed by SP. Ex: SP=2000H, DE=1050H
SP 2000 SP 1FFE 1FFH 50
1FFH
B C B C 1FFFH 10
1FFFH
D 10 E 50 D 10 E 50 2000H
2000H
H L H L

18. Mention the similarity and difference between compare and subtract instructions. (M/J 14)
The compare and subtract instructions in the 8085 both subtract one operand from another, and set
flags accordingly. The subtract instruction stores the result in the accumulator, while the compare instruction does
not - except for the flags, the compare instruction "throws" the result away.

19. State the purpose and importance of NOP instruction. (M/J 14)
The NOP instruction is a no-operation instruction. It does nothing to the state of the machine, except to
use some time. In the case of the 8085, it uses four clock cycles plus however many wait states is need to access
the NOP instruction from memory.

20. What is the function performed by SIM and RIM instruction?

SIM- Set Interrupt Mask: This instruction is used to mask the hardware interrupts RST 7.5, 6.5 and 5.5.
The execution of this instruction output the content of accumulator to program interrupt mask bits and also used
to output serial data on the SOD line.
RIM- Read Interrupt Mask: The RIM instruction is used to check whether an interrupt is masked or not. It
is also used to read data from the SID line.

21. Explain the functioning of CMP instruction. (N/D 15)

CMP (Compare register or memory with accumulator A): The contents of the operand register or
memory are compared with the contents of the accumulator. Both contents are preserved. The results of the
comparison are shown by the setting the flags of the PSW as follows:
If (A) < reg/mem; carry flag is set.
If (A) = reg/mem; zero flag is set.
If (A) > reg/mem; carry and zero flags are reset
Eg: CMP B, CMP M

22. What is the function of rotate instructions? Give an example. (M/J 15)
Rotate instruction is used to rotate the accumulator content left to carry or right to carry. It can also be
left through carry or right through carry. One example is RLC which means rotate the accumulator content left to
carry. If the data 32H is given with a carry bit then after giving RLC for this, data becomes 64H and carry of 00H.

23. How is the time delay generated using subroutine? (M/J15), (N/D15)
MVI B, FFH
L1: DCR B
JNZ L1
RET

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24. What are the instructions associated with a subroutine? (N/D 13)
Instructions are CALL & RET.

25. Explain DI and EI.

DI-Disable Interrupt. When this instruction is executed, all the interrupts except TRAP are disabled.
When the interrupts are disabled, the processor will not accept or recognize the interrupt.
EI- Enable Interrupt. This instruction is used or executed to allow the interrupts after disabling.

26. Write an 8085 assembly program to add two digit BCD numbers in memory locations 5000H and
5001H and store the result in memory location 5002H. (Nov/Dec 2015)
LXI H,5000H
MOV A,M
MOV B,A
INX H
MOV A,M
INX H
ADD B
DAA
MOV M,A
HLT

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 PART - B
1. Discuss in detail about the 8085 Instruction set, explaining about the various types of operations.
Instruction Set of 8085
 An instruction is a binary pattern designed inside a microprocessor to perform a specific function.
 The entire group of instructions that a microprocessor
supports is called Instruction Set.
 8085 has 246 instructions.
 Each instruction is represented by an 8-bit binary value.
 These 8-bits of binary value is called Op-Code or Instruction Byte.
Classification of Instruction Set
 Data Transfer Instruction
 Arithmetic Instructions
 Logical Instructions
 Branching Instructions
 Control Instructions
Data Transfer Instructions
 These instructions move data between registers, or between memory and registers.
 These instructions copy data from source todestination.
 While copying, the contents of source are not modified.

Opcode Operand Explanation of Description

Instruction

MOV Rd, Rs Copy from This instruction copies the contents of the source register into the
M, Rs source(Rs) to destination register; the contents of the source register are not
Rd, M destination(Rd) altered. If one of the operands is a memory location, its location is
specified by the contents of the HL registers.
Example: MOV B, C or MOV B, M

MVI Rd, data Move immediate 8- The 8-bit data is stored in the destination register or memory. If the
M, data bit operand is a memory location, its location is specified by the
contents of the HL registers.
Example: MVI B, 57H or MVI M, 57H

LDA 16-bit Load accumulator The contents of a memory location, specified by a 16-bit address in
address the operand, are copied to the accumulator. The contents of the
source are not altered.
Example: LDA 2034H

LDAX B/D Reg. Load accumulator The contents of the designated register pair point to a memory
pair indirect location. This instruction copies the contents of that memory
location into the accumulator. The contents of either the register
pair or the memory location are not altered.
Example: LDAX B

LXI Reg. pair, Load register pair The instruction loads 16-bit data in the register pair designated in
16-bit data immediate the operand.
Example: LXI H, 2034H or LXI H, XYZ

LHLD 16-bit Load H and L The instruction copies the contents of the memory location pointed
address registers direct out by the 16-bit address into register L and copies the contents of
the next memory location into register H. The contents of source

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 memory locations are not altered.
Example: LHLD 2040H

STA 16-bit 16-bit address The contents of the accumulator are copied into the memory
address location specified by the operand. This is a 3-byte instruction, the
second byte specifies the low-order address and the third byte
specifies the high-order address.
Example: STA 4350H

STAX Reg. pair Store accumulator The contents of the accumulator are copied into the memory
indirect location specified by the contents of the operand (register pair). The
contents of the accumulator are not altered.
Example: STAX B

SHLD 16-bit Store H and L The contents of register L are stored into the memory location
address registers direct specified by the 16-bit address in the operand and the contents of H
register are stored into the next memory location by incrementing
the operand. The contents of registers HL are not altered. This is a
3-byte instruction, the second byte specifies the low-order address
and the third byte specifies the high-order address.
Example: SHLD 2470H

XCHG none Exchange H and L The contents of register H are exchanged with the contents of
with D and E register D, and the contents of register L are exchanged with the
contents of register E.
Example: XCHG

SPHL none Copy H and L The instruction loads the contents of the H and L registers into
registers to the stack the stack pointer register, the contents of the H register provide the
pointer high-order address and the contents of the L register provide the
low-order address. The contents of the H
and L registers are not altered.
Example: SPHL

XTHL none Exchange H and L The contents of the L register are exchanged with the stack location
with top of stack pointed out by the contents of the stack pointer register. The
contents of the H register are exchanged with the next stack
location (SP+1); however, the contents of the stack pointer register
are not altered.
Example: XTHL

PUSH Reg. pair Push register pair The contents of the register pair designated in the operand are
onto stack copied onto the stack in the following sequence. The stack pointer
register is decremented and the contents of the highorder register
(B, D, H, A) are copied into that location. The stack pointer register
is decremented again and the contents of the low-order register (C,
E, L, flags) are copied to that location.
Example: PUSH B or PUSH A

POP Reg. pair Pop off stack to The contents of the memory location pointed out by the stack
register pair pointer register are copied to the low-order register (C, E, L, status
flags) of the operand. The stack pointer is incremented by 1 and the
contents of that memory location are copied to the high-order

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 register (B, D, H, A) of the operand. The stack pointer register is
again incremented by 1.
Example: POP H or POP A

OUT 8-bit port Output data from The contents of the accumulator are copied into the I/O port
address accumulator to a port specified by the operand.
with 8-bit address Example: OUT F8H

IN 8-bit port Input data to The contents of the input port designated in the operand are read
address accumulator from a and loaded into the accumulator.
port with 8-bit Example: IN 8CH
address

Arithmetic Instructions
 These instructions perform the operations like:
 Addition
 Subtract
 Increment
 Decrement
Addition
 Any 8-bit number, or the contents of register, or the contents of memory location can be added to the
contents of accumulator.
 The result (sum) is stored in the accumulator.
 No two other 8-bit registers can be added directly.
 Example: The contents of register B cannot be added directly to the contents of register C.
Subtraction
 Any 8-bit number, or the contents of register, or the contents of memory location can be subtracted from
the contents of accumulator.
 The result is stored in the accumulator.
 Subtraction is performed in 2’s complement form.
 If the result is negative, it is stored in 2’s complement form.
 No two other 8-bit registers can be subtracted directly.
Increment / Decrement
 The 8-bit contents of a register or a memory location can be incremented or decremented by 1.
 The 16-bit contents of a register pair can be incremented or decremented by 1.
 Increment or decrement can be performed on any register or a memory location.
Opcode Operand Explanation of Description
Instruction

ADD R Add register or The contents of the operand (register or memory) are added to the
M memory, to contents of the accumulator and the result is stored in the accumulator.
accumulator If the operand is a memory location, its location is specified by the
contents of the HL registers. All flags are modified to reflect the result of
the addition.
Example: ADD B or ADD M

ADC R Add register to The contents of the operand (register or memory) and M the Carry flag
M accumulator with are added to the contents of the accumulator and the result is stored in
carry the accumulator. If the operand is a memory location, its location is
specified by the contents of the HL registers. All flags are modified to
reflect the result of the addition.

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 Example: ADC B or ADC M

ADI 8-bit Add immediate to The 8-bit data (operand) is added to the contents of the accumulator
data accumulator and the result is stored in the accumulator. All flags are modified to
reflect the result of the addition.
Example: ADI 45H

ACI 8-bit data Add immediate to The 8-bit data (operand) and the Carry flag are added to the contents of
accumulator with the accumulator and the result is stored in the accumulator. All flags are
carry modified to reflect the result of the addition.
Example: ACI 45H

DAD Reg. Add register pair to The 16-bit contents of the specified register pair are added to the
pair H and L registers contents of the HL register and the sum is stored in the HL register. The
contents of the source register pair are not altered. If the result is larger
than 16 bits, the CY flag is set. No other flags are affected.
Example: DAD H

SUB R Subtract register or The contents of the operand (register or memory ) are subtracted from
M memory from the contents of the accumulator, and the result is stored in the
accumulator accumulator. If the operand is a memory location, its location is
specified by the contents of the HL registers. All flags are modified to
reflect the result of the subtraction.
Example: SUB B or SUB M

SBB R Subtract source The contents of the operand (register or memory ) and M the Borrow
M and borrow from flag are subtracted from the contents of the accumulator and the result
accumulator is placed in the accumulator. If the operand is a memory location, its
location is specified by the contents of the HL registers. All flags are
modified to reflect the result of the subtraction.
Example: SBB B or SBB M

SUI 8-bit Subtract immediate The 8-bit data (operand) is subtracted from the contents of the
data from accumulator accumulator and the result is stored in the accumulator. All flags are
modified to reflect the result of the subtraction.
Example: SUI 45H

SBI 8-bit Subtract immediate The contents of register H are exchanged with the contents of register
data from accumulator D, and the contents of register L are exchanged with the contents of
with borrow register E.
Example: XCHG

INR R Increment register The contents of the designated register or memory) are incremented by
M or memory by 1 1 and the result is stored in the same place. If the operand is a memory
location, its location is specified by the contents of the HL registers.
Example: INR B or INR M

INX R Increment register The contents of the designated register pair are incremented by 1 and
pair by 1 the result is stored in the same place.
Example: INX H

DCR R Decrement register The contents of the designated register or memory are M decremented
M or memory by 1 by 1 and the result is stored in the same place. If the operand is a
memory location, its location is specified by the contents of the HL
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 registers.
Example: DCR B or DCR M

DCX R Decrement register The contents of the designated register pair are decremented by 1 and
pair by 1 the result is stored in the same place.
Example: DCX H

DAA none Decimal adjust The contents of the accumulator are changed from a binary value to
accumulator two 4-bit binary coded decimal (BCD) digits. This is the only instruction
that uses the auxiliary flag to perform the binary to BCD conversion,
and the conversion procedure is described below. S, Z, AC, P, CY flags
are altered to reflect the results of the operation.
If the value of the low-order 4-bits in the accumulator is greater than 9
or if AC flag is set, the instruction adds 6 to the low-order four bits.
If the value of the high-order 4-bits in the accumulator is greater than 9
or if the Carry flag is set, the instruction adds 6 to the high-order four
bits.
Example: DAA

Logical Instructions
 These instructions perform logical operations on data stored in registers, memory and status flags.
 The logical operations are:
 AND
 OR
 XOR
 Rotate
 Compare
 Complement
AND, OR, XOR
 Any 8-bit data, or the contents of register, or memory location can logically have
 AND operation
 OR operation
 XOR operation
with the contents of accumulator.
 The result is stored in accumulator.
Rotate
 Each bit in the accumulator can be shifted either left or right to the next position.
Compare
 Any 8-bit data, or the contents of register, or memory location can be compares for:
 Equality
 Greater Than
 Less Than
with the contents of accumulator.
 The result is reflected in status flags.
Complement
 The contents of accumulator can be complemented.
 Each 0 is replaced by 1 and each 1 is replaced by 0.

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Opcode Operand Explanation of Description
Instruction

CMP R Compare register The contents of the operand (register or memory) are M compared with
M or memory with the contents of the accumulator. Both contents are preserved . The
accumulator result of the comparison is shown by setting the flags of the PSW as
follows:
if (A) < (reg/mem): carry flag is set
if (A) = (reg/mem): zero flag is set
if (A) > (reg/mem): carry and zero flags are reset
Example: CMP B or CMP M

CPI 8-bit data Compare The second byte (8-bit data) is compared with the contents of the
immediate with accumulator. The values being compared remain unchanged. The
accumulator result of the comparison is shown by setting the flags of the PSW as
follows:
if (A) < data: carry flag is set
if (A) = data: zero flag is set
if (A) > data: carry and zero flags are reset
Example: CPI 89H

ANA R Logical AND The contents of the accumulator are logically ANDed with M the
M register or memory contents of the operand (register or memory), and the result is placed in
with accumulator the accumulator. If the operand is a memory location, its address is
specified by the contents of HL registers. S, Z, P are modified to reflect
the result of the operation. CY is reset. AC is set.
Example: ANA B or ANA M

ANI 8-bit Logical AND The contents of the accumulator are logically ANDed with the
data immediate with 8-bit data (operand) and the result is placed in the
accumulator accumulator. S, Z, P are modified to reflect the result of the
operation. CY is reset. AC is set.
Example: ANI 86H

XRA R Exclusive OR The contents of the accumulator are Exclusive ORed with M the
M register or memory contents of the operand (register or memory), and the result is placed in
with accumulator the accumulator. If the operand is a memory location, its address is
specified by the contents of HL registers. S, Z, P are modified to reflect
the result of the operation. CY and AC are reset.
Example: XRA B or XRA M

XRI 8-bit Exclusive OR The contents of the accumulator are Exclusive ORed with the 8-bit data
data immediate with (operand) and the result is placed in the accumulator. S, Z, P are
accumulator modified to reflect the result of the operation. CY and AC are reset.
Example: XRI 86H

ORA R Logical OR register The contents of the accumulator are logically ORed with M the contents
M or memory with of the operand (register or memory), and the result is placed in the
accumulator accumulator. If the operand is a memory location, its address is
specified by the contents of HL registers. S, Z, P are modified to reflect
the result of the operation. CY and AC are reset.
Example: ORA B or ORA M

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 ORI 8-bit Logical OR The contents of the accumulator are logically ORed with the 8-bit data
data immediate with (operand) and the result is placed in the accumulator. S, Z, P are
accumulator modified to reflect the result of the operation. CY and AC are reset.
Example: ORI 86H

RLC none Rotate accumulator Each binary bit of the accumulator is rotated left by one position. Bit D7
left is placed in the position of D0 as well as in the Carry flag. CY is
modified according to bit D7. S, Z, P, AC are not affected.
Example: RLC

RRC none Rotate accumulator Each binary bit of the accumulator is rotated right by one position. Bit
right D0 is placed in the position of D7 as well as in the Carry flag. CY is
modified according to bit D0. S, Z, P, AC are not affected.
Example: RRC

RAL none Rotate accumulator Each binary bit of the accumulator is rotated left by one position
left through carry through the Carry flag. Bit D7 is placed in the Carry flag, and the Carry
flag is placed in the least significant position D0. CY is modified
according to bit D7. S, Z, P, AC are not affected.
Example: RAL

RAR none Rotate accumulator Each binary bit of the accumulator is rotated right by one position
right through carry through the Carry flag. Bit D0 is placed in the Carry flag, and the Carry
flag is placed in the most significant position D7. CY is modified
according to bit D0. S, Z, P, AC are not affected.
Example: RAR

CMA none Complement The contents of the accumulator are complemented. No flags are
accumulator affected.
Example: CMA

CMC none Complement carry The Carry flag is complemented. No other flags are affected.
Example: CMC

STC none Set Carry Set Carry

Example: STC

Branching Instructions
 The branching instruction alter the normal sequential flow.
 These instructions alter either unconditionally or conditionally.

Opcode Operand Explanation of Description

Instruction

JMP 16-bit Jump The program sequence is transferred to the

address unconditionally memory location specified by the 16-bit address
given in the operand.
Example: JMP 2034H or JMP XYZ

Flag 16-bit Jump The program sequence is transferred to the

Opcode Description address conditionally memory location specified by the 16-bit address
Status
given in the operand based on the specified flag
JC Jump on CY = 1
of the PSW as described below.
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 Carry Example: JZ 2034H or JZ XYZ
Jump on no
JNC CY = 0
Carry
Jump on
JP S=0
positive
Jump on
JM S=1
minus
Jump on
JZ Z=1
zero
Jump on no
JNZ Z=0
zero
Jump on
JPE P=1
parity even
Jump on
JPO P=0
parity odd

Flag 16-bit Unconditional The program sequence is transferred to the

Opcode Description address subroutine call memory location specified by the 16-bit address
Status
given in the operand. Before the transfer, the
CC Call on Carry CY = 1
address of the next instruction after CALL (the
Call on no contents of the program counter) is pushed onto
CNC CY = 0
Carry the stack.
Call on Example: CALL 2034H or CALL XYZ
CP S=0
positive
Call on
CM S=1
minus
CZ Call on zero Z=1
Call on no
CNZ Z=0
zero
Call on
CPE P=1
parity even
Call on
CPO P=0
parity odd

RET none Return from The program sequence is transferred from the
subroutine subroutine to the calling program. The two bytes
unconditionally from the top of the stack are copied into the
program counter,and program execution begins at
the new address.
Example: RET

Flag none Return from The program sequence is transferred from the
Opcode Description subroutine subroutine to the calling program based on the
Status
conditionally specified flag of the PSW as described below.
Return on
RC CY = 1 The two bytes from the top of the stack are copied
Carry
into the program counter, and program execution
Return on no begins at the new address.
RNC CY = 0
Carry Example: RZ
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 Return on
RP S=0
positive
Return on
RM S=1
minus
Return on
RZ Z=1
zero
Return on no
RNZ Z=0
zero
Return on
RPE P=1
parity even
Return on
RPO P=0
parity odd

PCHL none Load program The contents of registers H and L are copied into
counter with HL the program counter. The contents of H are
contents placed as the high-order byte and the contents of
L as the low-order byte.
Example: PCHL

RST 0-7 Restart The RST instruction is equivalent to a 1-byte call

instruction to one of eight memory locations
depending upon the number. The instructions are
generally used in conjunction with interrupts and
inserted using external hardware. However these
can be used as software instructions in a program
to transfer program execution to one of the eight
locations. The addresses are:
Restart
Instruction
Address
RST 0 0000H
RST1 0008H
RST 2 0010H
RST 3 0018H
RST 4 0020H
RST 5 0028H
RST 6 0030H
RST 7 0038H
The 8085 has four additional interrupts and these
interrupts generate RST instructions internally and
thus do not require any external hardware. These
instructions and their Restart addresses are:
Restart
Interrupt
Address
TRAP 0024H
RST 5.5 002CH
RST 6.5 0034H

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 RST 7.5 003CH

Control Instructions
 The control instructions control the operation of microprocessor.
Opcode Operand Explanation of Description
Instruction

NOP none No operation No operation is performed. The instruction is fetched and decoded.
However no operation is executed.
Example: NOP

HLT none Halt and enter The CPU finishes executing the current instruction and halts any further
wait state execution. An interrupt or reset is necessary to exit from the halt state.
Example: HLT

DI none Disable The interrupt enable flip-flop is reset and all the interrupts except the
interrupts TRAP are disabled. No flags are affected.
Example: DI

EI none Enable The interrupt enable flip-flop is set and all interrupts are enabled. No flags
interrupts are affected. After a system reset or the acknowledgement of an interrupt,
the interrupt enable flipflop is reset, thus disabling the interrupts. This
instruction is
necessary to reenable the interrupts (except TRAP).
Example: EI

RIM none Read interrupt This is a multipurpose instruction used to read the status of interrupts 7.5,
mas 6.5, 5.5 and read serial data input bit. The instruction loads eight bits in the
accumulator with the following interpretations.
Example: RIM

SIM none Set interrupt This is a multipurpose instruction and used to implement the 8085
mask interrupts 7.5, 6.5, 5.5, and serial data output. The instruction interprets
the accumulator contents as follows.
Example: SIM

RIM Instruction
RIM Read Interrupt Mask
 This is a multipurpose instruction used to read the status of interrupts 7.5, 6.5, 5.5 and read serial data
input bit.
 The instruction loads eight bits in the accumulatorwith the following interpretations.
 Example: RIM

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 2. Explain the instruction format and addressing modes of 8085 microprocessor.
Instruction Format :
An instruction is a command to the microprocessor to perform a given task on a specified data. Each
instruction has two parts: one is task to be performed, called the operation code (opcode), and the second is the
data to be operated on, called the operand.
1. One-word or 1-byte instructions
2. Two-word or 2-byte instructions
3. Three-word or 3-byte instructions
Addressing Modes in 8085:
 The method by which the address of source of data or the address of destination of result is given in the
 instruction is called Addressing Modes
 The term addressing mode refers to the way in which the operand of the instruction is specified.
 Intel 8085 uses the following addressing modes
1. Immediate Addressing Mode
2. Register Addressing Mode
3. Direct Addressing Mode
4. Indirect Addressing Mode
5. Implied/implicit Addressing Mode

Immediate Addressing
In immediate addressing mode, the data is specified in the instruction itself. The data will be apart of the
program instruction. All instructions that have ‘I’ in their mnemonics are of Immediate addressing type.
Eg.MVI B, 3EH- Move the data 3EH given in the instruction to B register.

Direct Addressing
In direct addressing mode, the address of the data is specified in the instruction. The data will be in
memory. In this addressing mode, the program instructions and data can be stored in different memory blocks.
This type of addressing can be identified by 16-bit address present in the instruction.
Eg.LDA 1050H- Load the data available in memory location 1050H in accumulator.

Register Addressing
In register addressing mode, the instruction specifies the name of the register in which the data is
available. This type of addressing can be identified by register names (such as ‘A’, ‘B’....) in the instruction.
Eg.MOV A, B -Move the content of B register to A register.

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Register Indirect Addressing
In register indirect addressing mode, the instruction specifies the name of the register in which the
address of the data is available. Here the data will be in memory and the address will be in the register pair. This
type of addressing can be identified by letter ‘M’ present in the instruction.
Eg.MOV A, M - The memory data addressed by HL pair is moved to A register.

Implied Addressing
In implied addressing mode, the instruction itself specifies the type of operation and location of data to
be operated. This type of instruction does not have any address, register name, immediate data specified along
with it.
Eg.CMA - Complement the content of accumulator.

3. Describe with suitable 8085 assembly language program the use of subroutine instructions.
Square wave generation with an subroutine
LXI SP, 27FFH : Initialize stack pointer
LXI B, 1388H : Initialize counter with count 5000.
BACK: MVI A, COH
SIM : Send high on SOD pin
CALL DELAY : Wait for 0.5 msec
MVI A, 40H : Send low on SOD pin
CALL DELAY : wait for. 5 msec
DCX B : Decrement count by 1
MOV A, C
ORA B : Check if count = 0
JNZ BACK : If not, repeat
HLT : Stop program execution

4. Write an 8085 ALP to generate a delay of 1ms. Show the calculations

• Performance/delay of each instruction
MVI C, FFH 7 T-State
LOOP: DCR C 4 T-State
JNZ LOOP 7/10 T-State
 Time delay in loop
TL= T x Loop T-States x N10 , where T=System clock period
N10= Equiv. decimal value of count loaded to C
TL= 0.5x10-6 x (14 x 255)=1.8ms (ignore 10 T-State)

5. Write a program to calculate and store in the results as mentioned. Five memory locations
2401H, 2402H, 2403H, 2404H and 2405H have called Xl, X2, X3, X4 and X5. (2405H) + X2 + X3 + x4
(2403H) X5 - X3 - X2 - Xl. (M/J 14)

LXI H,2401
MOV A,M
INX H
MVI B,05
MVI C,00
DCR B
ADD M
INR C
INX H
ADC M
INX H
JNZ
STA 2406.

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6. Write an ALP with its output to add two 16 bit numbers using 8085.
Program - Add two 16-bit numbers
Sample problem:
(4000H) = 15H
(4001H) = 1CH
(4002H) = B7H
(4003H) = 5AH
Result = 1C15 + 5AB7H = 76CCH
(4004H) = CCH
(4005H) = 76H

Source Program 1:
LHLD 4000H : Get first I6-bit number in HL
XCHG : Save first I6-bit number in DE
LHLD 4002H : Get second I6-bit number in HL
MOV A, E : Get lower byte of the first number
ADD L : Add lower byte of the second number
MOV L, A : Store result in L register
MOV A, D : Get higher byte of the first number
ADC H : Add higher byte of the second number with CARRY
MOV H, A : Store result in H register
SHLD 4004H : Store I6-bit result in memory locations 4004H and 4005H.
HLT : Terminate program execution

7. Describe the 8085 assembly language program for the loop structure with counting of 10
numbers.

To prepare an assembly language program for 8085 to count the number of zeros,even and odd
numbers in an array
MVI C,00
MVI D,00
MVI E,00
LXI H,4200
MOV B,M
INX H
LXI H,4200
MOV B,M
LABEL4:INX H
MOV A,M
CPI 00
JNZ LABEL1
INR C
JNZ LABEL2
LABEL1:RRC
JNZ LABEL3
INR D
JMP LABEL2
LABEL3:INR E
LABEL2:DCR B
JNZ LABEL4
INX H
MOV A,C

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 MOV M,A
INX H
MOV A,D
MOV M,A
INX H
MOV A,E
MOV M,A
HLT

8. Write an ALP using 8085 instructions to find the biggest number in a block of data stored in the
memory locations from 70H-7FH

MEMORY LABEL MNEMONIC HEX CODE COMMENT

4400 LXI H,4200 21 Load the array size to the HL pair
4401 00
4402 42
4403 MOV B,M 46 Copy the array size to B register
4404 INX H 23 Increment the memory
4405 MOV A,M 7E Copy the first data to the Accumulator
4406 DCR B 05 Decrement the Array size by 1
4407 LOOP INX H 23 Increment the memory
4408 CMP M BE Compare accumulator content and
memory
4409 JNC AHEAD D2 Jump on no carry to label AHEAD
440A 0D
440B 44
440C MOV A,M 7E Copy the memory content to the
accumulator
440D AHEAD DCR B 05 Decrement register B by 1
440E JNZ LOOP C2
440F 07 Jump on non-zero to label LOOP
4410 44
4411 STA 4300 32
4412 00 Store accumulator content to 4300
4413 43
4414 HLT 76 Program ends

Observation
Input at 4200 : 05H --------------- Array Size
4201 : 0AH
4202 : F1H
4203 : 1FH
4204 : 26H
4205 : FEH
Output at 4300 : FEH
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 9. Write short notes on look up table and its usage.
A lookup table is an array that replaces runtime computation with a simpler array indexing operation.
The savings in terms of processing time can be significant, since retrieving a value from memory is often faster
than undergoing an 'expensive' computation or input/output operation.[1] The tables may be pre-calculated and
stored in static program storage, calculated (or "pre-fetched") as part of a program's initialization phase
(memorization), or even stored in hardware in application-specific platforms. Lookup tables are also used
extensively to validate input values by matching against a list of valid (or invalid) items in an array and, in some
programming languages, may include pointer functions (or offsets to labels) to process the matching input.
Example of look up table
Algorithm
1. Initialize HL pair to point Look up table
2. Get the data
3. Check whether the given input is less than 9
4. If yes go to next step else halt the program
5. Add the desired address with the accumulator content
6. Store the result

LXI H,5000 ;Initialsie Look up table address

LDA 5050 ;Get the data
CPI 0A ;Check input > 9
JC AFTER ;if yes error
VI A,FF ;Error Indication
STA 5051
HLT
AFTER: MOV C,A ;Add the desired Address
MVI B,00
DAD B
MOV A,M
STA 5051 ;Store the result
HLT ;Terminate the program
LOOK UP TABLE:
5000 01
5001 04
5002 09
5003 16
5004 25
5005 36
5006 49
5007 64
5008 81

RESULT:
Input:
Data: 05H in memory location 5050
Output:
Data: 25H (Square of 5) in memory location 5051

Input:
Data: 11H in memory location 5050
Output:
Data: FFH (Error Indication) in memory location 5051

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10. Write a 8085 assembly language program to divide a 8bit number by another 8bit number and
store the quotient and reminder in the memory locations 4253 and 4252 respectively.

LXI H, 5000
MOV B, M ;Get the dividend in B - reg.
MVI C, 00 ;Clear C - reg for quotient
INX H ;Increment HL pair of registers
MOV A, M ;Get the divisor in A - reg
NEXT: CMP B ;Compare A - reg with register B.
JC LOOP ;Jump on carry to LOOP
SUB B ;Subtract A - reg from B - reg.
INR C ;Increment content of register C.
JMP NEXT ;Jump to NEXT
LOOP: STA 5002 ;Store the remainder in Memory
MOV A, C ;Move Content of C - Reg to A - Reg
STA 5003 ;Store the quotient in memory
HLT ;Terminate the program.
Input:
Data 1: FFH in memory location 5000
Data 2: FFH in memory location 5001
Output:
Data 1: 01H in memory location 5002 as Remainder
Data 2: FEH in memory location 5003 as Quotient

11. Write an 8085 assembly language program to solve the following equation. Z = 2X+Y where X
and Y are stored in memory locations 4200 and 4201 respectively. The value of Y should be
stored in 4202(lower byte) and 4203(higher byte).
PROGRAM:
MVI D,00 Initialize register D to 00
MVI A,00 Initialize Accumulator content to 00
LXI H,4150
MOV B,M Get the first number in B - reg
INX H
MOV C,M Get the second number in C- reg.
LOOP: ADD B Add content of A - reg to register B.
JNC NEXT Jump on no carry to NEXT.
INR D Increment content of register D
NEXT: DCR C Decrement content of register C.
JNZ LOOP Jump on no zero to address
STA 4152 Store the result in Memory
MOV C,M
MOV A, D
STA 4153 Store the MSB of result in Memory
MOV A,C
MVI E,02
ADD E
STA 4154
HLT Terminate the program

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