EEE440 Computer Architecture Spring 2020

COMSATS University Islamabad

COURSE DESCRIPTION FILE

EEE440 Computer Architecture

DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING

COMSATS University Islamabad Page 1

EEE440 Computer Architecture Spring 2020

COMSATS University Islamabad

COURSE DESCRIPTION FILE

EEE440 Computer Architecture

DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING

Prepared By: Checked By: Approved By:

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COMSATS University Islamabad Page 2

EEE440 Computer Architecture Spring 2020

Computer Architecture
Course code:
EEE440 (3+0)

Prerequisites:
EEE343 Computer Organization

Course Catalog Description:

Fundamentals of computer design including current technology/cost trends, quantitative design
principles, measuring & reporting performance, review of instruction set architecture, memory hierarchy
design and performance issues including cache and virtual memory design, instruction level parallelism
(ILP) using hardware approaches such as dynamic scheduling, hardware-based speculation and
approaches to exploit ILP at software level, data level parallelism in Vector, SIMD and GPU architectures
and thread level parallelism with centralized, synchronized and distributed memory sharing.

Textbook:
1. Computer Architecture: A Quantitative Approach by Hennessy & Patterson (Morgan & Kauffman
Series), 2012, 5th Edition

Reference Books:
1. Digital Design and Computer Architecture by Harris. D and Harris, S, 2012, 2nd Edition
2. Modern Processor Design: Fundamentals of Superscalar Processors by Shen & Lipasti

Course Learning Objectives:

The objective is for the students to understand quantitative principles of computer design and review of
instruction set architectures, be able to analyze various memory systems, understand and apply
instruction level parallelism (ILP), data level parallelism (DLP) and thread level parallelism (TLP)

Course Learning Outcomes:

After successfully completing this course, the students will be able to:
1. Understanding the fundamentals of computer architecture and instruction set architectures. (C2-
PLO1)
2. Compare various hardware and software approaches to improve instruction level parallelism. (C4-
PLO2)
3. Analyze the techniques to implement data level and thread level parallelism. (C4-PLO2)
4. Analyze various memory architectures for improving performance. (C4-PLO2)

Course Schedule:
3 credit hours/week

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EEE440 Computer Architecture Spring 2020

Topics Covered:
1. Introductory Concepts
2. Memory Systems
3. Instruction-Level Parallelism in Software and Hardware
4. Data Level Parallelism (DLP)
5. Thread Level Parallelism (TLP)

Tentative Lecture Breakdown:

1. Introductory Concepts
6. Technology trends
7. Measuring performance
8. Quantitative design principles
9. Review of instruction set architecture principles
2. Memory Systems
1. Introduction
2. Introduction to Caches
3. Cache Performance
4. Reducing Cache Miss Penalty
5. Reducing Miss Rate
6. Reducing Cache Miss Penalty or Miss Rate via Parallelism
7. Reducing Hit Time
8. Main Memory and Organizations for Improving Performance
9. Memory Technology
3. Instruction-Level Parallelism in Software and Hardware
1. Instruction-Level Parallelism: Concepts and Challenges
2. Basic Compiler Techniques for Exposing ILP
3. Reducing Branch Costs with Advanced Branch Prediction
4. Dynamic Scheduling: Examples and the Algorithm
5. Hardware-Based Speculation
6. Exploiting ILP Using Multiple Issue and Static Scheduling
7. Exploiting ILP Using Dynamic Scheduling, Multiple Issue, and Speculation
8. Advanced Techniques for Instruction Delivery and Speculation
9. Limitations of ILP
10. ILP Approaches and the Memory System
11. Exploiting Thread-Level Parallelism to Improve Uniprocessor Throughput
4. Data Level Parallelism (DLP)
1. Vector Architecture
2. SIMD Instruction Set Extensions for Multimedia
3. Graphics Processing Units
4. Detecting and Enhancing Loop-Level Parallelism

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EEE440 Computer Architecture Spring 2020

5. Thread Level Parallelism (TLP)

1. Centralized Shared-Memory Architectures
2. Performance of Symmetric Shared-Memory Multiprocessors
3. Distributed Shared-Memory and Directory-Based Coherence
4. Basics of Synchronization: The Basics
5. Models of Memory Consistency: An Introduction

Assessment Plan:
Theory Quizzes (minimum 4) 15%
Homework assignments (minimum 4) 10%
2 Sessional exams (in class, 60-80 minutes each, 10%+15%) 25%
Terminal exam (3 hours) 50%
Total (theory) 100%

Learning Outcomes Assessment Plan (Tentative):

Sr. # Course Learning Outcomes Assessment
1. Assignment 1
2. Quiz 1
3. Sessional 1
4. Assignment 2
5. Quiz 2
6. Assignment 3
7. Quiz 3
8. Sessional 2
9. Assignment 4
10. Quiz 4
11. Terminal
Table 1: Assessment Plan for Course Learning Outcomes

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EEE440 Computer Architecture Fall 2018

Mapping Course Learning Outcomes (CLOs) to Program Learning Outcomes (PLOs):

PLO 1 Engineering Knowledge: An ability to apply knowledge of mathematics, science,
engineering fundamentals and an engineering specialization to the solution of complex
engineering problems.
PLO 2 Problem Analysis: An ability to identify, formulate, research literature, and analyze
complex engineering problems reaching substantiated conclusions using first principles
of mathematics, natural sciences and engineering sciences.
PLO 3 Design/Development of Solutions: An ability to design solutions for complex
engineering problems and design systems, components or processes that meet
specified needs with appropriate consideration for public health and safety, cultural,
societal, and environmental considerations.
PLO 4 Investigation: An ability to investigate complex engineering problems in a methodical
way including literature survey, design and conduct of experiments, analysis and
interpretation of experimental data, and synthesis of information to derive valid
conclusions.
PLO 5 Modern Tool Usage: An ability to create, select and apply appropriate techniques,
resources, and modern engineering and IT tools, including prediction and modeling, to
complex engineering activities, with an understanding of the limitations.
PLO 6 The Engineer and Society: An ability to apply reasoning informed by contextual
knowledge to assess societal, health, safety, legal and cultural issues and the
consequent responsibilities relevant to professional engineering practice and solution
to complex engineering problems.
PLO 7 Environment and Sustainability: An ability to understand the impact of professional
engineering solutions in societal and environmental contexts and demonstrate
knowledge of and need for sustainable development.
PLO 8 Ethics: Apply ethical principles and commit to professional ethics and responsibilities
and norms of engineering practice.
PLO 9 Individual and Team Work: An ability to work effectively, as an individual or in a team,
on multifaceted and /or multidisciplinary settings.
PLO 10 Communication: An ability to communicate effectively, orally as well as in writing, on
complex engineering activities with the engineering community and with society at
large, such as being able to comprehend and write effective reports and design
documentation, make effective presentations, and give and receive clear instructions.
PLO 11 Project Management: An ability to demonstrate management skills and apply
engineering principles to one’s own work, as a member and/or leader in a team, to
manage projects in a multidisciplinary environment.
PLO 12 Lifelong Learning: An ability to recognize importance of, and pursue lifelong learning in
the broader context of innovation and technological developments.

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EEE440 Computer Architecture Fall 2018

PLOs

PLO10

PLO11

PL012
PLO 9
PLO1

PLO2

PLO3

PLO4

PLO5

PLO6

PLO7

PLO8
CLOs
CLO1 C2

CLO2 C4

CLO3 C4

CLO4 C4

Table 2: Mapping CLOs to PLOs

Outcome Coverage Explanation:

PLO 1 – Engineering Knowledge:
The homework, exams fully demonstrate the requirement of applied knowledge of engineering. In view
of nature of course which demands solid basic knowledge of electrical engineering, students learn how to
harden those concepts through study of different computer system architecture.
A prime part of this course discusses different computer system designs and architecture. As well as
provide study of evolution of those computer architectures and designs through analysis and hazards
identification while rectify those problems through different modifications in computer system design.
PLO 2- Problem Analysis:
The course shows the value of theory, by making it possible for the students to solve relevant engineering
problems, which form the basis of more complex and efficient computer design.
PLO 3 - 12: These PLOs are not directly addressed in this course.

Version Applicable From

Version 1 Fall 2016

Version 2 Spring 2017

Version 3 Fall 2017

Version 4 Fall 2018

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