EE4415:

Integrated Circuits Design

Associate Professor Lian Yong

Dept. of ECE, NUS
Email: [email protected]
Office : E4-05-38
Phone : 65162993

Course Websites & Ref. Books

z http://ivle.nus.edu.sg
z Jan M. Rabaey, Anantha Chandrakasan, and Borivoje
Nikolic, “Digital Integrated Circuits”, 2E, Prentice-Hall.
z Sung-Mo Kang, and Yusuf Leblebici, “CMOS Digital
Integrated Circuits: Analysis and Design”, 3E, McGraw
Hill.
z Himanshu Bhatnagar, “Advanced ASIC Chip Synthesis
Using Synopsys Design Compiler,Physical Compiler,
and PrimeTime”, Kluwer Academic Publishers, 2002.
z Stephen Brown Zvonko Vranesic, “Fundamentals of
Digital Logic with Verilog Design”, McGraw Hill.

1
Topics Covered
The first part covers the digital IC
design including:
z Introduction to IC design

z ASIC Design Methodology

z Synthesis Basics using Synopsys

z Design exercises = 30% CA

What Is IC Design ?
IC design is a process of the
transformation of an idea into a
manufacturable device that carries
out an intended function.

2
 Design Classification
z Analog design.
z Mixed-Signal design.
z Digital design.

RF front-end Baseband

Analog-to-digital digital-to-analog
converter converter

Semiconductor Industry

3
Introduction to Digital IC
Design
z Why is designing digital ICs different
today than it was before?
z Will it change in future?

The First Computer

The Babbage
Difference Engine
(1832)
25,000 parts
cost: £17,470

4
ENIAC :
The first electronic computer (1946)

The Transistor Revolution

First transistor
Bell Labs, 1948

5
The First Integrated Circuits

Bipolar logic
1960’s

ECL 3-input Gate

Motorola 1966

Intel 4004 Micro-Processor

1971
1000 transistors
1 MHz operation

6
 Intel Pentium (IV) microprocessor

The Trend in IC Design

z System integration : moving from board to
chip Æ System-on-Chip (SoC)
z What is SoC ?

7
 The Challenges
z The algorithmic driving force Ædesign complexity

Moore’s Law
z In 1965, Gordon Moore noted that the
number of transistors on a chip doubled
every 18 to 24 months.
z He made a prediction that semiconductor
technology will double its effectiveness every
18 months

8
Number of Transistors per Die

Source: ISSCC 2003 G. Moore “No exponential is forever, but ‘forever’ can be delayed”

Moore’s Law

Year of introduction Transistors

z 4004 1971 2,250
z 8008 1972 2,500
z 8080 1974 5,000
z 8086 1978 29,000
z 286 1982 120,000
z 386™ 1985 275,000
z 486™ DX 1989 1,180,000
z Pentium® 1993 3,100,000
z Pentium II 1997 7,500,000
z Pentium III 1999 24,000,000
z Pentium 4 2000 42,000,000

9
Microprocessor Clock Frequency

10000
Doubles every
1000 2 years
Frequency (Mhz)

P6
100
Pentium ® proc
486
10 8085 386
8086 286

1 8080
8008
4004
0.1
1970 1980 1990 2000 2010
Year
Courtesy of Intel

Die Size Growth

100
Die size (mm)

P6
10 486 Pentium ® proc
386
286
8080 8086
8085 ~7% growth per year
8008
4004 ~2X growth in 10 years

1
1970 1980 1990 2000 2010
Year
Courtesy of Intel

10
Evolution in Complexity

Power Dissipation
100

P6
Pentium ® proc
Power (Watts)

10
486
8086 286
386
8085
1 8080
8008
4004

0.1
1971 1974 1978 1985 1992 2000
Year

Courtesy of Intel

11
Power: a Major Problem
100000
18KW
10000 5KW
1.5KW
Power (Watts)

1000 500W
Pentium® proc
100
286 486
10 8086 386
8085
8080
8008
1 4004

0.1
1971 1974 1978 1985 1992 2000 2004 2008
Year
Courtesy of Intel

Power Density

10000
Rocket
Power Density (W/cm2)

Nozzle
1000
Nuclear
Reactor
100

8086
10 4004 Hot Plate P6
8008 8085 386 Pentium® proc
286 486
8080
1
1970 1980 1990 2000 2010
Year
Courtesy of Intel

12
The Power Crisis

1200
15 mm Die
1000 Leakage
800 Active
Power (W)

600

400

200

0
0.25u 0.18u 0.13u 90nm 65nm 45nm

Technology Scaling
z Technology shrinks by ~0.7 per generation
z With every generation can integrate 2x more
functions on a chip; chip cost does not increase
significantly
z Cost of a function decreases by 2x
z But …
z How to design chips with more and more
functions?
z Design engineering population does not double
every two years…
z Hence, a need for more efficient design methods
z Exploit different levels of abstraction

13
 Design Abstraction Levels

SYSTEM

MODULE
+

GATE

CIRCUIT
Vin Vout

DEVICE
G
S D
n+ n+

Considerations in IC Design
z Chip size (cost)
z Operation speed (value)
z Power consumption (energy efficiency)
z Manufacturability
z Testability
z Reliability
z Time-to-market
z Constrains in design

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