Battery Operated Coin Based
Battery Operated Coin Based
The coin based solar charger consist of a microcontroller (8951c),LCD display,solar panel and other
components. The microcontroller is configured as follows:
A solar panel is used which convert sun’s light energy into electricity is used to charge the battery (6v,
4.5Am/h) which is used to supply power to the universal mobile connector.
Initially when the coin slot is empty the photodiode receives signal from the l.e.d, it generates a logic
high level which drives transistor Q1 into saturation. Vce(sat) is give to P1.0.This signal is taken as “no
coin have been inserted” by the microcontroller. When the coin is inserted, the light from the, l.e.d. is
blocked which results in a logic low level signal. This signal (i.e. Vce = Vcc) is taken as “ coin inserted” by
the microcontroller.
When the microcontroller receives signal that the coin have been inserted, it transmits data signals to
energised relay R1 via transistor Q3 turning its contact to ‘n.c’ position. This connects the battery to the
mobile connector and the cell phone starts charging. The microcontroller starts a 10-minutes timer to
count the charging and give this data as a display to l.c.d. screen so that the user know how much
charging time is left. It will also show the amount of battery left on the phone.
The battery will deenergised relay R2 and connect it to ‘n.o.’ which will turn on the l.e.d. lamp indicating
charging is in process.
After the designated time the microcontroller will make R1 & R2 to thier earlier position which will cut
off the supply and R2 give signal to the microcontroller via Rxd pin that charging have been terminated
and l.e.d. will be switched off
Features
• Compatible with MCS®-51 Products
• 4K Bytes of In-System Programmable (ISP) Flash Memory
– Endurance: 1000 Write/Erase Cycles
• 4.0V to 5.5V Operating Range
• Fully Static Operation: 0 Hz to 33 MHz
• Three-level Program Memory Lock
• 128 x 8-bit Internal RAM
• 32 Programmable I/O Lines
• Two 16-bit Timer/Counters
• Six Interrupt Sources
• Full Duplex UART Serial Channel
• Low-power Idle and Power-down Modes
• Interrupt Recovery from Power-down Mode
• Watchdog Timer
• Dual Data Pointer
• Power-off Flag
• Fast Programming Time
• Flexible ISP Programming (Byte and Page Mode)
Description
The AT89S51 is a low-power, high-performance CMOS 8-bit microcontroller with 4K
bytes of In-System Programmable Flash memory. The device is manufactured using
Atmel’s high-density nonvolatile memory technology and is compatible with the industry-
standard 80C51 instruction set and pinout. The on-chip Flash allows the program
memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer.
By combining a versatile 8-bit CPU with In-System Programmable Flash on
a monolithic chip, the Atmel AT89S51 is a powerful microcontroller which provides a
highly-flexible and cost-effective solution to many embedded control applications.
The AT89S51 provides the following standard features: 4K bytes of Flash, 128 bytes of
RAM, 32 I/O lines, Watchdog timer, two data pointers, two 16-bit timer/counters, a fivevector
two-level interrupt architecture, a full duplex serial port, on-chip oscillator, and
clock circuitry. In addition, the AT89S51 is designed with static logic for operation
down to zero frequency and supports two software selectable power saving modes.
The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, and
interrupt system to continue functioning. The Power-down mode saves the RAM contents
but freezes the oscillator, disabling all other chip functions until the next external
interrupt or hardware reset.
Pin Diagram of 89C51:
Block Diagram
Brief Description
The AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with 4K bytes
of Flash programmable and erasable read only memory (PEROM). The device is manufactured using
Phillips’s high-density nonvolatile memory technology and is compatible with the industry-standard
MCS-51 instruction set and pinout. The on-chip Flash allows the program memory to be reprogrammed
in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU
with Flash on a monolithic chip, the Phillips AT89C51 is a powerful microcomputer which provides a
highly-flexible and cost-effective solution to many embedded control applications.
Pin Description
VCC
Supply voltage.
GND
Ground.
Port 0
Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can sink
eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high impedance inputs. Port
0 may also be configured to be the multiplexed low order address/data bus during accesses to external
program and data memory. In this mode P0 has internal pull-ups. Port 0 also receives the code bytes
during Flash programming, and outputs the code bytes during program verification. External pull-ups are
required during program verification.
Port 1
Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 1 output buffers can
sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the internal pull-
ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source
current (IIL) because of the internal pull-ups. Port 1 also receives the low-order address bytes during
Flash programming and verification.
Port 2
Port 2 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 2 output buffers can
sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by the internal
pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will
source current (IIL) because of the internal pull-ups. Port 2 emits the high-order address byte during
fetches from external program memory and during accesses to external data memory that uses 16-
bit addresses (MOVX @ DPTR). In this application, it uses strong internal pull-ups when emitting 1s.
During accesses to external data memory that uses 8-bit addresses (MOVX @ RI), Port 2 emits the
contents of the P2 Special Function Register.
Port 2 also receives the high-order address bits and some control signals during Flash programming
and verification.
Port 3
Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 3 output buffers can
sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled high by the internal
pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will
source Current (IIL) because of the pull-ups. Port 3 also serves the functions of various special
features of the AT89C51 as listed below:
Port 3 also receives some control signals for Flash programming and verification.
RST
Reset input. A high on this pin for two machine cycles while the oscillator is running resets
the device.
ALE/PROG
Address Latch Enable output pulse for latching the low byte of the address during accesses
to external memory. This pin is also the program pulse input (PROG) during Flash programming. In
normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used
for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each
access to external Data Memory. If desired, ALE operation can be disabled by setting bit 0 of SFR
location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the
pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external
execution mode.
PSEN
Program Store Enable is the read strobe to external program memory. When the AT89C51
is executing code from external program memory, PSEN is activated twice each machine cycle,
except that two PSEN activations are skipped during each access to external data memory.
EA/VPP
External Access Enable. EA must be strapped to GND in order to enable the device to fetch
code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if
lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for
internal program executions. This pin also receives the 12-volt programming enable voltage (VPP)
during Flash programming, for parts that require 12-volt VPP.
XTAL1
Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
XTAL2
Output from the inverting oscillator amplifier.
LCD
GENERAL SPECIFICATION:
value
0-7 G
BackSpace Ctrl-H 8
Horizontal Tab Ctrl-I 9
New Line Ctrl-J 10
Vertical Tab Ctrl-K 11
Form Feed (Clear Screen) Ctrl-L 12
Carriage Return Ctrl-M 13
Reset Controller Ctrl-N 14
Set Geometry Ctrl-O 15
Set Tab Size Ctrl-P 16
Set Cursor Position Ctrl-Q 17
*Not Used ***** **
Set Contrast Ctrl-S 19
Set Backlight Ctrl-T 20
Command Escape Ctrl-U 21
Data Escape Ctrl-V 22
Raw Data Escape Ctrl-W 23
*Not Used ***** **
Display an ASCII None 22 – 255
Character
BATTERY OPERATED COIN BASED
SOLAR CHARGER
1. Introduction
2. Block diagram
3. Circuit diagram
4. Working of circuit
5. Component list
6. Datasheet
7. Bibliography
Component List
2 Diode 1N4007 4
3 Capacitor1000uF,25V 1
5 Capacitor 1uF 1
6 LED 1
7 Resistors 15
8 Disc capacitors 5
9 IC Base 5
10 PCB 1
11 Wires 2
12 Solder wire 1
13 Cabinet 1
14 Mains cord 1
15 Transistor BC548 5
Bibiliography
3.www.redcircuits.com
4.www.alldatasheet.com
5.www.elctronicsforu.com
Solar Panel
Power,
clock,
reset